Commit Graph

203 Commits

Author SHA1 Message Date
Andrew Cagney dbd7cd63b9 Index: common/ChangeLog
2003-02-26  Andrew Cagney  <cagney@redhat.com>

	* sim-engine.h (sim_engine_abort): Add noreturn attribute.
	(sim_engine_vabort): Ditto.
	(sim_engine_halt, sim_engine_restart): Ditto.

Index: mn10300/ChangeLog
2003-02-26  Andrew Cagney  <cagney@redhat.com>

	* am33.igen: Call sim_engine_abort instead of abort.
2003-02-26 23:27:09 +00:00
David Carlton bb6317d347 2003-02-26 David Carlton <carlton@math.stanford.edu>
* dv-mn103tim.c (read_special_timer6_reg): Add break after
	empty default: label.
	(write_special_timer6_reg): Ditto.
	Update copyright.
2003-02-26 17:04:19 +00:00
Andrew Cagney 6c0a25e9f8 2002-11-28 Andrew Cagney <cagney@redhat.com>
* sim-main.h: Only include "idecode.h" once.
	* Makefile.in (SIM_EXTRA_DEPS): Define.
2002-11-28 18:08:26 +00:00
Andrew Cagney c8cca39f98 Import current --enable-gdb-build-warnings. 2002-06-16 16:33:35 +00:00
Andrew Cagney 3c25f8c7b0 Move include/callback.h and include/remote-sim.h to include/gdb/.
Update accordingly.
2002-06-09 15:45:54 +00:00
Jim Blandy ff88f59d5a *** empty log message *** 2001-05-07 06:10:25 +00:00
Alexandre Oliva cc274e7c27 * Makefile.in (idecode.o, op_utils.o, semantics.o, simops.o):
Depend on targ-vals.h.
2001-04-26 19:23:16 +00:00
J.T. Conklin d4424adaef * Makefile.in (simops.o): Add simops.h to dependency list. 2001-04-15 19:57:10 +00:00
Alexandre Oliva 5425ca992e * am33.igen: Warning clean-up.
(movm): Initialize PC and mask.
(mov, movbu, movhu): Set srcreg2 from RI0.
(bsch): Initialize c.
(sat16_cmp): Actually do the comparison.
(mov_llt): Do not overwrite dstreg with uninitialized variable.
2000-08-09 18:42:04 +00:00
Andrew Cagney eb2d80b469 Change profiling so that it is enabled by default. Re-generate everything. 2000-05-24 04:39:50 +00:00
Alexandre Oliva e33c036475 * am33.igen: Fix leading comments of SP-relative offset insns that
referred to other registers.  Make their offsets unsigned.
2000-05-22 20:34:09 +00:00
Alexandre Oliva 24a39d88a2 * mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr,
genericXor, genericBtst): Use `unsigned32'.
* op_utils.c: Likewise.
* mn10300.igen, am33.igen: Use `unsigned32', `signed32',
`unsigned64' or `signed64' where type width is relevant.
2000-05-18 22:56:28 +00:00
Alexandre Oliva bfa8561f01 * am33.igen (inc4 Rn): Use genericAdd so as to modify flags. 2000-04-25 09:48:40 +00:00
Alexandre Oliva d8e7020fd6 * am33.igen: Make SP-relative offsets unsigned. Add `*am33' for
some instructions that were missing it.
2000-04-09 09:04:54 +00:00
Frank Ch. Eigler a9e3a73989 * build fix
2000-03-03  Alexandre Oliva  <oliva@lsd.ic.unicamp.br>

	* Makefile.in (IGEN_INSN): Added am33.igen.
2000-03-03 23:25:10 +00:00
Jason Molenda c2d11a7da0 import gdb-1999-12-06 snapshot 1999-12-07 03:56:43 +00:00
Stan Shebs d4f3574e77 import gdb-1999-09-08 snapshot 1999-09-09 00:02:17 +00:00
Jason Molenda adf40b2e16 import gdb-1999-07-19 snapshot 1999-07-19 23:30:11 +00:00
Stan Shebs cd0fc7c3eb import gdb-1999-05-10 1999-05-11 13:35:55 +00:00
Stan Shebs 7a292a7adf import gdb-19990422 snapshot 1999-04-26 18:34:20 +00:00
Stan Shebs c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs 071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Joyce Janczyn cf83964e6f Regress yesterday's change to jmp instn implementation in mn10300.igen. 1998-08-26 13:37:56 +00:00
Joyce Janczyn ef4d20e915 Regress yesterday's change to jmp instruction -- it has deceiving syntax.
Also tidy up some code to match documentation and fix div, divu by 0.
1998-08-26 13:31:38 +00:00
Joyce Janczyn 59587664ab * mn10300.igen (OP_F0F4): Need to load contents of register AN0
for jmp.
1998-08-25 20:49:35 +00:00
Joyce Janczyn c1802bfd60 * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA. 1998-08-24 15:52:43 +00:00
Jeff Law 3e20223154 * am33.igen: Detect cases where two operands must not match in
non-DSP instructions.
1998-07-27 18:05:43 +00:00
Joyce Janczyn a2f93b6758 Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com>
* op_utils.c (do_syscall): Rewrite to use common/syscall.c.
	(syscall_read_mem, syscall_write_mem): New functions for syscall
	callbacks.
	* mn10300_sim.h: Add prototypes for syscall_read_mem and
	syscall_write_mem.
	* mn10300.igen: Change C++ style comments to C style comments.
	Check for divide by zero in div and divu ops.
1998-07-24 22:22:35 +00:00
Jeff Law 6d254a2d5f * am33.igen (translate_xreg): New function. Use it as needed. 1998-07-24 18:50:12 +00:00
Jeff Law 4b6651c925 * am33.igen: Add some missing instructions.
Missed a few last week... Grrr.
1998-07-23 16:31:41 +00:00
Jeff Law 6ae1456eb5 * am33.igen: Autoincrement loads/store fixes. 1998-07-23 16:06:50 +00:00
Jeff Law 0a78550778 * am33.igen: Add most am33 DSP instructions. 1998-07-21 15:50:14 +00:00
Jeff Law 080ee2ba75 * am33.igen: Fix Z bit for remaining addc/subc instructions.
Do not sign extend immediate for mov imm,XRn.
        More random mul, mac & div fixes.
        Remove some unused variables.
        Sign extend 24bit displacement in memory addresses.
Whee, more fixes.
1998-07-09 19:41:47 +00:00
Jeff Law 4e86afb85f * mn10300.igen: Fix Z bit for addc and subc instructions.
Minor fixes in multiply/divide patterns.

start-sanitize-am33
        * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn.  Various
        fixes to 2 register multiply, divide and mac instructions.  Set
        Z,N correctly for sat16.  Sign extend 24 bit immediate for add,
        and sub instructions.

        * am33.igen: Add remaining non-DSP instructions.
end-sanitize-am33
1998-07-09 19:04:22 +00:00
Jeff Law 1f0ba346eb * am33.igen: Add remaining non-DSP instructions.
Lots of work still remains.  PSW handing is probably broken badly and the
mul/mac classes of instructions are probably not handled correctly.
1998-07-09 16:09:24 +00:00
Jeff Law 9c55817e66 * am33.igen (translate_rreg): New function. Use it as appropriate. 1998-07-09 00:24:57 +00:00
Jeff Law 377e53bb6b * am33.igen: More am33 instructions. Fix "div". 1998-07-08 22:33:35 +00:00
Jeff Law d2b02ab22d * mn10300.igen: Add am33 support. 1998-07-06 22:02:02 +00:00
Jeff Law 135431cd7e * Makefile.in: Use multi-sim to support both a mn10300 and am33
simulator.
1998-07-06 21:57:22 +00:00
Jeff Law 3e75ff7efd * am33.igen: Add many more am33 instructions. 1998-07-06 21:41:06 +00:00
Jeff Law 0f7d73858c * am33.igen: New file with some am33 support.
Checking in work-to-date.
1998-07-01 23:13:14 +00:00
Jeff Law de2adf7070 * mn10300_sim.h (FETCH24): Define.
* mn10300_sim.h: Add defines for some registers found on the AM33.
1998-07-01 23:11:59 +00:00
Jeff Law a6cbaa652a * mn10300_sim.h: Include bfd.h
(struct state): Add more room for processor specific registers.
start-sanitize-am33
        (REG_E0): Define.
end-sanitize-am33
1998-06-30 17:28:54 +00:00
Joyce Janczyn 5eb78d70cc Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com>
* dv-mn103tim.c: Include sim-assert.h
	* dv-mn103ser.c (do_polling_event): Check for incoming data on
	serial line and schedule next polling event.
	(read_status_reg): schedule events to check for incoming data on
	serial line and issue interrupt if necessary.
1998-06-25 14:17:47 +00:00
Joyce Janczyn 0df90cd8e4 Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com>
* interp.c (board): Rename am32 to stdeval1 as this is the name
	consistently used to refer to the mn1030002 board.
1998-06-19 16:02:51 +00:00
Joyce Janczyn f0ce242fcd Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com>
* interp.c (sim_open): Fix typo in address of EXTMD register
	(0x34000280, not 0x3400280).
1998-06-18 18:43:11 +00:00
Joyce Janczyn f14defcc75 Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com>
* dv-mn103int.c (mn103int_finish): Regular interrupts (not NMI or
	reset) are not enabled on reset.
1998-06-16 13:43:34 +00:00
Joyce Janczyn 2a62f119fa Updates to dv-mn103iop.c, dv-mn103ser.c and inter.c 1998-06-14 21:19:53 +00:00
Joyce Janczyn 55a7ce4ea8 Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com>
* dv-mn103iop.c: New file for handling am32 io ports.
	* configure.in: Add mn103iop to hw_device list.
	* configure: Re-generate.
	* interp.c (sim_open): Create io port device.
1998-06-12 20:46:23 +00:00
Joyce Janczyn 8c2de2aa33 Wed June 10 14:34:00 1998 Joyce Janczyn <janczyn@cygnus.com>
* dv-mn103int.c (external_group): Use enumerated types to access
	correct group addresses.
	* dv-mn103tim.c (do_counter_event): Underflow of cascaded timer
	triggers an interrupt on the higher-numbered timer's port.
1998-06-10 18:47:09 +00:00
Joyce Janczyn d3f76d42ac Add timer and serial devices (mn103tim and mn103ser), support
--board=am32 for runtime control of device simulation, and adjust
interrupt settings to support am32 instead of am30.
1998-06-08 17:46:25 +00:00
Andrew Cagney 39e953a722 Split out hw-event code. Clean up interface. Update all users. 1998-05-25 07:37:30 +00:00
Andrew Cagney f872d0d643 Only enable H/W on some mips targets.
Move common hw-obj to Make-common
Pacify GCC
1998-05-22 05:23:04 +00:00
Andrew Cagney 56833aba59 Back out of hw-main _callback -> _descriptor changes 1998-05-22 01:12:06 +00:00
Andrew Cagney 26feb3a83d Fix sign extension on 32 bit add/sub instructions. 1998-05-21 09:32:07 +00:00
Geoffrey Noer 9d45df1b8c Tue Apr 28 18:28:58 1998 Geoffrey Noer <noer@cygnus.com>
* common/aclocal.m4: call AM_EXEEXT in SIM_AC_COMMON, define
        AM_CYGWIN32 and AM_EXEEXT.
        * common/Make-common.in: set EXEEXT, add missing EXEEXTs
        to run and install-common rules.
        * common/configure: regenerate

And update all subdirectory ChangeLogs and configure files.
1998-04-29 01:44:23 +00:00
Tom Tromey 5da9ce07eb * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* acconfig.h: New file.
	* configure.in: Reverted change of Apr 24; use sinclude again.
1998-04-26 22:03:55 +00:00
Tom Tromey b1df34b9ed * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* configure.in: Don't call sinclude.
1998-04-24 20:39:48 +00:00
Andrew Cagney 1e23866b9b o Use new `!<field>' and `=<field>' operators in spec of
MOV and CMP instructions.
o	Enable basic inlining.  Diable use of SIM_MAIN_INLINE.
1998-04-14 00:59:30 +00:00
Andrew Cagney 278bda4050 Cleanup INLINE support for simulators using common framework.
Make IGEN responsible for co-ordinating inlining of generated files.
By default, aclocal.m4 disabled all inlining.
1998-04-04 12:33:11 +00:00
Andrew Cagney 6d133cc9df Add sanitize-am30 markers. Keep details of AM30 implementation of
mn10300 out of the public eye.
Do something with top-level cgen directory.
1998-03-27 03:10:53 +00:00
Andrew Cagney 1b756ba6d5 * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of succeeding
interrupts, clear pending_handler when the handler isn't re-scheduled.
1998-03-26 14:00:18 +00:00
Stu Grossman abf6ba256a * Makefile.in (tmp-igen): Prefix all usage of move-if-change
script with $(SHELL) to make NT native builds happy.
	* configure:  Regenerate because of change to ../common/aclocal.m4.
1998-03-26 10:18:35 +00:00
Andrew Cagney 51ccd82f7f * configure.in: Make --enable-sim-common the default.
* configure: Re-generate.
* sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction
address into Sate.regs[REG_PC] instead of common struct.
1998-03-26 01:13:38 +00:00
Joyce Janczyn d1607ed316 * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value. 1998-03-25 22:43:19 +00:00
Joyce Janczyn 52ef605e6d * simops.c (OP_F0FD): Initialise variable 'sp' for rti instruction. 1998-03-25 17:10:01 +00:00
Andrew Cagney c357e16ac8 * dv-mn103int.c (decode_group): A group register every 4 bytes not 8.
(write_icr): Rewrite equation updating request field.
(read_iagr): Fix check that interrupt is still pending.
1998-03-25 14:52:44 +00:00
Andrew Cagney 8077fed51e * interp.c (sim_open): Tidy up device creation.
* dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero value.
(mn103int_io_read_buffer): Convert absolute address to register block offsets.
(read_icr, write_icr): Convert block offset into group offset.
1998-03-25 05:37:42 +00:00
Andrew Cagney 6100784a60 * interp.c (sim_open): Create second 1mb memory region at 0x40000000.
(sim_open): Create a device tree.
(sim-hw.h): Include.
(do_interrupt): Delete, needs to use dv-mn103cpu.c
* dv-mn103int.c, dv-mn103cpu.c: New files.
1998-03-25 04:15:38 +00:00
Andrew Cagney 8388c9a564 * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM): Define.
(SP): Define.
1998-03-25 04:07:31 +00:00
Andrew Cagney d89fa2d80a Re-do --enable-sim-hardware so that each simulator can specify the devices
it wants built.
Generate hw-config.h.
1998-03-25 01:41:33 +00:00
Andrew Cagney e855e57637 Pacify GCC. 1998-03-25 00:08:52 +00:00
Joyce Janczyn 55045e7b32 Port mn10300 simulator to build with the common simulator framework
under the configure option --enable-sim-common.
1998-03-24 20:30:03 +00:00
Jeff Law 097e6924c2 * simops.c (signed multiply instructions): Cast input operands to
signed32 before casting them to signed64 so that the sign bit
        is propagated properly.
1998-02-25 08:58:23 +00:00
Mark Alexander a9faef120e * Makefile.in: Last change was bad. Define NL_TARGET
so that targ-vals.h will be used instead of syscall.h.
	* simops.c: Use targ-vals.h instead of syscall.h.
	(OP_F020): Disable unsupported system calls.
1998-02-24 05:07:11 +00:00
Mark Alexander e04b0d76da * Makefile.in: Get header files from libgloss/mn10300/sys. 1998-02-23 17:51:23 +00:00
Jeff Law 7eab31b76f * simops.c: Include sim-types.h. 1998-02-22 22:59:43 +00:00
Andrew Cagney fbb8b6b9ab For sim_fetch_register / sim_store_register: Add LENGTH parameter,
return actual size of register, 0 if not applicable, -1 of legacy
implementation.
1998-02-17 04:06:38 +00:00
Andrew Cagney 412c4e940e Add config support for the size of the target address and OF cell. 1998-01-31 14:07:23 +00:00
Doug Evans 462cfbc4eb * aclocal.m4: Recognize --enable-maintainer-mode.
*/configure: Regenerated.
1998-01-20 06:37:00 +00:00
Andrew Cagney b5da31ac7c Correct name of file given in ChangeLog for change: Pass lma_p and
sim_write args to sim_load_file.
1997-10-25 05:04:25 +00:00
Andrew Cagney 9e03a68f13 Add LMA_P and DO_WRITE arguments to sim/common/sim-load.c:sim_load_file().
Update all simulators.
Clarify behavour of sim_load in remote-sim.h
1997-10-22 05:26:27 +00:00
Jeff Law f4ab2b2fdc * simops.c: Correctly handle register restores for "ret" and "retf"
instructions.
pr13306 related stuff.
1997-10-21 16:07:53 +00:00
Andrew Cagney 92f91d1ff0 Remove need to update <targ>/Makefile.in when adding optional options
to <targ>/configure.in.
Simplify logic used to select target [default] endianness.
1997-09-23 01:25:26 +00:00
Andrew Cagney 794e9ac96a Simplify logic behind the generic configuration option --enable-sim-alignment. 1997-09-22 02:49:57 +00:00
Andrew Cagney b45caf050c Add support for --enable-sim-alignment to simulator common aclocal.m4
Add support for --alignment={strict,nonstrict,forced} to simulator common
run-time options.
For v850 use, make the default NONSTRICT_ALIGNMENT.
1997-09-22 00:24:46 +00:00
David Edelsohn 6fea47635b * configure: Regenerated to track ../common/aclocal.m4 changes. 1997-09-05 00:42:05 +00:00
Andrew Cagney 8811705410 Fix doco on enable-sim-inline. 1997-08-27 22:43:18 +00:00
Andrew Cagney fafce69ab1 Add ABFD argument to sim_create_inferior. Document.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
1997-08-27 04:44:41 +00:00
Andrew Cagney 7230ff0faa Flush defunct sim_kill. 1997-08-26 02:05:18 +00:00
Andrew Cagney 247fccdeb5 Add ABFD argument to sim_open call. Pass through to sim_config so
that image properties such as endianness can be checked.

More strongly document the expected behavour of each of the sim_*
interfaces.

Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN.  Use in sim_config.
1997-08-25 23:14:25 +00:00
Jeff Law c370b3cd95 * simops.c: Fix thinko in last change. 1997-06-12 04:14:42 +00:00
Jeff Law dbdb5bd881 * simops.c: "call" stores the callee saved registers into the
stack!  Update the stack pointer properly when done with
        register saves.
1997-06-10 22:59:13 +00:00
Jeff Law 0a8fa63cb8 * simops.c: Fix return address computation for "call" instructions. 1997-06-10 18:32:40 +00:00
Jeff Law 09e142d5a2 * interp.c (sim_resume): Add missing case in big switch
statement (for extb instruction).
1997-05-22 05:28:34 +00:00
Jeff Law 003c91bec4 * interp.c: Replace all references to load_mem and store_mem
with references to load_byte, load_half, load_3_byte, load_word
        and store_byte, store_half, store_3_byte, store_word.
        (INLINE): Delete definition.
        (load_mem_big): Likewise.
        (max_mem): Make it global.
        (dispatch): Make this function inline.
        (load_mem, store_mem): Delete functions.
        * mn10300_sim.h (INLINE): Define.
        (RLW): Delete unused definition.
        (load_mem, store_mem): Delete declarations.
        (load_mem_big): New definition.
        (load_byte, load_half, load_3_byte, load_word): New functions.
        (store_byte, store_half, store_3_byte, store_word): New functions.
        * simops.c:  Replace all references to load_mem and store_mem
        with references to load_byte, load_half, load_3_byte, load_word
        and store_byte, store_half, store_3_byte, store_word.
1997-05-20 23:53:47 +00:00
Jeff Law 4df7aeb3c5 * interp.c (dispatch): Make this an inline function.
* simops.c (syscall): Use callback->write regardless of
        what file descriptor we're writing too.
1997-05-19 19:55:31 +00:00
Jeff Law b07a1e78c5 * interp.c (load_mem_big): Remove function. It's now a macro
defined elsewhere.
        (compare_simops): New function.
        (sim_open): Sort the Simops table before inserting entries
        into the hash table.
        * mn10300_sim.h: Remove unused #defines.
        (load_mem_big): Define.
Another 20% so performance improvement for the mn10300 simulator.
1997-05-18 22:57:49 +00:00
Jeff Law 234a9a49cf * interp.c (load_mem): If we get a load from an out of range
address, abort.
        (store_mem): Likewise for stores.
        (max_mem): New variable.
1997-05-16 22:37:02 +00:00
Jeff Law 8def922034 * mn10300_sim.h: Fix ordering of bits in the PSW. 1997-05-06 19:42:17 +00:00