For now we only have one char pointer in RISC-V tdata, so it should be fine.
But once we need more elements in tdata, then we may get some uninitialize
or unexpected values. I do meet the same problem when extending the RISC-V
tdata.
bfd/
elfnn-riscv.c (elfNN_riscv_mkobject): New function. We need this
to initialize RISC-V tdata.
Now that ISA3.1 is out we can finish with the powerxx silliness.
bfd/
* elf64-ppc.c: Rename powerxx to power10 throughout.
gas/
* config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10
renaming.
* testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in
place of -mfuture/-Mfuture.
* testsuite/gas/ppc/prefix-pcrel.d: Likewise.
* testsuite/gas/ppc/prefix-reloc.d: Likewise.
gold/
* powerpc.cc: Rename powerxx to power10 throughout.
include/
* elf/ppc64.h: Update comment.
* opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX.
ld/
* testsuite/ld-powerpc/callstub-1.d: Use -mpower10/-Mpower10 in
place of -mfuture/-Mfuture.
* testsuite/ld-powerpc/notoc2.d: Likewise.
* testsuite/ld-powerpc/powerpc.exp: Likewise.
* testsuite/ld-powerpc/tlsgd.d: Likewise.
* testsuite/ld-powerpc/tlsie.d: Likewise.
* testsuite/ld-powerpc/tlsld.d: Likewise.
opcodes/
* ppc-dis.c (ppc_opts): Add "power10" entry.
(print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
* ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
PR 25961
* coffgen.c (coff_get_normalized_symtab): Check that buffer
contains required number of auxents before processing any auxent.
* coffswap.h (coff_swap_aux_in <C_FILE>): Only swap in extended
file name from auxents for PE.
* aout-cris.c (DEFAULT_ARCH): Delete define.
(MY_set_arch_mach): Likewise.
(SET_ARCH_MACH): Use bfd_set_arch_mach with an explicit architecture
of bfd_arch_cris.
(swap_ext_reloc_in): Add casts to r_index extraction. Mask valid bits
of r_type before the shift.
PR ld/25665
* bfd/elfnn-aarch64.c (group_sections): Copy implementation
from elf32-arm.c.
* testsuite/ld-aarch64/aarch64-elf.exp: Add new test.
* testsuite/ld-aarch64/farcall-group.s: New large group test.
* testsuite/ld-aarch64/farcall-group.d: Likewise.
PR 25900
* elfnn-riscv.c (_bfd_riscv_relax_section): Check root.type before
accessing root.u.def of symbols. Also check root.u.def.section
is non-NULL. Reverse tests so as to make the logic positive.
This allows backend merge_private_bfd_data to examine shared library
e_flags and/or .gnu.attributes. ARM and PowerPC have done so when
using ld.gold for a long time.
(The tic6x change below is dead code due to the earlier FIXME,
but this is probably one of the changes needed there.)
PR 25882
bfd/
* elf32-tic6x.c (elf32_tic6x_merge_attributes): Don't transfer
Tag_ABI_PIC or Tag_ABI_PID from dynamic objects to the output.
ld/
* ldlang.c (lang_check): Call bfd_merge_private_bfd_data for
shared libraries.
Code in the linker, present before the addition of .gnu.attributes
support, results in shared libraries not being considered by BFD when
merging e_flags and .gnu.attributes from input files to the output.
That doesn't seem correct to me, but I don't know enough about all the
various ABIs to change the behaviour with any confidence. So this
patch merely punts on dynamic objects in merge_private_bfd_data target
functions, with a FIXME for maintainer attention.
I haven't excluded shared libraries from being considered where the
target merge_private_bfd_data (a) already has code dealing with shared
libraries, or (b) where that function just sets the output to the most
constraining arch/mach combination and other fairly trivial merges, or
(c) when the target has no shared library linker support.
In (a) are: arc, arm, aarch64, riscv, sparc.
In (b) are: bpf, cris, csky, m32r, m68k, mn10300, nios2, tilegx,
tilepro, vax, visium, xtensa.
In (c) are: bpf, cr16, h8300, iq2000, m32c, m68hc11, m68hc12, mcore,
mep, msp430, mt, rl78, rx, v850.
PR 25882
* elf32-bfin.c (elf32_bfin_merge_private_bfd_data): Add FIXME.
* elf32-frv.c (frv_elf_merge_private_bfd_data): Likewise.
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Likewise.
* elf32-nds32.c (nds32_elf_merge_private_bfd_data): Likewise.
* elf32-score.c (s3_elf32_score_merge_private_bfd_data): Likewise.
* elf32-score7.c (s7_elf32_score_merge_private_bfd_data): Likewise.
* elf32-sh.c (sh_elf_merge_private_data): Likewise.
* elf32-tic6x.c (elf32_tic6x_merge_attributes): Likewise.
* elf64-ia64-vms.c (elf64_ia64_merge_private_bfd_data): Likewise.
* elfnn-ia64.c (elfNN_ia64_merge_private_bfd_data): Likewise.
EF_PPC_RELOCATABLE and similar flags, if present in an input shared
library, don't have any relevance as far as the output file is
concerned.
Currently, dynamic objects aren't seen in merge_private_bfd_data.
This patch is in preparation for a change to that.
PR 25882
* elf32-ppc.c (ppc_elf_merge_private_bfd_data): Ignore e_flags
from shared libraries.
Fields marked with XTENSA_NDIFF relocations are not negated, they only
have sign bits removed. Don't negate their values when relaxation is
performed. Don't add sign bits when the value is zero. Report overflow
when the result has negative sign but all significant bits are zero.
2020-04-29 Max Filippov <jcmvbkbc@gmail.com>
bfd/
* elf32-xtensa.c (relax_section): Don't negate diff_value for
XTENSA_NDIFF relocations. Don't add sign bits whe diff_value
equals 0. Report overflow when the result has negative sign but
all significant bits are zero.
ld/
* testsuite/ld-xtensa/relax-diff1.d: New test definition.
* testsuite/ld-xtensa/relax-diff1.s: New test source.
* testsuite/ld-xtensa/relax-ndiff.d: New test definition.
* testsuite/ld-xtensa/relax-ndiff.s: New test source.
* testsuite/ld-xtensa/xtensa.exp: (relax-diff1)
(relax-ndiff): New tests.
The zero check was on the wrong operand. And, yes, the second operand
popped is supposed to be divided by the first operand popped.
* vms-alpha.c (_bfd_vms_slurp_etir): Correct divide by zero check.
Emit warning message.
The 64-bit version of binutils got support for the PE COFF BIG OBJ format a
couple of years ago. The BIG OBJ format is a slightly different COFF format
which extends the size of the number of section field in the header from a
uint16_t to a uint32_t and so greatly increases the number of sections allowed.
However the 32-bit version of bfd never got support for this. The GHC Haskell
compiler generates a great deal of symbols due to it's use of
-ffunction-sections and -fdata-sections.
This meant that we could not build the 32-bit version of the GHC Compiler for
many releases now as binutils didn't have this support.
This patch adds the support to the 32-bit port of binutils as well and also does
come cleanup in the code.
bfd/ChangeLog:
* coff-i386.c (COFF_WITH_PE_BIGOBJ): New.
* coff-x86_64.c (COFF_WITH_PE_BIGOBJ): New.
* config.bfd (targ_selvecs): Rename x86_64_pe_be_vec
to x86_64_pe_big_vec as it not a big-endian format.
(vec i386_pe_big_vec): New.
* configure.ac: Likewise.
* targets.c: Likewise.
* configure: Regenerate.
* pe-i386.c (TARGET_SYM_BIG, TARGET_NAME_BIG,
COFF_WITH_PE_BIGOBJ): New.
* pe-x86_64.c (TARGET_SYM_BIG, TARGET_NAME_BIG):
New.
(x86_64_pe_be_vec): Moved.
gas/ChangeLog:
* NEWS: Add news entry for big-obj.
* config/tc-i386.c (i386_target_format): Support new format.
* doc/c-i386.texi: Add i386 support.
* testsuite/gas/pe/big-obj.d: Rename test to not be x64 specific.
* testsuite/gas/pe/pe.exp (big-obj): Make test run on i386 as well.
ld/ChangeLog:
* pe-dll.c (pe_detail_list): Add pe-bigobj-i386.
When a coredump is generated, there are a few registers in
ARC HS that are put under a special section, namely ".reg-v2".
It is for backward compatibility reasons with older tools that
we have decided not to extend the generic ".reg" section.
This patch makes it possible to display the information better
regarding that section. Compare the output of "readelf" without
and with these changes:
$ readelf -n core # without the patch
...
LINUX 0x0000000c Unknown note type: (0x00000600)
description data: 78 08 00 00 2f 6c 64 2d 75 43 6c 69
$ readelf -n core # with the patch
...
LINUX 0x0000000c NT_ARC_V2 (ARC HS accumulator/extra registers)
description data: 78 08 00 00 2f 6c 64 2d 75 43 6c 69
In another commit (soon to be submitted), GDB will makes use of these
changes to parse the extra section and its registers.
bfd/ChangeLog
2020-03-26 Anton Kolesov <anton.kolesov@synopsys.com>
* elf-bfd.h (elfcore_write_arc_v2): Add prototype.
* elf.c (elfcore_grok_arc_v2): New function.
(elfcore_grok_note): Call the new function to handle the corresponding
note.
(elfcore_write_arc_v2): New function.
(elfcore_write_register_note): Call the new function to handle the
corresponding pseudo-sections.
binutils/ChangeLog
2020-03-26 Anton Kolesov <anton.kolesov@synopsys.com>
* readelf.c (get_note_type): Handle NT_ARC_V2.
include/elf/ChangeLog
2020-03-26 Anton Kolesov <anton.kolesov@synopsys.com>
* common.h (NT_ARC_V2): New macro definitions.
Introduce new relaxations XTENSA_PDIFF{8,16,32} for positive differences
(subtracted symbol precedes diminished symbol) and XTENSA_NDIFF{8,16,32}
for negative differences (subtracted symbol follows diminished symbol).
Don't generate XTENSA_DIFF relocations in the assembler, generate
XTENSA_PDIFF or XTENSA_NDIFF based on relative symbol position.
Handle XTENSA_DIFF in BFD for compatibility with old object files.
Handle XTENSA_PDIFF and XTENSA_NDIFF in BFD, treating difference value
as unsigned.
2020-04-22 Max Filippov <jcmvbkbc@gmail.com>
bfd/
* bfd-in2.h: Regenerated.
* elf32-xtensa.c (elf_howto_table): New entries for
R_XTENSA_PDIFF{8,16,32} and R_XTENSA_NDIFF{8,16,32}.
(elf_xtensa_reloc_type_lookup, elf_xtensa_do_reloc)
(relax_section): Add cases for R_XTENSA_PDIFF{8,16,32} and
R_XTENSA_NDIFF{8,16,32}.
* libbfd.h (bfd_reloc_code_real_names): Add names for
BFD_RELOC_XTENSA_PDIFF{8,16,32} and
BFD_RELOC_XTENSA_NDIFF{8,16,32}.
* reloc.c: Add documentation for BFD_RELOC_XTENSA_PDIFF{8,16,32}
and BFD_RELOC_XTENSA_NDIFF{8,16,32}.
binutils/
* readelf.c (is_none_reloc): Recognize
BFD_RELOC_XTENSA_PDIFF{8,16,32} and
BFD_RELOC_XTENSA_NDIFF{8,16,32}.
gas/
* config/tc-xtensa.c (md_apply_fix): Replace
BFD_RELOC_XTENSA_DIFF{8,16,32} generation with
BFD_RELOC_XTENSA_PDIFF{8,16,32} and
BFD_RELOC_XTENSA_NDIFF{8,16,32} generation.
* testsuite/gas/xtensa/loc.d: Replace BFD_RELOC_XTENSA_DIFF16
with BFD_RELOC_XTENSA_PDIFF16 in the expected output.
include/
* elf/xtensa.h (elf_xtensa_reloc_type): New entries for
R_XTENSA_PDIFF{8,16,32} and R_XTENSA_NDIFF{8,16,32}.
ld/
* testsuite/ld-xtensa/relax-loc.d: New test definition.
* testsuite/ld-xtensa/relax-loc.s: New test source.
* testsuite/ld-xtensa/xtensa.exp (relax-loc): New test.
The check in bfd_get_full_section_contents is trying to check that we don't
allocate more space for a section than the size of the section is on disk.
Previously we excluded linker created sections since they didn't have a size on
disk. However we also need to exclude sections with no content as well such as
the BSS section. Space for these would not have been allocated by the assembler
and so the check would incorrectly fail.
bfd/ChangeLog:
PR binutils/24753
* compress.c (bfd_get_full_section_contents): Exclude sections with no
content.
gas/ChangeLog:
PR binutils/24753
* testsuite/gas/arm/pr24753.d: New test.
* testsuite/gas/arm/pr24753.s: New test.
ELF size_dynamic_sections is called by the ELF backend linker after all
the linker input files have been seen but before the section sizes have
been set. After the sections sizes have been set, target-specific,
global optimizations may make some dynamic sections zero-sized if they
are no longer needed.
Add ELF strip_zero_sized_dynamic_sections so that ELF backend linker can
strip zero-sized dynamic sections after the sections sizes have been set.
bfd/
PR ld/25849
* elf-bfd.h (elf_backend_data): Add
elf_backend_strip_zero_sized_dynamic_sections.
(_bfd_elf_strip_zero_sized_dynamic_sections): New prototype.
* elf64-alpha.c (elf_backend_strip_zero_sized_dynamic_sections):
New macro.
* elflink.c (_bfd_elf_strip_zero_sized_dynamic_sections): New
function.
* elfxx-target.h (elf_backend_strip_zero_sized_dynamic_sections):
New macro.
(elfNN_bed): Add elf_backend_strip_zero_sized_dynamic_sections.
ld/
PR ld/25849
* ldelfgen.c (ldelf_map_segments): Call
elf_backend_strip_zero_sized_dynamic_sections.
* testsuite/ld-alpha/tlsbinr.rd: Updated.
This fixes:
FAIL: DT_TEXTREL map file warning
* elf64-alpha.c (alpha_elf_reloc_entry): Replace reltext with
sec.
(elf64_alpha_check_relocs): Set sec instead of reltext. Warn
DT_TEXTREL with -M.
(elf64_alpha_calc_dynrel_sizes): Warn DT_TEXTREL with -M.
git commit 211dc24b87 removed most sh5 and sh64 SuperH support, after
they were obsoleted by git commit 2b213129c5. This patch removes a
few remaining pieces that should have gone with 211dc24b87.
include/
* elf/sh.h (STO_SH5_ISA32, SHF_SH5_ISA32, SHF_SH5_ISA32_MIXED),
(SHT_SH5_CR_SORTED, STT_DATALABEL): Delete.
bfd/
* elf32-sh.c (sh_elf_relocate_section): Remove STO_SH5_ISA32
processing.
Separately, in translate_symbol_table() the 16-bit symbol values were sign extended to unsigned long (e.g., 64 bits) when they really should be treated as unsigned so the value remains 16 bits.
PR 25828
* pdp11.c (N_STAB): Modify value to avoid conflict with N_EXT
causing globals from linker script to be treated as debug symbols.
(translate_symbol_table): Don't sign-extend symbol values from 16
to 64 bits in nm output.
Stripping .rela.branch_lt is easy enough but messes with the
testsuite due to stub symbols (that use section id) changing. Tests
that run on more than one target variant can be tricky to fix, this
renaming happened to work.
bfd/
* elf64-ppc.c (ppc64_elf_size_stubs): Strip relbrlt too.
ld/
* testsuite/ld-powerpc/tlsopt5.s: Rename foo to aaaaa.
* testsuite/ld-powerpc/tlsopt5.d: Adjust to suit.
* testsuite/ld-powerpc/tlsopt6.d: Likewise.
PR 25803
gas * config/obj-elf.c (obj_elf_type): Reject ifunc symbols on MIPS
targets.
* testsuite/gas/elf/elf.exp: Add MIPS targets to the list to skip
for the type-2 test.
* testsuite/gas/elf/type-noifunc.e: Update to allow for MIPS
targets running this test.
bfd * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol): Replace an
abort with a more helpful error message.
PR 25823
* peXXigen.c (_bfd_XXi_swap_sym_in <C_SECTION>): Don't use a
pointer into strings that may be freed for section name, always
allocate a new string.
This patch extends the relocation and line number counters for
coff-go32 and coff-go32-exe to 32 bits. As I understand it works the
same as for PE-COFF:
If the number of relocations in an object file exceeds 65534, the
NRELOC field is set to 65535 and the actual number of relocations is
stored in the VADDR field of the first relocation entry.
Executable files have no relocations, and thus the NRELOC field is
repurposed to extend NLNNO to 32-bits.
bfd * coff-go32.c (COFF_GO32, IMAGE_SCN_LNK_NRELOC_OVFL)
(coff_SWAP_scnhdr_in, coff_SWAP_scnhdr_out): Define.
(_bfd_go32_swap_scnhdr_in, _bfd_go32_swap_scnhdr_out)
(_bfd_go32_mkobject): New functions.
* coff-stgo32.c (IMAGE_SCN_LNK_NRELOC_OVFL)
(coff_SWAP_scnhdr_in, coff_SWAP_scnhdr_out): Define.
(go32exe_mkobject): Call _bfd_go32_mkobject.
* coffcode.h (COFF_WITH_EXTENDED_RELOC_COUNTER): Define.
(coff_set_alignment_hook): Define function for COFF_GO32_EXE
and COFF_GO32.
(coff_write_relocs): Enable extended reloc counter code if
COFF_WITH_EXTENDED_RELOC_COUNTER is defined. Test for obj_go32.
(coff_write_object_contents): Likewise. Pad section headers
for COFF_GO32 and COFF_GO32EXE. Use bfd_coff_swap_scnhdr_out
instead of coff_swap_scnhdr_out.
* cofflink.c (_bfd_coff_final_link): Test also for obj_go32 to
enable extended reloc counter.
* coffswap.h: (coff_swap_scnhdr_in, coff_swap_scnhdr_out):
Declare with ATTRIBUTE_UNUSED.
* libcoff-in.h: (struct coff_tdata): New field go32.
(obj_go32): Define.
* libcoff.h: Regenerate.
Remove zero-sized relocation section from a section group since it has
been removed from the output.
PR ld/25767
* elf.c (_bfd_elf_fixup_group_sections): Remove zero-sized
relocation section from section group.
The stub size in GO32 executables has historically been fixed at 2048
bytes, due to hardcoded limitations in bfd. Recent patches to djgpp by
Stas Sergeev (CC'd) have pushed the stub right up to this limit, so if
any further expansion is desired, this must first be patched in bfd.
This series includes three patches: The first changes the meaning of
the bfd->origin field slightly, so that target code can use this to
specify an offset into the file where the actual bfd is located.
The second patch then uses this to enable support for variable-sized
stubs in the coff-go32-exe format.
The final patch is only a cleanup, it normalizes function and variable
names in coff-stgo32.c so that they all begin with the same prefix.
bfd * bfdio.c (bfd_bread, bfd_tell, bfd_seek, bfd_mmap): Always add
bfd->origin to file offset.
* bfdwin.c (bfd_get_file_window): Likewise.
* bfd.c: Clarify the use of the bfd->origin field.
* bfd-in2.h: Regenerate.
* coff-i386.c: Don't include go32exe.h. Allow overriding
coff_write_object_contents via COFF_WRITE_CONTENTS.
* coff-stgo32.c (go32exe_cleanup, go32exe_mkobject)
(go32exe_write_object_contents): New functions.
(go32exe_temp_stub, go32exe_temp_stub_size): New static globals.
(COFF_WRITE_CONTENTS, GO32EXE_DEFAULT_STUB_SIZE): Define.
(create_go32_stub): Remove check for 2k size limit. Read stub
from go32exe_temp_stub if present.
(go32_stubbed_coff_bfd_copy_private_bfd_data): Allocate and
copy variable-length stub.
(go32_check_format): Read stub to go32exe_temp_stub, set
origin, return go32exe_cleanup.
(adjust_filehdr_in_post, adjust_filehdr_out_pre)
(adjust_filehdr_out_post, adjust_scnhdr_in_post)
(adjust_scnhdr_out_pre, adjust_scnhdr_out_post)
(adjust_aux_in_post, adjust_aux_out_pre, adjust_aux_out_post):
Remove functions and their associated #defines.
* coffcode.h (coff_mkobject_hook): Remove stub copying code.
* libcoff-in.h: (struct coff_tdata): New field stub_size.
Rename field go32stub to stub.
* libcoff.h: Regenerate.
* coff-stgo32.c (go32_check_format): Rename to...
(go32exe_check_format): ...this.
(go32_stubbed_coff_bfd_copy_private_bfd_data): Rename to...
(go32exe_copy_private_bfd_data): ...this.
(stub_bytes): Rename to...
(go32exe_default_stub): ...this.
(create_go32_stub): Rename to...
(go32exe_create_stub): ...this.
* coff-stgo32.c (go32exe_copy_private_bfd_data): Avoid realloc
when possible.
include * coff/go32exe.h: Remove file.
* coff/internal.h (struct internal_filehdr): Remove field
go32stub. Remove flag F_GO32STUB.
Since value of non-preemptible absolute symbol (SHN_ABS) won't change,
only relocations, which can be resolved as absolute value + addend, and
GOTPCREL relocations, where absolute value + addend is stored in the GOT
slot, against non-preemptible absolute symbol are allowed in PIE and
shared library.
Also convert load relocation to R_386_32, R_X86_64_32S or R_X86_64_32 for
relocation against non-preemptible absolute symbol. Don't convert to
R_X86_64_32S nor R_X86_64_32 for non-preemptible absolute symbol if they
overflow.
bfd/
PR ld/25749
PR ld/25754
* elf32-i386.c (elf_i386_convert_load_reloc): Convert load
relocation to R_386_32 for relocation against non-preemptible
absolute symbol.
(elf_i386_check_relocs): Call _bfd_elf_x86_valid_reloc_p. Don't
allocate dynamic relocation for non-preemptible absolute symbol.
(elf_i386_relocate_section): Pass sec to
GENERATE_DYNAMIC_RELOCATION_P.
* elf64-x86-64.c (R_X86_64_converted_reloc_bit): Moved.
(elf_x86_64_convert_load_reloc): Covert load relocation to
R_X86_64_32S or R_X86_64_32 for relocation against non-preemptible
absolute symbol. Don't convert to R_X86_64_32S nor R_X86_64_32
for non-preemptible absolute symbol if they overflow.
(elf_x86_64_check_relocs): Call _bfd_elf_x86_valid_reloc_p. Set
tls_type for GOT slot to GOT_ABS for non-preemptible absolute
symbol. Don't allocate dynamic relocation for non-preemptible
absolute symbol.
(elf_x86_64_relocate_section): Don't generate relative relocation
for GOTPCREL relocations aganst local absolute symbol. Pass sec
to GENERATE_DYNAMIC_RELOCATION_P.
* elfxx-x86.c (elf_x86_allocate_dynrelocs): No dynamic relocation
against non-preemptible absolute symbol.
(_bfd_elf_x86_valid_reloc_p): New function.
(_bfd_x86_elf_size_dynamic_sections): No dynamic relocation for
GOT_ABS GOT slot.
* elfxx-x86.h (GENERATE_DYNAMIC_RELOCATION_P): Add an SEC
argument. Don't generate dynamic relocation against
non-preemptible absolute symbol.
(ABS_SYMBOL_P): New.
(GENERATE_RELATIVE_RELOC_P): Don't generate relative relocation
against non-preemptible absolute symbol.
(GOT_ABS): New.
(R_X86_64_converted_reloc_bit): New. Moved from elf64-x86-64.c.
(_bfd_elf_x86_valid_reloc_p): New.
ld/
PR ld/25749
PR ld/25754
* testsuite/ld-elf/linux-x86.exp: Run ld/25749 tests.
* testsuite/ld-elf/pr25749-1.c: New file.
* testsuite/ld-elf/pr25749-1a.c: Likewise.
* testsuite/ld-elf/pr25749-1b.c: Likewise.
* testsuite/ld-elf/pr25749-1b.err: Likewise.
* testsuite/ld-elf/pr25749-1c.c: Likewise.
* testsuite/ld-elf/pr25749-1d.c: Likewise.
* testsuite/ld-elf/pr25749-2.c: Likewise.
* testsuite/ld-elf/pr25749-2a.s: Likewise.
* testsuite/ld-elf/pr25749-2b.s: Likewise.
* testsuite/ld-elf/pr25749.rd: Likewise.
* testsuite/ld-elf/pr25754-1a.c: Likewise.
* testsuite/ld-elf/pr25754-1b.s: Likewise.
* testsuite/ld-elf/pr25754-2a.c: Likewise.
* testsuite/ld-elf/pr25754-2b.err: Likewise.
* testsuite/ld-elf/pr25754-2b.s: Likewise.
* testsuite/ld-elf/pr25754-3a.c: Likewise.
* testsuite/ld-elf/pr25754-3b.s: Likewise.
* testsuite/ld-elf/pr25754-4a.c: Likewise.
* testsuite/ld-elf/pr25754-4b.s: Likewise.
* testsuite/ld-elf/pr25754-4c.s: Likewise.
* testsuite/ld-elf/pr25754-5a.c: Likewise.
* testsuite/ld-elf/pr25754-5b.s: Likewise.
* testsuite/ld-elf/pr25754-5c.s: Likewise.
* testsuite/ld-elf/pr25754-6a.c: Likewise.
* testsuite/ld-elf/pr25754-6b.s: Likewise.
* testsuite/ld-x86-64/pr19609-6a.d: Don't expect linker error.
When you have a Thumb only PLT then the address in the GOT for PLT0 needs to
have the Thumb bit set since the instruction used in PLTn to get there is
`ldr.w pc` which is an inter-working instruction:
the PLT sequence in question is
00000120 <foo@plt>:
120: f240 0c98 movw ip, #152 ; 0x98
124: f2c0 0c01 movt ip, #1
128: 44fc add ip, pc
12a: f8dc f000 ldr.w pc, [ip]
12e: e7fc b.n 12a <foo@plt+0xa>
Disassembly of section .text:
00000130 <bar>:
130: b580 push {r7, lr}
132: af00 add r7, sp, #0
134: f7ff fff4 bl 120 <foo@plt>
and previously the linker would generate
Hex dump of section '.got':
...
0x000101b8 40010100 00000000 00000000 10010000 @...............
Which would make it jump and transition out of thumb mode and crash since you
only have thumb mode on such cores.
Now it correctly generates
Hex dump of section '.got':
...
0x000101b8 40010100 00000000 00000000 11010000 @...............
Thanks to Amol for testing patch and to rgujju for reporting it.
bfd/ChangeLog:
PR ld/16017
* elf32-arm.c (elf32_arm_populate_plt_entry): Set LSB of the PLT0
address in the GOT if in thumb only mode.
ld/ChangeLog:
PR ld/16017
* testsuite/ld-arm/arm-elf.exp (thumb-plt-got): New.
* testsuite/ld-arm/thumb-plt-got.d: New test.
When I previously changed these offsets I had incorrectly used an offset of -2
for this Thumb2 PLT. Unfortunately because we had no tests for this PLT I had
missed that the result was incorrect.
This patch fixes the offset to PC .-4 so that it correctly addresses the
previous instruction and adds a test for this PLT stub.
bfd/ChangeLog:
* elf32-arm.c (elf32_thumb2_plt_entry): Fix PC-rel offset.
ld/ChangeLog:
* testsuite/ld-arm/arm-elf.exp (thumb-plt): New.
* testsuite/ld-arm/thumb-plt.d: New test.
* testsuite/ld-arm/thumb-plt.s: New test.
* mmo.c (mmo_scan): Create .text section only when needed, not
from the start.
For the test-case at hand, the .data section is created and output
first by the linker, but the mmo input-reader mmo_scan always creates
a .text section. Since sections are output in the order in which
they're created, it's output first, breaking the assumption that
obcopy without options (or with -p) creates output identical to its
input. The point of creating it at the top of mmo_scan is a trivial
default assignment for the current section variable "sec". Instead we
now defer the default, creating it only when needed and sec is NULL.
* vms-alpha.c (image_write): Check bounds for sections without
contents too. Error on non-zero write to section without
contents.
(_bfd_vms_slurp_etir): Check return of image_write* functions.
PR binutils/pr25662
bfd * libcoff-in.h (struct pe_tdata): Rename the insert_timestamp
field to timestamp and make it an integer.
* libcoff.h: Regenerate.
* peXXigen.c (_bfd_XXi_only_swap_filehdr_out): Test the timestamp
field in the pe_data structure rather than the insert_timestamp
field.
binutils* objcopy.c (copy_object): When copying PE format files set the
timestamp field in the pe_data structure if the preserve_dates
flag is set.
* testsuite/binutils-all/objcopy.exp (objcopy_test) Use
--preserve-dates in place of the -p option, in order to make its
effect more obvious.
ld * emultempl/pe.em (after_open): Replace initialisation of the
insert_timestamp field in the pe_data structure with an
initialisation of the timestamp field.
* emultemp/pep.em: Likewise.
* pe-dll.c (fill_edata): Use the timestamp field in the pe_data
structure instead of the insert_timestamp field.
I doubt anyone will want to create more than 16M debug location
entries. If there is no bound the object format allows for 32-bit
indices and of course fuzzers find that and attempt allocation of up
to a 16G byte array. The patch also fixes potential integer overflows
in calculating the array size.
* vms-alpha.c (dst_define_location): Limit size of dst_ptr_offsets
array.
(_bfd_vms_slurp_object_records): Rename "err" to "ok".
PRINT_DEBUG_RELOC_INFO_BEFORE() macro prints bunch of parameters
for debugging purposes. Due to a seemingly copy/paste mistake,
the "input_section->vma" is printed under the field name
"symbol_section->vma". This commit fixes that.
This fix is a courtesy of xiangzhai.
* elf32-arc.c (PRINT_DEBUG_RELOC_INFO_BEFORE): Use the
correct field name in the output string.
Nelson Chu
Gunther Nikl
Alan Modra
Wilco Dijkstra
Max Filippov
Tamar Christina
Anton Kolesov
H.J. Lu
Nick Clifton
Stephen Casner
Fangrui Song
Juan Manuel Guerrero
Rainer Orth
Jan W. Jagersma
Hans-Peter Nilsson
Shahab Vahedi