Commit Graph

3765 Commits

Author SHA1 Message Date
Denis Chertykov b6aee19e74 * doc/c-avr.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-avr.texi
	* doc/all.texi: Set AVR
	* doc/as.texinfo: Include c-avr.texi
2006-05-29 17:57:48 +00:00
Jie Zhang f8fdc85041 * config/bfin-parse.y (check_macfunc): Loose the condition of
calling check_multiply_halfregs ().
2006-05-28 00:53:08 +00:00
H.J. Lu a1c7b1260c Remove ">>>>>>> 1.2917". 2006-05-26 17:09:48 +00:00
Richard Sandiford a596001ece include/opcodes/
* m68k.h (mcf_mask): Define.

opcodes/
	* m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
	and fmovem entries.  Put register list entries before immediate
	mask entries.  Use "l" rather than "L" in the fmovem entries.
	* m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
	out from INFO.
	(m68k_scan_mask): New function, split out from...
	(print_insn_m68k): ...here.  If no architecture has been set,
	first try printing an m680x0 instruction, then try a Coldfire one.

gas/testsuite/
	* gas/m68k/mcf-fpu.s: Add fmovemd and fmovem instructions.
	* gas/m68k/mcf-fpu.d: Adjust accordingly.
2006-05-25 08:09:03 +00:00
Jie Zhang c1cc2b17f3 * gas/bfin/vector2.s, gas/bfin/vector2.d: Test to ensure (m) is not
thrown away.
2006-05-25 04:07:53 +00:00
Jie Zhang a32054651a * config/bfin-parse.y (asm_1): Better check and deal with
vector and scalar Multiply 16-Bit Operands instructions.
2006-05-25 04:07:08 +00:00
Nick Clifton 9b52905e69 Add TLS support for hppa-linux 2006-05-24 11:05:42 +00:00
Nick Clifton 28c9d252b4 Add support for AVR6 family 2006-05-24 07:36:12 +00:00
Thiemo Seufer ad3fea084d [ gas/ChangeLog ]
* config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename.
	(ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS,
	ISA_HAS_MXHC1): New macros.
	(HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of
	ISA_HAS_64BIT_REGS.  Formatting fixes.  Improved comments.
	(mips_cpu_info): Change to use combined ASE/IS_ISA flag.
	(MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP,
	MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines.
	(mips_after_parse_args): Change default handling of float register
	size to account for 32bit code with 64bit FP. Better sanity checking
	of ISA/ASE/ABI option combinations.
	(s_mipsset): Support switching of GPR and FPR sizes via
	.set {g,f}p={32,64,default}. Better sanity checking for .set ASE
	options.
	(mips_elf_final_processing): We should record the use of 64bit FP
	registers in 32bit code but we don't, because ELF header flags are
	a scarce ressource.
	(mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE
	extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef,
	24kex, 34kc, 34kf, 34kx, 25kf CPU definitions.
	(mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA.
	* doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document
	missing -march options. Document .set arch=CPU. Move .set smartmips
	to ASE page. Use @code for .set FOO examples.

	[ gas/testsuite/Changelog ]
	* gas/mips/mips-gp32-fp64-pic.d, mips/mips-gp32-fp64.d,
	gas/mips/mips-gp64-fp32-pic.d, gas/mips/mips-gp64-fp32.l,
	gas/mips/mips-gp64-fp64.d: Adjust test cases to the changes assembler
	output.
	* gas/mips/mips-gp32-fp64.l, gas/mips/mips-gp64-fp32-pic.l: New files,
	catch assembler warnings.
2006-05-23 15:37:20 +00:00
Jie Zhang 8b64503a98 * config/tc-bfin.c (bfin_start_line_hook): Bump line counters
if needed.
2006-05-23 06:01:12 +00:00
Jie Zhang aaceb81c03 Commit the missing bits of my last patch. 2006-05-23 04:56:56 +00:00
Jie Zhang 403022e0dc * config/bfin-defs.h (bfin_equals): Remove declaration.
* config/bfin-parse.y (asm_1): Remove "expr ASSIGN expr".
	* config/tc-bfin.c (bfin_name_is_register): Remove.
	(bfin_equals): Remove.
	* config/tc-bfin.h (TC_EQUAL_IN_INSN): Redefine as 1.
	(bfin_name_is_register): Remove declaration.
2006-05-23 04:23:41 +00:00
Nick Clifton 6c5a6c0134 * gas/mips/mips32-dsp.l: Fix expected unsigned decoding of -1 in warning messages.
* gas/mips/mips32-mt.l: Likewise.
2006-05-22 08:58:08 +00:00
Nick Clifton 7ff7c29e1f Remove ChangeLog entries, since the template files were already up to date. 2006-05-22 08:30:57 +00:00
Nick Clifton 5002adadc5 Update translation templates 2006-05-22 08:25:15 +00:00
Thiemo Seufer a284cff1e4 * gas/mips/vxworks1-el.d, gas/mips/vxworks1-xgot-el.d: Add little
endian testcases.
	* gas/mips/vxworks1.d, gas/mips/vxworks1-xgot.d: Build as big endian.
	* gas/mips/mips.exp: Run new testcases.
2006-05-19 22:48:13 +00:00
Thiemo Seufer 7455baf866 * config/tc-mipc.c (ISA_HAS_ODD_SINGLE_FPR): New define.
(mips_oddfpreg_ok): New function.
	(mips_ip): Use it.
-------------------------------------------------------------------
2006-05-19 13:03:06 +00:00
Thiemo Seufer 707bfff6e6 * config/tc-mips.h (tc_mips_regname_to_dw2regnum): Declare.
* config/tc-mipc.c (ABI_NEEDS_64BIT_REGS, ISA_HAS_64BIT_REGS,
	ISA_HAS_DROR, ISA_HAS_ROR): Reformat.
	(regname, RTYPE_MASK, RTYPE_NUM, RTYPE_FPU, RTYPE_FCC, RTYPE_VEC,
	RTYPE_GP, RTYPE_CP0, RTYPE_PC, RTYPE_ACC, RTYPE_CCC, RNUM_MASK,
	RWARN, GENERIC_REGISTER_NUMBERS, FPU_REGISTER_NAMES,
	FPU_CONDITION_CODE_NAMES, COPROC_CONDITION_CODE_NAMES,
	N32N64_SYMBOLIC_REGISTER_NAMES, O32_SYMBOLIC_REGISTER_NAMES,
	SYMBOLIC_REGISTER_NAMES, MIPS16_SPECIAL_REGISTER_NAMES,
	MDMX_VECTOR_REGISTER_NAMES, MIPS_DSP_ACCUMULATOR_NAMES, reg_names,
	reg_names_o32, reg_names_n32n64): Define register classes.
	(reg_lookup): New function, use register classes.
	(md_begin): Reserve register names in the symbol table. Simplify
	OBJ_ELF defines.
	(mips_ip): Fix comment formatting. Handle symbolic COP0 registers.
	Use reg_lookup.
	(mips16_ip): Use reg_lookup.
	(tc_get_register): Likewise.
	(tc_mips_regname_to_dw2regnum): New function.
-------------------------------------------------------------------
2006-05-19 12:34:09 +00:00
Thiemo Seufer 1df69f4f6c * config/tc-arm.c, config/tc-arm.h (tc_arm_regname_to_dw2regnum):
Un-constify string argument.
	* config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
	Likewise.
	* config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
	Likewise.
	* config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
	Likewise.
	* config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
	Likewise.
	* config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
	Likewise.
	* config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
	Likewise.
-------------------------------------------------------------------
2006-05-19 11:26:11 +00:00
Nathan Sidwell 377260ba3a * gas/config/tc-m68k.c (m68k_init_arch): Move checking of
cfloat/m68881 to correct architecture before using it.
2006-05-19 10:18:02 +00:00
Nick Clifton cce7653bc1 * config/tc-avr.h (TC_VALIDATE_FIX): Allow fixups for immediate constant values. 2006-05-16 08:23:43 +00:00
Paul Brook b079691183 2006-05-15 Paul Brook <paul@codesourcery.com>
bfd/
	* cpu-arm.c (bfd_is_arm_mapping_symbol_name): Rename ...
	(bfd_is_arm_special_symbol_name): ... to this.  Add type argument.
	Check symbol name is of specified type.
	* elf32-arm.c (elf32_arm_is_target_special_symbol,
	arm_elf_find_function, elf32_arm_output_symbol_hook): Use
	bfd_is_arm_special_symbol_name.
	* bfd-in.h (BFD_ARM_SPECIAL_SYM_TYPE_MAP,
	BFD_ARM_SPECIAL_SYM_TYPE_TAG, BFD_ARM_SPECIAL_SYM_TYPE_OTHER,
	BFD_ARM_SPECIAL_SYM_TYPE_ANY): Define.
	(bfd_is_arm_mapping_symbol_name): Remove prototype.
	(bfd_is_arm_special_symbol_name): Add prototype.
	* bfd-in2.h: Regenerate.
gas/
	* config/tc-arm.c (arm_adjust_symtab): Use
	bfd_is_arm_special_symbol_name.
ld/testsuite/
	* ld-arm/arm-be8.d: New test.
	* ld-arm/arm-be8.s: New test.
	* ld-arm/arm-elf.exp: Add arm-be8.
2006-05-15 19:57:35 +00:00
Bob Wilson 64b607e61b bfd:
* elf32-xtensa.c (check_loop_aligned): Fix reversed check for
        undefined opcode.  Clean up assertions.
        (narrow_instruction, widen_instruction): Remove "do_it" parameters.
        Factor most of the code into separate functions....
        (can_narrow_instruction, can_widen_instruction): New.
        (prev_instr_is_a_loop): New.
        (compute_ebb_proposed_actions): Combine error handling code for
        decode errors.  Replace call to insn_decode_len with inline code.
        Use can_narrow_instruction and can_widen_instruction.  Handle errors
        from call to xtensa_opcode_is_loop.
        (relax_section): Adjust calls to narrow_instruction and
        widen_instruction.
gas:
        * config/tc-xtensa.c (is_direct_call_opcode, is_branch_jmp_to_next,
        xg_assemble_vliw_tokens, xtensa_mark_narrow_branches,
        xtensa_fix_short_loop_frags, is_local_forward_loop, relax_frag_immed):
        Handle errors from calls to xtensa_opcode_is_* functions.
2006-05-15 17:03:15 +00:00
Thiemo Seufer 9b3f89ee00 [ gas/ChangeLog ]
* config/tc-mips.c (macro_build): Test for currently active
	mips16 option.
	(mips16_ip): Reject invalid opcodes.

	[ opcodes/ChangeLog ]
	* mips16-opc.c (I1, I32, I64): New shortcut defines.
	(mips16_opcodes): Change membership of instructions to their
	lowest baseline ISA.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips.exp: Run new tests.
	* gas/mips/mips16e.s, gas/mips/mips16e.d, gas/mips/mips16e-64.s,
	gas/mips/mips16e-64.d, gas/mips/mips16e-64.l: New tests.
2006-05-14 15:35:22 +00:00
Carlos O'Donell 370b66a128 bfd/doc/
2006-05-11  Carlos O'Donell  <carlos@codesourcery.com>

	* bfd.texinfo: Rename "Index" to "BFD Index"

gas/

2006-05-11  Carlos O'Donell  <carlos@codesourcery.com>

	* doc/as.texinfo: Rename "Index" to "AS Index",
	and "ABORT" to "ABORT (COFF)".

ld/

2006-05-11  Carlos O'Donell  <carlos@codesourcery.com>

	* ld.texinfo: Rename "Index" to "LD Index"
2006-05-11 16:11:29 +00:00
Paul Brook b6895b4f37 2006-05-11 Paul Brook <paul@codesourcery.com>
bfd/
	* elf32-arm.c (elf32_arm_reloc_map): Add MOVW and MOVT relocs.
	(elf32_arm_final_link_relocate): Handle MOVW and MOVT relocs.
	(elf32_arm_gc_sweep_hook, elf32_arm_check_relocs): Ditto.
	* reloc.c: Ditto.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* libcoff.h: Regenerate.
gas/
	* config/tc-arm.c (parse_half): New function.
	(operand_parse_code): Remove OP_Iffff.  Add OP_HALF.
	(parse_operands): Ditto.
	(do_mov16): Reject invalid relocations.
	(do_t_mov16): Ditto.  Use Thumb reloc numbers.
	(insns): Replace Iffff with HALF.
	(md_apply_fix): Add MOVW and MOVT relocs.
	(tc_gen_reloc): Ditto.
	* doc/c-arm.texi: Document relocation operators
ld/testsuite/
	* ld-arm/arm-elf.exp: Add arm-movwt.
	* ld-arm/arm-movwt.d: New test.
	* ld-arm/arm-movwt.s: New test.
	* ld-arm/arm.ld: Add .far.
2006-05-11 15:17:34 +00:00
Paul Brook e28387c3bf 2006-05-11 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (arm_fix_adjustable): Return 0 for function symbols.
gas/testsuite/
	* gas/arm/local_function.d: New test.
	* gas/arm/local_function.s: New test.
2006-05-11 15:05:17 +00:00
Thiemo Seufer 89ee2ebe8b [ gas/ChangeLog ]
* config/tc-mips.c (append_insn): Don't check the range of j or
	jal addresses.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/jal-range.l: Don't check the range of j or jal
	addresses.
2006-05-11 14:30:58 +00:00
Nick Clifton 53baae4870 Apply fixes to allow arm WinCE toolchain to produce working executables. 2006-05-11 08:48:58 +00:00
H.J. Lu 43cc0762b2 2006-05-09 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/x86-64-gidt.d: Adjusted.
2006-05-09 17:05:55 +00:00
H.J. Lu cb6d34334f gas/testsuite/
2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run x86-64-gidt.

	* gas/i386/x86-64-gidt.d: New file.
	* gas/i386/x86-64-gidt.s: Likewise.

opcodes/

2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (grps): Update sgdt/sidt for 64bit.
2006-05-09 16:05:40 +00:00
Nick Clifton 6e0080dd37 Revised test (that is not O(n2)) for checking for orphaned cloned symbols 2006-05-09 15:13:22 +00:00
Thiemo Seufer 4e2a74a841 [ gas/ChangeLog ]
* config/tc-mips.c (append_insn): Only warn about an out-of-range
	j or jal address.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/jal-range.l: Only warn about an out-of-range j or jal
        address.
2006-05-09 14:16:50 +00:00
Nick Clifton 337ff0a5af * config/tc-arm.c (arm_fix_adjustable): For COFF, convert fixups against
symbols which are not going to be placed into the symbol table.
* coffcode.h (coff_write_relocs): Produce an error message if a an
   out-of-range symbol index is detected in a reloc.
2006-05-09 11:47:48 +00:00
Ben Elliston 8c9f705ebb * expr.c (operand): Remove `if (0 && ..)' statement and
subsequently unused target_op label.  Collapse `if (1 || ..)'
        statement.
        * app.c (do_scrub_chars): Remove unused case 0, as it is handled
        separately above the switch.
2006-05-09 04:54:32 +00:00
Thiemo Seufer 409a6ecdda * gas/mips/mips32.s, gas/mips/mips32.d: Extend testcase to check
larger offset arguments for cache instructions.
2006-05-08 18:18:09 +00:00
Nick Clifton 2fd0d2ac07 PR gas/2623b
* config/tc-msp430.c (line_separator_character): Define as |.
2006-05-08 17:08:34 +00:00
Thiemo Seufer e16bfa71a1 [ gas/ChangeLog ]
* config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
	(mips_opts): Likewise.
	(file_ase_smartmips): New variable.
	(ISA_HAS_ROR): SmartMIPS implements rotate instructions.
	(macro_build): Handle SmartMIPS instructions.
	(mips_ip): Likewise.
	(md_longopts): Add argument handling for smartmips.
	(md_parse_options, mips_after_parse_args): Likewise.
	(s_mipsset): Add .set smartmips support.
	(md_show_usage): Document -msmartmips/-mno-smartmips.
	* doc/as.texinfo: Document -msmartmips/-mno-smartmips and
	.set smartmips.
	* doc/c-mips.texi: Likewise.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/smartmips.s, gas/mips/smartmips.d: New smartmips test.
	* gas/mips/mips.exp: Run smartmips test.
2006-05-08 15:57:05 +00:00
Alan Modra 32638454a7 * write.c (relax_segment): Add pass count arg. Don't error on
negative org/space on first two passes.
	(relax_seg_info): New struct.
	(relax_seg, write_object_file): Adjust.
	* write.h (relax_segment): Update prototype.
2006-05-07 23:03:48 +00:00
Julian Brown b7fc276944 * config/tc-arm.c (parse_vfp_reg_list): Improve register bounds
checking.
	(do_neon_mov): Enable several VMOV variants for VFP. Add suitable
	architecture version checks.
	(insns): Allow overlapping instructions to be used in VFP mode.
2006-05-05 18:54:44 +00:00
Julian Brown 55a9ea5780 * gas/arm/vfp-neon-overlap.s: New test. Overlapping VFP/Neon
instructions.
	* gas/arm/vfp-neon-overlap.d: Expected output of above.
	* gas/arm/vfp1xD.d: Test for fldmx/fstmx.
	* gas/arm/vfp1xD_t2.d: Likewise.
	* gas/arm/vfpv3-32drs.d: Likewise.
2006-05-05 18:53:09 +00:00
H.J. Lu 7f8411279d 2006-05-05 H.J. Lu <hongjiu.lu@intel.com>
PR gas/2598
	* config/obj-elf.c (obj_elf_change_section): Allow user
	specified SHF_ALPHA_GPREL.
2006-05-05 18:24:45 +00:00
Nick Clifton 731608473a * gas/config/tc-avr.h (TC_VALIDATE_FIX): Define. Disable fixups for PMEM
related expressions.
* bfd/elf32-avr.c (elf32_avr_relax_delete_bytes): Iterate over all of the
    bfd's sections for the reloc-addend adjustments.
2006-05-05 17:46:47 +00:00
Nick Clifton 56487c5507 PR gas/2582
* dwarf2dbg.c (INSERT_DIR_SEPARATOR): New macro.  Handles the insertion of a
  directory separator character into a string at a given offset.  Uses
  heuristics to decide when to use a backslash character rather than a
  forward-slash character.
  (dwarf2_directive_loc): Use the macro.
  (out_debug_info): Likewise.
2006-05-05 16:55:28 +00:00
Thiemo Seufer ef75f0145e * gas/mips/noreorder.s, gas/mips/noreorder.d: New test for
reorder/noreorder corner case.
	* gas/mips/mips.exp: Run new test.
-------------------------------------------------------------------
2006-05-05 16:38:09 +00:00
Thiemo Seufer d43b4baf07 [ gas/ChangeLog ]
* config/tc-mips.c (macro_build): Add case 'k' to handle cache
	instruction.
	(macro): Add new case M_CACHE_AB.

	[ opcodes/ChangeLog ]
	* mips-opc.c: Add macro for cache instruction.

	[ include/opcode/ChangeLog ]
	* mips.h (enum): Add macro M_CACHE_AB.
2006-05-05 15:41:23 +00:00
Kazu Hirata 088fa78ea0 gas/
* config/tc-arm.c (opcode_tag): Add OT_cinfix3_deprecated.
	(opcode_lookup): Issue a warning for opcode with
	OT_cinfix3_deprecated.  Otherwise treat OT_cinfix3_deprecated
	identical to OT_cinfix3.
	(TxC3w, TC3w, tC3w): New.
	(insns): Use tC3w and TC3w for comparison instructions with
	's' suffix.

gas/testsuite
	* gas/arm/armv1.d (error-output): New.
	* gas/arm/armv1.l: New.
	* gas/arm/thumb32.d (error-output): New.
	* gas/arm/thumb32.l: New.
2006-05-04 15:41:00 +00:00
Thiemo Seufer 39a7806dae [ gas/testsuite/ChangeLog ]
2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>

        * gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2.
        * gas/mips/set-arch.d: Adjust according to opcode table changes.

[ include/opcode/ChangeLog ]
2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

        * mips.h: Add INSN_SMARTMIPS define.

[ opcodes/ChangeLog ]
2006-05-04  Thiemo Seufer  <ths@mips.com>
            Nigel Stephens  <nigel@mips.com>
            David Ung  <davidu@mips.com>

        * mips-dis.c (mips_arch_choices): Add smartmips instruction
        decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
        2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
        MIPS64R2.
        * mips-opc.c: fix random typos in comments.
        (INSN_SMARTMIPS): New defines.
        (mips_builtin_opcodes): Add paired single support for MIPS32R2.
        Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
        flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
        FP_S and FP_D flags to denote single and double register
        accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
        Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
        for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
        variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
        release 2 ISAs.
        * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
2006-05-04 10:47:05 +00:00
Alan Modra c9049d301b * subsegs.h (struct frchain): Delete frch_seg.
(frchain_root): Delete.
	(seg_info): Define as macro.
	* subsegs.c (frchain_root): Delete.
	(abs_seg_info, und_seg_info, absolute_frchain): Delete.
	(subsegs_begin, subseg_change): Adjust for above.
	(subseg_set_rest): Likewise.  Add new frchain structs to seginfo
	rather than to one big list.
	(subseg_get): Don't special case abs, und sections.
	(subseg_new, subseg_force_new): Don't set frchainP here.
	(seg_info): Delete.
	(subsegs_print_statistics): Adjust frag chain control list traversal.
	* debug.c (dmp_frags):  Likewise.
	* dwarf2dbg.c (first_frag_for_seg): Don't start looking for frag
	at frchain_root.  Make use of known frchain ordering.
	(last_frag_for_seg): Likewise.
	(get_frag_fix): Likewise.  Add seg param.
	(process_entries, out_debug_aranges): Adjust get_frag_fix calls.
	* write.c (chain_frchains_together_1): Adjust for struct frchain.
	(SUB_SEGMENT_ALIGN): Likewise.
	(subsegs_finish): Adjust frchain list traversal.
	* config/tc-xtensa.c (xtensa_cleanup_align_frags): Likewise.
	(xtensa_fix_target_frags, xtensa_mark_narrow_branches): Likewise.
	(xtensa_mark_zcl_first_insns, xtensa_fix_a0_b_retw_frags): Likewise.
	(xtensa_fix_b_j_loop_end_frags): Likewise.
	(xtensa_fix_close_loop_end_frags): Likewise.
	(xtensa_fix_short_loop_frags, xtensa_sanity_check): Likewise.
	(retrieve_segment_info): Delete frch_seg initialisation.
2006-05-03 23:52:15 +00:00
Thiemo Seufer 104b4fab38 2006-05-03 Thiemo Seufer <ths@mips.com>
[ opcodes/ChangeLog ]
        * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.

        [ gas/testsuite/ChangeLog ]
        * gas/mips/mips32-mt.d: Fix mftr argument order.
2006-05-03 20:59:20 +00:00