We should check suffix in instruction mnemonic when matching instruction.
In Intel syntax, normally we check for memory operand size. But the same
mnemonic with 2 different encodings can have the same memory operand
size and i.suffix is set to LONG_DOUBLE_MNEM_SUFFIX from memory operand
size in Intel syntax to distinguish them. When there is no suffix in
mnemonic, we check LONG_DOUBLE_MNEM_SUFFIX in i.suffix for mnemonic
suffix.
gas/
PR gas/25167
* config/tc-i386.c (match_template): Don't check instruction
suffix set from operand.
* testsuite/gas/i386/code16.d: New file.
* testsuite/gas/i386/code16.s: Likewise.
* testsuite/gas/i386/i386.exp: Run code16.
* testsuite/gas/i386/x86-64-branch-4.l: Updated.
opcodes/
PR gas/25167
* i386-opc.tbl: Remove IgnoreSize from cmpsd and movsd.
* i386-tbl.h: Regenerated.
This changes command_line_input to return a "const char *", which is
appropriate because the memory is owned by command_line_input. Then
it fixes up the users.
I looked at making command_line_input transfer ownership to its caller
instead, but this is complicated due to the way read_next_line is
called, so I decided against it.
Tested by rebuilding.
gdb/ChangeLog
2019-11-08 Tom Tromey <tromey@adacore.com>
* top.c (read_command_file): Update.
(command_line_input): Make return type const.
* python/py-gdb-readline.c: Update.
* linespec.c (decode_line_2): Update.
* defs.h (command_line_input): Make return type const.
* cli/cli-script.c (read_next_line): Make return type const.
* ada-lang.c (get_selections): Update.
Change-Id: I27e6c9477fd1005ab5b16e0d337e4c015b6e6248
Many operand types, in particular the various kinds of registers, can't
be combined with one another (neither in templates nor in register
entries), and hence it is not a good use of resources (memory as well as
execution time) to represent them as individual bits of a bit field.
Hi,
This patch is part of a series that adds support for Armv8.6-A
to binutils.
In this last patch, the new Data Gathering Hint mnemonic is introduced.
Committed on behalf of Mihail Ionescu.
gas/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* testsuite/gas/aarch64/dgh.s: New test.
* testsuite/gas/aarch64/dgh.d: New test.
opcodes/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* opcodes/aarch64-tbl.h (V8_6_INSN): New macro for v8.6 instructions.
(aarch64_opcode_table): Add data gathering hint mnemonic.
* opcodes/aarch64-dis-2.c: Account for new instruction.
Is it ok for trunk?
Regards,
Mihail
Hi,
This patch is part of a series that adds support for Armv8.6-A
(Matrix Multiply and BFloat16 extensions) to binutils.
This patch introduces the Matrix Multiply (Int8, F32, F64) extensions
to the arm backend.
The following Matrix Multiply instructions are added: vummla, vsmmla,
vusmmla, vusdot, vsudot[1].
[1]https://developer.arm.com/docs/ddi0597/latest/simd-and-floating-point-instructions-alphabetic-order
Committed on behalf of Mihail Ionescu.
gas/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* config/tc-arm.c (arm_ext_i8mm): New feature set.
(do_vusdot): New.
(do_vsudot): New.
(do_vsmmla): New.
(do_vummla): New.
(insns): Add vsmmla, vummla, vusmmla, vusdot, vsudot mnemonics.
(armv86a_ext_table): Add i8mm extension.
(arm_extensions): Move bf16 extension to context sensitive table.
(armv82a_ext_table, armv84a_ext_table, armv85a_ext_table):
Move bf16 extension to context sensitive table.
(armv86a_ext_table): Add i8mm extension.
* doc/c-arm.texi: Document i8mm extension.
* testsuite/gas/arm/i8mm.s: New test.
* testsuite/gas/arm/i8mm.d: New test.
* testsuite/gas/arm/bfloat17-cmdline-bad-3.d: Update test.
include/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* opcode/arm.h (ARM_EXT2_I8MM): New feature macro.
opcodes/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* arm-dis.c (neon_opcodes): Add i8mm SIMD instructions.
Regression tested on arm-none-eabi.
Is this ok for trunk?
Regards,
Mihail
Hi,
This patch is part of a series that adds support for Armv8.6-A
(Matrix Multiply and BFloat16 extensions) to binutils.
This patch introduces the Matrix Multiply (Int8, F32, F64) extensions
to the aarch64 backend.
The following instructions are added: {s/u}mmla, usmmla, {us/su}dot,
fmmla, ld1rob, ld1roh, d1row, ld1rod, uzip{1/2}, trn{1/2}.
Committed on behalf of Mihail Ionescu.
gas/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* config/tc-aarch64.c: Add new arch fetures to suppport the mm extension.
(parse_operands): Add new operand.
* testsuite/gas/aarch64/i8mm.s: New test.
* testsuite/gas/aarch64/i8mm.d: New test.
* testsuite/gas/aarch64/f32mm.s: New test.
* testsuite/gas/aarch64/f32mm.d: New test.
* testsuite/gas/aarch64/f64mm.s: New test.
* testsuite/gas/aarch64/f64mm.d: New test.
* testsuite/gas/aarch64/sve-movprfx-mm.s: New test.
* testsuite/gas/aarch64/sve-movprfx-mm.d: New test.
include/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_I8MM): New.
(AARCH64_FEATURE_F32MM): New.
(AARCH64_FEATURE_F64MM): New.
(AARCH64_OPND_SVE_ADDR_RI_S4x32): New.
(enum aarch64_insn_class): Add new instruction class "aarch64_misc" for
instructions that do not require special handling.
opcodes/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* aarch64-tbl.h (aarch64_feature_i8mm_sve, aarch64_feature_f32mm_sve,
aarch64_feature_f64mm_sve, aarch64_feature_i8mm, aarch64_feature_f32mm,
aarch64_feature_f64mm): New feature sets.
(INT8MATMUL_INSN, F64MATMUL_SVE_INSN, F64MATMUL_INSN,
F32MATMUL_SVE_INSN, F32MATMUL_INSN): New macros to define matrix multiply
instructions.
(I8MM_SVE, F32MM_SVE, F64MM_SVE, I8MM, F32MM, F64MM): New feature set
macros.
(QL_MMLA64, OP_SVE_SBB): New qualifiers.
(OP_SVE_QQQ): New qualifier.
(INT8MATMUL_SVE_INSNC, F64MATMUL_SVE_INSNC,
F32MATMUL_SVE_INSNC): New feature set for bfloat16 instructions to support
the movprfx constraint.
(aarch64_opcode_table): Support for SVE_ADDR_RI_S4x32.
(aarch64_opcode_table): Define new instructions smmla,
ummla, usmmla, usdot, sudot, fmmla, ld1rob, ld1roh, ld1row, ld1rod
uzip{1/2}, trn{1/2}.
* aarch64-opc.c (operand_general_constraint_met_p): Handle
AARCH64_OPND_SVE_ADDR_RI_S4x32.
(aarch64_print_operand): Handle AARCH64_OPND_SVE_ADDR_RI_S4x32.
* aarch64-dis-2.c (aarch64_opcode_lookup_1, aarch64_find_next_opcode):
Account for new instructions.
* opcodes/aarch64-asm-2.c (aarch64_insert_operand): Support the new
S4x32 operand.
* aarch64-opc-2.c (aarch64_operands): Support the new S4x32 operand.
Regression tested on arm-none-eabi.
Is it ok for trunk?
Regards,
Mihail
Hi,
This patch is part of a series that adds support for Armv8.6-A
(Matrix Multiply and BFloat16 extensions) to binutils.
This patch implements the '.bfloat' directive for the AArch64 backend.
The syntax for the directive is:
.bfloat16 <0-n numbers>
e.g.
.bfloat16 12.0
.bfloat16 0.123, 1.0, NaN, 5
This is implemented by utilizing the ieee_atof_detail function in order
to encode the slightly
different bfloat16 format.
Added testcases to verify the correct encoding for various bfloat16
values (NaN, Infinity (+ & -), normals, subnormals etc...).
Cross compiled and tested on aarch64-none-elf and aarch64-none-linux-gnu
with no issues.
Committed on behalf of Mihail Ionescu.
gas/ChangeLog:
2019-10-29 Mihail Ionescu <mihail.ionescu@arm.com>
2019-10-29 Barnaby Wilks <barnaby.wilks@arm.com>
* config/tc-aarch64.c (md_atof): Add encoding for the bfloat16 format.
* testsuite/gas/aarch64/bfloat16-directive-le.d: New test.
* testsuite/gas/aarch64/bfloat16-directive-be.d: New test.
* testsuite/gas/aarch64/bfloat16-directive.s: New test.
Is it ok for trunk?
Regards,
Mihail
Hi,
This patch is part of a series that adds support for Armv8.6-A
(Matrix Multiply and BFloat16 extensions) to binutils.
This patch implements the '.bfloat16' directive for the Arm backend.
The syntax for the directive is:
.bfloat16 <0-n numbers>
e.g.
.bfloat16 12.0
.bfloat16 0.123, 1.0, NaN, 5
This is implemented by utilizing the ieee_atof_detail function (included
in the previous patch) in order to encode the slightly different
bfloat16 format.
Added testcases to verify the correct encoding for various bfloat16
values (NaN, Infinity (+ & -), normals, subnormals etc...).
Cross compiled and tested on arm-none-eabi and arm-none-linux-gnueabihf
with no issues.
Committed on behalf of Mihail Ionescu.
gas/ChangeLog:
2019-10-21 Mihail Ionescu <mihail.ionescu@arm.com>
2019-10-21 Barnaby Wilks <barnaby.wilks@arm.com>
* config/tc-arm.c (md_atof): Add encoding for bfloat16
* testsuite/gas/arm/bfloat16-directive-le.d: New test.
* testsuite/gas/arm/bfloat16-directive-be.d: New test.
* testsuite/gas/arm/bfloat16-directive.s: New test.
Is it ok for trunk?
Regards,
Mihail
Hi,
This patch is part of a series that adds support for Armv8.6-A
(Matrix Multiply and BFloat16 extensions).
This patch contains some general refactoring of the atof_ieee
function, exposing a function that allows a higher level of control
over the format of IEEE-like floating point numbers.
This has been done in order to be able to add a directive for assembling
floating point literals in the bfloat16 format in the following patches.
Committed on behalf of Mihail Ionescu.
Tested on arm-none-eabi, arm-none-linux-gnueabihf, aarch64-none-elf
and aarch64-none-linux-gnuwith no issues.
gas/ChangeLog:
2019-10-21 Mihail Ionescu <mihail.ionescu@arm.com>
2019-10-21 Barnaby Wilks <barnaby.wilks@arm.com>
* as.h (atof_ieee_detail): Add prototype for atof_ieee_detail function.
(atof_ieee): Move some code into the atof_ieee_detail function.
(atof_ieee_detail): Add function that provides a higher level of control over generating
IEEE-like numbers.
Is it ok for trunk?
Regards,
Mihail
Hi,
This patch is part of a series that adds support for Armv8.6-A
(Matrix Multiply and BFloat16 extensions) to binutils.
This patch introduces BFloat16 instructions to the arm backend.
The following BFloat16 instructions are added: vdot, vfma{l/t},
vmmla, vfmal{t/b}, vcvt, vcvt{t/b}.
gas/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* config/tc-arm.c (arm_archs): Add armv8.6-a option.
(cpu_arch_ver): Add TAG_CPU_ARCH_V8 tag for Armv8.6-a.
* doc/c-arm.texi (-march): New armv8.6-a arch.
* config/tc-arm.c (arm_ext_bf16): New feature set.
(enum neon_el_type): Add NT_bfloat value.
(B_MNEM_vfmat, B_MNEM_vfmab): New bfloat16 encoder
helpers.
(BAD_BF16): New message.
(parse_neon_type): Add bf16 type specifier.
(enum neon_type_mask): Add N_BF16 type.
(type_chk_of_el_type): Account for NT_bfloat.
(el_type_of_type_chk): Account for N_BF16.
(neon_three_args): Split out from neon_three_same.
(neon_three_same): Part split out into neon_three_args.
(CVT_FLAVOUR_VAR): Add bf16_f32 cvt flavour.
(do_neon_cvt_1): Account for vcvt.bf16.f32.
(do_bfloat_vmla): New.
(do_mve_vfma): New function to deal with the mnemonic clash between the BF16
vfmat and the MVE vfma in a VPT block with a 't'rue condition.
(do_neon_cvttb_1): Account for vcvt{t,b}.bf16.f32.
(do_vdot): New
(do_vmmla): New
(insns): Add vdot and vmmla mnemonics.
(arm_extensions): Add "bf16" extension.
* doc/c-arm.texi: Document "bf16" extension.
* testsuite/gas/arm/attr-march-armv8_6-a.d: New test.
* testsuite/gas/arm/bfloat16-bad.d: New test.
* testsuite/gas/arm/bfloat16-bad.l: New test.
* testsuite/gas/arm/bfloat16-bad.s: New test.
* testsuite/gas/arm/bfloat16-cmdline-bad-2.d: New test.
* testsuite/gas/arm/bfloat16-cmdline-bad-3.d: New test.
* testsuite/gas/arm/bfloat16-cmdline-bad.d: New test.
* testsuite/gas/arm/bfloat16-neon.s: New test.
* testsuite/gas/arm/bfloat16-non-neon.s: New test.
* testsuite/gas/arm/bfloat16-thumb-bad.d: New test.
* testsuite/gas/arm/bfloat16-thumb-bad.l: New test.
* testsuite/gas/arm/bfloat16-thumb.d: New test.
* testsuite/gas/arm/bfloat16-vfp.d: New test.
* testsuite/gas/arm/bfloat16.d: New test.
* testsuite/gas/arm/bfloat16.s: New test.
include/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/arm.h (ARM_EXT2_V8_6A, ARM_AEXT2_V8_6A,
ARM_ARCH_V8_6A): New.
* opcode/arm.h (ARM_EXT2_BF16): New feature macro.
(ARM_AEXT2_V8_6A): Include above macro in definition.
opcodes/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* arm-dis.c (select_arm_features): Update bfd_march_arm_8 with
Armv8.6-A.
(coprocessor_opcodes): Add bfloat16 vcvt{t,b}.
(neon_opcodes): Add bfloat SIMD instructions.
(print_insn_coprocessor): Add new control character %b to print
condition code without checking cp_num.
(print_insn_neon): Account for BFloat16 instructions that have no
special top-byte handling.
Regression tested on arm-none-eabi.
Is it ok for trunk?
Regards,
Mihail
Hi,
This patch is part of a series that adds support for Armv8.6-A
(Matrix Multiply and BFloat16 extensions) to binutils.
Some generic instructions match a large range of encoding space (e.g.
stc, mcr, mrc).
Currently these instructions are in the coprocessor_opcodes array, which
means they are checked before many other instructions when disassembling
arm and thumb32 codes.
This patch moves the generic instructions into a separate array to be
checked later on.
This is done in order to avoid instruction conflict between the generic
instructions and newer ones -- this has already been seen with MVE, and
is also a problem with BFloat16.
One way to avoid the conflict could be to swap the search order between
coprocessor_opcodes and neon_opcodes.
We avoid this since it's a larger change that may introduce extra bugs
(that aren't caught by the testsuite).
We have decided against searching the generic array after searching the
arm specific and thumb32 specific arrays with a similar reasoning about
keeping the change small.
Regression tested with arm-none-linux-gnueabihf.
Committed on behalf of Mihail Ionescu.
opcodes/ChangeLog:
2019-10-29 Mihail Ionescu <mihail.ionescu@arm.com>
2019-10-29 Matthew Malcomson <matthew.malcomson@arm.com>
* arm-dis.c (print_insn_coprocessor,
print_insn_generic_coprocessor): Create wrapper functions around
the implementation of the print_insn_coprocessor control codes.
(print_insn_coprocessor_1): Original print_insn_coprocessor
function that now takes which array to look at as an argument.
(print_insn_arm): Use both print_insn_coprocessor and
print_insn_generic_coprocessor.
(print_insn_thumb32): As above.
Is it ok for trunk?
Regards,
Mihail
Hi,
This patch is part of a series that adds support for Armv8.6-A
(Matrix Multiply and BFloat16 extensions) to binutils.
This patch introduces the following BFloat16 instructions to the
aarch64 backend: bfdot, bfmmla, bfcvt, bfcvtnt, bfmlal[t/b],
bfcvtn2.
Committed on behalf of Mihail Ionescu.
gas/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* config/tc-aarch64.c (vectype_to_qualifier): Special case the
S_2H operand qualifier.
* doc/c-aarch64.texi: Document bf16 and bf16mmla4 extensions.
* testsuite/gas/aarch64/bfloat16.d: New test.
* testsuite/gas/aarch64/bfloat16.s: New test.
* testsuite/gas/aarch64/illegal-bfloat16.d: New test.
* testsuite/gas/aarch64/illegal-bfloat16.l: New test.
* testsuite/gas/aarch64/illegal-bfloat16.s: New test.
* testsuite/gas/aarch64/sve-bfloat-movprfx.s: New test.
* testsuite/gas/aarch64/sve-bfloat-movprfx.d: New test.
include/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_BFLOAT16): New feature macros.
(AARCH64_ARCH_V8_6): Include BFloat16 feature macros.
(enum aarch64_opnd_qualifier): Introduce new operand qualifier
AARCH64_OPND_QLF_S_2H.
(enum aarch64_insn_class): Introduce new class "bfloat16".
(BFLOAT16_SVE_INSNC): New feature set for bfloat16
instructions to support the movprfx constraint.
opcodes/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-asm.c (aarch64_ins_reglane): Use AARCH64_OPND_QLF_S_2H
in reglane special case.
* aarch64-dis-2.c (aarch64_opcode_lookup_1,
aarch64_find_next_opcode): Account for new instructions.
* aarch64-dis.c (aarch64_ext_reglane): Use AARCH64_OPND_QLF_S_2H
in reglane special case.
* aarch64-opc.c (struct operand_qualifier_data): Add data for
new AARCH64_OPND_QLF_S_2H qualifier.
* aarch64-tbl.h (QL_BFDOT QL_BFDOT64, QL_BFDOT64I, QL_BFMMLA2,
QL_BFCVT64, QL_BFCVTN64, QL_BFCVTN2_64): New qualifiers.
(aarch64_feature_bfloat16, aarch64_feature_bfloat16_sve,
aarch64_feature_bfloat16_bfmmla4): New feature sets.
(BFLOAT_SVE, BFLOAT): New feature set macros.
(BFLOAT_SVE_INSN, BFLOAT_BFMMLA4_INSN, BFLOAT_INSN): New macros
to define BFloat16 instructions.
(aarch64_opcode_table): Define new instructions bfdot,
bfmmla, bfcvt, bfcvtnt, bfdot, bfdot, bfcvtn, bfmlal[b/t]
bfcvtn2, bfcvt.
Regression tested on aarch64-elf.
Is it ok for trunk?
Regards,
Mihail
Hi,
This patch is part of a series that adds support for Armv8.6-A
to binutils.
This first patch adds the Armv8.6-A flag to binutils.
No instructions are behind it at the moment.
Commited on behalf of Mihail Ionescu.
gas/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* config/tc-aarch64.c (armv8.6-a): New arch.
* doc/c-aarch64.texi (armv8.6-a): Document new arch.
include/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_V8_6): New.
(AARCH64_ARCH_V8_6): New.
opcodes/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-tbl.h (ARMV8_6): New macro.
Is it ok for trunk?
Regards,
Mihail
* ar.c (open_output_file): Check for filename validity before
prefixing with output directory.
Display the constructed output filename if in verbose mode.
(extract_file): Let open_output_file display the filename.
Add a script that takes a list of files as arguments and output a list of
words from the C comments with their frequencies.
For:
...
$ ./gdb/contrib/words.sh $(find gdb -type f -name "*.c" -o -name "*.h")
...
it generates a list of ~15000 words prefixed with frequency.
This could be used to generate a dictionary that is kept as part of the
sources, against which new code can be checked, generating a warning or
error. The hope is that misspellings would trigger this frequently, and rare
words rarely, otherwise the burden of updating the dictionary would be too
much.
And for:
...
$ ./gdb/contrib/words.sh -f 1 $(find gdb -type f -name "*.c" -o -name "*.h")
...
it generates a list of ~5000 words with frequency 1.
This can be used to scan for misspellings manually.
Change-Id: I7b119c9a4519cdbf62a3243d1df2927c80813e8b
I think it is past time to remove CR16C support. CR16C was added in
2004, and only for ld. gas and binutils support is lacking, and there
have been no commits to bfd/elf32-cr16c.c other than warning fixes or
global maintainers making changes to all targets. I see no maintainer
listed for CR16C, and no commits from anyone at NSC supporting the
target. Furthermore, at the time the CR16 support was added in 2007,
config.sub was changed upstream to no longer recognise cr16c as a
valid cpu. That means the CR16C ld support is only available as a
secondary target by configuring with, for example,
--enable-targets=all or --enable-targets=cr16c-unknown-elf. No
testing of the CR16C target is possible.
include/
* elf/cr16c.h: Delete.
bfd/
* cpu-cr16c.c: Delete.
* elf32-cr16c.c: Delete.
* Makefile.am,
* archures.c,
* config.bfd,
* configure.ac,
* reloc.c,
* targets.c: Remove cr16c support.
* Makefile.in,
* bfd-in2.h,
* configure,
* libbfd.h,
* po/SRC-POTFILES.in: Regenerate.
ld/
* emulparams/elf32cr16c.sh: Delete.
* scripttempl/elf32cr16c.sc: Delete.
* Makefile.am,
* configure.tgt: Remove cr16c support.
* NEWS: Mention removal of cr16c.
* Makefile.in,
* po/BLD-POTFILES.in: Regenerate.
The target list was supposed to be more or less alphabetically sorted,
but this wasn't anywhere near the case. The comment about keeping
architecture variants together seems odd to me, and is no doubt the
reason why ix86 and x86_64 were grouped together, so I removed that
comment. The patch doesn't change order of entries for a given cpu.
* configure.tgt: Order targets by cpu.
As the comments (here: almost, in the opcode table: fully) correctly
state - all register operands except MONITOR's address one are fixed
at 32 bit size. Don't print 64-bit registers there.
Also adjust x86-64-suffix.d's name such that it wouldn't be identical to
x86-64-rep-suffix.d's, but instead resemble that of its sibling
x86-64-suffix-intel.d.
Improves threadsafety. This will be important when the patch series at
https://gnutoolchain-gerrit.osci.io/r/c/binutils-gdb/+/176
lands.
gdb/ChangeLog:
2019-11-06 Christian Biesinger <cbiesinger@google.com>
* linux-tdep.c (linux_info_proc): Use strtok_r instead of strtok.
* mi/mi-main.c (output_cores): Likewise.
* nat/linux-osdata.c (linux_xfer_osdata_cpus): Likewise.
(linux_xfer_osdata_modules): Likewise.
* remote.c (register_remote_support_xml): Likewise.
* sparc64-tdep.c (adi_is_addr_mapped): Likewise.
* xml-syscall.c (syscall_create_syscall_desc): Likewise.
gdb/gdbserver/ChangeLog:
2019-11-06 Christian Biesinger <cbiesinger@google.com>
* linux-x86-low.c (x86_linux_process_qsupported): Use strtok_r
instead of strtok.
* server.c (handle_query): Likewise.
(captured_main): Likewise.
Change-Id: Ief6138965a24398e5fc064598cd8f2abd3b5047c
It looks like autoheader and automake weren't run for commit
73cc72729a.
Note, it looks like the installed gettext version affects the
generated output here, I used 0.19.8.1 to get no diff.
gnulib/ChangeLog:
2019-11-06 Christian Biesinger <cbiesinger@google.com>
* config.in: Regenerate.
* import/Makefile.in: Regenerate.
Change-Id: Iadd43023713a77921b0f850184a19afb1517be02
I went through most of the spots that include readline.h and, when
appropriate, either removed the include or changed it to include
tilde.h.
Note that remote-sim.c and bsd-kvm.c could probably include tilde.h
instead, but I did not change these. I think I can't build the
latter, and I didn't want to set up a sim build for the former.
Tested by rebuilding.
gdb/ChangeLog
2019-11-06 Tom Tromey <tom@tromey.com>
* tui/tui-interp.c: Don't include readline.h.
* tui/tui-hooks.c: Don't include readline.h.
* symmisc.c: Include tilde.h, not readline.h.
* symfile.c: Include tilde.h, not readline.h.
* source.c: Include tilde.h, not readline.h.
* solib.c: Include tilde.h, not readline.h.
* psymtab.c: Include tilde.h, not readline.h.
* exec.c: Include tilde.h, not readline.h.
* corelow.c: Include tilde.h, not readline.h.
* cli/cli-dump.c: Include tilde.h, not readline.h.
* cli/cli-cmds.c: Don't include readline.h.
Change-Id: I60487a190c43128b800ef77517d1ab42957571d7
* readelf.c (IN_RANGE): Rename parameter OFF to NELEM. Add
comment. Catch potential integer overflow and fix off by one
error whilst checking reloc location against section size.
(apply_relocations): Use IN_RANGE macro.
For targets with octets_per_byte > 1, testsuite/ld-scripts/rgn-over*
produce wrong sizes in the generated map files:
.text 0x0000000000001000 0x6
^^^ # correct
*(.txt)
.txt 0x0000000000001000 0xc tmpdir/rgn-over.o
^^^ # should also be 0x6
* ldlang.c (print_input_section): Shift printed size by opb_shift.
My previous patch to add styling to the TUI disassembly failed to
correctly fix a bug that Simon had pointed out in review. This patch
fixes the bug.
gdb/ChangeLog
2019-11-05 Tom Tromey <tom@tromey.com>
* tui/tui-disasm.c (struct tui_asm_line) <addr_size>: New member.
(tui_disassemble): Set addr_size.
(tui_disasm_window::set_contents): Use addr_size.
Change-Id: Ic0152f3b82a2f79be28ae46d590096661f271580
The la_get_string member of struct language_defn was intended to
provide a way to fetch string data from a "string" object in a
language-dependent way. However, it turned out that this was never
needed, and was only ever implemented for C. This patch removes the
language hook entirely.
gdb/ChangeLog
2019-11-05 Tom Tromey <tom@tromey.com>
* rust-lang.c (rust_language_defn): Update.
* python/py-value.c (valpy_string): Call c_get_string.
* p-lang.c (pascal_language_defn): Update.
* opencl-lang.c (opencl_language_defn): Update.
* objc-lang.c (objc_language_defn): Update.
* m2-lang.c (m2_language_defn): Update.
* language.c (unknown_language_defn, auto_language_defn): Update.
(default_get_string): Remove.
* guile/scm-value.c (gdbscm_value_to_string): Use c_get_string.
* go-lang.c (go_language_defn): Update.
* f-lang.c (f_language_defn): Update.
* d-lang.c (d_language_defn): Update.
* c-lang.c (c_language_defn, cplus_language_defn)
(asm_language_defn, minimal_language_defn): Update.
* ada-lang.c (ada_language_defn): Update.
* language.h (struct language_defn) <la_get_string>: Remove.
(LA_GET_STRING): Remove.
(default_get_string): Don't declare.
Change-Id: Ia97763dfe34dc8ecb46587f7a651f8af9be8fdbd
This patch changes the TUI disassembly window to style its contents.
The styling should be identical to what is seen in the CLI. This
involved a bit of rearrangement, so that the source and disassembly
windows could share both the copy_source_line utility function, and
the ability to react to changes in "set style enabled".
This version introduces a new function to strip the styling from the
address string when computing the length. As a byproduct, it also
removes the unused "insn_size" computation from
tui_disasm_window::set_contents.
gdb/ChangeLog
2019-11-05 Tom Tromey <tom@tromey.com>
* tui/tui-source.h (struct tui_source_window): Inline
constructor. Remove destructor.
<style_changed, m_observable>: Move to superclass.
* tui/tui-winsource.h (tui_copy_source_line): Declare.
(struct tui_source_window_base): Move private members to end.
<style_changed, m_observable>: Move from tui_source_window.
* tui/tui-winsource.c (tui_copy_source_line): Move from
tui-source.c. Rename from copy_source_line. Add special handling
for negative line number.
(tui_source_window_base::style_changed): Move from
tui_source_window.
(tui_source_window_base): Register observer.
(~tui_source_window_base): New.
* tui/tui-source.c (copy_source_line): Move to tui-winsource.c;
rename.
(tui_source_window::set_contents): Use tui_copy_source_line.
(tui_source_window::tui_source_window): Move to tui-source.h.
(tui_source_window::~tui_source_window): Remove.
(tui_source_window::style_changed): Move to superclass.
* tui/tui-disasm.c (tui_disassemble): Create string file with
styling, when possible. Add "addr_size" parameter.
(tui_disasm_window::set_contents): Use tui_copy_source_line.
Don't compute maximum size.
(len_without_escapes): New function
Change-Id: I8722635eeecbbb1633d943a65b856404c2d467b0
This changes tui_source_element::line to be of type std::string. This
reduces the number of copies made.
gdb/ChangeLog
2019-11-05 Tom Tromey <tom@tromey.com>
* tui/tui-winsource.h (struct tui_source_element) <line>: Now a
std::string.
* tui/tui-winsource.c (tui_show_source_line): Update.
* tui/tui-source.c (tui_source_window::set_contents): Update.
* tui/tui-disasm.c (tui_disasm_window::set_contents): Update.
Change-Id: Id600f3e1d386a2911f187366e05e2ec599068dd2
gdb/ChangeLog:
2019-11-05 Christian Biesinger <cbiesinger@google.com>
* symtab.h (gdb_static_assert): Put && operator at the beginning
of the line instead of the end.
Change-Id: I6d05c2f5e46c3f317ba97458509b2da9fd03464b
* doc/chew.c (add_to_definition): Use correct type when
calculating size of array reallocation.
(nextword): Always initialise the word return parameter.
(compile): Check return value of nextword().
The original idea looks to have been for names to be composed in the
order that decoding gets done, which helps both reading and modifying
the code. Switch (back) to this model for some of the affected non-
vector insn enumerators.
A target that sets EMBEDDED non-empty is one that doesn't want to put
the ELF file header or program header in a memory image. Likely the
target isn't interested in supporting dynamically loaded executables,
shared libraries, or PIEs, because loaders for such binaries generally
require program headers to be present. This isn't 100% true though.
The target might be one where the loader accesses the file system in
order to retrieve headers.
Also, note that not all "shared libraries" require gcc -shared or the
shared library support in the linker. I believe one implementation of
shared libraries on uclinux is like this.
So, this patch removes GENERATE_SHLIB_SCRIPT and GENERATE_PIE_SCRIPT
in most emulparams files where EMBEDDED is set, restoring the shared
lib and pie support in emulparams files that unset EMBEDDED after
including a file where the support is removed.
Exceptions to the general rule that EMBEDDED disables shared libs are:
arm*-*-symbianelf*, where the OS wants shared library support
without ELF program headers in the image, and
sh*-*-uclinux*, where I've left things as they were, ie. both
EMBEDDED and GENERATE_SHLIB_SCRIPT because I'm unsure as to the
shared library scheme.
* emulparams/aarch64elf.sh (GENERATE_SHLIB_SCRIPT),
(GENERATE_PIE_SCRIPT): Don't set.
* emulparams/aarch64elf32.sh (GENERATE_SHLIB_SCRIPT),
(GENERATE_PIE_SCRIPT): Don't set.
* emulparams/arcelf.sh (GENERATE_SHLIB_SCRIPT): Don't set.
* emulparams/armelf.sh (GENERATE_SHLIB_SCRIPT),
(GENERATE_PIE_SCRIPT): Don't set.
* emulparams/armelf_fbsd.sh (GENERATE_SHLIB_SCRIPT): Set.
* emulparams/armelf_nbsd.sh (GENERATE_SHLIB_SCRIPT),
(GENERATE_PIE_SCRIPT): Set.
* emulparams/armelf_vxworks.sh (GENERATE_SHLIB_SCRIPT): Set.
* emulparams/armsymbian.sh (GENERATE_SHLIB_SCRIPT): Set.
* emulparams/elf32bfin.sh (GENERATE_SHLIB_SCRIPT): Don't set.
* emulparams/elf32microblaze.sh (GENERATE_SHLIB_SCRIPT): Don't set.
* emulparams/score3_elf.sh (GENERATE_SHLIB_SCRIPT): Don't set.
* emulparams/shelf.sh (GENERATE_SHLIB_SCRIPT): Don't set.
* emulparams/shelf_nbsd.sh (GENERATE_SHLIB_SCRIPT),
(GENERATE_PIE_SCRIPT): Set.
* emulparams/shelf_uclinux.sh (GENERATE_SHLIB_SCRIPT): Set.
No real changes here, just making it that much easier to find targets
that set EMBEDDED to a non-empty string.
* emulparams/elf32bfinfd.sh: Unset EMBEDDED rather assigning as empty.
* emulparams/elf32frvfd.sh: Likewise.
* emulparams/elf32lm32fd.sh: Likewise.
* emulparams/i386lynx.sh: Likewise.
Specifically the three structs mentioned in symtab.h:
- general_symbol_info
- symbol
- partial_symbol
This ensures that those structs won't accidentally get bigger.
gdb/ChangeLog:
2019-11-04 Christian Biesinger <cbiesinger@google.com>
* psympriv.h: Add static_asserts for sizeof (general_symbol_info)
and sizeof (symbol).
* symtab.h: Add a static_assert for sizeof (partial_symbol).
Change-Id: Idd68320aa3e79ee7cc749019724636a58ce4b9c6
