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Author SHA1 Message Date
Joseph Myers 40b365969f bfd: 
* Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo.
	(ALL_MACHINES_CFILES): Add cpu-tic6x.c.
	(BFD32_BACKENDS): Add elf32-tic6x.lo.
	(BFD32_BACKENDS_CFILES): Add elf32-tic6x.c.
	* Makefile.in: Regenerate.
	* archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New.
	(bfd_archures_list): Update.
	* config.bfd (tic6x-*-elf): New.
	* configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec):
	New.
	* configure: Regenerate.
	* cpu-tic6x.c, elf32-tic6x.c: New.
	* reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12,
	BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7,
	BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16,
	BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B,
	BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W,
	BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B,
	BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W,
	BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H,
	BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W,
	BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W,
	BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31,
	BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN,
	BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New.
	* targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New.
	(_bfd_target_vector): Update.
	* bfd-in2.h, libbfd.h: Regenerate.

binutils:
	* MAINTAINERS: Add self as TI C6X maintainer.
	* NEWS: Add news entry for TI C6X support.
	* readelf.c: Include elf/tic6x.h.
	(guess_is_rela): Handle EM_TI_C6000.
	(dump_relocations): Likewise.
	(get_tic6x_dynamic_type): New.
	(get_dynamic_type): Call it.
	(get_machine_flags): Handle EF_C6000_REL.
	(get_osabi_name): Handle machine-specific values only for relevant
	machines.  Handle C6X values.
	(get_tic6x_segment_type): New.
	(get_segment_type): Call it.
	(get_tic6x_section_type_name): New.
	(get_section_type_name): Call it.
	(is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle
	EM_TI_C6000.

gas:
	* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c.
	(TARGET_CPU_HFILES): Add config/tc-tic6x.h.
	* Makefile.in: Regenerate.
	* NEWS: Add news entry for TI C6X support.
	* app.c (do_scrub_chars): Handle "||^" for TI C6X.  Handle
	TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR.  Keep spaces in
	operands if TC_KEEP_OPERAND_SPACES.
	* configure.tgt (tic6x-*-*): New.
	* config/tc-ia64.h (TC_PREDICATE_START_CHAR,
	TC_PREDICATE_END_CHAR): Define.
	* config/tc-tic6x.c, config/tc-tic6x.h: New.
	* doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi.
	* doc/Makefile.in: Regenerate.
	* doc/all.texi (TIC6X): Define.
	* doc/as.texinfo: Add TI C6X documentation.  Include c-tic6x.texi.
	* doc/c-tic6x.texi: New.

gas/testsuite:
	* gas/tic6x: New directory and testcases.

include:
	* dis-asm.h (print_insn_tic6x): Declare.

include/elf:
	* common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define.
	* tic6x.h: New.

include/opcode:
	* tic6x-control-registers.h, tic6x-insn-formats.h,
	tic6x-opcode-table.h, tic6x.h: New.

ld:
	* Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and
	eelf32_tic6x_le.o.
	(eelf32_tic6x_be.c, eelf32_tic6x_le.c): New.
	* NEWS: Add news entry for TI C6X support.
	* configure.tgt (tic6x-*-*): New.
	* emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New.

ld/testsuite:
	* ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*.
	* ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*.
	* ld-tic6x: New directory and testcases.

opcodes:
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	* Makefile.in: Regenerate.
	* configure.in (bfd_tic6x_arch): New.
	* configure: Regenerate.
	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	(disassembler): Handle TI C6X.
	* tic6x-dis.c: New.
 2010-03-25 21:12:36 +00:00
H.J. Lu cff8d58ab4 Use STRING_COMMA_LEN to avoid strlen. 
2010-03-22  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (lex_got): Use STRING_COMMA_LEN on gotrel.
 2010-03-22 13:49:50 +00:00
H.J. Lu 86e026a449 Replace oprand_size_mismatch with operand_size_mismatch. 
2010-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (i386_error): Replace oprand_size_mismatch
	with operand_size_mismatch.
	(operand_size_match): Updated.
	(match_template): Likewise.
 2010-03-22 03:29:47 +00:00
H.J. Lu a65babc949 Set error instead of err_msg on failure. 
2010-03-21  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (i386_error): New.
	(_i386_insn): Replace err_msg with error.
	(operand_size_match): Set error instead of err_msg on failure.
	(operand_type_match): Likewise.
	(operand_type_register_match): Likewise.
	(VEX_check_operands): Likewise.
	(match_template): Likewise.  Use error instead of err_msg with
	as_bad.
 2010-03-22 02:20:58 +00:00
Jie Zhang 0f020cefaa * config/tc-arm.c (make_mapping_symbol): Hanle the case 
that two mapping symbols have the same value.

	testsuite/
	* gas/arm/mapmisc.s: Add the test case for two mapping
	symbols having the same value.
	* gas/arm/mapmisc.d: Likewise.
 2010-03-19 14:43:09 +00:00
Nick Clifton b43420e6cd bfd/ 
2010-03-15  Wei Guozhi  <carrot@google.com>

       PR gas/11323
       * bfd-in2.h (enum bfd_reloc_code_real): New BFD_RELOC_GOT_PREL type.
       * elf32-arm.c (elf32_arm_reloc_map): BFD_RELOC_GOT_PREL to
       R_ARM_GOT_PREL map.
       * libbfd.h (bfd_reloc_code_real_names): BFD_RELOC_GOT_PREL name.
       * reloc.c (comments): Document the new relocation.

gas/
2010-03-15  Wei Guozhi  <carrot@google.com>

       PR gas/11323
       * config/tc-arm.c (reloc_names): New relocation names.
       (md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL.
       (tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL.
       * doc/c-arm.texi (ARM-Relocations): Document the new relocation.

gas/testsuite
2010-03-15  Wei Guozhi  <carrot@google.com>

       PR gas/11323
       * gas/arm/got_prel.s: New test case.
       * gas/arm/got_prel.d: Likewise.
 2010-03-18 11:22:46 +00:00
Segher Boessenkool dc86b458e9 2010-03-13 Segher Boessenkool <segher@kernel.crashing.org> 
* config/tc-v850.c (v850_insert_operand): Handle out-of-range
        assembler constants on 64-bit hosts.
 2010-03-13 15:54:21 +00:00
Mike Frysinger ee9e7c780e strip trailing whitespace in Blackfin files 2010-03-10 14:23:58 +00:00
Mike Frysinger a23c851aa4 add support for Blackfin bf504/bf506 2010-03-10 13:03:29 +00:00
Jie Zhang 9982501a0d * doc/as.texinfo: Add Blackfin options. 
* doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic.
	* config/tc-bfin.c (md_show_usage): Show usage for all
	Blackfin specific options.
 2010-03-10 03:57:00 +00:00
Rainer Orth 40cf28aa1c * config/tc-i386.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define. 
(ELF_TARGET_FORMAT64): Define.
 2010-03-08 14:07:45 +00:00
Paul Brook 26b6f1917c 2010-03-05 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
 2010-03-05 10:41:04 +00:00
Andrew Stubbs 772657e995 2010-03-02 Andrew Stubbs <ams@codesourcery.com> 
* config/tc-sh.c (get_specific): Move overflow checking code to avoid
	reading uninitialized data.
 2010-03-02 09:32:21 +00:00
Tristan Gingold bd56defd73 2010-03-01 Tristan Gingold <gingold@adacore.com> 
* config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
 2010-03-01 16:47:52 +00:00
Jie Zhang f8a8e9d60e * config/tc-arm.c (do_t_strexd): Remove 
operand[1] != operand[2] contraint.

	testsuite/
	* gas/arm/thumb32.s, gas/arm/thumb32.d: Add a new test
	for strexd.
	* gas/arm/thumb32.l: Adjust.
 2010-02-26 15:57:59 +00:00
Jie Zhang 3fde54a228 * config/tc-arm.c (neon_select_shape): No need to match 
the remaining operands in the shape when one operand does
	not match.
 2010-02-26 15:52:41 +00:00
Jie Zhang e23c0ad820 2010-02-26 Jie Zhang <jie@codesourcery.com> 
* config/tc-arm.c (do_neon_ld_st_interleave): Reject bad
	alignment.

	testsuite/
	* gas/arm/neon-ldst-align-bad.d: New test.
	* gas/arm/neon-ldst-align-bad.l: New test.
	* gas/arm/neon-ldst-align-bad.s: New test.
 2010-02-26 15:49:07 +00:00
H.J. Lu a6c560506b Update x86 assembler error messages. 
2010-02-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Update error messages.
 2010-02-25 21:47:27 +00:00
H.J. Lu 891edac42b Improve x86 assembler error message. 
2010-02-25  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (_i386_insn): Add err_msg.
	(operand_size_match): Set err_msg on failure.
	(operand_type_match): Likewise.
	(operand_type_register_match): Likewise.
	(VEX_check_operands): Likewise.
	(match_template): Likewise.  Use i.err_msg with as_bad.
 2010-02-25 17:59:52 +00:00
Nick Clifton c67a084a24 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop, 
mips_fix_loongson2f_jump): New variables.
        (md_longopts): Add New options -mfix-loongson2f-nop/jump,
        -mno-fix-loongson2f-nop/jump.
        (md_parse_option): Initialize variables via above options.
        (options): New enums for the above options.
        (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN.
        (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump):
        New functions.
        (append_insn): call fix_loongson2f().
        (mips_handle_align): Replace the implicit nops.
        * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified
        for the new mips_handle_align().
        * doc/c-mips.texi: Document the new options.

        * gas/mips/loongson-2f-2.s: New test of -mfix-loongson2f-nop.
        * gas/mips/loongson-2f-2.d: Likewise.
        * gas/mips/loongson-2f-3.s: New test of -mfix-loongson2f-jump.
        * gas/mips/loongson-2f-3.d: Likewise.
        * gas/mips/mips.exp: Run the new tests.

        * opcode/mips.h (LOONGSON2F_NOP_INSN): New macro.
 2010-02-25 11:15:48 +00:00
Daniel Gutson 56adecf405 gas/ 
* config/tc-arm.c (do_rd_rm_rn): Added warning.

    gas/testsuite/
    * gas/arm/depr-swp.d: New test case.
    * gas/arm/depr-swp.s: New file.
    * gas/arm/depr-swp.l: New file.
 2010-02-23 18:04:14 +00:00
Nick Clifton 17e5723725 PR 11297: Add support for 8-bit relocations to the AVR toolchain. 2010-02-23 11:38:36 +00:00
Matthew Gretton-Dann 8a59fff3dd PR 9861 
* gas/config/tc-arm.c (CPU_DEFAULT): Do not define based upon build
	compiler's predefines.
 2010-02-22 10:24:56 +00:00
Matthew Gretton-Dann cd21e5460f * bfd/elf32-arm.c (elf32_arm_merge_eabi_attributes): Add support for 
merging Tag_DIV_use, Tag_MPextension_use, and
	Tag_MPextension_use_legacy tags.
	* binutils/readelf.c (arm_attr_tag_Advanced_SIMD_arch): Add
	description of newly permitted attribute values.
	(arm_attr_tag_Virtualization_use): Likewise.
	(arm_attr_tag_DIV_use): Add description of new attribute.
	(arm_attr_tag_MPextension_use_legacy): Likewise.
	* gas/config/tc-arm.c (arm_convert_symbolic_attribute):
	Add Tag_DIV_use.
	* gas/doc/c-arm.texi: Likewise.
	* gas/testsuite/gas/arm/attr-order.d: Fix test for new names for
	attribute values.
	* include/elf/arm.h (Tag_MPextension_use): Renumber.
	(Tag_DIV_use): Add.
	(Tag_MPextension_use_legacy): Likewise.
	* ld/testsuite/ld-arm/attr-merge-3.attr: Fix test for new attribute
	values.
	* ld/testsuite/ld-arm/attr-merge-3b.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-unknown-1.d: Fix test now that 42
	is a recognised attribute ID.
	* ld/testsuite/ld-arm/attr-merge-unknown-1.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-6.attr: New test.
	* ld/testsuite/ld-arm/attr-merge-6a.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-6b.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
	* ld/testsuite/ld-arm/attr-merge-7a.s: Likewise.
	* ld/testsuite/ld-arm/attr-merge-7b.s: Likewise.
	* ld/testsuite/ld-arm/arm-elf.exp: Run the new tests.
 2010-02-18 10:56:28 +00:00
Daniel Gutson 5be8be5d5d gas/ 
* config/tc-arm.c (asm_opcode): operands type
	change.
	(BAD_PC_ADDRESSING): New macro message.
	(BAD_PC_WRITEBACK): Likewise.
	(MIX_ARM_THUMB_OPERANDS): New macro.
	(operand_parse_code): Added enum values.
	(parse_operands): Added thumb/arm distinction,
	plus new enum values handling.
	(encode_arm_addr_mode_2): Validations enhanced.
	(encode_arm_addr_mode_3): Likewise.
	(do_rm_rd_rn): Likewise.
	(encode_thumb32_addr_mode): Likewise.
	(do_t_ldrex): Likewise.
	(do_t_ldst): Likewise.
	(do_t_strex): Likewise.
	(md_assemble): Call parse_operands with
	a new parameter.
	(OPS_1): New macro.
	(OPS_2): Likewise.
	(OPS_3): Likewise.
	(OPS_4): Likewise.
	(OPS_5): Likewise.
	(OPS_6): Likewise.
	(insns): Updated insns operands.

	gas/testsuite/
	* gas/arm/sp-pc-validations-bad.d: New testcase.
	* gas/arm/sp-pc-validations-bad.l: New file.
	* gas/arm/sp-pc-validations-bad.s: New file.
	* gas/arm/sp-pc-validations-bad-t.d: New testcase.
	* gas/arm/sp-pc-validations-bad-t.l: New file.
	* gas/arm/sp-pc-validations-bad-t.s: New file.
	* gas/arm/sp-pc-usage-t.d: Removed invalid insns.
	* gas/arm/sp-pc-usage-t.s: Likewise.
	* gas/arm/unpredictable.d: Likewise.
	* gas/arm/unpredictable.s: Likewise.
	* gas/arm/thumb2_bcond.d: Added test.
	* gas/arm/thumb2_bcond.s: Likewise.
 2010-02-12 20:15:13 +00:00
Tristan Gingold 9d0e849713 gas/ 
2010-02-12  Tristan Gingold  <gingold@adacore.com>
	    Douglas B Rupp  <rupp@gnat.com>

	* config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC.
	(DUMMY_RELOC_IA64_SLOTCOUNT): Added.
	(pseudo_func): Add an entry for slotcount.
	(md_begin): Initialize slotcount pseudo symbol.
	(ia64_parse_name): Handle @slotcount parameter.
	(ia64_gen_real_reloc_type): Handle slotcount.
	(md_apply_fix): Ditto.
	* doc/c-ia64.texi (IA-64-Relocs): Document @slotcount.

gas/testsuite/
2010-02-12  Tristan Gingold  <gingold@adacore.com>

	* gas/ia64/slotcount.s, gas/ia64/slotcount.s: New test.
	* gas/ia64/ia64.exp: Add slotcount test (vms only).
 2010-02-12 14:34:45 +00:00
Sterling Augustine 6fa78d941b 2010-02-11 Sterling Augustine <sterling@jaw.hq.tensilica.com> 
* config/tc-xtensa.c (istack_init): Don't call memset.
 2010-02-11 19:08:09 +00:00
Sterling Augustine a89c407e4b 2010-02-11 Sterling Augustine <sterling@tensilica.com> 
* config/tc-xtensa.c (cache_literal_section): Handle prefixes as
	well as suffixes.
 2010-02-11 19:00:21 +00:00
H.J. Lu 24981e7b95 Reformat build_modrm_byte. 
2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Reformat.
 2010-02-11 14:02:50 +00:00
H.J. Lu c75ef631bd Update copyright. 
gas/

2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c: Update copyright.

opcodes/

2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c: Update copyright.
	* i386-gen.c: Likewise.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.
 2010-02-11 13:41:19 +00:00
Sebastian Pop a683cc34e4 2010-02-10 Quentin Neill <quentin.neill@amd.com> 
Sebastian Pop  <sebastian.pop@amd.com>

gas:
        * config/tc-i386.c (vec_imm4) New operand type.
        (fits_in_imm4): New.
        (VEX_check_operands): New.
        (check_reverse): Call VEX_check_operands.
        (build_modrm_byte): Reintroduce code for 5
        operand insns.  Fix whitespace.

gas/testsuite:
        * gas/i386/x86-64-xop.d: Add vpermil2p[sd] tests.
        * gas/i386/x86-64-xop.s: Likewise.
        * gas/i386/xop.d: Likewise.
        * gas/i386/xop.s: Likewise.

opcodes:
        * i386-dis.c (OP_EX_VexImmW): Reintroduced
        function to handle 5th imm8 operand.
        (PREFIX_VEX_3A48): Added.
        (PREFIX_VEX_3A49): Added.
        (VEX_W_3A48_P_2): Added.
        (VEX_W_3A49_P_2): Added.
        (prefix table): Added entries for PREFIX_VEX_3A48
        and PREFIX_VEX_3A49.
        (vex table): Added entries for VEX_W_3A48_P_2 and
        and VEX_W_3A49_P_2.
        * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
        for Vec_Imm4 operands.
        * i386-opc.h (enum): Added Vec_Imm4.
        (i386_operand_type): Added vec_imm4.
        * i386-opc.tbl: Add entries for vpermilp[ds].
        * i386-init.h: Regenerated.
        * i386-tbl.h: Regenerated.
 2010-02-11 05:06:14 +00:00
Sterling Augustine 3c83b96e24 2010-02-10 Sterling Augustine <sterling@tensilica.com> 
* config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
 2010-02-10 20:18:14 +00:00
Richard Sandiford cdc51b0748 gas/ 
* config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
	-mpwr6 and -mpwr7.

opcodes/
	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	and "pwr7".  Move "a2" into alphabetical order.
 2010-02-10 19:59:07 +00:00
Sterling Augustine 3a1e9c4a2d 2010-02-09 Sterling Augustine <sterling@tensilica.com> 
* config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New.
	(next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES.
	(xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
 2010-02-09 19:36:50 +00:00
Christophe Lyon 486499d044 2010-02-08 Christophe Lyon <christophe.lyon@st.com> 
gas/
	* config/tc-arm.c (md_pcrel_from_section): Keep base to zero for
	non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23,
	BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
	BFD_RELOC_ARM_PCREL_CALL)

	gas/testsuite/
	* gas/arm/branch-reloc.s, gas/arm/branch-reloc.d,
	gas/arm/branch-reloc.l: New tests and expected results with all
	variants of call: ARM/Thumb, local/global, inter/intra-section,
	using BL/BLX.
 2010-02-09 14:44:50 +00:00
Sterling Augustine 19ef5f3d6d 2010-02-08 Sterling Augustine <sterling@tensilica.com> 
* config/tc-xtensa.c (frag_format_size): Generalize logic to
	handle more instruction	sizes and fetch widths.
	(branch_align_power): Likewise.
	(text_align_power): Likewise.
	(bytes_to_stretch): Likewise.
 2010-02-08 18:45:05 +00:00
Alan Modra ce3d2015b2 include/ 
* opcode/ppc.h (PPC_OPCODE_TITAN): Define.
bfd/
	* archures.c (bfd_mach_ppc_titan): Define.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (bfd_powerpc_archs): Add titan entry.
opcodes/
	* ppc-dis.c (ppc_opts): Add titan entry.
	* ppc-opc.c (TITAN, MULHW): Define.
	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
gas/
	* config/tc-ppc.c (md_show_usage): Mention -mtitan.  Don't use tabs.
	(ppc_mach): Handle titan.
	* doc/c-ppc.texi: Mention -mtitan.
gas/testsuite/
	* gas/ppc/titan.d, * gas/ppc/titan.s: New test.
	* gas/ppc/ppc.exp: Run it.
 2010-02-08 01:59:38 +00:00
Sterling Augustine 1beeb6866d 10-02-05 Sterling Augustine <sterling@tensilica.com> 
* config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
	replace with...
	(xtensa_fetch_width) ...this.
 2010-02-05 18:52:27 +00:00
Sebastian Pop 68339fdf88 2010-02-03 Quentin Neill <quentin.neill@amd.com> 
gas/
	* config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
	(i386_align_code): Rename  PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
	* config/tc-i386.h (processor_type): Same.
	* doc/c-i386.texi: Change amdfam15 to bdver1.

opcodes/
	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	to CPU_BDVER1_FLAGS
	* i386-init.h: Regenerated.

testsuite/
	* gas/i386/i386.exp: Rename amdfam15 test cases to bdver1.
	* gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to
	gas/i386/x86-64-nops-1-bdver1.d.
	* gas/i386/nops-1-amdfam15.d: Renamed test case to
	gas/i386/nops-1-bdver1.d.
 2010-02-03 20:36:14 +00:00
Nick Clifton 99b253c514 PR 11136 
* config/tc-arm.c (neon_check_type): Handle a neon_shape value of
        NS_NULL.
        * gas/arm/neon-omit.s: Add instruction that causes crash.
        * gas/arm/neon-omit.d: Add expected disassembly.
 2010-01-29 16:02:41 +00:00
Dave Korn 31907d5e90 gas/ChangeLog: 
* NEWS: Mention new feature.
	* config/obj-coff.c (obj_coff_section): Accept digits and use
	to override default section alignment power if specified.
	* doc/as.texinfo (.section directive): Update documentation.

gas/testsuite/ChangeLog:

	* gas/pe/section-align-1.s: New test source file.
	* gas/pe/section-align-1.d: Likewise control script.
	* gas/pe/section-align-2.s: Likewise ...
	* gas/pe/section-align-2.d: ... and likewise.
	* gas/pe/pe.exp: Invoke new testcases.
 2010-01-27 22:01:38 +00:00
H.J. Lu 539f890d01 Allow VL=1 on AVX scalar instructions. 
gas/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (avxscalar): New.
	(OPTION_MAVXSCALAR): Likewise.
	(build_vex_prefix): Select vector_length for scalar instructions
	based on avxscalar.
	(md_longopts): Add OPTION_MAVXSCALAR.
	(md_parse_option): Handle OPTION_MAVXSCALAR.
	(md_show_usage): Add -mavxscalar=.

	* doc/c-i386.texi: Document -mavxscalar=.

gas/testsuite/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/avx-scalar-intel.d: New.
	* gas/i386/avx-scalar.d: Likewise.
	* gas/i386/avx-scalar.s: Likewise.
	* gas/i386/x86-64-avx-scalar-intel.d: Likewise.
	* gas/i386/x86-64-avx-scalar.d: Likewise.
	* gas/i386/x86-64-avx-scalar.s: Likewise.

	* gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel,
	x86-64-avx-scalar and x86-64-avx-scalar-intel.

opcodes/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (XMScalar): New.
	(EXdScalar): Likewise.
	(EXqScalar): Likewise.
	(EXqScalarS): Likewise.
	(VexScalar): Likewise.
	(EXdVexScalarS): Likewise.
	(EXqVexScalarS): Likewise.
	(XMVexScalar): Likewise.
	(scalar_mode): Likewise.
	(d_scalar_mode): Likewise.
	(d_scalar_swap_mode): Likewise.
	(q_scalar_mode): Likewise.
	(q_scalar_swap_mode): Likewise.
	(vex_scalar_mode): Likewise.
	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	q_scalar_mode, q_scalar_swap_mode.
	(OP_XMM): Handle scalar_mode.
	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	and q_scalar_swap_mode.
	(OP_VEX): Handle vex_scalar_mode.
 2010-01-27 14:34:40 +00:00
H.J. Lu 80de6e001d Set the first 3byte VEX prefix individually. 
2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
	0xc4 individually.
 2010-01-24 15:44:05 +00:00
Richard Sandiford c865e45b1b bfd/ 
* coff-rs6000.c (xcoff_howto_table): Change size to 0 and bitsize to 1.
	(_bfd_xcoff_reloc_type_lookup): Handle BFD_RELOC_NONE.
	* coff64-rs6000.c (xcoff64_howto_table): Change size to 0 and
	bitsize to 1.
	(xcoff64_reloc_type_lookup): Handle BFD_RELOC_NONE.

gas/
	* write.h (fix_at_start): Declare.
	* write.c (fix_new_internal): Add at_beginning parameter.
	Use it instead of REVERSE_SORT_RELOCS.  Fix the handling of
	seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
	(fix_new, fix_new_exp): Update accordingly.
	(fix_at_start): New function.
	* config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
	(ppc_ref): New function, for OBJ_XCOFF.
	(md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
	* config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.

gas/testsuite/
	* gas/ppc/xcoff-ref-1.s, gas/ppc/xcoff-ref-1.l: New test.
	* gas/ppc/aix.exp: Run it.


ld/testsuite/
	* ld-powerpc/aix-ref-1-32.od, ld-powerpc/aix-ref-1-64.od,
	ld-powerpc/aix-ref-1.s: New tests.
	* ld-powerpc/aix52.exp: Run them.
 2010-01-23 12:05:33 +00:00
Rainer Orth 53e5c8fee6 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only 
on 64-bit Solaris/x86.
	Include obj-format.h earlier.
 2010-01-21 20:58:34 +00:00
Andreas Krebbel 55786da2bf 2010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* readelf.c (get_machine_flags): Handle EF_S390_HIGH_GPRS.

2010-01-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390.h (EF_S390_HIGH_GPRS): Added macro definition.

2010-01-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/tc-s390.c (s390_elf_final_processing): New function.
	* config/tc-s390.h (elf_tc_final_processing): New macro definition.
	(s390_elf_final_processing): Added prototype.

2010-01-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* elf32-s390.c (elf32_s390_merge_private_bfd_data): New function.
	(bfd_elf32_bfd_merge_private_bfd_data): New macro definition.
 2010-01-21 11:40:28 +00:00
Tristan Gingold 37a1f2771f 2010-01-18 Tristan Gingold <gingold@adacore.com> 
* config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
 2010-01-19 09:14:54 +00:00
Sebastian Pop a6461c0251 2010-01-15 Sebastian Pop <sebastian.pop@amd.com> 
gas/
	* config/tc-i386.c (md_assemble): Before accessing the IMM field
	check that it's not an XOP insn.

gas/testsuite/
	* gas/i386/x86-64-xop.d: Add missing patterns.
	* gas/i386/x86-64-xop.s: Same.
	* gas/i386/xop.d: Same.
	* gas/i386/xop.s: Same.

opcodes/
	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	* i386-tbl.h: Regenerated.
 2010-01-15 21:24:13 +00:00
Jie Zhang 62fb9fe1fc * config/bfin-aux.h: Remove argument names in function 
declarations.
	* config/bfin-lex.l (parse_int): Fix shadowed variable name
	warning.
	* config/bfin-parse.y (value_match): Remove argument names
	in declaration.
	(notethat): Likewise.
	(yyerror): Likewise.
 2010-01-14 04:52:57 +00:00
Daniel Jacobowitz afa62d5e34 gas/ 
* config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.

	gas/testsuite/
	* gas/arm/thumb-nop.d, gas/arm/thumb-nop.s: New test.
	* gas/arm/relax_branch_align.d: Expect a default NOP instruction.
	* gas/arm/vfp1_t2.d, gas/arm/vfp1xD_t2.d: Specify a CPU with
	Thumb-2.

	ld/testsuite/
	* ld-arm/arm-elf.exp (armelftests): Assemble Cortex-A8 tests with
	-mcpu=cortex-a8.
 2010-01-13 19:01:10 +00:00