Commit Graph

93581 Commits

Author SHA1 Message Date
Nick Clifton
f657f8c4a1 Fix Sparc, s390 and AArch64 targets so that they can handle relocs against ifunc symbols found in note sections.
Following on from PR 22929, I have found the same problem exists with
  other ifunc supporting targets too.  Plus see this link for the bug
  being reported against the s390x binutils for Fedora rawhide:

     https://bugzilla.redhat.com/show_bug.cgi?id=1553705

  So I am going to check in the patch below which applies the same
  change that H.J. made for the x86_64 target to the other affected
  targets.  (Specifically: S390, AArch64 and Sparc).  Plus it adds a new
  test to the linker testsuite to make sure that this problem stays
  fixed.

bfd	* elf64-s390.c (elf_s390_relocate_section): Move check for
	relocations against non-allocated sections to before the code that
	handles ifunc relocations.
	* elf32-s390.c (elf_s390_relocate_section): Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Treat
	relocs against IFUNC symbols in non-allocated sections as relocs
	against FUNC symbols.
	* elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise.

ld	* testsuite/ld-ifunc/ifuncmod5.s: New test.  Checks that targets
	that support IFUNC symbols can handle relocations against those
	symbols in NOTE sections.
	* testsuite/ld-ifunc/ifuncmod5.d: New file:  Driver for the new
	test.
	* testsuite/ld-ifunc/ifunc.exp: Run the new test.
2018-03-09 14:37:36 +00:00
Eli Zaretskii
9bd8e0b072 Update "gdb --configuration" with recently added features
This adds display of a few recently added optional features.

gdb/ChangeLog:
2018-03-09  Eli Zaretskii  <eliz@gnu.org>

	* top.c (print_gdb_configuration): Reflect LIBIPT, LIBMEMCHECK,
	and LIBMPFR in the printed configuration.
2018-03-09 15:59:11 +02:00
H.J. Lu
0ba3a73180 x86: Strip whitespace in check_VecOperations
Since the addition of pseudo prefixes changed how the scrubber treats
'{', we need to explicitly strip whitespace in check_VecOperations ().

	* config/tc-i386.c (check_VecOperations): Strip whitespace.
	* testsuite/gas/i386/optimize-1.s: Add whitespaces before
	{%k7} and {z},
	* testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
2018-03-09 03:51:31 -08:00
Tom Tromey
5dc1a7047a Use scoped_fd in more places
This changes a few more places to use scoped_fd.  This allows the
removal of some cleanups.

Regression tested by the buildbot, though note that I'm not sure
whether the buildbot actually builds anything using all of these
files.

gdb/ChangeLog
2018-03-08  Tom Tromey  <tom@tromey.com>

	* source.c (get_filename_and_charpos): Use scoped_fd.
	* nto-procfs.c (procfs_open_1): Use scoped_fd.
	(procfs_pidlist): Likewise.
	* procfs.c (proc_get_LDT_entry): Use scoped_fd.
	(iterate_over_mappings): Likewise.
2018-03-08 22:00:08 -07:00
Tom Tromey
fdf07f3aeb Change enable_thread_stack_temporaries to an RAII class
This started as a patch to change enable_thread_stack_temporaries to
be an RAII class, but then I noticed that this code used a VEC, so I
went ahead and did a bit more C++-ification, changing
stack_temporaries_enabled to a bool and changing stack_temporaries to
a std::vector.

Regression tested by the buildbot.

gdb/ChangeLog
2018-03-08  Tom Tromey  <tom@tromey.com>

	* infcall.c (struct call_return_meta_info)
	<stack_temporaries_enabled>: Remove.
	(get_call_return_value, call_function_by_hand_dummy): Update.
	* thread.c (disable_thread_stack_temporaries): Remove.
	(enable_thread_stack_temporaries): Remove.
	(thread_stack_temporaries_enabled_p): Return bool.
	(push_thread_stack_temporary, value_in_thread_stack_temporaries)
	(get_last_thread_stack_temporary): Update.
	* eval.c (evaluate_subexp): Update.
	* gdbthread.h (class enable_thread_stack_temporaries): Now a
	class, not a function.
	(value_ptr, value_vec): Remove typedefs.
	(class thread_info) <stack_temporaries_enabled>: Now bool.
	<stack_temporaries>: Now a std::vector.
	(thread_stack_temporaries_enabled_p)
	(value_in_thread_stack_temporaries): Return bool.
2018-03-08 21:57:14 -07:00
H.J. Lu
0089daceab x86: Optimize with EVEX128 encoding for AVX512VL
We can optimize AVX512 instructions with EVEX128 only if AVX512VL is
enabled:

1. Instruction is an AVX512VL instruction. Or
2. AVX512VL is enabled explicitly by -march=+avx512vl/".arch .avx512vl".

We should optimize EVEX instructions with EVEX128 encoding when pseudo
{evex} prefix is used.

	* config/tc-i386.c (set_cpu_arch): Set cpu_arch_isa_flags.
	(md_parse_option): Likewise.
	(optimize_encoding): Check i.tm.cpu_flags and cpu_arch_isa_flags
	for cpuavx512vl instead of cpu_arch_flags.  Optimize EVEX with
	EVEX128 when EVEX encoding is required.
	* testsuite/gas/i386/i386.exp: Run optimize-4, optimize-5,
	x86-64-optimize-5 and x86-64-optimize-6.
	* testsuite/gas/i386/optimize-1.d: Updated.
	* testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
	* testsuite/gas/i386/optimize-4.d: New file.
	* testsuite/gas/i386/optimize-4.s: Likewise.
	* testsuite/gas/i386/optimize-5.d: Likewise.
	* testsuite/gas/i386/optimize-5.s: Likewise.
	* testsuite/gas/i386/x86-64-optimize-5.d: Likewise.
	* testsuite/gas/i386/x86-64-optimize-5.s: Likewise.
	* testsuite/gas/i386/x86-64-optimize-6.d: Likewise.
	* testsuite/gas/i386/x86-64-optimize-6.s: Likewise.
2018-03-08 19:57:48 -08:00
Simon Marchi
567a3e54d2 Fix misreporting of omitted bytes for large remote packets
In remote.c, when the output of "set debug remote" is truncated, the
number of characters reported is incorrect.  What is reported is the
number of characters added by the quoting, not the number of characters
that were truncated.

gdb/ChangeLog:

	* remote.c (putpkt_binary): Fix omitted bytes reporting.
	(getpkt_or_notif_sane_1): Likewise.
2018-03-08 19:00:59 -05:00
GDB Administrator
f6d8ae8f07 Automatic date update in version.in 2018-03-09 00:00:30 +00:00
Simon Marchi
00b400574a Use std::string to simplify build_id_to_debug_bfd
Using std::string here makes the string building simpler thank playing
with char*.  A stack allocation is replaced with heap allocation, but
I don't think this is really performance-critical code.

gdb/ChangeLog:

	* build-id.c (build_id_to_debug_bfd): Use std::string.
2018-03-08 18:57:53 -05:00
Simon Marchi
a8dbfd5853 Make find_separate_debug_file* return std::string
This patch makes the find_separate_debug_file* functions return
std::string, which allows to get rid of some manual memory management
and one cleanup.

gdb/ChangeLog:

	* build-id.c (find_separate_debug_file_by_buildid): Return
	std::string.
	* build-id.h (find_separate_debug_file_by_buildid): Return
	std::string.
	* coffread.c (coff_symfile_read): Adjust to std::string.
	* elfread.c (elf_symfile_read): Adjust to std::string.
	* symfile.c (separate_debug_file_exists): Change parameter to
	std::string.
	(find_separate_debug_file): Return std::string.
	(find_separate_debug_file_by_debuglink): Return std::string.
	* symfile.h (find_separate_debug_file_by_debuglink): Return
	std::string.
2018-03-08 18:56:23 -05:00
Simon Marchi
e6a58aa8a7 Add xml_escape_text_append and use it
[This patch should go on top of "linux_qxfer_libraries_svr4: Use
 std::string", I should have sent them together as a series.]

I noticed that linux_qxfer_libraries_svr4 used xml_escape_text, which
returns an std::string.  That string is then copied into a larger
buffer.  It would be more efficient if we had a version of
xml_escape_text which appended to an existing string instead of
returning a new one.  This is what this patch does.

I manually verified that the output of linux_qxfer_libraries_svr4 didn't
change before/after the patch.

gdb/ChangeLog:

	* common/xml-utils.c (xml_escape_text): Move code to...
	(xml_escape_text_append): ... this new function.
	* common/xml-utils.h (xml_escape_text_append): New declaration.
	* unittests/xml-utils-selftests.c (test_xml_escape_text_append):
	New function.
	(_initialize_xml_utils): register test_xml_escape_text_append as
	a selftest.

gdb/gdbserver/ChangeLog:

	* linux-low.c (linux_qxfer_libraries_svr4): Use
	xml_escape_text_append.
2018-03-08 18:04:46 -05:00
Simon Marchi
f6e8a41e67 linux_qxfer_libraries_svr4: Use std::string
Use std::string, removing some manual memory management.

gdb/gdbserver/ChangeLog:

	* linux-low.c (linux_qxfer_libraries_svr4): Use std::string.
2018-03-08 18:04:07 -05:00
Simon Marchi
4872dc464d remote-stdio-gdbserver: Pass "target" to remote_exec to delete file
As described here

  https://sourceware.org/bugzilla/show_bug.cgi?id=22841

there seems to be situations where the remote-stdio-gdbserver board
fails to delete the uploaded binary file.  Passing "target" fixes the
issue for Christian who reported the bug.

I did not experience this problem, but passing "target" to remote_exec
still works for me, so I'm fine with changing it.

Any objection?

gdb/testsuite/ChangeLog:

	PR gdb/22841
	* boards/remote-stdio-gdbserver.exp (${board}_file): Pass
	"target" to remote_exec.
2018-03-08 17:54:54 -05:00
Simon Marchi
e4fe375676 Don't redefine upload/download/file in gdbserver-base
Before patch

  Make native gdbserver boards no longer be "remote" (in DejaGnu terms)
  739b3f1d8f

the local gdbserver boards (except native-extended-gdbserver...) were
considered as remote by DejaGNU.  To avoid DejaGNU trying to use ssh/scp
to download the files to the target (which is actually local), the
gdbserver-base.exp file defined some _download, _upload and _file board
operations to override the default behavior, and instead just use local
operations.

The same patch also changed remote-stdio-gdbserver.exp to make it
inherit from gdbserver-base.exp.  Since then, this board (which is
actually remote) uses the overrides with local file operations.  As a
result, files are never actually copied to the target.

I think we can simply remove the overrides from gdbserver-base.exp.
Because all boards should be properly considered local or remote by
DejaGNU, it should by default use the right method for transferring
files.

gdb/testsuite/ChangeLog:

	PR gdb/22841
	* boards/gdbserver-base.exp (${board}_file, ${board}_download,
	${board}_upload): Remove.
2018-03-08 17:53:57 -05:00
H.J. Lu
d3d50934a9 x86-64: Also optimize "clr reg64"
"clr reg" is an alias of "xor reg, reg".  We can encode "clr reg64" as
"xor reg32, reg32".

gas/

	* config/tc-i386.c (optimize_encoding): Also encode "clr reg64"
	as "xor reg32, reg32".
	* testsuite/gas/i386/x86-64-optimize-1.s: Add "clr reg64" tests.
	* testsuite/gas/i386/x86-64-optimize-1.d: Updated.

opcodes/

	* i386-opc.tbl: Add Optimize to clr.
	* i386-tbl.h: Regenerated.
2018-03-08 06:41:34 -08:00
H.J. Lu
347a87745e x86: Treat relocation against IFUNC symbol as FUNC
When resolving a relocation against IFUNC symbol in a SHT_NOTE section
without SHF_ALLOC, we treat it as relocation against FUNC symbol since
it needs the address of IFUNC symbol, not the address returned by IFUNC
function.

bfd/

	PR ld/22929
	* elf32-i386.c (elf_i386_relocate_section): Treat relocation
	against IFUNC symbol in SHT_NOTE section without SHF_ALLOC as
	relocation against FUNC symbol.
	* elf64-x86-64.c (elf_x86_64_relocate_section): Likewise.

ld/

	PR ld/22929
	* testsuite/ld-i386/i386.exp: Run PR ld/22929 test.
	* testsuite/ld-x86-64/x86-64.exp: Likewise.
	* testsuite/ld-i386/pr22929.d: New file.
	* testsuite/ld-i386/pr22929.s: Likewise.
	* testsuite/ld-x86-64/pr22929.d: Likewise.
	* testsuite/ld-x86-64/pr22929.s: Likewise.
2018-03-08 06:36:52 -08:00
H.J. Lu
bd5dea8822 x86: Remove support for old (<= 2.8.1) versions of gcc
Old (<= 2.8.1) versions of gcc generate broken fsubp, fsubrp, fdivp and
fdivrp instructions.  Assembler translates them to correct ones with a
warning:

[hjl@gnu-cfl-1 gas]$ cat x.s
	fsubp %st(3),%st
[hjl@gnu-cfl-1 gas]$ gcc -c x.s
x.s: Assembler messages:
x.s:1: Warning: translating to `fsubp %st,%st(3)'
[hjl@gnu-cfl-1 gas]$

This patch removes support for old (<= 2.8.1) versions of gcc:

[hjl@gnu-cfl-1 gas]$ ./as-new -o x.o x.s
x.s: Assembler messages:
x.s:1: Error: operand type mismatch for `fsubp'
[hjl@gnu-cfl-1 gas]$

gas/

	* NEWS: Mention -mold-gcc removal.
	* config/tc-i386.c (i386_error): Remove old_gcc_only.
	(old_gcc): Removed.
	(match_template): Remove old gcc support.
	(OPTION_MOLD_GCC): Removed.
	(OPTION_MRELAX_RELOCATIONS): Updated.
	(md_longopts): Remove OPTION_MOLD_GCC.
	(md_parse_option): Likewise.
	(md_show_usage): Remove -mold-gcc.
	* testsuite/gas/i386/general.s: Convert fsub/fdiv tests for old
	(<= 2.8.1) versions of gcc.
	* testsuite/gas/i386/intel.s: Likewise.
	* testsuite/gas/i386/general.l: Updated.
	* testsuite/gas/i386/intel-intel.d: Likewise.
	* testsuite/gas/i386/intel.d: Likewise.
	* testsuite/gas/i386/intel.e: Likewise.
	* testsuite/gas/i386/i386.exp: Don't pass -mold-gcc to general.

include/

	* opcode/i386 (OLDGCC_COMPAT): Removed.

opcodes/

	* i386-gen.c (opcode_modifiers): Remove OldGcc.
	* i386-opc.h (OldGcc): Removed.
	(i386_opcode_modifier): Remove oldgcc.
	* i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
	instructions for old (<= 2.8.1) versions of gcc.
	* i386-tbl.h: Regenerated.
2018-03-08 06:31:52 -08:00
Alan Hayward
4ef0bef68c Remove MAX_REGISTER_SIZE define
gdb/
	* defs.h: Remove MAX_REGISTER_SIZE.
	* regcache.c (init_regcache_descr): Remove MAX_REGISTER_SIZE
	asserts.
	* python/py-unwind.c (pyuw_sniffer): Likewise.
2018-03-08 09:42:21 +00:00
Jan Beulich
e771e7c9fb x86: fold several AVX512VL templates
The differences between some of the register and memory forms of the
same insn often don't really require the templates to be separate. For
example, Disp8MemShift is simply irrelevant to register forms. Fold
these as far as possible, and also fold register-only forms. Further
folding is possible, but needs other prereq work done first.

A note regarding EVEXDYN: This is intended to be used only when no other
properties of the template would make is_evex_encoding() return true. In
all "normal" cases I think it is preferable to omit this indicator, to
keep the table half way readable.
2018-03-08 08:58:55 +01:00
Jan Beulich
ed438a93f1 x86: fold certain AVX512 rotate and shift templates
Their memory forms were bogusly using VexLWP instead of VexNDD. Adjust
VexNDD handling to cope with these, allowing their register and memory
forms to be folded.
2018-03-08 08:58:05 +01:00
Jan Beulich
454172a99e x86: fold VEX-encoded GFNI templates 2018-03-08 08:57:19 +01:00
Jan Beulich
3682415023 x86: fold a few AVX512F templates
The differences between some of the register and memory forms of the
same insn often don't really require the templates to be separate. For
example, Disp8MemShift is simply irrelevant to register forms. Fold them
as far as possible. Further folding is possible, but needs other prereq
work done first.
2018-03-08 08:56:47 +01:00
Jan Beulich
e7f5c0a99e x86: fold LWP templates
Also drop the no longer necessary explicit Disp<N> from them.
2018-03-08 08:56:08 +01:00
Jan Beulich
25a4277fec x86: fold FMA and FMA4 templates 2018-03-08 08:55:37 +01:00
Jan Beulich
d2224064f1 x86: drop {X,Y,Z}MMWORD_MNEM_SUFFIX
They aren't really useful (anymore?): The conflicting operand size check
isn't applicable to any insn validly using respective memory operand
sizes (and if they're used wrongly, another error would result), and the
logic in process_suffix() can be easily changed to work without them.

While re-structuring conditionals in process_suffix() also drop the
CMPXCHG8B special case in favor of a NoRex64 attribute in the opcode
table.
2018-03-08 08:52:27 +01:00
Jan Beulich
23e42951f2 x86: correct operand size match checks for BMI/BMI2 insns
Some BMI/BMI2 insns allow their middle operands to be a memory one. In
such a case, matching register types between operands 0 and 1 as well as
1 and 2 won't help - operands 0 and 2 also need to be checked.
2018-03-08 08:51:18 +01:00
Jan Beulich
8819ada6c4 x86: fold redundant expressions in process_suffix()
There's no point repeatedly evaluating i.types[op].bitfield.reg.
2018-03-08 08:50:13 +01:00
Jan Beulich
548d0ee6e7 x86: simplify result processing of cpu_flags_match()
Make more obvious what the success and failure paths are, and in
particular that what used to be at the "skip" label can't be reached
by what used to be straight line code.
2018-03-08 08:48:10 +01:00
Jan Beulich
929f69fa96 x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
Just like for the AVX/AES and AVX/PCLMUL combinations, AVX/GFN,
AVX512F/GFNI, AVX512F/VAES, and AVX512F/PCLMUL need special handling to
deal with the pair of required checks specified in the templates.
2018-03-08 08:47:32 +01:00
Jan Beulich
ab592e757e x86: change AVX512VL handling in cpu_flags_match()
In order to add an AVX512F counterpart to the present AVX checking, it
is better to move the AVX512VL check out of the conditional it's
currently in.
2018-03-08 08:45:56 +01:00
Jan Beulich
db12e14ea0 x86: drop CPU_FLAGS_32BIT_MATCH
It has become a plain alias of CPU_FLAGS_ARCH_MATCH now.
2018-03-08 08:45:25 +01:00
Jan Beulich
b9d498173c x86: simplify AVX checks in cpu_flags_match()
No caller cares about the specifics of CPU_FLAGS_{AES,AVX,PCLMUL}_MATCH,
so drop those and fold the nested if()-s.
2018-03-08 08:44:52 +01:00
Jan Beulich
bcb1753ee6 x86: avoid cpu_flags_match() bogusly setting CPU_FLAGS_ARCH_MATCH 2018-03-08 08:44:12 +01:00
Jan Beulich
1b193f0b12 x86: drop bogus NoAVX
These are meaningful only for insns with CpuSSE* (and a few other Cpu*)
attribute.
2018-03-08 08:36:41 +01:00
Jan Beulich
f2f6a710f4 x86: avoid SSE check for LDMXCSR/STMXCSR
Neither touches any XMM register, so the check is pointless. It is imo
even questionable whether in SSE2AVX mode the two should be converted to
their AVX counterparts.
2018-03-08 08:35:48 +01:00
Jan Beulich
6e3e5c9e41 x86: extend SSE check to PCLMULQDQ, AES, and GFNI insns
When aiming at not mixing SSE and AVX insns, these should be warned
about the same way other non-AVX ones are treated.
2018-03-08 08:35:01 +01:00
Jan Beulich
38e314eb06 x86: drop FloatD
It can be expressed by D, when making the consumer look at operand size
to tell apart both uses.
2018-03-08 08:34:09 +01:00
Jan Beulich
d53e6b98a2 x86/Intel: correct disassembly of fsub*/fdiv*
fsub/fsubr/fsubp/fsubrp as well as fdiv/fdivr/fdivp/fdivrp disassembly
should match (a) the Intel SDM and (b) respective input fed to gas (both
of course with the exception of when we intentionally convert bogus
insns, accompanied by a warning).
2018-03-08 08:33:06 +01:00
Jan Beulich
a477a8c4f4 x86: adjust 4-XMM-register-group related warning
Drop "second": For one there's no other source register (the other
source operand is in memory), and in Intel syntax such numbering would
also be wrong.

Take the opportunity and also
- properly place declarations ahead of statements
- use %u format for unsigned int arguments
- fix indentation
2018-03-08 08:27:28 +01:00
Jan Beulich
2907c2f555 x86: bogus VMOVD with 64-bit operands should only allow for registers
These templates exist solely to satisfy gcc's needs, and gcc only
produces these with register operands.
2018-03-08 08:26:35 +01:00
Jan Beulich
73053c1fc4 x86: fold AVX vcvtpd2ps memory forms
This requires a change to ModR/M handling: Recording of displacement
types must not discard operand size information. Change the respective
code to alter only .disp<N>.
2018-03-08 08:25:31 +01:00
Alan Modra
6a7524c6aa Really remove unnecessary power9 group terminating nop
Oops, not tested well enough.  -mpower9 sets all the PPC_OPCODE_POWERn
for n <= 9.

	* config/tc-ppc.c (ppc_handle_align): Correct last patch.  Really
	don't emit a group terminating nop for power9.  Simplify cpu
	tests.
2018-03-08 14:37:26 +10:30
Alan Modra
3fea0c3b3f Remove unnecessary power9 group terminating nop
Power9 doesn't have a group terminating nop, so we may as well emit a
normal nop for power9.  Not that it matters a great deal, I believe
ori 2,2,0 will be treated exactly as ori 0,0,0 by the hardware.

	* config/tc-ppc.c (ppc_handle_align): Don't emit a group
	terminating nop for power9.
2018-03-08 14:17:01 +10:30
Paul Pluzhnikov
6d4f21f6ee Fix PR binutils/22923.
A static buffer in get_ver_flags may overflow when e.g. German translation
is longer than English original. Avoid that by expanding the buffer.
2018-03-07 18:18:25 -08:00
GDB Administrator
bdd2279f13 Automatic date update in version.in 2018-03-08 00:00:42 +00:00
Tom Tromey
e0d3522b88 Return gdb::optional<std::string> from target_fileio_readlink
This changes to_fileio_readlink and target_fileio_readlink to return a
gdb::optional<std::sring>, and then fixes up the callers and
implementations.  This allows the removal of some cleanups.

Regression tested by the buildbot.

gdb/ChangeLog
2018-03-07  Tom Tromey  <tom@tromey.com>

	* linux-tdep.c (linux_info_proc): Update.
	* target.h (struct target_ops) <to_fileio_readlink>: Return
	optional<string>.
	(target_fileio_readlink): Return optional<string>.
	* remote.c (remote_hostio_readlink): Return optional<string>.
	* inf-child.c (inf_child_fileio_readlink): Return
	optional<string>.
	* target.c (target_fileio_readlink): Return optional<string>.
2018-03-07 15:36:28 -07:00
Max Filippov
d6ab64818b xtensa: ld: support -z relro
ld/
2018-03-07  Max Filippov  <jcmvbkbc@gmail.com>

	* emulparams/elf32xtensa.sh (COMMONPAGESIZE): Define.
2018-03-07 13:05:12 -08:00
Sriraman Tallam
779bdadbea New option -z,keep-text-section prefix.
This option does not merge certain text sections with prefixes
.text.hot, .text.unlikely, .text.startup and .text.exit.

	* layout.cc (Layout::default_section_order): Check for text section
	prefixes.
	(Layout::text_section_name_mapping): New static member.
	(Layout::text_section_name_mapping_count): New static member.
	(Layout::match_section_name): New static function.
	(Layout::output_section_name): Check for text section prefixes.
	* layout.h (Output_section_order::ORDER_TEXT_HOT): New enum value.
	(Output_section_order::ORDER_TEXT_STARTUP): New enum value.
	(Output_section_order::ORDER_TEXT_EXIT): New enum value.
	(Output_section_order::ORDER_TEXT_UNLIKELY): New enum value.
	(Layout::text_section_name_mapping): New static member.
	(Layout::text_section_name_mapping_count): New static member.
	(Layout::match_section_name): New static function.
	* options.h (keep_text_section_prefix): New -z option.
	* testsuite/Makefile.am (keep_text_section_prefix): New test.
	* testsuite/Makefile.in: Regenerate.
	* testsuite/keep_text_section_prefix.cc: New test source.
	* testsuite/keep_text_section_prefix.sh: New test script.
2018-03-07 12:15:49 -08:00
Andrew Burgess
ea005f31ca gdb: Add riscv to list of architectures with a save_reggroup
The regcache cooked_read test needs to know which architectures have a
save_reggroup, riscv does and needs adding to the list.

gdb/ChangeLog:

	* regcache.c (cooked_read_test): Add riscv to the list of
	architectures that have a save_reggroup.
2018-03-07 17:36:37 +00:00
Renlin Li
0c1ded8dc0 [PR20402][LD][AARCH64]Don't emit RELATIVE relocation for absolute symbols which are resolved at static linking time.
For absolute symbols which are forced local or not dynamic, the ABS relocation
should be resolved at static linking time.

Originally, an RELATIVE/ABS relocation will be generated even for absolution
symbols for the dynamic linker to resolve.

bfd/

2018-03-07  Renlin Li  <renlin.li@arm.com>

	PR ld/20402
	* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Check absolute symbol,
	and don't emit relocation in specific case.

ld/

2018-03-07  Renlin Li  <renlin.li@arm.com>

	PR ld/20402
	* testsuite/ld-aarch64/aarch64-elf.exp: Run new test.
	* testsuite/ld-aarch64/pr20402.s: New.
	* testsuite/ld-aarch64/pr20402.d: New.
2018-03-07 14:47:27 +00:00