Commit Graph

171080 Commits

Author SHA1 Message Date
Robin Dapp df7d46d925 [PATCH 2/2] Add simplify rule for wrapped addition.
Add the transform (T)(A) + CST -> (T)(A + CST).  This enables vrp to
simplify sequences like

_2 = a_7 - 1;
_3 = (long unsigned int) _2;
_5 = _3 + 1

that ivopts creates.

--

gcc/ChangeLog:

2019-08-26  Robin Dapp  <rdapp@linux.ibm.com>

        * match.pd: Add (T)(A) + CST -> (T)(A + CST).

gcc/testsuite/ChangeLog:

2019-08-26  Robin Dapp  <rdapp@linux.ibm.com>

        * gcc.dg/tree-ssa/copy-headers-5.c: Do not run vrp pass.
        * gcc.dg/tree-ssa/copy-headers-7.c: Do not run vrp pass.
        * gcc.dg/tree-ssa/loop-15.c: Remove XFAIL.
        * gcc.dg/tree-ssa/pr23744.c: Change search pattern.
        * gcc.dg/wrapped-binop-simplify.c: New test.

From-SVN: r274925
2019-08-26 10:24:44 +00:00
Robin Dapp e944354ec0 [PATCH 1/2] Allow folding all statements.
This patch allows users of the substitute_and_fold_engine to
enable folding all statements.  It is now enabled for VRP which
is needed for the match.pd pattern in patch 2/2.

The loop versioning pass was missing one case when
deconstructing addresses that would only be triggered after
this patch for me:
It could handle addition and subsequent convert/nop but not
a convert/nop directly.  This would cause the hash to be
calculated differently and, in turn, cause the pass to miss
a versioning opportunity.  Fixed this by adding the missing
case.

--

gcc/ChangeLog:

2019-08-26  Robin Dapp  <rdapp@linux.ibm.com>

        * gimple-loop-versioning.cc (loop_versioning::record_address_fragment):
        Add nop_convert case.
        * tree-ssa-propagate.c (substitute_and_fold_dom_walker::before_dom_children):
        Fold all statements if requested.
        * tree-ssa-propagate.h (class substitute_and_fold_engine):
        Allow to fold all statements.
        * tree-vrp.c (class vrp_folder):
        Let substitute_and_fold_engine fold all statements.

From-SVN: r274923
2019-08-26 10:18:24 +00:00
Richard Biener bf05a3bbb5 re PR c/91526 (Unnecessary SSE and other instructions generated when compiling in C mode (vs. C++ mode))
2019-08-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91526
	* passes.def: Note that after late FRE we do TODO_update_address_taken.
	* tree-ssa-sccvn.c (pass_fre::execute): In late mode schedule
	TODO_update_address_taken.

From-SVN: r274922
2019-08-26 09:29:07 +00:00
Kito Cheng 20e7012b75 RISC-V: Add testcase for testing li pseudo instruction
gcc/testsuite/ChangeLog:

	gcc.target/riscv/li.c: New test.

From-SVN: r274920
2019-08-26 02:15:47 +00:00
GCC Administrator 900af77fc2 Daily bump.
From-SVN: r274919
2019-08-26 00:16:48 +00:00
Gerald Pfeifer 1460c0bbb7 gmm_malloc.h: Only use <errno.h> and errno if __STDC_HOSTED__.
* config/i386/gmm_malloc.h: Only use <errno.h> and errno if
	__STDC_HOSTED__.

From-SVN: r274915
2019-08-25 22:25:23 +00:00
GCC Administrator fed7268f74 Daily bump.
From-SVN: r274907
2019-08-25 00:16:50 +00:00
Nathan Sidwell 6dfc1e1f33 [C++ PATCH] vfunc overrider simplification
https://gcc.gnu.org/ml/gcc-patches/2019-08/msg01674.html
	cp/
	* class.c (check_for_overrides): Conversion operators need
	checking too.

	testsuite/
	* g++.dg/inherit/virtual14.C: New.

From-SVN: r274903
2019-08-24 22:44:06 +00:00
Thomas Koenig e68a35ae4a re PR fortran/91390 (treatment of extra parameter in a subroutine call)
2019-08-24  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/91390
	PR fortran/91519
	* frontend-passes.c (check_externals_procedure): New
	function. If a procedure is not in the translation unit, create
	an "interface" for it, including its formal arguments.
	(check_externals_code): Use check_externals_procedure for common
	code with check_externals_expr.
	(check_externals_expr): Vice versa.
	* gfortran.h (gfc_get_formal_from_actual-arglist): New prototype.
	(gfc_compare_actual_formal): New prototype.
	* interface.c (compare_actual_formal): Rename to
	(gfc_compare_actual_formal): New function, make global.
	(gfc_get_formal_from_actual_arglist): Make global, and move here from
	* trans-types.c (get_formal_from_actual_arglist): Remove here.
	(gfc_get_function_type): Use gfc_get_formal_from_actual_arglist.

2019-08-24  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/91390
	PR fortran/91519
	* gfortran.dg/bessel_3.f90: Add type mismatch errors.
	* gfortran.dg/coarray_7.f90: Rename subroutines to avoid
	additional errors.
	* gfortran.dg/g77/20010519-1.f: Add -std=legacy. Remove
	warnings for ASSIGN. Add warnings for type mismatch.
	* gfortran.dg/goacc/acc_on_device-1.f95: Add -std=legacy.
	Add catch-all warning.
	* gfortran.dg/internal_pack_9.f90: Rename subroutine to
	avoid type error.
	* gfortran.dg/internal_pack_9.f90: Add -std=legacy. Add
	warnings for type mismatch.
	* gfortran.dg/pr39937.f: Add -std=legacy and type warnings. Move
	here from
	* gfortran.fortran-torture/compile/pr39937.f: Move to
	gfortran.dg.

From-SVN: r274902
2019-08-24 21:12:45 +00:00
Paolo Carlini c6ca0e3e69 semantics.c (finish_switch_cond): Improve error message location.
/cp
2019-08-24  Paolo Carlini  <paolo.carlini@oracle.com>

	* semantics.c (finish_switch_cond): Improve error message location.

/testsuite
2019-08-24  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.dg/conversion/simd4.C: Test all the locations.

From-SVN: r274901
2019-08-24 19:39:44 +00:00
GCC Administrator 22b23ef237 Daily bump.
From-SVN: r274898
2019-08-24 00:16:42 +00:00
Jason Merrill 5b93b05349 Fix handling of namespace-scope undeduced auto decls.
* decl2.c (decl_dependent_p): New.
	(mark_used): Check it instead of just processing_template_decl.

From-SVN: r274894
2019-08-23 19:29:16 -04:00
Jason Merrill 01c53a74cd * parser.c (cp_parser_nested_name_specifier_opt): Avoid redundant error.
From-SVN: r274893
2019-08-23 19:29:10 -04:00
Marek Polacek 9bf6c63da9 PR c++/91521 - wrong error with operator->.
* decl.c (grokdeclarator): Return error_mark_node for an invalid
	trailing return type.

	* g++.dg/parse/operator8.C: New test.

From-SVN: r274891
2019-08-23 23:24:46 +00:00
Ian Lance Taylor 6ae361ae45 compiler: record pointer var values to remove write barriers
Record when a local pointer variable is set to a value such that
    indirecting through the pointer does not require a write barrier.  Use
    that to eliminate write barriers when indirecting through that local
    pointer variable.  Only keep this information per-block, so it's not
    all that applicable.
    
    This reduces the number of write barriers generated when compiling the
    runtime package from 553 to 524.
    
    The point of this is to eliminate a bad write barrier in the bytes
    function in runtime/print.go.  Mark that function nowritebarrier so
    that the problem does not recur.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/191581

From-SVN: r274890
2019-08-23 22:38:58 +00:00
Segher Boessenkool 457dac4020 rs6000: New darn testcase (PR91481)
We used to implement darn with unspecs, not unspec_volatiles, which
means two darn instructions could be CSEd together.

This testcase tests it by adding together four random numbers.  If all
is well that means we get four darn instructions, because such a small
loop is unrolled fine at -O2 already.  If things go bad, combine will
combine it all to one darn and a shift left by two.


gcc/testsuite/
	PR target/91481
	* gcc.target/powerpc/darn-3.c: New testcase.

From-SVN: r274889
2019-08-24 00:19:40 +02:00
Marek Polacek 5857042a2b PR c++/79817 - attribute deprecated on namespace.
* cp-tree.h (cp_warn_deprecated_use_scopes): Declare.
	* decl.c (grokdeclarator): Call cp_warn_deprecated_use_scopes.
	(type_is_deprecated): Likewise.
	* decl2.c (cp_warn_deprecated_use_scopes): New function.
	* name-lookup.c (handle_namespace_attrs): Handle attribute deprecated.
	* parser.c (cp_parser_namespace_alias_definition): Call
	cp_warn_deprecated_use_scopes.
	(cp_parser_using_declaration): Likewise.
	(cp_parser_using_directive): Likewise.
	* semantics.c (finish_id_expression_1): Likewise.

	* g++.dg/cpp0x/attributes-namespace1.C: New test.
	* g++.dg/cpp0x/attributes-namespace2.C: New test.
	* g++.dg/cpp0x/attributes-namespace3.C: New test.
	* g++.dg/cpp0x/attributes-namespace4.C: New test.
	* g++.dg/cpp0x/attributes-namespace5.C: New test.
	* g++.dg/cpp1z/namespace-attribs.C: Adjust.
	* g++.dg/cpp1z/namespace-attribs2.C: Adjust.

From-SVN: r274888
2019-08-23 22:04:32 +00:00
Michael Forney d0fc6e9f69 Makefile.tpl (HOST_EXPORTS): Add CXX_FOR_BUILD.
* Makefile.tpl (HOST_EXPORTS): Add CXX_FOR_BUILD.
	* Makefile.in: Regenerate.

From-SVN: r274887
2019-08-23 15:37:22 -06:00
Joseph Myers 4872de4ac7 Fix libstdc++ lstat missing return type for Windows target.
Building for i686-mingw32 target (with some local changes) produced an
error

error: ISO C++ forbids declaration of 'lstat' with no type [-fpermissive]

in libstdc++-v3/src/filesystem/ops-common.h.  This patch adds the
missing return type.  OK to commit (trunk and GCC 9 branch)?

Note 1: I haven't run the testsuite with this patch, but it fixes the
build failure I see (in sources with other local changes).

Note 2: I don't know why this hasn't produced build failures for other
people, but the missing return type looks wrong in any case even if
other local changes are for some reason needed for it to produce an
error.

	* src/filesystem/ops-common.h [_GLIBCXX_FILESYSTEM_IS_WINDOWS]
	(std::filesystem::__gnu_posix::lstat): Add return type.

From-SVN: r274885
2019-08-23 22:04:33 +01:00
Joseph Myers a0fae47672 * zh_CN.po: Update.
From-SVN: r274868
2019-08-23 20:47:30 +01:00
Nathan Sidwell 5f9f1ffebe [C++ PATCH] vfunc overrider simplification
https://gcc.gnu.org/ml/gcc-patches/2019-08/msg01674.html
	* class.c (check_for_override): Checking IDENTIFIER_VIRTUAL_P is
	sufficient, reorder DECL_OVERRIDE_P check.

From-SVN: r274867
2019-08-23 19:26:04 +00:00
Mihailo Stojanovic 7d35d2bf5a mips.md (mips_get_fcsr, [...]): Use SI machine mode for unspec_volatile operand.
* config/mips/mips.md (mips_get_fcsr, *mips_get_fcsr): Use SI
        machine mode for unspec_volatile operand.

        * gcc.target/mips/get-fcsr-3.c: New test.

From-SVN: r274863
2019-08-23 13:04:56 -06:00
Martin Sebor 0448240b88 pr78973.c: Make functions static to avoid failures with -fpic
gcc/testsuite/ChangeLog:

	* gcc.dg/pr78973.c: Make functions static to avoid failures
	with -fpic
	* gcc.dg/pr78973-2.c: Same.

From-SVN: r274860
2019-08-23 10:16:42 -06:00
Martin Sebor 8e7803e8e1 Warray-bounds-36.c: Make functions static to avoid failures with -fpic.
gcc/testsuite/ChangeLog:

	* gcc.dg/Warray-bounds-36.c: Make functions static to avoid failures
	with -fpic.
	* gcc.dg/Warray-bounds-41.c: Same.

From-SVN: r274859
2019-08-23 09:57:46 -06:00
Wilco Dijkstra bf1a58e9be [ARM] Deprecate -mneon-for-64bits
Deprecate -mneon-for-64bits since it no longer has any effect after
the DImode codegen improvements.

    gcc/
	* gcc/doc/invoke.texi (mneon-for-64bits): Deprecate option.
	* gcc/config/arm/arm.opt (mneon-for-64bits): Deprecate option.
	* gcc/config/arm/arm.h (TARGET_PREFER_NEON_64BITS): Remove.
	(prefer_neon_for_64bits): Remove.
	* gcc/config/arm/arm.c (prefer_neon_for_64bits): Remove.
	(tune_params): Remove PREF_NEON_64_FALSE uses.
	(arm_option_override): Remove prefer_neon selection code.
	(arm_print_tune_info): Remove prefer_neon_for_64bits.
	* gcc/config/arm/arm-protos.h (tune_params): Remove
	prefer_neon_for_64bits.
	(prefer_neon_for_64bits): Remove.

From-SVN: r274858
2019-08-23 14:53:45 +00:00
Mark Eggleston 35a114dae1 PDF Layout
Prevent lines overlapping the right hand margin, this occurred for
references in the "See also:" section, it is prevented by placing
references on their own lines. Two example programs overlapped the
right hand margin: fixed by adjusting the position and of the comments.
Some tables had overlapping colums: the column widths were adjusted
accordingly.

From-SVN: r274857
2019-08-23 13:03:26 +00:00
Iain Sandoe 22f8849d06 [PATCH, c-family] Fix a PCH thinko (and thus PR61250).
When we are parsing a source file, the very first token might
be a PRAGMA_GCC_PCH_PREPROCESS.  This indicates that we are going
read in a PCH file (named as the value of the pragma).  If we don't
see this pragma, then we know that it's OK to release any resources
that the host might have set aside for the PCH file.

This fixes a thinko in the current implementation, in that the decision
to release resources was happening unconditionally right after the first
token is extracted but before it's been checked or acted upon.

This leads to the pch bug (seen on Darwin), because we actually do release
resources - which are subsequently (reasonably) assumed to be available
when reading a PCH file.  We then get random crashes or hangs depending
on the interaction between unmmap and malloc.

The bug is present everywhere but doesn't show on (say) Linux, since
the release of PCH resources is a NOP there.

This effects all the c-family front ends, because they all use c_lex_with_flags ()
to implement this.

The solution is to check for the PRAGMA_GCC_PCH_PREPROCESS and only call
c_common_no_more_pch () when that is not the first token.

A secondary effect of the collection is that the name of the PCH file
can be collected during the ggc_pch_read() reset of state.  Therefore
we should issue any diagnostic that might name the file before the
collections are triggered.


gcc/c-family/

2019-08-23  Iain Sandoe  <iain@sandoe.co.uk>

	PR pch/61250
	* c-lex.c (c_lex_with_flags):  Don't call
	c_common_no_more_pch () from here.

gcc/c/

2019-08-23  Iain Sandoe  <iain@sandoe.co.uk>

	PR pch/61250
	* c-parser.c (c_parse_file): Call c_common_no_more_pch ()
	after determining that the first token is not
	PRAGMA_GCC_PCH_PREPROCESS.

gcc/cp/

2019-08-23  Iain Sandoe  <iain@sandoe.co.uk>

	PR pch/61250
	* parser.c (cp_parser_initial_pragma): Call c_common_no_more_pch ()
	after determining that the first token is not
	PRAGMA_GCC_PCH_PREPROCESS.

gcc/

2019-08-23  Iain Sandoe  <iain@sandoe.co.uk>

	PR pch/61250
	* ggc-page.c (ggc_pch_read): Read the ggc_pch_ondisk structure
	and issue any diagnostics needed before collecting the pre-PCH
	state.

From-SVN: r274856
2019-08-23 12:41:39 +00:00
Jakub Jelinek df375b0321 re PR middle-end/91283 (gcc.dg/torture/c99-contract-1.c FAILs)
PR middle-end/91283
	* common.opt (fexcess-precision=): Add Optimization flag.  Use
	flag_excess_precision variable instead of
	flag_excess_precision_cmdline.
	* flags.h (class target_flag_state): Remove x_flag_excess_precision
	member.
	(flag_excess_precision): Don't define.
	* langhooks.c (lhd_post_options): Set flag_excess_precision instead of
	flag_excess_precision_cmdline.  Remove comment.
	* opts.c (set_fast_math_flags): Use frontend_set_flag_excess_precision
	and x_flag_excess_precision instead of
	frontend_set_flag_excess_precision_cmdline and
	x_flag_excess_precision_cmdline.
	(fast_math_flags_set_p): Use x_flag_excess_precision instead of
	x_flag_excess_precision_cmdline.
	* toplev.c (init_excess_precision): Remove.
	(lang_dependent_init_target): Don't call it.
ada/
	* gcc-interface/misc.c (gnat_post_options): Set flag_excess_precision
	instead of flag_excess_precision_cmdline.
brig/
	* brig-lang.c (brig_langhook_post_options): Set flag_excess_precision
	instead of flag_excess_precision_cmdline.
c-family/
	* c-common.c (c_ts18661_flt_eval_method): Use flag_excess_precision
	instead of flag_excess_precision_cmdline.
	* c-cppbuiltin.c (c_cpp_flt_eval_method_iec_559): Likewise.
	* c-opts.c (c_common_post_options): Likewise.
d/
	* d-lang.cc (d_post_options): Set flag_excess_precision instead of
	flag_excess_precision_cmdline.
fortran/
	* options.c (gfc_post_options): Set flag_excess_precision instead of
	flag_excess_precision_cmdline.  Remove comment.
go/
	* go-lang.c (go_langhook_post_options): Set flag_excess_precision
	instead of flag_excess_precision_cmdline.
lto/
	* lto-lang.c (lto_post_options): Set flag_excess_precision instead of
	flag_excess_precision_cmdline.  Remove comment.

From-SVN: r274850
2019-08-23 13:37:29 +02:00
Martin Liska 19566bdda5 Make -flto=jobserver parallel again.
2019-08-23  Martin Liska  <mliska@suse.cz>

	* lto-wrapper.c (run_gcc): When setting jobserver
	set also parallel to 1.  This was done so before r273908.

From-SVN: r274849
2019-08-23 11:27:12 +00:00
Mark Eggleston 3fa7e353ec Intrinsic documentation layout changes.
Documentation of all intrinsics now have their sections in a consistent
order. Empty sections have been removed. Stray words have been removed.
Text in a wrong section has been moved.  A missing standard was inserted.

From-SVN: r274848
2019-08-23 10:16:47 +00:00
Mark Eggleston f3bb4623f4 ABS Documentation fix
The specific intrinsics ZABS and CDABS return REAL(8) not COMPLEX(8).

From-SVN: r274847
2019-08-23 09:31:48 +00:00
Jozef Lawrynowicz d16017da34 re PR target/91306 ([MSP430] libgcc/crtstuff.c: Alignment of frame_dummy .init_array entry is too big)
2019-08-23  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	PR target/91306
	* crtstuff.c (__CTOR_LIST__): Align to the "__alignof__" the array
	element type, instead of "sizeof" the element type.
	(__DTOR_LIST__): Likewise.
	(__TMC_LIST__): Likewise.
	(__do_global_dtors_aux_fini_array_entry): Likewise.
	(__frame_dummy_init_array_entry): Likewise.
	(__CTOR_END__): Likewise.
	(__DTOR_END__): Likweise.
	(__FRAME_END__): Likewise.
	(__TMC_END__): Likewise.

From-SVN: r274846
2019-08-23 09:21:26 +00:00
Dennis Zhang a50f423695 [Arm] Add support for missing CPUs
This patch adds '-mcpu' options for following CPUs:
Cortex-M35P, Cortex-A77, Cortex-A76AE.

Related specifications are as following:
https://developer.arm.com/ip-products/processors/cortex-m
https://developer.arm.com/ip-products/processors/cortex-a

2019-08-23  Dennis Zhang  <dennis.zhang@arm.com>

	* config/arm/arm-cpus.in (cortex-m35p): New entry.
	(cortex-a76ae): Likewise.
	(cortex-a77): Likewise
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm-tune.md: Likewise.
	* doc/invoke.texi (ARM Options): Document cortex-m35p, cortx-a76ae,
	cortex-a77 CPU options.

From-SVN: r274845
2019-08-23 08:25:44 +00:00
Martin Liska 1628b2faf0 Clean up value-prof.c a bit.
2019-08-23  Martin Liska  <mliska@suse.cz>

	* profile.c (instrument_values): Do not set
	0 as last argument.
	* tree-profile.c (gimple_gen_interval_profiler): Remove
	last argument.
	(gimple_gen_pow2_profiler): Likewise.
	(gimple_gen_topn_values_profiler): Likewise.
	(gimple_gen_ic_profiler): Likewise.
	(gimple_gen_time_profiler): Likewise.
	(gimple_gen_average_profiler): Likewise.
	(gimple_gen_ior_profiler): Likewise.
	* value-prof.c (dump_histogram_value): Use default
	in switch statement instead of HIST_TYPE_MAX.
	(stream_in_histogram_value): Likewise.
	(gimple_duplicate_stmt_histograms): Do not
	use NULL for implicitly set arguments.
	(gimple_divmod_values_to_profile): Do not use
	reserve+quick_push.
	(gimple_indirect_call_to_profile): Likewise.
	(gimple_find_values_to_profile): Use implicit
	function call arguments.
	* value-prof.h (gimple_alloc_histogram_value):
	Set default values.
	(gimple_gen_interval_profiler): Remove last argument.
	(gimple_gen_pow2_profiler): Likewise.
	(gimple_gen_topn_values_profiler): Likewise.
	(gimple_gen_ic_profiler): Likewise.
	(gimple_gen_time_profiler): Likewise.
	(gimple_gen_average_profiler): Likewise.
	(gimple_gen_ior_profiler): Likewise.

From-SVN: r274844
2019-08-23 07:48:34 +00:00
GCC Administrator 1783e319bf Daily bump.
From-SVN: r274843
2019-08-23 00:16:54 +00:00
Marek Polacek ab3dd132a1 PR c++/91304 - prefix attributes ignored in condition.
* parser.c (cp_parser_condition): Handle prefix attributes.

	* g++.dg/cpp0x/gen-attrs-70.C: New test.

From-SVN: r274839
2019-08-23 00:06:25 +00:00
Steven G. Kargl f99aba1562 intrinsic.c (add_subroutines): ERRMSG is INTENT(INOUT) in co_broadcast, co_max, co_min, co_reduce, and co_sum.
2019-08-22  Steven G. Kargl  <kargl@gcc.gnu.org>

	* intrinsic.c (add_subroutines): ERRMSG is INTENT(INOUT) in
	co_broadcast, co_max, co_min, co_reduce, and  co_sum.

From-SVN: r274838
2019-08-22 23:50:57 +00:00
Martin Sebor 14b7950f12 PR middle-end/91490 - bogus argument missing terminating nul warning on strlen of a flexible array member
gcc/c-family/ChangeLog:

	PR middle-end/91490
	* c-common.c (braced_list_to_string): Add argument and overload.
	Handle flexible length arrays and unions.

gcc/testsuite/ChangeLog:

	PR middle-end/91490
	* c-c++-common/Warray-bounds-7.c: New test.
	* gcc.dg/Warray-bounds-39.c: Expect either -Warray-bounds or
	-Wstringop-overflow.
	* gcc.dg/strlenopt-78.c: New test.

gcc/ChangeLog:

	PR middle-end/91490
	* builtins.c (c_strlen): Rename argument and introduce new local.
	Set no-warning bit on original argument.
	* expr.c (string_constant): Pass argument type to fold_ctor_reference.
	Fold empty and zero constructors into empty strings.
	* gimple-fold.c (fold_nonarray_ctor_reference): Return a STRING_CST
	for missing initializers.
	* tree.c (build_string_literal): Handle optional argument.
	* tree.h (build_string_literal): Add defaulted argument.
	* gimple-ssa-warn-restrict.c (maybe_diag_access_bounds): Check
	no-warning bit on original expression.

From-SVN: r274837
2019-08-22 17:09:26 -06:00
Rainer Orth 1b1e13dbde Fix gcc.target/i386/minmax-4.c etc. on 32-bit Solaris/x86
* gcc.target/i386/minmax-4.c: Add -mno-stackrealign to dg-options.
	* gcc.target/i386/minmax-5.c: Likewise.
	* gcc.target/i386/minmax-6.c: Likewise.
	* gcc.target/i386/minmax-7.c: Likewise.
	* gcc.target/i386/pr91154.c: Likewise.

From-SVN: r274836
2019-08-22 21:55:19 +00:00
Segher Boessenkool e99bfdd2a8 rs6000: Use unspec_volatile for darn (PR91481)
Every call to darn should deliver a *new* random number; such calls
should not be CSEd together.  So they should be unspec_volatile, not
plain unspec.


	PR target/91481
	* config/rs6000/rs6000.md (unspec): Delete UNSPEC_DARN, UNSPEC_DARN_32,
	and UNSPEC_DARN_RAW.
	(unspecv): New enumerator values UNSPECV_DARN, UNSPECV_DARN_32, and
	UNSPECV_DARN_RAW.
	(darn_32): Use an unspec_volatile, and UNSPECV_DARN_32.
	(darn_raw): Use an unspec_volatile, and UNSPECV_DARN_RAW.
	(darn): Use an unspec_volatile, and UNSPECV_DARN.

From-SVN: r274835
2019-08-22 21:36:21 +02:00
Segher Boessenkool 71278ecd4e rs6000: Move various non-vector things out of altivec.md
* config/rs6000/altivec.md (unspec): Delete UNSPEC_DARN, UNSPEC_DARN_32,
	UNSPEC_DARN_RAW, UNSPEC_CMPRB, UNSPEC_CMPRB2, UNSPEC_CMPEQB; move to...
	* config/rs6000/rs6000.md (unspec): ... here.
	* config/rs6000/altivec.md (darn_32, darn_raw, darn, cmprb,
	*cmprb_internal, setb_signed, setb_unsigned, cmprb2, *cmprb2_internal,
	cmpeqb, *cmpeqb_internal): Delete, move to...
	* config/rs6000/rs6000.md (darn_32, darn_raw, darn, cmprb,
	*cmprb_internal, setb_signed, setb_unsigned, cmprb2, *cmprb2_internal,
	cmpeqb, *cmpeqb_internal): ... here.

From-SVN: r274834
2019-08-22 21:33:38 +02:00
Eric Botcazou db376f458e c-parser.c (c_parser_declaration_or_fndef): Set DECL_ARGUMENTS of a FUNCTION_DECL to the right value in the presence of...
* c-parser.c (c_parser_declaration_or_fndef): Set DECL_ARGUMENTS of a
	FUNCTION_DECL to the right value in the presence of nested declarators.

From-SVN: r274828
2019-08-22 17:31:02 +00:00
Kyrylo Tkachov 943766d37a [arm] Fix use of CRC32 intrinsics with Armv8-a and hard-float
We currently have a nasty error when trying to use the __crc* intrinsics
with an -mfloat-abi=hard.
That is because the target pragma guarding them uses armv8-a+crc that
does not include fp by default.
So we get errors like:
error: '-mfloat-abi=hard': selected processor lacks an FPU

This patch fixes that by using an FP-enabled arch target pragma to guard
these intrinsics when floating-point is available.
That way both the softfloat and hardfloat variants work.

     * config/arm/arm_acle.h: Use arch=armv8-a+crc+simd pragma for CRC32
     intrinsics if __ARM_FP.
     Use __ARM_FEATURE_CRC32 ifdef guard.

     * gcc.target/arm/acle/crc_hf_1.c: New test.

From-SVN: r274827
2019-08-22 15:55:39 +00:00
Wilco Dijkstra ef27f40f48 [ARM] Remove remaining Neon DImode support
Remove the remaining Neon adddi3, subdi3 and negdi2 patterns.  As a result
adddi3, subdi3 and negdi2 can now always be expanded early irrespectively of
whether Neon is available.  Also expand the extenddi patterns at the same
time.  Several Neon arch attributes are no longer used and removed.

Code generation is improved in all cases, saving another 400-500 instructions
from the PR77308 testcase (total improvement is over 1700 instructions with
-mcpu=cortex-a57 -O2).

Bootstrap & regress OK on arm-none-linux-gnueabihf --with-cpu=cortex-a57

    gcc/
	* config/arm/arm.md (neon_for_64bits): Remove.
	(avoid_neon_for_64bits): Remove.
	(arm_adddi3): Always split early.
	(arm_subdi3): Always split early.
	(negdi2): Remove Neon expansion.
	(split zero_extend): Split before reload.
	(split sign_extend): Split before reload.

From-SVN: r274825
2019-08-22 15:19:58 +00:00
Wilco Dijkstra 5c7c6c5fc1 [ARM] Cleanup DImode shifts
Like the logical operations, expand all shifts early rather than only
sometimes.  The Neon shift expansions are never emitted (not even with
-fneon-for-64bits), so they are not useful.  So all the late expansions
and Neon shift patterns can be removed, and shifts are more optimized
as a result.  Since some extend patterns use Neon DImode shifts, remove
the Neon extend variants and related splits.

A simple example now generates the same efficient code after this
patch with -mfpu=neon and -mfpu=vfp (previously just the fact of
having Neon enabled resulted inefficient code for no reason).

unsigned long long f(unsigned long long x, unsigned long long y)
{ return x & (y >> 33); }

Before:
	strd    r4, r5, [sp, #-8]!
	lsr     r4, r3, #1
	mov     r5, #0
	and     r1, r1, r5
	and     r0, r0, r4
	ldrd    r4, r5, [sp]
	add     sp, sp, #8
	bx      lr

After:
	and     r0, r0, r3, lsr #1
	mov     r1, #0
	bx      lr

Bootstrap and regress OK on arm-none-linux-gnueabihf --with-cpu=cortex-a57

    gcc/
	* config/arm/iterators.md (qhs_extenddi_cstr): Update.
	(qhs_extenddi_cstr): Likewise.
	* config/arm/arm.md (ashldi3): Always expand early.
	(ashlsi3): Likewise.
	(ashrsi3): Likewise.
	(zero_extend<mode>di2): Remove Neon variants.
	(extend<mode>di2): Likewise.
	* config/arm/neon.md (ashldi3_neon_noclobber): Remove.
	(signed_shift_di3_neon): Likewise.
	(unsigned_shift_di3_neon): Likewise.
	(ashrdi3_neon_imm_noclobber): Likewise.
	(lshrdi3_neon_imm_noclobber): Likewise.
	(<shift>di3_neon): Likewise.
	(split extend): Remove DI extend split patterns.

   gcc/testsuite/
	* gcc.target/arm/neon-extend-1.c: Remove test.
	* gcc.target/arm/neon-extend-2.c: Remove test.

From-SVN: r274824
2019-08-22 15:06:37 +00:00
Wilco Dijkstra cdfc0e863a [ARM] Cleanup logical DImode operations
Cleanup the logical DImode operations since the current implementation is way
too complicated.  Thumb-1, Thumb-2, VFP/Neon and iwMMXt all work differently,
resulting in a bewildering number of expansions, patterns and splits across
several md files.  All this complexity is counterproductive and results in
inefficient code.

A much simpler approach is to split these operations early in the expander
so that optimizations and register allocation are applied on the 32-bit halves.
Codegeneration is unchanged on Thumb-1 and Arm/Thumb-2 without Neon or iwMMXt
(which already expand these instructions early).  With Neon these changes save
~1000 instructions from the PR77308 testcase, mostly by significantly reducing
register pressure and spilling.

Bootstrap OK on arm-none-linux-gnueabihf --with-cpu=cortex-a57

    gcc/
	* config/arm/arm.md (split and/eor/ior): Remove Neon check.
	(split not): Add DImode not splitter.
	(anddi3): Remove pattern.
	(anddi3_insn): Likewise.
	(anddi_zesidi_di): Likewise.
	(anddi_sesdi_di): Likewise.
	(anddi_notdi_di): Likewise.
	(anddi_notzesidi_di): Likewise.
	(anddi_notsesidi_di): Likewise.
	(iordi3): Likewise.
	(iordi3_insn): Likewise.
	(iordi_zesidi_di): Likewise.
	(iordi_sesidi_di): Likewise.
	(xordi3): Likewise.
	(xordi3_insn): Likewise.
	(xordi_sesidi_di): Likewise.
	(xordi_zesidi_di): Likewise.
	(one_cmpldi2): Likewise.
	(one_cmpldi2_insn): Likewise.
	* config/arm/constraints.md: Remove De, Df, Dg constraints.
	* config/arm/iwmmxt.md (iwmmxt_iordi3): Remove general register
	alternative.
	(iwmmxt_xordi3): Likewise.
	(iwmmxt_anddi3): Likewise.
	* config/arm/neon.md (orndi3_neon): Remove pattern.
	(anddi_notdi_di): Likewise.
	* config/arm/predicates.md (arm_anddi_operand_neon): Remove.
	(arm_iordi_operand_neon): Likewise.
	(arm_xordi_operand_neon): Likewise.
	* config/arm/thumb2.md(iordi_notdi_di): Remove pattern.
	(iordi_notzesidi_di): Likewise.
	(iordi_notdi_zesidi): Likewise.
	(iordi_notsesidi_di): Likewise.

From-SVN: r274823
2019-08-22 14:52:24 +00:00
Richard Earnshaw 203ef022c6 [Arm] Add 16-bit thumb alternatives to iorsi3_compare0[_scratch]
The iorsi3_compare0 and iorsi3_compare0_scratch patterns can make use
of the 16-bit thumb orrs instruction if suitable registers are
allocated.  This patch adds the alternative to allow this to happen.

	* config/arm/arm.md (iorsi3_compare0): Add alternative for 16-bit thumb
	insn.
	(iorsi3_compare0_scratch): Likewise.

From-SVN: r274822
2019-08-22 14:40:52 +00:00
Sylvia Taylor 391625888d [aarch64]: add intrinsics for vld1(q)_x4 and vst1(q)_x4
This patch adds the intrinsic functions for:
- vld1_<mode>_x4
- vst1_<mode>_x4
- vld1q_<mode>_x4
- vst1q_<mode>_x4

Bootstrapped and tested on aarch64-none-linux-gnu.

Committed on behalf of Sylvia Taylor.

2019-08-22  Sylvia Taylor  <sylvia.taylor@arm.com>

	* config/aarch64/aarch64-simd-builtins.def:
	(ld1x4): New.
	(st1x4): Likewise.
	* config/aarch64/aarch64-simd.md:
	(aarch64_ld1x4<VALLDIF:mode>): New pattern.
	(aarch64_st1x4<VALLDIF:mode>): Likewise.
	(aarch64_ld1_x4_<mode>): Likewise.
	(aarch64_st1_x4_<mode>): Likewise.
	* config/aarch64/arm_neon.h:
	(vld1_s8_x4): New function.
	(vld1q_s8_x4): Likewise.
	(vld1_s16_x4): Likewise.
	(vld1q_s16_x4): Likewise.
	(vld1_s32_x4): Likewise.
	(vld1q_s32_x4): Likewise.
	(vld1_u8_x4): Likewise.
	(vld1q_u8_x4): Likewise.
	(vld1_u16_x4): Likewise.
	(vld1q_u16_x4): Likewise.
	(vld1_u32_x4): Likewise.
	(vld1q_u32_x4): Likewise.
	(vld1_f16_x4): Likewise.
	(vld1q_f16_x4): Likewise.
	(vld1_f32_x4): Likewise.
	(vld1q_f32_x4): Likewise.
	(vld1_p8_x4): Likewise.
	(vld1q_p8_x4): Likewise.
	(vld1_p16_x4): Likewise.
	(vld1q_p16_x4): Likewise.
	(vld1_s64_x4): Likewise.
	(vld1_u64_x4): Likewise.
	(vld1_p64_x4): Likewise.
	(vld1q_s64_x4): Likewise.
	(vld1q_u64_x4): Likewise.
	(vld1q_p64_x4): Likewise.
	(vld1_f64_x4): Likewise.
	(vld1q_f64_x4): Likewise.
	(vst1_s8_x4): Likewise.
	(vst1q_s8_x4): Likewise.
	(vst1_s16_x4): Likewise.
	(vst1q_s16_x4): Likewise.
	(vst1_s32_x4): Likewise.
	(vst1q_s32_x4): Likewise.
	(vst1_u8_x4): Likewise.
	(vst1q_u8_x4): Likewise.
	(vst1_u16_x4): Likewise.
	(vst1q_u16_x4): Likewise.
	(vst1_u32_x4): Likewise.
	(vst1q_u32_x4): Likewise.
	(vst1_f16_x4): Likewise.
	(vst1q_f16_x4): Likewise.
	(vst1_f32_x4): Likewise.
	(vst1q_f32_x4): Likewise.
	(vst1_p8_x4): Likewise.
	(vst1q_p8_x4): Likewise.
	(vst1_p16_x4): Likewise.
	(vst1q_p16_x4): Likewise.
	(vst1_s64_x4): Likewise.
	(vst1_u64_x4): Likewise.
	(vst1_p64_x4): Likewise.
	(vst1q_s64_x4): Likewise.
	(vst1q_u64_x4): Likewise.
	(vst1q_p64_x4): Likewise.
	(vst1_f64_x4): Likewise.
	(vst1q_f64_x4): Likewise.

	* gcc.target/aarch64/advsimd-intrinsics/vld1x4.c: New test.
	* gcc.target/aarch64/advsimd-intrinsics/vst1x4.c: New test.

From-SVN: r274820
2019-08-22 11:28:26 +00:00
Prathamesh Kulkarni b1c9ec725d aarch64-sve.md (vcond_mask): Add "@".
2019-08-22  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	* config/aarch64/aarch64-sve.md (vcond_mask): Add "@".

From-SVN: r274817
2019-08-22 08:48:42 +00:00
GCC Administrator ae12842109 Daily bump.
From-SVN: r274816
2019-08-22 00:16:17 +00:00