The .code16gcc directive was added to binutils back in 1999:
---
'.code16gcc' provides experimental support for generating 16-bit code
from gcc, and differs from '.code16' in that 'call', 'ret', 'enter',
'leave', 'push', 'pop', 'pusha', 'popa', 'pushf', and 'popf'
instructions default to 32-bit size. This is so that the stack pointer
is manipulated in the same way over function calls, allowing access to
function parameters at the same stack offsets as in 32-bit mode.
'.code16gcc' also automatically adds address size prefixes where
necessary to use the 32-bit addressing modes that gcc generates.
---
It encodes 32-bit assembly instructions generated by GCC in 16-bit format
so that GCC can be used to generate 16-bit instructions. To do that, the
.code16gcc directive must be placed at the very beginning of the assembly
code. This patch adds -m16 to x86 backend by:
1. Add -m16 and make it mutually exclusive with -m32, -m64 and -mx32.
2. Treat -m16 like -m32 so that --32 is passed to assembler.
3. Output .code16gcc at the very beginning of the assembly code.
4. Turn off 64-bit ISA when -m16 is used.
PR target/59672
* config/i386/gnu-user64.h (SPEC_32): Add "m16|" to "m32".
(SPEC_X32): Likewise.
(SPEC_64): Likewise.
* config/i386/i386.c (ix86_option_override_internal): Turn off
OPTION_MASK_ISA_64BIT, OPTION_MASK_ABI_X32 and OPTION_MASK_ABI_64
for TARGET_16BIT.
(x86_file_start): Output .code16gcc for TARGET_16BIT.
* config/i386/i386.h (TARGET_16BIT): New macro.
(TARGET_16BIT_P): Likewise.
* config/i386/i386.opt: Add m16.
* doc/invoke.texi: Document -m16.
From-SVN: r207196
[gcc]
2014-01-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/59909
* doc/invoke.texi (RS/6000 and PowerPC Options): Document
-mquad-memory-atomic. Update -mquad-memory documentation to say
it is only used for non-atomic loads/stores.
* config/rs6000/predicates.md (quad_int_reg_operand): Allow either
-mquad-memory or -mquad-memory-atomic switches.
* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Add
-mquad-memory-atomic to ISA 2.07 support.
* config/rs6000/rs6000.opt (-mquad-memory-atomic): Add new switch
to separate support of normal quad word memory operations (ldq,
stq) from the atomic quad word memory operations.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
support to separate non-atomic quad word operations from atomic
quad word operations. Disable non-atomic quad word operations in
little endian mode so that we don't have to swap words after the
load and before the store.
(quad_load_store_p): Add comment about atomic quad word support.
(rs6000_opt_masks): Add -mquad-memory-atomic to the list of
options printed with -mdebug=reg.
* config/rs6000/rs6000.h (TARGET_SYNC_TI): Use
-mquad-memory-atomic as the test for whether we have quad word
atomic instructions.
(TARGET_SYNC_HI_QI): If either -mquad-memory-atomic,
-mquad-memory, or -mp8-vector are used, allow byte/half-word
atomic operations.
* config/rs6000/sync.md (load_lockedti): Insure that the address
is a proper indexed or indirect address for the lqarx instruction.
On little endian systems, swap the hi/lo registers after the lqarx
instruction.
(load_lockedpti): Use indexed_or_indirect_operand predicate to
insure the address is valid for the lqarx instruction.
(store_conditionalti): Insure that the address is a proper indexed
or indirect address for the stqcrx. instruction. On little endian
systems, swap the hi/lo registers before doing the stqcrx.
instruction.
(store_conditionalpti): Use indexed_or_indirect_operand predicate to
insure the address is valid for the stqcrx. instruction.
* gcc/config/rs6000/rs6000-c.c (rs6000_target_modify_macros):
Define __QUAD_MEMORY__ and __QUAD_MEMORY_ATOMIC__ based on what
type of quad memory support is available.
[gcc/testsuite]
2014-01-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/59909
* gcc.target/powerpc/quad-atomic.c: New file to test power8 quad
word atomic functions at runtime.
From-SVN: r207020
* config/msp430/msp430.opt: (mcpu): New option.
* config/msp430/msp430.c (msp430_mcu_name): Use target_mcu.
(msp430_option_override): Parse target_cpu. If the MCU name
matches a generic string, clear target_mcu.
(msp430_attr): Allow numeric interrupt values up to 63.
(msp430_expand_epilogue): No longer invert operand 1 of gen_popm.
* config/msp430/msp430.h (ASM_SPEC): Convert -mcpu into a -mmcu
option.
* config/msp430/t-msp430: (MULTILIB_MATCHES): Remove mcu matches.
Add mcpu matches.
* config/msp430/msp430.md (popm): Use %J rather than %I.
(addsi3): Use msp430_nonimmediate_operand for operand 2.
(addhi_cy_i): Use immediate_operand for operand 2.
* doc/invoke.texi: Document -mcpu option.
From-SVN: r206705
2014-01-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* doc/invoke.texi: Add -maltivec={be,le} options, and document
default element-order behavior for -maltivec.
* config/rs6000/rs6000.opt: Add -maltivec={be,le} options.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Ensure
that -maltivec={le,be} implies -maltivec; disallow -maltivec=le
when targeting big endian, at least for now.
* config/rs6000/rs6000.h: Add #define of VECTOR_ELT_ORDER_BIG.
From-SVN: r206494
contrib/
2013-12-31 Chung-Lin Tang <cltang@codesourcery.com>
* config-list.mk: Add nios2-elf, nios2-linux-gnu. Corrected
ordering of some configs.
gcc/
2013-12-31 Chung-Lin Tang <cltang@codesourcery.com>
Sandra Loosemore <sandra@codesourcery.com>
Based on patches from Altera Corporation
* config.gcc (nios2-*-*): Add nios2 config targets.
* configure.ac (TLS_SECTION_ASM_FLAG): Add nios2 case.
("$cpu_type"): Add nios2 as new cpu type.
* configure: Regenerate.
* config/nios2/nios2.c: New file.
* config/nios2/nios2.h: New file.
* config/nios2/nios2-opts.h: New file.
* config/nios2/nios2-protos.h: New file.
* config/nios2/elf.h: New file.
* config/nios2/elf.opt: New file.
* config/nios2/linux.h: New file.
* config/nios2/nios2.opt: New file.
* config/nios2/nios2.md: New file.
* config/nios2/predicates.md: New file.
* config/nios2/constraints.md: New file.
* config/nios2/t-nios2: New file.
* common/config/nios2/nios2-common.c: New file.
* doc/invoke.texi (Nios II options): Document Nios II specific
options.
* doc/md.texi (Nios II family): Document Nios II specific
constraints.
* doc/extend.texi (Function Specific Option Pragmas): Document
Nios II supported target pragma functionality.
gcc/testsuite/
2013-12-31 Sandra Loosemore <sandra@codesourcery.com>
Chung-Lin Tang <cltang@codesourcery.com>
Based on patches from Altera Corporation
* gcc.dg/stack-usage-1.c (SIZE): Define case for __nios2__.
* gcc.dg/20040813-1.c: Skip for nios2-*-*.
* gcc.dg/20020312-2.c: Add __nios2__ case.
* g++.dg/other/PR23205.C: Skip for nios2-*-*.
* g++.dg/other/pr23205-2.C: Skip for nios2-*-*.
* g++.dg/cpp0x/constexpr-rom.C: Skip for nios2-*-*.
* g++.dg/cpp0x/alias-decl-debug-0.C: Skip for nios2-*-*.
* g++.old-deja/g++.jason/thunk3.C: Skip for nios2-*-*.
* lib/target-supports.exp (check_profiling_available): Check for
nios2-*-elf.
* gcc.c-torture/execute/pr47237.x:: Skip for nios2-*-*.
* gcc.c-torture/execute/20101011-1.c: Skip for nios2-*-*.
* gcc.c-torture/execute/builtins/lib/chk.c (memset): Place
char-based memset loop before inline check, to prevent
problems when called to initialize .bss. Update comments.
* gcc.target/nios2/nios2.exp: New DejaGNU file.
* gcc.target/nios2/nios2-custom-1.c: New test.
* gcc.target/nios2/nios2-trap-insn.c: New test.
* gcc.target/nios2/nios2-builtin-custom.c: New test.
* gcc.target/nios2/nios2-builtin-io.c: New test.
* gcc.target/nios2/nios2-stack-check-1.c: New test.
* gcc.target/nios2/nios2-stack-check-2.c: New test.
* gcc.target/nios2/nios2-rdctl.c: New test.
* gcc.target/nios2/nios2-wrctl.c: New test.
* gcc.target/nios2/nios2-wrctl-zero.c: New test.
* gcc.target/nios2/nios2-wrctl-not-zero.c: New test.
* gcc.target/nios2/nios2-rdwrctl-1.c: New test.
* gcc.target/nios2/nios2-reg-constraints.c: New test.
* gcc.target/nios2/nios2-ashlsi3-one_shift.c: New test.
* gcc.target/nios2/nios2-mul-options-1.c: New test.
* gcc.target/nios2/nios2-mul-options-2.c: New test.
* gcc.target/nios2/nios2-mul-options-3.c: New test.
* gcc.target/nios2/nios2-mul-options-4.c: New test.
* gcc.target/nios2/nios2-nor.c: New test.
* gcc.target/nios2/nios2-stxio.c: New test.
* gcc.target/nios2/custom-fp-1.c: New test.
* gcc.target/nios2/custom-fp-2.c: New test.
* gcc.target/nios2/custom-fp-3.c: New test.
* gcc.target/nios2/custom-fp-4.c: New test.
* gcc.target/nios2/custom-fp-5.c: New test.
* gcc.target/nios2/custom-fp-6.c: New test.
* gcc.target/nios2/custom-fp-7.c: New test.
* gcc.target/nios2/custom-fp-8.c: New test.
* gcc.target/nios2/custom-fp-cmp-1.c: New test.
* gcc.target/nios2/custom-fp-conversion.c: New test.
* gcc.target/nios2/custom-fp-double.c: New test.
* gcc.target/nios2/custom-fp-float.c: New test.
* gcc.target/nios2/nios2-int-types.c: New test.
* gcc.target/nios2/nios2-cache-1.c: New test.
* gcc.target/nios2/nios2-cache-2.c: New test.
libgcc/
2013-12-31 Sandra Loosemore <sandra@codesourcery.com>
Chung-Lin Tang <cltang@codesourcery.com>
Based on patches from Altera Corporation
* config.host (nios2-*-*,nios2-*-linux*): Add nios2 host cases.
* config/nios2/lib2-nios2.h: New file.
* config/nios2/lib2-divmod-hi.c: New file.
* config/nios2/linux-unwind.h: New file.
* config/nios2/lib2-divmod.c: New file.
* config/nios2/linux-atomic.c: New file.
* config/nios2/t-nios2: New file.
* config/nios2/crti.asm: New file.
* config/nios2/t-linux: New file.
* config/nios2/lib2-divtable.c: New file.
* config/nios2/lib2-mul.c: New file.
* config/nios2/tramp.c: New file.
* config/nios2/crtn.asm: New file.
From-SVN: r206256
2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>
Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/s390/s390.c (s390_hotpatch_trampoline_halfwords_default): New
constant
(s390_hotpatch_trampoline_halfwords_max): New constant
(s390_hotpatch_trampoline_halfwords): New static variable
(get_hotpatch_attribute): New function
(s390_handle_hotpatch_attribute): New function
(s390_attribute_table): New target specific attribute table to implement
the hotpatch attribute
(s390_option_override): Parse hotpatch options
(s390_function_num_hotpatch_trampoline_halfwords): New function
(s390_can_inline_p): Implement target hook to
suppress hotpatching for explicitly inlined functions
(s390_asm_output_function_label): Generate hotpatch prologue
(TARGET_ATTRIBUTE_TABLE): Define to implement target attribute table
(TARGET_CAN_INLINE_P): Define to implement target hook
* config/s390/s390.opt (mhotpatch): New options -mhotpatch, -mhotpatch=
* config/s390/s390-protos.h (s390_asm_output_function_label): Add
prototype
* config/s390/s390.h (ASM_OUTPUT_FUNCTION_LABEL): Target specific
function label generation for hotpatching
(FUNCTION_BOUNDARY): Align functions to eight bytes
* doc/extend.texi: Document hotpatch attribute
* doc/invoke.texi: Document -mhotpatch option
2013-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>
Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gcc/testsuite/gcc.target/s390/hotpatch-1.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-2.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-3.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-4.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-5.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-6.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-7.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-8.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-9.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-10.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-11.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-12.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c: New test
* gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c: New test
Co-Authored-By: Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
From-SVN: r206111
* common.opt: Split up -fisolate-erroneous-paths into
-fisolate-erroneous-paths-dereference and
-fisolate-erroneous-paths-attribute.
* invoke.texi: Corresponding changes.
* gimple.c (infer_nonnull_range): Add and use new arguments
to control what kind of statements can be used to infer a
non-null range.
* gimple.h (infer_nonnull_range): Update prototype.
* tree-vrp.c (infer_value_range): Corresponding changes.
* opts.c (default_options_table): Update due to option split.
* gimple-ssa-isolate-paths.c: Fix trailing whitespace.
(find_implicit_erroneous_behaviour): Pass additional arguments
to infer_nonnull_range.
(find_explicit_erroneous_behaviour): Similarly.
(gate_isolate_erroneous_paths): Check both of the new
options.
testsuite/
* gcc.dg/pr38984.c: Use -fno-isolate-erroneous-paths-dereference.
* gcc.dg/tree-ssa/isolate-2.c: Explicitly turn on
-fisolate-erroneous-paths-attribute.
* gcc.dg/tree-ssa/isolate-4.c: Likewise.
From-SVN: r205689
2013-11-30 Tobias Burnus <burnus@net-b.de>
PR sanitizer/59275
* doc/invoke.texi (-fsanitize=address,leak): Mention the
* associated
environment variable and link to a list with flags.
(-fsanitize=thread): Ditto and update link.
From-SVN: r205548
* doc/implement-c.texi: Document C11 implementation-defined
behavior. Refer to -ffp-contract=fast for contraction behavior.
* doc/invoke.texi (-std=c99, std=c11): Update description of
completeness.
(-std=gnu99): Don't mention as future default.
(-std=gnu11): Mention as intended future default.
* doc/standards.texi: Update descriptions of C99 and C11 support.
Limit statement about C99 facilities for freestanding
implementations to some platforms only.
From-SVN: r205505
gcc/ChangeLog
2013-11-26 Terry Guo <terry.guo@arm.com>
* config/arm/arm.c (require_pic_register): Handle high pic base
register for thumb-1.
(arm_load_pic_register): Also initialize high pic base register.
* doc/invoke.texi: Update documentation for option -mpic-register.
gcc/testsuite/ChangeLog
2013-11-26 Terry Guo <terry.guo@arm.com>
* gcc.target/arm/thumb1-pic-high-reg.c: New case.
* gcc.target/arm/thumb1-pic-single-base.c: New case.
From-SVN: r205391
gcc/ChangeLog
2013-11-25 Terry Guo <terry.guo@arm.com>
* doc/invoke.texi (-mslow-flash-data): Document new option.
* config/arm/arm.opt (mslow-flash-data): New option.
* config/arm/arm-protos.h (arm_max_const_double_inline_cost): Declare
it.
* config/arm/arm.h (TARGET_USE_MOVT): Always true when literal pools
are disabled.
(arm_disable_literal_pool): Declare it.
* config/arm/arm.c (arm_disable_literal_pool): New variable.
(arm_option_override): Handle new option.
(thumb2_legitimate_address_p): Don't allow symbol references when
literal pools are disabled.
(arm_max_const_double_inline_cost): New function.
* config/arm/arm.md (types.md): Include it before ...
(use_literal_pool): New attribute.
(enabled): Use new attribute.
(split pattern): Replace symbol+offset with MOVW/MOVT.
gcc/testsuite/ChangeLog
2013-11-25 Terry Guo <terry.guo@arm.com>
* gcc.target/arm/thumb2-slow-flash-data.c: New.
From-SVN: r205342
Walter Lee
Catherine Moore
Terry Guo
James Greenhalgh
Bernd Edlinger
H.J. Lu
Markus Trippelsdorf
Renlin Li
Michael Meissner
Nick Clifton
Bill Schmidt
Max Ostapenko
Richard Sandiford
Tobias Burnus
Alexander Ivchenko
Chung-Lin Tang
Eric Botcazou
Jason Merrill
Sharad Singhai
Tocar Ilya
Jeff Law
Kyrylo Tkachov
Dominik Vogt
Martin Liska
Sandra Loosemore
Oleg Endo
Marek Polacek
Ilya Enkovich
Joseph Myers
Sergey Ostanevich
Jakub Jelinek
Yuri Rumyantsev