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Author SHA1 Message Date
Bernhard Reutner-Fischer
5502f40be2 fixincludes: use $(FI) instead of fixincl@EXEEXT@ 
2013-12-20  Bernhard Reutner-Fischer  <aldot@gcc.gnu.org>

	Makefile.in: Use $(FI) instead of fixincl@EXEEXT@.

From-SVN: r206146
 2013-12-20 13:07:52 +01:00
Tocar Ilya
19ac6899d5 config.gcc: Support march=broadwell. 
* config.gcc: Support march=broadwell.
        * config/i386/driver-i386.c (host_detect_local_cpu): Detect Broadwell.
        * config/i386/i386.c (ix86_option_override_internal): Add broadwell.
        * doc/invoke.texi: Document march=broadwell.

From-SVN: r206144
 2013-12-20 09:11:48 +00:00
Jakub Jelinek
ac0ff9f273 ubsan.c: Include tree-ssanames.h, asan.h and gimplify-me.h. 
* ubsan.c: Include tree-ssanames.h, asan.h and gimplify-me.h.
	(ubsan_type_descriptor): Handle BOOLEAN_TYPE and ENUMERAL_TYPE
	like INTEGER_TYPE.
	(instrument_bool_enum_load): New function.
	(ubsan_pass): Call it.
	(gate_ubsan): Also enable for SANITIZE_BOOL or SANITIZE_ENUM.
	* asan.c (create_cond_insert_point): No longer static.
	* asan.h (create_cond_insert_point): Declare.
	* sanitizer.def (BUILT_IN_UBSAN_HANDLE_LOAD_INVALID_VALUE): New
	built-in.
	* opts.c (common_handle_option): Handle -fsanitize=bool and
	-fsanitize=enum.
	* builtins.c (fold_builtin_memory_op): When sanitizing bool
	and enum loads, don't use enum or bool types for memcpy folding.
	* flag-types.h (SANITIZE_BOOL, SANITIZE_ENUM): New.
	(SANITIZE_UNDEFINED): Or these in.

	* c-c++-common/ubsan/load-bool-enum.c: New test.

From-SVN: r206143
 2013-12-20 10:05:04 +01:00
Chung-Ju Wu
634bdae96b nds32.h (NDS32_MODE_TYPE_ALIGN): New macro. 
2013-12-20  Chung-Ju Wu  <jasonwucj@gmail.com>

	* config/nds32/nds32.h (NDS32_MODE_TYPE_ALIGN): New macro.
	(NDS32_AVAILABLE_REGNUM_FOR_ARG): Use more accurate alignment checking
	to determine available register number.
	* config/nds32/nds32.c (nds32_needs_double_word_align): Use new
	macro NDS32_MODE_TYPE_ALIGN.
	(nds32_function_arg): Refine code layout.

From-SVN: r206142
 2013-12-20 09:02:58 +00:00
Jeff Law
7920b6d673 invoke.texi: (dump-rtl-ree): Fix typo and clarify ree handles both zero and sign extension. 
* doc/invoke.texi: (dump-rtl-ree): Fix typo and clarify ree
        handles both zero and sign extension.

From-SVN: r206139
 2013-12-19 21:33:34 -07:00
GCC Administrator
7c3d74a1c4 Daily bump. 
From-SVN: r206138
 2013-12-20 00:16:43 +00:00
Teresa Johnson
b55bf1206f re PR gcov-profile/59542 (ICE: verify_flow_info failed during Firefox build with 'gold') 
2013-12-19  Teresa Johnson  <tejohnson@google.com>

	PR gcov-profile/59542
	* bb-reorder.c (duplicate_computed_gotos): Invoke fixup_partitions
	if we have made any changes.

From-SVN: r206135
 2013-12-19 22:11:25 +00:00
Jakub Jelinek
e15eb172b0 re PR other/59545 (Signed integer overflow issues) 
PR other/59545
	* genattrtab.c (struct attr_hash): Change hashcode type to unsigned.
	(attr_hash_add_rtx, attr_hash_add_string): Change hashcode parameter
	to unsigned.
	(attr_rtx_1): Change hashcode variable to unsigned.
	(attr_string): Likewise.  Perform first multiplication in unsigned
	type.
	* ifcvt.c (noce_try_store_flag_constants): Avoid signed integer
	overflows.
	* double-int.c (neg_double): Likewise.
	* stor-layout.c (set_min_and_max_values_for_integral_type): Likewise.
	* combine.c (force_to_mode): Likewise.
	* postreload.c (move2add_use_add2_insn, move2add_use_add3_insn,
	reload_cse_move2add, move2add_note_store): Likewise.
	* simplify-rtx.c (simplify_const_unary_operation,
	simplify_const_binary_operation): Likewise.
	* ipa-split.c (find_split_points): Initialize first.can_split
	and first.non_ssa_vars.
	* gengtype-state.c (read_state_files_list): Fix up check.
	* genautomata.c (reserv_sets_hash_value): Use portable rotation
	idiom.
java/
	* class.c (hashUtf8String): Compute hash in unsigned type.
	* javaop.h (WORD_TO_INT): Avoid signed integer overflow.

From-SVN: r206134
 2013-12-19 22:27:51 +01:00
Kyrylo Tkachov
d8d79c1df2 neon-docgen.ml: Add crypto intrinsics documentation. 
2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/neon-docgen.ml: Add crypto intrinsics documentation.
	* doc/arm-neon-intrinsics.texi: Regenerate.

From-SVN: r206132
 2013-12-19 18:30:18 +00:00
Kyrylo Tkachov
ed4bcdba7c neon-testgen.ml (effective_target): Handle "CRYPTO". 
[gcc/]
2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/neon-testgen.ml (effective_target): Handle "CRYPTO".

[gcc/testsuite]
2013-12-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	 * lib/target-supports.exp (check_effective_target_arm_crypto_ok):
	 New procedure.
	 (add_options_for_arm_crypto): Likewise.
	 * gcc.target/arm/crypto-vaesdq_u8.c: New test.
	 * gcc.target/arm/crypto-vaeseq_u8.c: Likewise.
	 * gcc.target/arm/crypto-vaesimcq_u8.c: Likewise.
	 * gcc.target/arm/crypto-vaesmcq_u8.c: Likewise.
	 * gcc.target/arm/crypto-vldrq_p128.c: Likewise.
	 * gcc.target/arm/crypto-vmull_high_p64.c: Likewise.
	 * gcc.target/arm/crypto-vmullp64.c: Likewise.
	 * gcc.target/arm/crypto-vsha1cq_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha1h_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha1mq_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha1pq_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha1su0q_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha1su1q_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha256h2q_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha256hq_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha256su0q_u32.c: Likewise.
	 * gcc.target/arm/crypto-vsha256su1q_u32.c: Likewise.
	 * gcc.target/arm/crypto-vstrq_p128.c: Likewise.
	 * gcc.target/arm/neon/vbslQp64: Generate.
	 * gcc.target/arm/neon/vbslp64: Likewise.
	 * gcc.target/arm/neon/vcombinep64: Likewise.
	 * gcc.target/arm/neon/vcreatep64: Likewise.
	 * gcc.target/arm/neon/vdupQ_lanep64: Likewise.
	 * gcc.target/arm/neon/vdupQ_np64: Likewise.
	 * gcc.target/arm/neon/vdup_lanep64: Likewise.
	 * gcc.target/arm/neon/vdup_np64: Likewise.
	 * gcc.target/arm/neon/vextQp64: Likewise.
	 * gcc.target/arm/neon/vextp64: Likewise.
	 * gcc.target/arm/neon/vget_highp64: Likewise.
	 * gcc.target/arm/neon/vget_lowp64: Likewise.
	 * gcc.target/arm/neon/vld1Q_dupp64: Likewise.
	 * gcc.target/arm/neon/vld1Q_lanep64: Likewise.
	 * gcc.target/arm/neon/vld1Qp64: Likewise.
	 * gcc.target/arm/neon/vld1_dupp64: Likewise.
	 * gcc.target/arm/neon/vld1_lanep64: Likewise.
	 * gcc.target/arm/neon/vld1p64: Likewise.
	 * gcc.target/arm/neon/vld2_dupp64: Likewise.
	 * gcc.target/arm/neon/vld2p64: Likewise.
	 * gcc.target/arm/neon/vld3_dupp64: Likewise.
	 * gcc.target/arm/neon/vld3p64: Likewise.
	 * gcc.target/arm/neon/vld4_dupp64: Likewise.
	 * gcc.target/arm/neon/vld4p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQf32_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQf32_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_f32: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_p16: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_p8: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_s16: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_s32: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_s64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_s8: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_u16: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_u32: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_u64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp128_u8: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp16_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp16_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_f32: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_p16: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_p8: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_s16: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_s32: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_s64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_s8: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_u16: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_u32: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_u64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp64_u8: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp8_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQp8_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs16_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs16_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs32_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs32_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs64_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs64_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs8_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQs8_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu16_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu16_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu32_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu32_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu64_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu64_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu8_p128: Likewise.
	 * gcc.target/arm/neon/vreinterpretQu8_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretf32_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretp16_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_f32: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_p16: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_p8: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_s16: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_s32: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_s64: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_s8: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_u16: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_u32: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_u64: Likewise.
	 * gcc.target/arm/neon/vreinterpretp64_u8: Likewise.
	 * gcc.target/arm/neon/vreinterpretp8_p64: Likewise.
	 * gcc.target/arm/neon/vreinterprets16_p64: Likewise.
	 * gcc.target/arm/neon/vreinterprets32_p64: Likewise.
	 * gcc.target/arm/neon/vreinterprets64_p64: Likewise.
	 * gcc.target/arm/neon/vreinterprets8_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretu16_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretu32_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretu64_p64: Likewise.
	 * gcc.target/arm/neon/vreinterpretu8_p64: Likewise.
	 * gcc.target/arm/neon/vsliQ_np64: Likewise.
	 * gcc.target/arm/neon/vsli_np64: Likewise.
	 * gcc.target/arm/neon/vsriQ_np64: Likewise.
	 * gcc.target/arm/neon/vsri_np64: Likewise.
	 * gcc.target/arm/neon/vst1Q_lanep64: Likewise.
	 * gcc.target/arm/neon/vst1Qp64: Likewise.
	 * gcc.target/arm/neon/vst1_lanep64: Likewise.
	 * gcc.target/arm/neon/vst1p64: Likewise.
	 * gcc.target/arm/neon/vst2p64: Likewise.
	 * gcc.target/arm/neon/vst3p64: Likewise.
	 * gcc.target/arm/neon/vst4p64: Likewise.

From-SVN: r206131
 2013-12-19 18:29:09 +00:00
Kyrylo Tkachov
021b5e6b54 arm.c (enum arm_builtins): Add crypto builtins. 
2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	 * config/arm/arm.c (enum arm_builtins): Add crypto builtins.
	 (arm_init_neon_builtins): Handle crypto builtins.
	 (bdesc_2arg): Likewise.
	 (bdesc_1arg): Likewise.
	 (bdesc_3arg): New table.
	 (arm_expand_ternop_builtin): New function.
	 (arm_expand_unop_builtin): Handle sha1h explicitly.
	 (arm_expand_builtin): Handle ternary builtins.
	 * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS):
	 Define __ARM_FEATURE_CRYPTO.
	 * config/arm/arm.md: Include crypto.md.
	 (is_neon_type): Add crypto types.
	 * config/arm/arm_neon_builtins.def: Add TImode reinterprets.
	 * config/arm/crypto.def: New.
	 * config/arm/crypto.md: Likewise.
	 * config/arm/iterators.md (CRYPTO_UNARY): New int iterator.
	 (CRYPTO_BINARY): Likewise.
	 (CRYPTO_TERNARY): Likewise.
	 (CRYPTO_SELECTING): Likewise.
	 (crypto_pattern): New int attribute.
	 (crypto_size_sfx): Likewise.
	 (crypto_mode): Likewise.
	 (crypto_type): Likewise.
	 * config/arm/neon-gen.ml: Handle poly64_t and poly128_t types.
	 Handle crypto intrinsics.
	 * config/arm/neon.ml: Add support for poly64 and polt128 types
	 and intrinsics. Define crypto intrinsics.
	 * config/arm/neon.md (neon_vreinterpretti<mode>): New pattern.
	 (neon_vreinterpretv16qi<mode>): Use VQXMOV mode iterator.
	 (neon_vreinterpretv8hi<mode>): Likewise.
	 (neon_vreinterpretv4si<mode>): Likewise.
	 (neon_vreinterpretv4sf<mode>): Likewise.
	 (neon_vreinterpretv2di<mode>): Likewise.
	 * config/arm/unspecs.md (UNSPEC_AESD, UNSPEC_AESE, UNSPEC_AESIMC,
	 UNSPEC_AESMC, UNSPEC_SHA1C, UNSPEC_SHA1M, UNSPEC_SHA1P, UNSPEC_SHA1H,
	 UNSPEC_SHA1SU0, UNSPEC_SHA1SU1, UNSPEC_SHA256H, UNSPEC_SHA256H2,
	 UNSPEC_SHA256SU0, UNSPEC_SHA256SU1, VMULLP64): Define.
	 * config/arm/arm_neon.h: Regenerate.

From-SVN: r206130
 2013-12-19 18:21:10 +00:00
H.J. Lu
b78e932d51 Improve -fuse-ld=[bfd|gold] check 
PR driver/59321
	* collect2.c (main): Check -fuse-ld=[bfd|gold] when
	DEFAULT_LINKER is defined.
	* common.opt (fuse-ld=bfd): Add Driver.
	(fuse-ld=gold): Likewise.
	* gcc.c (use_ld): New variable.
	(driver_handle_option): Set use_ld for OPT_fuse_ld_bfd and
	OPT_fuse_ld_gold.
	(main): Check -fuse-ld=[bfd|gold] for -print-prog-name=ld.

From-SVN: r206129
 2013-12-19 10:11:42 -08:00
Kyrylo Tkachov
582e2e4300 Makefile.in (TEXI_GCC_FILES): Add arm-acle-intrinsics.texi. 
[gcc/]
2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* Makefile.in (TEXI_GCC_FILES): Add arm-acle-intrinsics.texi.
	* config.gcc (extra_headers): Add arm_acle.h.
	* config/arm/arm.c (FL_CRC32): Define.
	(arm_have_crc): Likewise.
	(arm_option_override): Set arm_have_crc.
	(arm_builtins): Add CRC32 builtins.
	(bdesc_2arg): Likewise.
	(arm_init_crc32_builtins): New function.
	(arm_init_builtins): Initialise CRC32 builtins.
	(arm_file_start): Handle architecture extensions.
	* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FEATURE_CRC32.
	Define __ARM_32BIT_STATE.
	(TARGET_CRC32): Define.
	* config/arm/arm-arches.def: Add armv8-a+crc.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm.md (type): Add crc.
	(<crc_variant>): New insn.
	* config/arm/arm_acle.h: New file.
	* config/arm/iterators.md (CRC): New int iterator.
	(crc_variant, crc_mode): New int attributes.
	* confg/arm/unspecs.md (UNSPEC_CRC32B, UNSPEC_CRC32H, UNSPEC_CRC32W,
	UNSPEC_CRC32CB, UNSPEC_CRC32CH, UNSPEC_CRC32CW): New unspecs.
	* doc/invoke.texi: Document -march=armv8-a+crc option.
	* doc/extend.texi: Document ACLE intrinsics.

[gcc/testsuite/]
2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* lib/target-supports.exp (add_options_for_arm_crc): New procedure.
	(check_effective_target_arm_crc_ok_nocache): Likewise.
	(check_effective_target_arm_crc_ok): Likewise.
	* gcc.target/arm/acle/: New directory.
	* gcc.target/arm/acle/acle.exp: New.
	* gcc.target/arm/acle/crc32b.c: New test.
	* gcc.target/arm/acle/crc32h.c: Likewise.
	* gcc.target/arm/acle/crc32w.c: Likewise.
	* gcc.target/arm/acle/crc32d.c: Likewise.
	* gcc.target/arm/acle/crc32cb.c: Likewise.
	* gcc.target/arm/acle/crc32ch.c: Likewise.
	* gcc.target/arm/acle/crc32cw.c: Likewise.
	* gcc.target/arm/acle/crc32cd.c: Likewise.

From-SVN: r206128
 2013-12-19 17:55:38 +00:00
Kyrylo Tkachov
cd494e4d43 ef_error.c: Use -fopen-simd. 
2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* c-c++-common/cilk-plus/SE/ef_error.c: Use -fopen-simd.

From-SVN: r206127
 2013-12-19 17:05:42 +00:00
Christophe Lyon
8b0497def2 Fix comment in gcc/config/arm/predicates.md 
From-SVN: r206126
 2013-12-19 17:55:40 +01:00
Charles Baylis
9f178d6abb re PR target/59142 (internal compiler error while compiling OpenCV 2.4.7) 
2013-12-19  Charles Baylis  <charles.baylis@linaro.org>

	PR target/59142
	gcc/
	* config/arm/arm-ldmstm.ml: Use low_register_operand for Thumb
	patterns.
	* config/arm/ldmstm.md: Regenerate.

From-SVN: r206125
 2013-12-19 17:54:16 +01:00
Charles Baylis
0315864862 re PR target/59142 (internal compiler error while compiling OpenCV 2.4.7) 
2013-12-19  Charles Baylis  <charles.baylis@linaro.org>

	PR target/59142
	gcc/
	* arm/predicates.md (arm_hard_general_register_operand): New
	predicate.
	(arm_hard_register_operand): Remove.
	* config/arm/arm-ldmstm.ml: Use arm_hard_general_register_operand
	for all patterns.
	* config/arm/ldmstm.md: Regenerate.

From-SVN: r206124
 2013-12-19 17:51:35 +01:00
Christophe Lyon
315d7bd411 re PR target/59142 (internal compiler error while compiling OpenCV 2.4.7) 
2013-12-19  Charles Baylis  <charles.baylis@linaro.org>

	PR target/59142
	* config/arm/predicates.md (vfp_hard_register_operand): New predicate.
	* config/arm/arm.md (vfp_pop_multiple_with_writeback): Use
	vfp_hard_register_operand.

From-SVN: r206123
 2013-12-19 17:32:04 +01:00
Oleg Endo
fa33bba7b0 Remove gcc/testsuite/ prefixes. 
From-SVN: r206122
 2013-12-19 15:59:17 +00:00
Oleg Endo
a7e8a0c1d0 long-long-compare-1.c: Don't use deprecated -mcbranchdi option for target sh4-*-*. 
* gcc.dg/long-long-compare-1.c: Don't use deprecated -mcbranchdi option
	for target sh4-*-*.

From-SVN: r206121
 2013-12-19 15:45:35 +00:00
Tejas Belagod
7baa225d39 Implement support for AArch64 Crypto PMULL.64. 
gcc/
	* config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins):
	Define builtin types for poly64_t poly128_t.
	(TYPES_BINOPP, aarch64_types_binopp_qualifiers): New.
	* aarch64/aarch64-simd-builtins.def: Update builtins table.
	* config/aarch64/aarch64-simd.md (aarch64_crypto_pmulldi,
	aarch64_crypto_pmullv2di): New.
	* config/aarch64/aarch64.c (aarch64_simd_mangle_map): Update table for
	poly64x2_t mangler.
	* config/aarch64/arm_neon.h (poly64x2_t, poly64_t, poly128_t): Define.
	(vmull_p64, vmull_high_p64): New.
	* config/aarch64/iterators.md (UNSPEC_PMULL<2>): New.

testsuite/

	* gcc.target/aarch64/pmull_1.c: New.

From-SVN: r206120
 2013-12-19 15:04:19 +00:00
Tejas Belagod
b9cb0a44c1 Implement support for AArch64 Crypto SHA256. 
gcc/
	* config/aarch64/aarch64-simd-builtins.def: Update builtins table.
	* config/aarch64/aarch64-simd.md (aarch64_crypto_sha256h<sha256_op>v4si,
	aarch64_crypto_sha256su0v4si, aarch64_crypto_sha256su1v4si): New.
	* config/aarch64/arm_neon.h (vsha256hq_u32, vsha256h2q_u32,
	vsha256su0q_u32, vsha256su1q_u32): New.
	* config/aarch64/iterators.md (UNSPEC_SHA256H<2>, UNSPEC_SHA256SU<01>):
	New.
	(CRYPTO_SHA256): New int iterator.
	(sha256_op): New int attribute.

testsuite/
	* gcc.target/aarch64/sha256_1.c: New.

From-SVN: r206119
 2013-12-19 15:00:53 +00:00
Tejas Belagod
3044268251 Implement support for AArch64 Crypto SHA1. 
gcc/
	* config/aarch64/aarch64-simd-builtins.def: Update builtins table.
	* config/aarch64/aarch64-builtins.c (aarch64_types_ternopu_qualifiers,
	TYPES_TERNOPU): New.
	* config/aarch64/aarch64-simd.md (aarch64_crypto_sha1hsi,
	aarch64_crypto_sha1su1v4si, aarch64_crypto_sha1<sha1_op>v4si,
	aarch64_crypto_sha1su0v4si): New.
	* config/aarch64/arm_neon.h (vsha1cq_u32, sha1mq_u32, vsha1pq_u32,
	vsha1h_u32, vsha1su0q_u32, vsha1su1q_u32): New.
	* config/aarch64/iterators.md (UNSPEC_SHA1<CPMH>, UNSPEC_SHA1SU<01>):
	New.
	(CRYPTO_SHA1): New int iterator.
	(sha1_op): New int attribute.

testsuite/
	* gcc.target/aarch64/sha1_1.c: New.

From-SVN: r206118
 2013-12-19 14:55:47 +00:00
Tejas Belagod
5a7a4e8064 Implement support for AArch64 Crypto AES. 
gcc/
	* config/aarch64/aarch64-simd-builtins.def: Update builtins table.
	* config/aarch64/aarch64-builtins.c (aarch64_types_binopu_qualifiers,
	TYPES_BINOPU): New.
	* config/aarch64/aarch64-simd.md (aarch64_crypto_aes<aes_op>v16qi,
	aarch64_crypto_aes<aesmc_op>v16qi): New.
	* config/aarch64/arm_neon.h (vaeseq_u8, vaesdq_u8, vaesmcq_u8,
	vaesimcq_u8): New.
	* config/aarch64/iterators.md (UNSPEC_AESE, UNSPEC_AESD, UNSPEC_AESMC,
	UNSPEC_AESIMC): New.
	(CRYPTO_AES, CRYPTO_AESMC): New int iterators.
	(aes_op, aesmc_op): New int attributes.

testsuite/
	* gcc.target/aarch64/aes_1.c: New.

From-SVN: r206117
 2013-12-19 14:51:28 +00:00
Yury Gribov
26b086810a mklog: Split generated message in parts. 
2013-12-19  Yury Gribov  <y.gribov@samsung.com>

	* mklog: Split generated message in parts.

From-SVN: r206116
 2013-12-19 14:50:05 +00:00
Tejas Belagod
9783e5984b Introduce AArch64 Crypto instruction types. 
* config/arm/types.md (neon_mul_d_long, crypto_aes, crypto_sha1_xor,
	crypto_sha1_fast, crypto_sha1_slow, crypto_sha256_fast,
	crypto_sha256_slow): New.

From-SVN: r206115
 2013-12-19 14:44:55 +00:00
Tejas Belagod
afb582f10f Define TARGET_CRYPTO for AArch64. 
* config/aarch64/aarch64.h (TARGET_CRYPTO): New.
	(__ARM_FEATURE_CRYPTO): Define if TARGET_CRYPTO is true.

From-SVN: r206114
 2013-12-19 14:41:52 +00:00
Kostya Serebryany
409f3b4663 libsanitizer: fix build on Mac 10.6 
From-SVN: r206113
 2013-12-19 12:54:11 +00:00
Dominik Vogt
d0de9e136f s390.c (s390_hotpatch_trampoline_halfwords_default): New constant 
2013-12-19  Dominik Vogt  <vogt@linux.vnet.ibm.com>
	    Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/s390.c (s390_hotpatch_trampoline_halfwords_default): New
	constant
	(s390_hotpatch_trampoline_halfwords_max): New constant
	(s390_hotpatch_trampoline_halfwords): New static variable
	(get_hotpatch_attribute): New function
	(s390_handle_hotpatch_attribute): New function
	(s390_attribute_table): New target specific attribute table to implement
	the hotpatch attribute
	(s390_option_override): Parse hotpatch options
	(s390_function_num_hotpatch_trampoline_halfwords): New function
	(s390_can_inline_p): Implement target hook to
	suppress hotpatching for explicitly inlined functions
	(s390_asm_output_function_label): Generate hotpatch prologue
	(TARGET_ATTRIBUTE_TABLE): Define to implement target attribute table
	(TARGET_CAN_INLINE_P): Define to implement target hook
	* config/s390/s390.opt (mhotpatch): New options -mhotpatch, -mhotpatch=
	* config/s390/s390-protos.h (s390_asm_output_function_label): Add
	prototype
	* config/s390/s390.h (ASM_OUTPUT_FUNCTION_LABEL): Target specific
	function label generation for hotpatching
	(FUNCTION_BOUNDARY): Align functions to eight bytes
	* doc/extend.texi: Document hotpatch attribute
	* doc/invoke.texi: Document -mhotpatch option

2013-12-19  Dominik Vogt  <vogt@linux.vnet.ibm.com>
	    Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gcc/testsuite/gcc.target/s390/hotpatch-1.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-2.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-3.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-4.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-5.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-6.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-7.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-8.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-9.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-10.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-11.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-12.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-compile-1.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-compile-2.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-compile-3.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-compile-4.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-compile-5.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-compile-6.c: New test
	* gcc/testsuite/gcc.target/s390/hotpatch-compile-7.c: New test



Co-Authored-By: Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

From-SVN: r206111
 2013-12-19 12:00:43 +00:00
Ganesh Gopalasubramanian
2f62165dce Enable TARGET_LOOP_UNROLL_ADJUST for bdver3/bdver4 
From-SVN: r206110
 2013-12-19 11:04:43 +00:00
Kyrylo Tkachov
f317df4f6d ef_error.c: Add fopenmp effective target check. 
2013-12-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

    * c-c++-common/cilk-plus/SE/ef_error.c: Add fopenmp effective
    target check.

From-SVN: r206109
 2013-12-19 10:33:15 +00:00
Marek Polacek
8409aed410 i386.c (ix86_parse_stringop_strategy_string): Remove variable alg. 
* config/i386/i386.c (ix86_parse_stringop_strategy_string): Remove
	variable alg.  Use index variable i directly.

From-SVN: r206108
 2013-12-19 10:25:34 +00:00
Eric Botcazou
ef39eedf9b print-tree.c (print_node): Print no_force_blk_flag for all types. 
* print-tree.c (print_node) <case tcc_type>: Print no_force_blk_flag
	for all types.

From-SVN: r206107
 2013-12-19 09:13:13 +00:00
Monk Chiang
cc1719e8a0 nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS): Consider TARGET_CPU_DEFAULT settings. 
2013-12-19  Monk Chiang  <sh.chiang04@gmail.com>

gcc/
	* common/config/nds32/nds32-common.c (TARGET_DEFAULT_TARGET_FLAGS):
	Consider TARGET_CPU_DEFAULT settings.

From-SVN: r206106
 2013-12-19 08:32:20 +00:00
GCC Administrator
4d8ba6ec06 Daily bump. 
From-SVN: r206105
 2013-12-19 00:16:30 +00:00
Steven G. Kargl
7b6b435332 read.c (read_f): Convert assert to runtime error. 
2013-12-18  Steven G. Kargl  <kargl@gcc.gnu.org>

	* io/read.c (read_f): Convert assert to runtime error.

2013-12-18  Steven G. Kargl  <kargl@gcc.gnu.org>

	* gfortran.dg/io_err_1.f90: New test.

From-SVN: r206102
 2013-12-18 23:41:50 +00:00
Janus Weil
7289d1c977 re PR fortran/59493 ([OOP] ICE: Segfault on Class(*) pointer association) 
2013-12-18  Janus Weil  <janus@gcc.gnu.org>

	PR fortran/59493
	* gfortran.h (gfc_find_intrinsic_vtab): Removed prototype.
	(gfc_find_vtab): New prototype.
	* class.c (gfc_find_intrinsic_vtab): Rename to 'find_intrinsic_vtab' and
	make static. Minor modifications.
	(gfc_find_vtab): New function.
	(gfc_class_initializer): Use new function 'gfc_find_vtab'.
	* check.c (gfc_check_move_alloc): Ditto.
	* expr.c (gfc_check_pointer_assign): Ditto.
	* interface.c (compare_actual_formal): Ditto.
	* resolve.c (resolve_allocate_expr, resolve_select_type): Ditto.
	* trans-expr.c (gfc_conv_intrinsic_to_class, gfc_trans_class_assign):
	Ditto.
	* trans-intrinsic.c (conv_intrinsic_move_alloc): Ditto.
	* trans-stmt.c (gfc_trans_allocate): Ditto.

From-SVN: r206101
 2013-12-18 23:00:53 +01:00
James Greenhalgh
f00f3b679e [AArch64 3/3 big.LITTLE] Add support for -mcpu=cortex-a57.cortex-a53 
gcc/

	* config/aarch64/aarch64-cores.def: Add support for
	-mcpu=cortex-a57.cortex-a53.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* doc/invoke.texi: Document -mcpu=cortex-a57.cortex-a53.

From-SVN: r206100
 2013-12-18 19:27:27 +00:00
James Greenhalgh
192ed1dd46 [AArch64 2/3 big.LITTLE] Allow tuning parameters without unique tuning targets. 
gcc/

	* config/aarch64/aarch64-cores.def: Add new column for
	SCHEDULER_IDENT.
	* config/aarch64/aarch64-opts.h (AARCH64_CORE): Handle
	SCHEDULER_IDENT.
	* config/aarch64/aarch64.c (AARCH64_CORE): Handle
	SCHEDULER_IDENT.
	(aarch64_parse_cpu): mcpu implies a default value for mtune.
	* config/aarch64/aarch64.h (AARCH64_CORE): Handle
	SCHEDULER_IDENT.

From-SVN: r206099
 2013-12-18 19:25:45 +00:00
James Greenhalgh
682287fb31 [AArch64 1/3 big.LITTLE] Driver rewriting of big.LITTLE names. 
gcc/

	* common/config/aarch64/aarch64-common.c
	(aarch64_rewrite_selected_cpu): New.
	(aarch64_rewrite_mcpu): New.
	* config/aarch64/aarch64-protos.h
	(aarch64_rewrite_selected_cpu): New.
	* config/aarch64/aarch64.h (BIG_LITTLE_SPEC): New.
	(BIG_LITTLE_SPEC_FUNCTIONS): Likewise.
	(ASM_CPU_SPEC): Likewise.
	(EXTRA_SPEC_FUNCTIONS): Likewise.
	(EXTRA_SPECS): Likewise.
	(ASM_SPEC): Likewise.
	* config/aarch64/aarch64.c (aarch64_start_file): Rewrite target
	CPU name.

From-SVN: r206098
 2013-12-18 19:21:45 +00:00
Balaji V. Iyer
a5dcac11d5 Forgot to add a changelog entry for previous commit. Added here. 
gcc/cp/ChangeLog.
2013-12-18  Balaji V. Iyer  <balaji.v.iyer@intel.com>

        * parser.c (cp_parser_cilk_simd_clause_name): Changed cilk_clause_name
        to omp_clause_name.

From-SVN: r206096
 2013-12-18 11:04:04 -08:00
Balaji V. Iyer
41958c2823 Added support for Cilk Plus SIMD-enabled function for C. 
+++ gcc/ChangeLog 
+2013-12-18  Balaji V. Iyer  <balaji.v.iyer@intel.com>
+
+       * omp-low.c (simd_clone_clauses_extract): Replaced the string
+       "cilk simd elemental" with "cilk simd function."
+       * config/i386/i386.c (ix86_simd_clone_compute_vecsize_and_simdlen):
+       Removed a carriage-return from a warning string.
+
+++ gcc/c-family/ChangeLog
+2013-12-18  Balaji V. Iyer  <balaji.v.iyer@intel.com>
+
+       * c-common.c (c_common_attribute_table): Added "cilk simd function"
+       attribute.
+       * c-pragma.h (enum pragma_cilk_clause): Remove.
+       (enum pragma_omp_clause):  Added the following fields:
+       PRAGMA_CILK_CLAUSE_NOMASK, PRAGMA_CILK_CLAUSE_MASK,
+       PRAGMA_CILK_CLAUSE_VECTORLENGTH, PRAGMA_CILK_CLAUSE_NONE,
+       PRAGMA_CILK_CLAUSE_LINEAR, PRAGMA_CILK_CLAUSE_PRIVATE,
+       PRAGMA_CILK_CLAUSE_FIRSTPRIVATE, PRAGMA_CILK_CLAUSE_LASTPRIVATE,
+       PRAGMA_CILK_CLAUSE_UNIFORM.
+
+

+++ gcc/c/ChangeLog
+2013-12-18  Balaji V. Iyer  <balaji.v.iyer@intel.com>
+
+       * c-parser.c (struct c_parser::cilk_simd_fn_tokens): Added new field.
+       (c_parser_declaration_or_fndef): Added a check if cilk_simd_fn_tokens
+       field in parser is not empty.  If not-empty, call the function
+       c_parser_finish_omp_declare_simd.
+       (c_parser_cilk_clause_vectorlength): Modified function to be shared
+       between SIMD-enabled functions and #pragma simd.  Added new parameter.
+       (c_parser_cilk_all_clauses): Modified the usage of the function
+       c_parser_cilk_clause_vectorlength as mentioned above.
+       (c_parser_cilk_simd_fn_vector_attrs): New function.
+       (c_finish_cilk_simd_fn_tokens): Likewise.
+       (is_cilkplus_vector_p): Likewise.
+       (c_parser_omp_clause_name): Added checking for "vectorlength,"
+       "nomask," and "mask" strings in clause name.
+       (c_parser_omp_all_clauses): Added 3 new case statements:
+       PRAGMA_CILK_CLAUSE_VECTORLENGTH, PRAGMA_CILK_CLAUSE_MASK and
+       PRAGMA_CILK_CLAUSE_NOMASK.
+       (c_parser_attributes): Added a cilk_simd_fn_tokens parameter.  Added a
+       check for vector attribute and if so call the function
+       c_parser_cilk_simd_fn_vector_attrs.  Also, when Cilk plus is enabled,
+       called the function c_finish_cilk_simd_fn_tokens.
+       (c_finish_omp_declare_simd): Added a check if cilk_simd_fn_tokens 
in
+       parser field is non-empty.  If so, parse them as you would parse
+       the omp declare simd pragma.
+       (c_parser_omp_clause_linear): Added a new bool parm. is_cilk_simd_fn.
+       Added a check when step is a parameter and flag it as error.
+       (CILK_SIMD_FN_CLAUSE_MASK): New #define.
+       (c_parser_cilk_clause_name): Changed pragma_cilk_clause to
+       pragma_omp_clause.
+


+++ gcc/testsuite/ChangeLog  
+2013-12-18  Balaji V. Iyer  <balaji.v.iyer@intel.com>
+
+       * c-c++-common/cilk-plus/SE/ef_test.c: New test.
+       * c-c++-common/cilk-plus/SE/ef_test2.c: Likewise.
+       * c-c++-common/cilk-plus/SE/vlength_errors.c: Likewise.
+       * c-c++-common/cilk-plus/SE/ef_error.c: Likewise.
+       * c-c++-common/cilk-plus/SE/ef_error2.c: Likewise.
+       * c-c++-common/cilk-plus/SE/ef_error3.c: Likewise.
+       * gcc.dg/cilk-plus/cilk-plus.exp: Added calls for the above tests.
+

From-SVN: r206095
 2013-12-18 11:00:21 -08:00
Joseph Myers
9651142d1e * pt_BR.po: New. 
From-SVN: r206093
 2013-12-18 18:15:09 +00:00
Aldy Hernandez
9d5879a631 passes.c (execute_function_dump): Set graph_dump_initialized appropriately. 
* passes.c (execute_function_dump): Set graph_dump_initialized
	appropriately.
	(pass_init_dump_file): Similarly.
	(execute_one_pass): Pass new argument to do_per_function.
	* tree-pass.h (class opt_pass): New field graph_dump_initialized.

From-SVN: r206092
 2013-12-18 17:38:07 +00:00
Aldy Hernandez
50e6a1482b tree-ssa.texi (SSA Operands): Remove reference to SSA_OP_VMAYUSE. 
* doc/tree-ssa.texi (SSA Operands): Remove reference to
	SSA_OP_VMAYUSE.
	Synchronize SSA_OP* definitions with source.
	* ssa-iterators.h: Fix comment for FOR_EACH_IMM_USE_STMT.
	Add not to SSA_OP* macro definitions.

From-SVN: r206091
 2013-12-18 17:32:07 +00:00
Jakub Jelinek
90be6e465c re PR target/59539 (Missed optimisation: VEX-prefixed operations don't need aligned data) 
PR target/59539
	* config/i386/sse.md
	(<sse>_loadu<ssemodesuffix><avxsizesuffix><mask_name>,
	<sse2_avx_avx512f>_loaddqu<mode><mask_name>): New expanders,
	prefix existing define_insn names with *.

	* gcc.target/i386/pr59539-1.c: New test.
	* gcc.target/i386/pr59539-2.c: New test.

From-SVN: r206090
 2013-12-18 17:50:06 +01:00
Nick Clifton
69aeb34f52 * gcc.dg/pr32912-2.c: Fix for 16-bit targets. 
From-SVN: r206089
 2013-12-18 15:29:47 +00:00
Eric Botcazou
871a3886a0 * config/arm/arm.c (arm_expand_epilogue_apcs_frame): Fix thinko. 
From-SVN: r206087
 2013-12-18 15:15:03 +00:00
James Greenhalgh
0d78a2d4ca t-aprofile: Add cortex-a15.cortex-a7, cortex-a12, cortex-a57, cortex-a57.cortex-a53. 
2013-12-18  James Greenhalgh  <james.greenhalgh@arm.com>
              Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/arm/t-aprofile: Add cortex-a15.cortex-a7, cortex-a12,
	cortex-a57, cortex-a57.cortex-a53.


Co-Authored-By: Kyrylo Tkachov <kyrylo.tkachov@arm.com>

From-SVN: r206086
 2013-12-18 13:25:58 +00:00
Eric Botcazou
a4d47cacbd re PR debug/59418 (ICE in maybe_record_trace_start, at dwarf2cfi.c:2221) 
PR debug/59418
	* dwarf2cfi.c (dwarf2out_frame_debug_cfa_offset): Fix comment and tidy.
	(dwarf2out_frame_debug_cfa_restore): Handle TARGET_DWARF_REGISTER_SPAN.
	(dwarf2out_frame_debug_expr): Tidy.

From-SVN: r206084
 2013-12-18 10:34:00 +00:00