Commit Graph

171510 Commits

Author SHA1 Message Date
Richard Henderson 58d169ba9f aarch64: Configure for sys/auxv.h in libgcc for lse-init.c
PR target/91833
	* config/aarch64/lse-init.c: Include auto-target.h.  Disable
	initialization if !HAVE_SYS_AUXV_H.
	* configure.ac (AC_CHECK_HEADERS): Add sys/auxv.h.
	* config.in, configure: Rebuild.

From-SVN: r276134
2019-09-25 15:51:55 -07:00
Richard Henderson 88a51d68c4 aarch64: Fix store-exclusive in load-operate LSE helpers
PR target/91834
	* config/aarch64/lse.S (LDNM): Ensure STXR output does not
	overlap the inputs.

From-SVN: r276133
2019-09-25 14:48:41 -07:00
David Malcolm 736a6efc4f Colorize %L and %C text to match diagnostic_show_locus (PR fortran/91426)
gcc/fortran/ChangeLog:
	PR fortran/91426
	* error.c (curr_diagnostic): New static variable.
	(gfc_report_diagnostic): New static function.
	(gfc_warning): Replace call to diagnostic_report_diagnostic with
	call to gfc_report_diagnostic.
	(gfc_format_decoder): Colorize the text of %L and %C to match the
	colorization used by diagnostic_show_locus.
	(gfc_warning_now_at): Replace call to diagnostic_report_diagnostic with
	call to gfc_report_diagnostic.
	(gfc_warning_now): Likewise.
	(gfc_warning_internal): Likewise.
	(gfc_error_now): Likewise.
	(gfc_fatal_error): Likewise.
	(gfc_error_opt): Likewise.
	(gfc_internal_error): Likewise.

From-SVN: r276132
2019-09-25 19:32:44 +00:00
Martin Jambor b867051636 Remove newly unused function and variable in tree-sra
Hi,

Martin and his clang warnings discovered that I forgot to remove a
static inline function and a variable when ripping out the old IPA-SRA
from tree-sra.c and both are now unused.  Thus I am doing that now
with the patch below which I will commit as obvious (after including
it in a round of a bootstrap and testing on an x86_64-linux).

Thanks,

Martin

2019-09-25  Martin Jambor  <mjambor@suse.cz>

	* tree-sra.c (no_accesses_p): Remove.
	(no_accesses_representant): Likewise.

From-SVN: r276128
2019-09-25 16:24:33 +02:00
Marek Polacek b134cab0cf PR c++/91877 - ICE with converting member of packed struct.
* call.c (convert_like_real): Use similar_type_p in an assert.

	* g++.dg/conversion/packed1.C: New test.

From-SVN: r276127
2019-09-25 13:53:04 +00:00
Kyrylo Tkachov 9a3afc3564 [AArch64] Use implementation namespace consistently in arm_neon.h
We're somewhat inconsistent in arm_neon.h when it comes to using the implementation namespace for local
identifiers. This means things like:
#define hash_abcd 0
#define hash_e 1
#define wk 2

#include "arm_neon.h"

uint32x4_t
foo (uint32x4_t a, uint32_t b, uint32x4_t c)
{
  return vsha1cq_u32 (a, b, c);
}

don't compile.
This patch fixes these issues throughout the whole of arm_neon.h
Bootstrapped and tested on aarch64-none-linux-gnu.
The advsimd-intrinsics.exp tests pass just fine.

From-SVN: r276125
2019-09-25 13:40:20 +00:00
Richard Biener fadb01364d re PR tree-optimization/91896 (ICE in vect_get_vec_def_for_stmt_copy, at tree-vect-stmts.c:1687)
2019-09-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91896
	* tree-vect-loop.c (vectorizable_reduction): The single
	def-use cycle optimization cannot apply when there's more
	than one pattern stmt involved.

	* gcc.dg/torture/pr91896.c: New testcase.

From-SVN: r276123
2019-09-25 13:09:25 +00:00
Shaokun Zhang 761e6bb9f7 [AARCH64] Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC
The DCache clean & ICache invalidation requirements for instructions
to be data coherence are discoverable through new fields in CTR_EL0.
Let's support the two bits if they are enabled, the CPU core will
not execute the unnecessary DCache clean or Icache Invalidation
instructions.

2019-09-25  Shaokun Zhang  <zhangshaokun@hisilicon.com>

	* config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Add support for
	CTR_EL0.IDC and CTR_EL0.DIC.

From-SVN: r276122
2019-09-25 12:38:59 +00:00
Jonathan Wakely 21f7f9980c Implement LWG 3296 for basic_regex::assign
* include/bits/regex.h
	(basic_regex::assign(const C*, size_t, flag_type)): Add default
	argument (LWG 3296).
	* testsuite/28_regex/basic_regex/assign/char/lwg3296.cc: New test.
	* testsuite/28_regex/basic_regex/assign/wchar_t/lwg3296.cc: New test.

From-SVN: r276121
2019-09-25 13:31:53 +01:00
Martin Liska 48bea5dff4 Move a target test-case to generic folder.
2019-09-25  Martin Liska  <mliska@suse.cz>

	* gcc.target/s390/pr91014.c: Move to ...
	* gcc.dg/pr91014.c: ... this.

From-SVN: r276120
2019-09-25 10:07:11 +00:00
Paolo Carlini a4cd9ac5f0 name-lookup.c (check_extern_c_conflict): Use DECL_SOURCE_LOCATION.
/cp
2019-09-25  Paolo Carlini  <paolo.carlini@oracle.com>

	* name-lookup.c (check_extern_c_conflict): Use DECL_SOURCE_LOCATION.
	(check_local_shadow): Use it in three additional places.

/testsuite
2019-09-25  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.dg/diagnostic/redeclaration-1.C: New.
	* g++.dg/lookup/extern-c-hidden.C: Test location(s) too.
	* g++.dg/lookup/extern-c-redecl.C: Likewise.
	* g++.dg/lookup/extern-c-redecl6.C: Likewise.
	* g++.old-deja/g++.other/using9.C: Likewise.

From-SVN: r276119
2019-09-25 08:50:29 +00:00
Jason Merrill 1ed0d9f8de Fix location of dependent member CALL_EXPR.
The break here was skipping over the code that sets EXPR_LOCATION on the
call expressions, for no good reason.

	* parser.c (cp_parser_postfix_expression): Do set location of
	dependent member call.

From-SVN: r276112
2019-09-24 23:27:26 -04:00
GCC Administrator a20673a560 Daily bump.
From-SVN: r276111
2019-09-25 00:16:42 +00:00
Iain Sandoe dd9ed09905 [Darwin, PPC, Mode Iterators 1/n] Use mode iterators in picbase patterns.
This switches the picbase load and reload patterns to use the 'P' mode
iterator instead of writing an SI and DI pattern for each.

gcc/ChangeLog:

2019-09-24  Iain Sandoe  <iain@sandoe.co.uk>

	* config/rs6000/rs6000.md (load_macho_picbase_<mode>): New, using
	the 'P' mode iterator, replacing the (removed) SI and DI variants.
	(reload_macho_picbase_<mode>): Likewise.

From-SVN: r276107
2019-09-24 19:28:08 +00:00
Iain Sandoe 42eb48017d [Darwin, PPC, Mode Iterators 0/n] Make iterators visible to darwin.md.
As a clean-up, we want to be able to use mode iterators in darwin.md.
This patch moves the include point for the Darwin include until after
the definition of the mode iterators and attrs.  No functional change
intended.

gcc/ChangeLog:

2019-09-24  Iain Sandoe  <iain@sandoe.co.uk>

	* config/rs6000/rs6000.md: Move darwin.md include until
	after the definition of the mode iterators.

From-SVN: r276106
2019-09-24 19:15:01 +00:00
Martin Sebor 931631924b PR tree-optimization/91570 - ICE in get_range_strlen_dynamic on a conditional
PR tree-optimization/91570 - ICE in get_range_strlen_dynamic on a conditional
of two strings

gcc/Changelog:
	* tree-ssa-strlen.c (get_range_strlen_dynamic): Handle null and
	non-constant minlen, maxlen and maxbound.

gcc/testsuite/Changelog:
	* gcc.dg/pr91570.c: New test.

From-SVN: r276105
2019-09-24 13:04:54 -06:00
Marek Polacek a0aedc7a41 PR c++/91868 - improve -Wshadow location.
* name-lookup.c (check_local_shadow): Use DECL_SOURCE_LOCATION
	instead of input_location.

	* g++.dg/warn/Wshadow-16.C: New test.

From-SVN: r276103
2019-09-24 14:40:24 +00:00
Marek Polacek fea3397e56 PR c++/91845 - ICE with invalid pointer-to-member.
* expr.c (mark_use): Use error_operand_p.
	* typeck2.c (build_m_component_ref): Check error_operand_p after
	calling mark_[lr]value_use.

	* g++.dg/cpp1y/pr91845.C: New test.

From-SVN: r276102
2019-09-24 14:38:53 +00:00
Jonathan Wakely fe69bee34c Remove check for impossible condition in std::variant::index()
The __index_type is only ever unsigned char or unsigned short, so not
the same type as size_t.

	* include/std/variant (variant::index()): Remove impossible case.

From-SVN: r276100
2019-09-24 15:17:08 +01:00
Richard Biener a7701dd161 tree-vectorizer.h (_stmt_vec_info::const_cond_reduc_code): Rename to...
2019-09-24  Richard Biener  <rguenther@suse.de>

	* tree-vectorizer.h (_stmt_vec_info::const_cond_reduc_code):
	Rename to...
	(_stmt_vec_info::cond_reduc_code): ... this.
	(_stmt_vec_info::induc_cond_initial_val): Add.
	(STMT_VINFO_VEC_CONST_COND_REDUC_CODE): Rename to...
	(STMT_VINFO_VEC_COND_REDUC_CODE): ... this.
	(STMT_VINFO_VEC_INDUC_COND_INITIAL_VAL): Add.
	* tree-vectorizer.c (vec_info::new_stmt_vec_info): Adjust.
	* tree-vect-loop.c (get_initial_def_for_reduction): Pass in
	the reduction code.
	(vect_create_epilog_for_reduction): Drop special
	induction condition reduction params, pass in reduction code
	and simplify.
	(vectorizable_reduction): Perform condition reduction kind
	selection only at analysis time.  Adjust passing on state.

From-SVN: r276099
2019-09-24 13:43:07 +00:00
Kyrylo Tkachov 01b9402c48 [AArch64] Don't split 64-bit constant stores to volatile location
The optimisation to optimise:
   typedef unsigned long long u64;

   void bar(u64 *x)
   {
     *x = 0xabcdef10abcdef10;
   }

from:
        mov     x1, 61200
        movk    x1, 0xabcd, lsl 16
        movk    x1, 0xef10, lsl 32
        movk    x1, 0xabcd, lsl 48
        str     x1, [x0]

into:
        mov     w1, 61200
        movk    w1, 0xabcd, lsl 16
        stp     w1, w1, [x0]

ends up producing two distinct stores if the destination is volatile:
  void bar(u64 *x)
  {
    *(volatile u64 *)x = 0xabcdef10abcdef10;
  }
        mov     w1, 61200
        movk    w1, 0xabcd, lsl 16
        str     w1, [x0]
        str     w1, [x0, 4]

because we end up not merging the strs into an stp. It's questionable whether the use of STP is valid for volatile in the first place.
To avoid unnecessary pain in a context where it's unlikely to be performance critical [1] (use of volatile), this patch avoids this
transformation for volatile destinations, so we produce the original single STR-X.

Bootstrapped and tested on aarch64-none-linux-gnu.

[1] https://lore.kernel.org/lkml/20190821103200.kpufwtviqhpbuv2n@willie-the-truck/

	* config/aarch64/aarch64.md (mov<mode>): Don't call
	aarch64_split_dimode_const_store on volatile MEM.

	* gcc.target/aarch64/nosplit-di-const-volatile_1.c: New test.

From-SVN: r276098
2019-09-24 13:39:40 +00:00
Stam Markianos-Wright 937960dfd7 [GCC][PATCH][AArch64] Update hwcap string for fp16fml in aarch64-option-extensions.def
This is a minor patch that fixes the entry for the fp16fml feature in
GCC's aarch64-option-extensions.def.

As can be seen in the Linux sources here
https://github.com/torvalds/linux/blob/master/arch/arm64/kernel/cpuinfo.c#L69
the correct string is "asimdfhm", not "asimdfml".

Cross-compiled and tested on aarch64-none-linux-gnu.

2019-09-24  Stamatis Markianos-Wright  <stam.markianos-wright@arm.com>

	* config/aarch64/aarch64-option-extensions.def (fp16fml):
	Update hwcap string for fp16fml.

From-SVN: r276097
2019-09-24 13:31:04 +00:00
Jakub Jelinek 81b405828f re PR middle-end/91866 (Sign extend of an int is not recognized)
PR middle-end/91866
	* match.pd (((T)(A)) + CST -> (T)(A + CST)): Formatting fix.
	(((T)(A + CST1)) + CST2 -> (T)(A) + (T)CST1 + CST2): New optimization.

	* gcc.dg/tree-ssa/pr91866.c: New test.

From-SVN: r276096
2019-09-24 14:45:13 +02:00
Martin Liska 90acd49f6b Use more switch statements.
2019-09-24  Martin Liska  <mliska@suse.cz>

	* cfgexpand.c (gimple_assign_rhs_to_tree): Use switch statement
	instead of if-elseif-elseif-...
	* gimple-expr.c (extract_ops_from_tree): Likewise.
	* gimple.c (get_gimple_rhs_num_ops): Likewise.
	* tree-ssa-forwprop.c (rhs_to_tree): Likewise.

From-SVN: r276095
2019-09-24 11:38:29 +00:00
Martin Jambor 231f75463c [PR 91831] Copy PARM_DECLs of artificial thunks
Hi,

I am quite surprised I did not catch this before but the new
ipa-param-manipulation does not copy PARM_DECLs when creating
artificial thinks (I think it originally did but then I somehow
removed during one cleanups).  Fixed by adding the capability at the
natural place.  It is triggered whenever context of the PARM_DECL that
is just taken from the original function does not match the target
fndecl rather than by some constructor parameter because in such
situation it is always the correct thing to do.

Bootstrapped and tested on x86_64-linux.  OK for trunk?

Thanks,

Martin

2019-09-24  Martin Jambor  <mjambor@suse.cz>

	PR ipa/91831
	* ipa-param-manipulation.c (carry_over_param): Make a method of
	ipa_param_body_adjustments, remove now unnecessary argument.  Also copy
	in case of a context mismatch.
	(ipa_param_body_adjustments::common_initialization): Adjust call to
	carry_over_param.
	* ipa-param-manipulation.h (class ipa_param_body_adjustments): Add
	private method carry_over_param.

	testsuite/
	* g++.dg/ipa/pr91831.C: New test.

From-SVN: r276094
2019-09-24 13:20:57 +02:00
Martin Jambor 5a4d0da4f5 [PR 91832] Do not ICE on negative offsets in ipa-sra
Hi,

IPA-SRA asserts that an offset obtained from get_ref_base_and_extent
is non-negative (after it verifies it is based on a parameter).  That
assumption is invalid as the testcase shows.  One could probably also write a
testcase with defined behavior, but unless I see a reasonable one
where the transformation is really desirable, I'd like to just punt on
those cases.

Bootstrapped and tested on x86_64-linux.  OK for trunk?

Thanks,

Martin

2019-09-24  Martin Jambor  <mjambor@suse.cz>

	PR ipa/91832
	* ipa-sra.c (scan_expr_access): Check that offset is non-negative.

	testsuite/
	* gcc.dg/ipa/pr91832.c: New test.

From-SVN: r276093
2019-09-24 13:16:57 +02:00
Richard Biener 3f9e08f57e tree-ssa-sccvn.c (vn_reference_lookup_3): Valueize MEM_REF base.
2019-09-24  Richard Biener  <rguenther@suse.de>

	* tree-ssa-sccvn.c (vn_reference_lookup_3): Valueize MEM_REF
	base.

	* gcc.dg/torture/20190924-1.c: New testcase.

From-SVN: r276092
2019-09-24 10:10:49 +00:00
Jonathan Wakely 47d17f7058 PR libstdc++/91871 fix Clang warnings in testsuite
PR libstdc++/91871
	* testsuite/util/testsuite_hooks.h
	(conversion::iterator_to_const_iterator()): Do not return an invalid
	iterator. Test direct-initialization and direct-list-initialization
	as well as implicit conversion.

From-SVN: r276091
2019-09-24 11:09:18 +01:00
GCC Administrator 18b86eda6f Daily bump.
From-SVN: r276089
2019-09-24 00:16:40 +00:00
Maciej W. Rozycki 0ca2b1f3d8 GNAT/testsuite: Pass the `ada' option to target compilation
Pass the `ada' option to DejaGNU's `target_compile' procedure, which by
default calls `default_target_compile', so that it arranges for an Ada
compilation rather the default of C.  We set the compiler to `gnatmake'
manually here, so that part of the logic in `default_target_compile' is
not used, but it affects other settings, such as the use of `adaflags'.

	gcc/testsuite/
	* lib/gnat.exp (gnat_target_compile): Pass the `ada' option to
	`target_compile'.

From-SVN: r276085
2019-09-23 23:19:29 +00:00
Carl Love a8cea25c73 RS6000, add xxswapd support
gcc/ChangeLog:

2019-09-23  Carl Love  <cel@us.ibm.com>

	* config/rs6000/vsx.md (xxswapd_v4si, xxswapd_v8hi, xxswapd_v16qi):
	New define_insn.
	(vsx_xxpermdi4_le_<mode> for VSX_W, vsx_xxpermdi8_le_V8HI,
	vsx_xxpermdi16_le_V16QI): Removed define_insn.

From-SVN: r276065
2019-09-23 20:08:13 +00:00
Paolo Carlini 0788210f80 pt.c (check_explicit_specialization): Use cp_expr_loc_or_input_loc.
/cp
2019-09-23  Paolo Carlini  <paolo.carlini@oracle.com>

	* pt.c (check_explicit_specialization): Use cp_expr_loc_or_input_loc.
	(process_partial_specialization): Likewise.
	(convert_nontype_argument_function): Likewise.
	(invalid_tparm_referent_p): Likewise.
	(convert_template_argument): Likewise.
	(check_valid_ptrmem_cst_expr): Tidy.

/testsuite
2019-09-23  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.dg/cpp0x/pr68724.C: Check location(s) too.
	* g++.dg/cpp0x/variadic38.C: Likewise.
	* g++.dg/cpp1z/nontype2.C: Likewise.
	* g++.dg/parse/explicit1.C: Likewise.
	* g++.dg/template/crash11.C: Likewise.
	* g++.dg/template/non-dependent8.C: Likewise.
	* g++.dg/template/nontype-array1.C: Likewise.
	* g++.dg/template/nontype3.C: Likewise.
	* g++.dg/template/nontype8.C: Likewise.
	* g++.dg/template/partial5.C: Likewise.
	* g++.dg/template/spec33.C: Likewise.
	* g++.old-deja/g++.pt/memtemp64.C: Likewise.
	* g++.old-deja/g++.pt/spec20.C: Likewise.
	* g++.old-deja/g++.pt/spec21.C: Likewise.
	* g++.old-deja/g++.robertl/eb103.C: Likewise.

From-SVN: r276064
2019-09-23 19:29:55 +00:00
Sandra Loosemore 7926a220d8 2019-09-23 Sandra Loosemore <sandra@codesourcery.com>
gcc/testsuite/
	* lib/target-supports.exp
	(check_effective_target_arm_vfp_ok_nocache): New.
	(check_effective_target_arm_vfp_ok): Rewrite.
	(add_options_for_arm_vfp): New.
	(add_options_for_sqrt_insn): Add options for arm.
	* gcc.target/arm/attr-neon-builtin-fail2.c: Use dg-add-options.
	* gcc.target/arm/short-vfp-1.c: Likewise.

From-SVN: r276063
2019-09-23 15:28:10 -04:00
Jason Merrill 33ba6ac391 PR c++/91809 - bit-field and ellipsis.
decay_conversion converts a bit-field access to its declared type, which
isn't what we want here; it even has a comment that the caller is expected
to have already used default_conversion to perform integral promotion.  This
function handles arithmetic promotion differently, but we still don't want
to call decay_conversion before that happens.

	* call.c (convert_arg_to_ellipsis): Don't call decay_conversion for
	arithmetic arguments.

From-SVN: r276059
2019-09-23 13:48:00 -04:00
Marek Polacek 1a09197cb1 PR c++/91844 - Implement CWG 2352, Similar types and reference binding.
* call.c (reference_related_p): Use similar_type_p instead of
	same_type_p.
	(reference_compatible_p): Update implementation to match CWG 2352.
	* cp-tree.h (similar_type_p): Declare.
	* typeck.c (similar_type_p): New.

	* g++.dg/cpp0x/pr33930.C: Add dg-error.
	* g++.dg/cpp0x/ref-bind1.C: New test.
	* g++.dg/cpp0x/ref-bind2.C: New test.
	* g++.dg/cpp0x/ref-bind3.C: New test.
	* g++.old-deja/g++.pt/spec35.C: Remove dg-error.

From-SVN: r276058
2019-09-23 17:37:54 +00:00
Kyrylo Tkachov ba2b30dc9f [arm] Add missing Makefile dependency on arm_acle_builtins.def
arm-builtins.o is missing a Makefile dependency on arm_acle_builtins.def
which can cause inconsistent rebuilds
when adding builtins in there.

This patch adds the right Makefile-foo to fix that.

	* config/arm/t-arm (arm-builtins.o): Add dependency on
	arm_acle_builtins.def.

From-SVN: r276057
2019-09-23 16:28:09 +00:00
Jonathan Wakely 1e8822d360 PR libstdc++/91788 improve codegen for std::variant<T...>::index()
If __index_type is a smaller type than size_t, then the result of
size_t(__index_type(-1)) is not equal to size_t(-1), but to an incorrect
value such as size_t(255) or size_t(65535). The old implementation of
variant<T...>::index() uses (size_t(__index_type(_M_index + 1)) - 1)
which is always correct, but generates suboptimal code for many common
cases.

When the __index_type is size_t or valueless variants are not possible
we can just return the value directly.

When the number of alternatives is sufficiently small the result of
converting the _M_index value to the corresponding signed type will be
either non-negative or -1. In those cases converting to the signed type
and then to size_t will either produce the correct positive value or
will sign extend -1 to (size_t)-1 as desired.

For the remaining case we keep the existing arithmetic operations to
ensure the correct result.

	PR libstdc++/91788 (partial)
	* include/std/variant (variant::index()): Improve codegen for cases
	where conversion to size_t already works correctly.

From-SVN: r276056
2019-09-23 16:54:16 +01:00
Richard Sandiford fa87544ca1 Fix non-canonical CONST_INTs in altivec_copysign_v4sf3 (PR91823)
The pattern was generating zero-extended rather than sign-extended
CONST_INTs.

2019-09-23  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR target/91823
	* config/rs6000/altivec.md (altivec_copysign_v4sf3): Generate
	canonical CONST_INTs.  Use gen_rtvec.

From-SVN: r276055
2019-09-23 11:56:47 +00:00
Richard Biener d469a71e5a tree-vect-loop.c (get_initial_def_for_reduction): Simplify, avoid adjusting by + 0 or * 1.
2019-09-23  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.c (get_initial_def_for_reduction): Simplify,
	avoid adjusting by + 0 or * 1.
	(vect_create_epilog_for_reduction): Get reduction code only
	when necessary.  Deal with adjustment_def only when necessary.

From-SVN: r276054
2019-09-23 10:21:45 +00:00
Rainer Orth 4d411f1ff7 Skip gcc.dg/ucnid-5-utf8.c unless ucn is supported
* gcc.dg/ucnid-5-utf8.c: Skip unless ucn is supported.

From-SVN: r276053
2019-09-23 09:29:21 +00:00
Richard Sandiford 3a30d2558b [AArch64] Fix memmodel index in aarch64_store_exclusive_pair
Found via an rtx checking failure.

2019-09-23  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/atomics.md (aarch64_store_exclusive_pair): Fix
	memmodel index.

From-SVN: r276052
2019-09-23 09:24:03 +00:00
Paul Thomas 158ab20432 re PR fortran/91729 (ICE in gfc_match_select_rank, at fortran/match.c:6586)
2019-09-23  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/91729
	* match.c (gfc_match_select_rank): Initialise 'as' to NULL.
	Check for a symtree in the selector expression before trying to
	assign a value to 'as'. Revert to gfc_error and go to cleanup
	after setting a MATCH_ERROR.

2019-09-23  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/91729
	* gfortran.dg/select_rank_2.f90 : Add two more errors in foo2.
	* gfortran.dg/select_rank_3.f90 : New test.

From-SVN: r276051
2019-09-23 09:19:10 +00:00
Rainer Orth b7bb3d3580 Use underscore in IPA-SRA LTO section name (PR ipa/91835)
PR ipa/91835
	* lto-section-in.c (lto_section_name): Use "ipa_sra" instead of
	"ipa-sra".

From-SVN: r276050
2019-09-23 09:17:57 +00:00
Rainer Orth e254277236 Provide Task_Info.Number_Of_Processors on Solaris
gcc/ada:
	* libgnarl/s-osinte__solaris.ads (sysconf): Declare.
	(SC_NPROCESSORS_ONLN): Define.
	* libgnarl/s-tasinf__solaris.ads (Number_Of_Processors): Declare.
	* libgnarl/s-tasinf__solaris.adb (N_CPU): New variable.
	(Number_Of_Processors): New function.

	gcc/testsuite:
	* gnat.dg/system_info1.adb: Sort dg-do target list.
	Add *-*-solaris2.*.

From-SVN: r276049
2019-09-23 09:13:21 +00:00
Andreas Schwab 193410e311 * config/abi/post/riscv64-linux-gnu/baseline_symbols.txt: Update.
From-SVN: r276048
2019-09-23 08:33:10 +00:00
Eric Botcazou 09248547ab trans.c (Regular_Loop_to_gnu): Do not rotate the loop if -Og is enabled.
* gcc-interface/trans.c (Regular_Loop_to_gnu): Do not rotate the loop
	if -Og is enabled.
	(build_return_expr): Do not perform NRV if -Og is enabled.
	(Subprogram_Body_to_gnu): Likewise.
	(gnat_to_gnu) <N_Simple_Return_Statement>: Likewise.
	(Handled_Sequence_Of_Statements_to_gnu): Do not inline finalizers if
	-Og is enabled.
	* gcc-interface/utils.c (convert_to_index_type): Return early if -Og
	is enabled.

From-SVN: r276047
2019-09-23 08:31:52 +00:00
Eric Botcazou 8082999eb2 Fix typo
From-SVN: r276046
2019-09-23 08:28:36 +00:00
Eric Botcazou ec4a0d8377 trans.c (gnat_compile_time_expr_list): New variable.
* gcc-interface/trans.c (gnat_compile_time_expr_list): New variable.
	(Pragma_to_gnu): Rename local variable.  Save the (first) expression
	of pragma Compile_Time_{Error|Warning} for later processing.
	(Compilation_Unit_to_gnu): Process the expressions saved above.

From-SVN: r276045
2019-09-23 08:27:40 +00:00
Eric Botcazou ef5a9557bd trans.c (Attribute_to_gnu): Test Can_Use_Internal_Rep on the underlying type of the node.
* gcc-interface/trans.c (Attribute_to_gnu): Test Can_Use_Internal_Rep
	on the underlying type of the node.
	(Call_to_gnu): Likewise with the type of the prefix.

From-SVN: r276041
2019-09-23 08:08:08 +00:00
Eric Botcazou fdfa0e44b7 decl.c (components_to_record): Do not reorder fields in packed record types if...
* gcc-interface/decl.c (components_to_record): Do not reorder fields
	in packed record types if they contain fixed-size fields that cannot
	be laid out in a packed manner.

From-SVN: r276036
2019-09-23 07:45:58 +00:00