PR c++/17163
* pt.c (instantiate_decl): Do not try to apply
DECL_DECLARED_INLINED_P to a VAR_DECL.
PR c++/17163
* g++.dg/template/repo2.C: New test.
From-SVN: r86467
PR c/16180
* jump.c (duplicate_loop_exit_test): If the location reached by
the unconditional jump at the top of the loop is outside the loop,
then do not treat it as the exit test.
PR c/16180
* gcc.dg/loop-5.c: New test.
From-SVN: r86459
* ggc-zone.c (struc alloc_chunk): Rearrange flag bits and SIZE.
Remove TYPECODE.
(ggc_alloc_zone_1): Mark TYPE as unused. Don't save it in the chunk.
From-SVN: r86456
2004-08-23 Bryce McKinlay <mckinlay@redhat.com>
* prims.cc (JVMPI_NOTIFY_ALLOC): New macro. Call jvmpi_notify_alloc
only if jvmpi is enabled.
(jvmpi_notify_alloc): Don't check if jvmpi is enabled here.
(_Jv_AllocObjectNoFinalizer): Use JVMPI_NOTIFY_ALLOC.
(_Jv_AllocString): Likewise.
(_Jv_AllocPtrFreeObject): Likewise.
From-SVN: r86441
2004-08-22 Andrew Pinski <apinski@apple.com>
Revert:
2004-08-22 Andrew Pinski <apinski@apple.com>
PR c++/14029
* typeck.c (build_unary_op): Use &a.b if the foldded lowered
expression is not constant.
[[Split portion of a mixed commit.]]
From-SVN: r86431.2
* config/mips/mips.md (length): Don't use mips_fetch_insns for indexed
loads and stores.
(*lwxc1_<mode>, *ldxc1_<mode>, *swxc1_<mode>, *sdxc1_<mode>): Name
formerly unnamed patterns. Redefine using :P for the address. Remove
explicit length attributes.
From-SVN: r86419
* tree-ssa-loop-im.c (fem_single_reachable_address, for_each_memref):
New functions.
(single_reachable_address): Use them.
(schedule_sm): Add dump.
(is_call_clobbered_ref): New function.
(determine_lsm_reg): Check whether the reference is call clobbered.
Only work for gimple_reg_type values.
From-SVN: r86418
* config/mips/mips.md (UNSPEC_[LS][WD][LR]): Delete in favor of...
(UNSPEC_{LOAD,STORE}_{LEFT,RIGHT}): ...these new constants. Shuffle
later constants to cover the gap.
(load, store): New mode attributes.
(mov_l[wd]l, mov_l[wd]r, mov_s[wd]l, mov_s[wd]r): Redefine using :GPR.
Use new unspec constants.
From-SVN: r86414
* config/mips/mips.md (one_cmpl[sd]i2): Redefine using :GPR.
(and[sd]3, ior[sd]i3, xor[sd]i3): Likewise. Change 32-bit patterns
to use register_operand rather than uns_arith_operand as the predicate
for operand 1. Remove redundant MIPS16 force_reg() for operand 1.
(*and[sd]i3, *ior[sd]i3, *xor[sd]i3): Name formerly unnamed patterns.
Redefine using :GPR. Make same predicate change here. Extend the
commutativity of operands 1 and 2 from the SImode version to the
DImode one.
(*and[sd]i3_mips16, *ior[sd]i3_mips16, *xor[sd]i3_mips16): Likewise,
but with no predicate changes.
(*nor[sd]i3): Redefine using :GPR.
From-SVN: r86413
* config/mips/mips.h (ISA_HAS_DCLZ_DCLO): Delete.
* config/mips/mips.md (abs[sd]i2): Redefine using :GPR. Only use
branch-likely insns for absdi2 if GENERATE_BRANCHLIKELY. Use "%."
rather than "%z2" (with a fake const0_rtx for operand 2).
(ffs[sd]i2): Redefine using :GPR.
(clz[sd]i2): Likewise. Use ISA_HAS_CLO_CLZ for the 64-bit case.
From-SVN: r86409
* config/mips/mips.md (any_extend): New code macro.
(u, su): New code attributes.
({,u}mulsidi3, {,u}mulsidi3_32bit_internal, {,u}mulsidi3_32bit_r4000)
({u,s}mulsi3_highpart, {u,s}mulsi3_highpart_internal)
({u,s}mulsi3_highpart_mulhi_internal, {s,u}muldi3_highpart)
(*{s,u}mul_acc_di): Redefine using any_extend.
(*{,u}muls_di, *{s,u}msac_di): Likewise. Change names of patterns
to reflect real insn names.
(*mulsidi3_64bit, *mulsidi3_64bit_parts): Replace use of match_operator
with an any_extend template.
({u,s}mulsi3_highpart_neg_mulhi_internal): Redefine using any_extend.
Add '*' to name.
From-SVN: r86407
* config.gcc (mips-*-*): Remove definitions of MASK_GAS and
OBJECT_FORMAT_ELF. Set MASK_SPLIT_ADDR by default if using GNU ld.
* config/mips/mips.h (MASK_GAS): Delete. Shuffle later masks down.
(TARGET_GAS, TARGET_MIPS_AS): Delete.
(TARGET_GPWORD): Define to true for n32 on IRIX.
(TARGET_SWITCHES): Remove -mmips-as. Turn -mgas into a no-op.
(MIPS_AS_ASM_SPEC, SUBTARGET_MIPS_AS_ASM_SPEC): Delete.
(GAS_ASM_SPEC): Delete, folding into ASM_SPEC.
(ASM_ABI_DEFAULT_SPEC, TARGET_ASM_SPEC): Delete.
(MDEBUG_ASM_SPEC): Delete, folding into...
(SUBTARGET_ASM_DEBUGGING_SPEC): ...here.
(ASM_SPEC): Inline old GAS_ASM_SPEC. Use GNU names for ABI switches.
(EXTRA_SPECS): Remove mips_as_asm_spec, gas_asm_spec, target_asm_spec,
subtarget_mips_as_asm_spec, mdebug_asm_spec. Use MULTILIB_ABI_DEFAULT
to define asm_abi_default_spec.
(ASM_STABS_OP, ASM_STABN_OP, ASM_STABD_OP): Delete.
(TARGET_ASM_SELECT_SECTION): Delete.
* config/mips/mips.c (MIPS_MAX_FIRST_STACK_STEP): Define to 0x7ff0
for non-mips16 code, removing previous workaround for SGI assemblers.
(TARGET_ASM_INTEGER, mips_assemble_integer): Delete.
(TARGET_ASM_ALIGNED_DI_OP): Define this instead.
(override_options): Remove !TARGET_GAS and !have_named_sections code.
(print_operand): Fold TARGET_GAS conditionals into asm strings.
(mips_output_filename): Remove !TARGET_GAS code. Replace use of
ASM_STABS_OP and ASM_STABN_OP.
(mips_file_start): Remove TARGET_MIPS_AS/TARGET_GAS checks.
(mips_output_aligned_decl_common): Remove mention of SGI o32 assembler.
(mips_output_function_prologue): Remove !TARGET_GAS code.
(mips_select_rtx_section): Remove !have_named_sections code.
(mips_select_section): Delete.
* config/mips/mips.md (trap): Remove !TARGET_GAS check.
* config/mips/linux.h (TARGET_DEFAULT): Remove use of MASK_GAS.
* config/mips/sdb.h (PUT_SDB_DEF, PUT_SDB_PLAIN_DEF): Delete.
(PUT_SDB_BLOCK_START, PUT_SDB_BLOCK_END): Fold TARGET_GAS conditional.
* config/mips/vxworks.h (ASM_SPEC): As for mips.h.
* config/mips/windiss.h (ASM_SPEC): Likewise.
testsuite/
* gcc.dg/special/mips-abi.exp: Expect gcc to pass the GNU ABI flags
to the assembler. Simplify test accordingly.
(asm_abi_flags): Use GNU names.
(check_mips_abi, default_abi): Use string matches against "-mabi=*"
to check for ABI flags.
From-SVN: r86405
* read-rtl.c (map_value, mapping, macro_group): New structures.
(BELLWETHER_CODE): New macro.
(modes, codes, bellwether_codes): New variables.
(find_mode, uses_mode_macro_p, apply_mode_macro, find_code)
(uses_code_macro_p, apply_code_macro, apply_macro_to_string)
(apply_macro_to_rtx, uses_macro_p, add_condition_to_string)
(add_condition_to_rtx, apply_macro_traverse, add_mapping)
(add_map_value, initialize_macros): New functions.
(def_hash, def_hash_eq_p): Generalize to anything that points to,
or starts with, a char * field.
(find_macro, read_mapping, check_code_macro): New functions.
(read_rtx_1): New, split out from read_rtx. Handle the new
define_{mode,code}_{macro,attr} constructs. Use find_macro
to parse the name of a code or mode. Use BELLWETHER_CODE to
extract the format and to choose a suitable code for rtx_alloc.
Modify recursive invocations to use read_rtx_1.
(read_rtx): Call initialize_macros. Apply code and mode macros
to the rtx returned by read_rtx_1. Cache everything after the
first macro expansion for subsequent read_rtx calls.
* doc/md.texi: Document new .md constructs.
* config/mips/mips.md (GPR): New mode macro.
(d, si8_di5): New mode attributes.
(any_cond): New code macro.
(add[sd]i3): Redefine using :GPR.
(*add[sd]i3): Likewise, renaming from add[sd]i3_internal.
(*add[sd]i3_sp[12], *add<mode>3_mips16): Redefine using :GPR, naming
previously unnamed MIPS16 patterns.
(*addsi3_extended): Renamed from addsi3_internal_2. Fix overly long
lines. Don't match (plus (const_int 0) ...).
(*addsi3_extended_mips16): Name previously unnamed MIPS16 pattern.
Use a define_split to generate the addition.
(sub[sd]i3): Redefine using :GPR. Turn subsi3 into a define_insn.
(subsi3_internal): Delete.
(*subsi3_extended): Renamed from subsi3_internal_2.
(bunordered, bordered, bunlt, bunge, buneq, bltgt, bunle, bungt)
(beq, bne, bgt, bge, blt, ble, bgtu, bgeu, bltu, bleu): Redefine
using an any_cond template.
From-SVN: r86404
