PR tree-optimization/81365
* tree-ssa-phiprop.c (propagate_with_phi): When considering hoisting
aggregate moves onto bb predecessor edges, make sure there are no
loads that could alias the lhs in between the start of bb and the
loads from *phi.
* g++.dg/torture/pr81365.C: New test.
From-SVN: r250288
Backported from mainline
2017-06-30 Jakub Jelinek <jakub@redhat.com>
PR target/81225
* config/i386/sse.md (vec_extract_lo_<mode><mask_name>): For
V8FI, V16FI and VI8F_256 iterators, use <store_mask_predicate> instead
of nonimmediate_operand and <store_mask_constraint> instead of m for
the input operand. For V8FI iterator, always split if input is a MEM.
For V16FI and V8SF_256 iterators, don't test if both operands are MEM
if <mask_applied>. For VI4F_256 iterator, use <store_mask_predicate>
instead of register_operand and <store_mask_constraint> instead of v for
the input operand. Make sure both operands aren't MEMs for if not
<mask_applied>.
* gcc.target/i386/pr81225.c: New test.
From-SVN: r250285
PR rtl-optimization/81424
* optabs.c (prepare_cmp_insn): Use copy_to_reg instead of force_reg
to remove potential trapping from operands if -fnon-call-exceptions.
From-SVN: r250247
[gcc]
2017-07-07 Michael Meissner <meissner@linux.vnet.ibm.com>
Backport from mainline
PR target/81348
* config/rs6000/rs6000.md (HI sign_extend splitter): Use the
correct operand in doing the split.
[gcc/testsuite]
2017-07-07 Michael Meissner <meissner@linux.vnet.ibm.com>
Backport from mainline
2017-07-07 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81348
* gcc.target/powerpc/pr81348.c: New test.
From-SVN: r250060
This patch serie adds support for the SPARC M8 processor to GCC.
The SPARC M8 processor implements the Oracle SPARC Architecture 2017.
- bmask* instructions are put in their own instruction type. It makes
little sense to have them in the same category than array
instructions.
- Similarly, VIS compare instructions are put in their own instruction
type. This is to better accommodate subtypes, which are not quite
the same than the subtypes of `visl' instructions.
- The introduction of a new `subtype' insn attribute in sparc.md
avoids the need for adjusting the instruction scheduler DFAs for
previous cpu models every time a new cpu is introduced.
- The full set of SPARC instructions used in sparc.md, and their
position in the type/subtype hierarchy, is documented in a comment.
This eases the modification of the DFA schedulers, and the addition
of new cpus.
- The M7 DFA scheduler is reworked:
+ To use the new type/subtype hierarchy.
+ The v3pipe insn attribute is no longer needed.
+ More accurate latencies for instructions.
+ The S4 core pipeline is documented in a comment in niagara7.md.
- Support for -mcpu=m8 (we are thus suggesting to abandon the niagaraN
denomination for M8 and later processors.)
- Support for a new VIS level, VIS4B, covering the new VIS
instructions introduced in OSA2017 and implemented in the M8. Also
built-ins.
- A M8 DFA scheduler:
+ Also based on the new type/subtype hierarchy.
+ The functional units in the S5 core are explicitly documented in a
comment in m8.md.
gcc/ChangeLog:
* config/sparc/m8.md: New file.
* config/sparc/sparc.md: Include m8.md.
* config/sparc/sparc.opt: New option -mvis4b.
* config/sparc/sparc.c (dump_target_flag_bits): Handle MASK_VIS4B.
(sparc_option_override): Handle VIS4B.
(enum sparc_builtins): Define
SPARC_BUILTIN_DICTUNPACK{8,16,32},
SPARC_BUILTIN_FPCMP{LE,GT,EQ,NE}{8,16,32}SHL,
SPARC_BUILTIN_FPCMPU{LE,GT}{8,16,32}SHL,
SPARC_BUILTIN_FPCMPDE{8,16,32}SHL and
SPARC_BUILTIN_FPCMPUR{8,16,32}SHL.
(check_constant_argument): New function.
(sparc_vis_init_builtins): Define builtins
__builtin_vis_dictunpack{8,16,32},
__builtin_vis_fpcmp{le,gt,eq,ne}{8,16,32}shl,
__builtin_vis_fpcmpu{le,gt}{8,16,32}shl,
__builtin_vis_fpcmpde{8,16,32}shl and
__builtin_vis_fpcmpur{8,16,32}shl.
(sparc_expand_builtin): Check that the constant operands to
__builtin_vis_fpcmp*shl and _builtin_vis_dictunpack* are indeed
constant and in range.
* config/sparc/sparc-c.c (sparc_target_macros): Handle
TARGET_VIS4B.
* config/sparc/sparc.h (SPARC_IMM2_P): Define.
(SPARC_IMM5_P): Likewise.
* config/sparc/sparc.md (cpu_feature): Add new feagure "vis4b".
(enabled): Handle vis4b.
(UNSPEC_DICTUNPACK): New unspec.
(UNSPEC_FPCMPSHL): Likewise.
(UNSPEC_FPUCMPSHL): Likewise.
(UNSPEC_FPCMPDESHL): Likewise.
(UNSPEC_FPCMPURSHL): Likewise.
(cpu_feature): New CPU feature `vis4b'.
(dictunpack{8,16,32}): New insns.
(FPCSMODE): New mode iterator.
(fpcscond): New code iterator.
(fpcsucond): Likewise.
(fpcmp{le,gt,eq,ne}{8,16,32}{si,di}shl): New insns.
(fpcmpu{le,gt}{8,16,32}{si,di}shl): Likewise.
(fpcmpde{8,16,32}{si,di}shl): Likewise.
(fpcmpur{8,16,32}{si,di}shl): Likewise.
* config/sparc/constraints.md: Define constraints `q' for unsigned
2-bit integer constants and `t' for unsigned 5-bit integer
constants.
* config/sparc/predicates.md (imm5_operand_dictunpack8): New
predicate.
(imm5_operand_dictunpack16): Likewise.
(imm5_operand_dictunpack32): Likewise.
(imm2_operand): Likewise.
* doc/invoke.texi (SPARC Options): Document -mvis4b.
* doc/extend.texi (SPARC VIS Built-in Functions): Document the
ditunpack* and fpcmp*shl builtins.
* config.gcc: Handle m8 in --with-{cpu,tune} options.
* config.in: Add HAVE_AS_SPARC6 define.
* config/sparc/driver-sparc.c (cpu_names): Add entry for the SPARC
M8.
* config/sparc/sol2.h (CPP_CPU64_DEFAULT_SPEC): Define for
TARGET_CPU_m8.
(ASM_CPU32_DEFAUILT_SPEC): Likewise.
(CPP_CPU_SPEC): Handle m8.
(ASM_CPU_SPEC): Likewise.
* config/sparc/sparc-opts.h (enum processor_type): Add
PROCESSOR_M8.
* config/sparc/sparc.c (m8_costs): New struct.
(sparc_option_override): Handle TARGET_CPU_m8.
(sparc32_initialize_trampoline): Likewise.
(sparc64_initialize_trampoline): Likewise.
(sparc_issue_rate): Likewise.
(sparc_register_move_cost): Likewise.
* config/sparc/sparc.h (TARGET_CPU_m8): Define.
(CPP_CPU64_DEFAULT_SPEC): Define for M8.
(ASM_CPU64_DEFAULT_SPEC): Likewise.
(CPP_CPU_SPEC): Handle M8.
(ASM_CPU_SPEC): Likewise.
(AS_M8_FLAG): Define.
* config/sparc/sparc.md: Add m8 to the cpu attribute.
* config/sparc/sparc.opt: New option -mcpu=m8 for sparc targets.
* configure.ac (HAVE_AS_SPARC6): Check for assembler support for
M8 instructions.
* configure: Regenerate.
* doc/invoke.texi (SPARC Options): Document -mcpu=m8 and
-mtune=m8.
* config/sparc/niagara7.md: Rework the DFA scheduler to use insn
subtypes.
* config/sparc/sparc.md: Remove the `v3pipe' insn attribute.
("*movdi_insn_sp32"): Do not set v3pipe.
("*movsi_insn"): Likewise.
("*movdi_insn_sp64"): Likewise.
("*movsf_insn"): Likewise.
("*movdf_insn_sp32"): Likewise.
("*movdf_insn_sp64"): Likewise.
("*zero_extendsidi2_insn_sp64"): Likewise.
("*sign_extendsidi2_insn"): Likewise.
("*mov<VM32:mode>_insn"): Likewise.
("*mov<VM64:mode>_insn_sp64"): Likewise.
("*mov<VM64:mode>_insn_sp32"): Likewise.
("<plusminus_insn><VADDSUB:mode>3"): Likewise.
("<vlop:code><VL:mode>3"): Likewise.
("*not_<vlop:code><VL:mode>3"): Likewise.
("*nand<VL:mode>_vis"): Likewise.
("*<vlnotop:code>_not1<VL:mode>_vis"): Likewise.
("*<vlnotop:code>_not2<VL:mode>_vis"): Likewise.
("one_cmpl<VL:mode>2"): Likewise.
("faligndata<VM64:mode>_vis"): Likewise.
("alignaddrsi_vis"): Likewise.
("alignaddrdi_vis"): Likweise.
("alignaddrlsi_vis"): Likewise.
("alignaddrldi_vis"): Likewise.
("fcmp<gcond:code><GCM:gcm_name><P:mode>_vis"): Likewise.
("bmaskdi_vis"): Likewise.
("bmasksi_vis"): Likewise.
("bshuffle<VM64:mode>_vis"): Likewise.
("cmask8<P:mode>_vis"): Likewise.
("cmask16<P:mode>_vis"): Likewise.
("cmask32<P:mode>_vis"): Likewise.
("pdistn<P:mode>_vis"): Likewise.
("<vis3_addsub_ss_patname><VASS:mode>3"): Likewise.
* config/sparc/sparc.md ("subtype"): New insn attribute.
("*wrgsr_sp64"): Set insn subtype.
("*rdgsr_sp64"): Likewise.
("alignaddrsi_vis"): Likewise.
("alignaddrdi_vis"): Likewise.
("alignaddrlsi_vis"): Likewise.
("alignaddrldi_vis"): Likewise.
("<plusminus_insn><VADDSUB:mode>3"): Likewise.
("fexpand_vis"): Likewise.
("fpmerge_vis"): Likewise.
("faligndata<VM64:mode>_vis"): Likewise.
("bshuffle<VM64:mode>_vis"): Likewise.
("cmask8<P:mode>_vis"): Likewise.
("cmask16<P:mode>_vis"): Likewise.
("cmask32<P:mode>_vis"): Likewise.
("fchksm16_vis"): Likewise.
("v<vis3_shift_patname><GCM:mode>3"): Likewise.
("fmean16_vis"): Likewise.
("fp<plusminus_insn>64_vis"): Likewise.
("<plusminus_insn>v8qi3"): Likewise.
("<vis3_addsub_ss_patname><VASS:mode>3"): Likewise.
("<vis4_minmax_patname><VMMAX:mode>3"): Likewise.
("<vis4_uminmax_patname><VMMAX:mode>3"): Likewise.
("<vis3_addsub_ss_patname>v8qi3"): Likewise.
("<vis4_addsub_us_patname><VAUS:mode>3"): Likewise.
("*movqi_insn"): Likewise.
("*movhi_insn"): Likewise.
("*movsi_insn"): Likewise.
("movsi_pic_gotdata_op"): Likewise.
("*movdi_insn_sp32"): Likewise.
("*movdi_insn_sp64"): Likewise.
("movdi_pic_gotdata_op"): Likewise.
("*movsf_insn"): Likewise.
("*movdf_insn_sp32"): Likewise.
("*movdf_insn_sp64"): Likewise.
("*zero_extendhisi2_insn"): Likewise.
("*zero_extendqihi2_insn"): Likewise.
("*zero_extendqisi2_insn"): Likewise.
("*zero_extendqidi2_insn"): Likewise.
("*zero_extendhidi2_insn"): Likewise.
("*zero_extendsidi2_insn_sp64"): Likewise.
("ldfsr"): Likewise.
("prefetch_64"): Likewise.
("prefetch_32"): Likewise.
("tie_ld32"): Likewise.
("tie_ld64"): Likewise.
("*tldo_ldub_sp32"): Likewise.
("*tldo_ldub1_sp32"): Likewise.
("*tldo_ldub2_sp32"): Likewise.
("*tldo_ldub_sp64"): Likewise.
("*tldo_ldub1_sp64"): Likewise.
("*tldo_ldub2_sp64"): Likewise.
("*tldo_ldub3_sp64"): Likewise.
("*tldo_lduh_sp32"): Likewise.
("*tldo_lduh1_sp32"): Likewise.
("*tldo_lduh_sp64"): Likewise.
("*tldo_lduh1_sp64"): Likewise.
("*tldo_lduh2_sp64"): Likewise.
("*tldo_lduw_sp32"): Likewise.
("*tldo_lduw_sp64"): Likewise.
("*tldo_lduw1_sp64"): Likewise.
("*tldo_ldx_sp64"): Likewise.
("*mov<VM32:mode>_insn"): Likewise.
("*mov<VM64:mode>_insn_sp64"): Likewise.
("*mov<VM64:mode>_insn_sp32"): Likewise.
* config/sparc/sparc.md ("type"): New insn type viscmp.
("fcmp<gcond:code><GCM:gcm_name><P:mode>_vis"): Set insn type to
viscmp.
("fpcmp<gcond:code>8<P:mode>_vis"): Likewise.
("fucmp<gcond:code>8<P:mode>_vis"): Likewise.
("fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis"): Likewise.
* config/sparc/niagara7.md ("n7_vis_logical_v3pipe"): Handle
viscmp.
("n7_vis_logical_11cycle"): Likewise.
* config/sparc/niagara4.md ("n4_vis_logical"): Likewise.
* config/sparc/niagara2.md ("niag3_vis": Likewise.
* config/sparc/niagara.md ("niag_vis"): Likewise.
* config/sparc/ultra3.md ("us3_fga"): Likewise.
* config/sparc/ultra1_2.md ("us1_fga_double"): Likewise.
* config/sparc/sparc.md: New instruction type `bmask'.
(bmaskdi_vis): Use the `bmask' type.
(bmasksi_vis): Likewise.
* config/sparc/ultra3.md (us3_array): Likewise.
* config/sparc/niagara7.md (n7_array): Likewise.
* config/sparc/niagara4.md (n4_array): Likewise.
* config/sparc/niagara2.md (niag2_vis): Likewise.
(niag3_vis): Likewise.
* config/sparc/niagara.md (niag_vis): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/sparc/dictunpack.c: New file.
* gcc.target/sparc/fpcmpdeshl.c: Likewise.
* gcc.target/sparc/fpcmpshl.c: Likewise.
* gcc.target/sparc/fpcmpurshl.c: Likewise.
* gcc.target/sparc/fpcmpushl.c: Likewise.
From-SVN: r250050
PR target/81300
* config/i386/i386.md (setcc + movzbl/and to xor + setcc peepholes):
Require dead FLAGS_REG at the beginning of a peephole.
PR target/81294
* config/i386/adxintrin.h (_subborrow_u32): Swap _X and _Y
arguments in the call to __builtin_ia32_sbb_u32.
(_subborrow_u64): Swap _X and _Y arguments in the call to
__builtin_ia32_sbb_u64.
testsuite/ChangeLog:
PR target/81300
* gcc.target/i386/pr81300.c: New test.
PR target/81294
* gcc.target/i386/adx-addcarryx32-2.c (adx_test): Swap
x and y arguments in the call to _subborrow_u32.
* gcc.target/i386/adx-addcarryx64-2.c (adx_test): Swap
x and y arguments in the call to _subborrow_u64.
* gcc.target/i386/pr81294-1.c: New test.
* gcc.target/i386/pr81294-2.c: Ditto.
From-SVN: r249978
2017-07-03 Tom de Vries <tom@codesourcery.com>
backport from mainline:
2017-07-03 Tom de Vries <tom@codesourcery.com>
PR tree-optimization/81192
* tree-ssa-tail-merge.c (same_succ_flush_bb): Handle
BB_SAME_SUCC (bb) == NULL.
* gcc.dg/pr81192.c: New test.
From-SVN: r249898
[gcc]
2017-06-29 Michael Meissner <meissner@linux.vnet.ibm.com>
Backport from mainline
2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* config/rs6000/rs6000.md (ALTIVEC_DFORM): Do not allow DImode in
32-bit, since indexed is not valid for DImode.
(mov<mode>_hardfloat32): Reorder ISA 2.07 load/stores before ISA
3.0 d-form load/stores to be the same as mov<mode>_hardfloat64.
(define_peephole2 for Altivec d-form load): Add 32-bit support.
(define_peephole2 for Altivec d-form store): Likewise.
Backport from mainline
2017-06-20 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/79799
* config/rs6000/rs6000.c (rs6000_expand_vector_init): Add support
for doing vector set of SFmode on ISA 3.0.
* config/rs6000/vsx.md (vsx_set_v4sf_p9): Likewise.
(vsx_set_v4sf_p9_zero): Special case setting 0.0f to a V4SF
element.
(vsx_insert_extract_v4sf_p9): Add an optimization for inserting a
SFmode value into a V4SF variable that was extracted from another
V4SF variable without converting the element to double precision
and back to single precision vector format.
(vsx_insert_extract_v4sf_p9_2): Likewise.
[gcc/testsuite]
2017-06-29 Michael Meissner <meissner@linux.vnet.ibm.com>
Backport from mainline
2017-06-23 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* gcc.target/powerpc/pr80510-1.c: Allow test to run on 32-bit.
* gcc.target/powerpc/pr80510-2.c: Likewise.
Backport from mainline
2017-06-20 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/79799
* gcc.target/powerpc/pr79799-1.c: New test.
* gcc.target/powerpc/pr79799-2.c: Likewise.
* gcc.target/powerpc/pr79799-3.c: Likewise.
* gcc.target/powerpc/pr79799-4.c: Likewise.
* gcc.target/powerpc/pr79799-5.c: Likewise.
From-SVN: r249819
2017-06-28 Richard Biener <rguenther@suse.de>
Backport from mainline
2017-06-09 Richard Biener <rguenther@suse.de>
PR middle-end/81007
* ipa-polymorphic-call.c
(ipa_polymorphic_call_context::restrict_to_inner_class):
Skip FIELD_DECLs with error_mark_node type.
* passes.def (all_lowering_passes): Run pass_build_cgraph_edges
last again.
* g++.dg/pr81007.C: New testcase.
2017-06-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/81083
* tree-ssa-sccvn.c (vn_reference_lookup_3): Do not use abnormals
as values.
* gcc.dg/torture/pr81083.c: New testcase.
2017-06-21 Richard Biener <rguenther@suse.de>
PR gcov-profile/81080
* configure.ac: Add AC_SYS_LARGEFILE.
* libgcov.h: Include auto-target.h before tsystem.h to pick
up _FILE_OFFSET_BITS which might differ for multilibs.
* config.in: Regenerate.
* configure: Likewise.
From-SVN: r249738
2017-06-27 Jerry DeLisle <jvdelisle@gcc.gnu.org>
Backport from trunk
PR libgfortran/53029
* io/list_read.c(list_formatted_read_scalar: Set the err return
value to the common.flags error values.
* gfortran.dg/read_5.f90: New test.
From-SVN: r249719
2017-06-22 Martin Liska <mliska@suse.cz>
Backport from mainline
2017-05-26 Martin Liska <mliska@suse.cz>
PR ipa/80663
* params.def: Bound partial-inlining-entry-probability param.
2017-06-22 Martin Liska <mliska@suse.cz>
Backport from mainline
2017-05-26 Martin Liska <mliska@suse.cz>
PR ipa/80663
* g++.dg/ipa/pr80212.C: Remove the test as it does not longer
split at the problematic spot.
* gcc.dg/ipa/pr48195.c: Change 101 to 100 as 101 is no longer
a valid value of the param.
From-SVN: r249548
2017-06-21 Michael Meissner <meissner@linux.vnet.ibm.com>
Back port from mainline
PR target/80510
* gcc.target/powerpc/pr80510-1.c: Restrict test to 64-bit until
32-bit support is added. Change ITYPE size to 64-bit integer.
* gcc.target/powerpc/pr80510-2.c: Likewise.
From-SVN: r249488
PR c++/81154
* semantics.c (handle_omp_array_sections_1, finish_omp_clauses):
Complain about t not being a variable if t is OVERLOAD even
when processing_template_decl.
* g++.dg/gomp/pr81154.C: New test.
From-SVN: r249483
Backported from mainline
2017-06-20 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/81125
* ubsan.h (ubsan_encode_value): Workaround buggy clang++ parser
by removing enum keyword.
(ubsan_type_descriptor): Likewise. Formatting fix.
2017-06-19 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/81125
* ubsan.h (enum ubsan_encode_value_phase): New.
(ubsan_encode_value): Change second argument to
enum ubsan_encode_value_phase with default value of
UBSAN_ENCODE_VALUE_GENERIC.
* ubsan.c (ubsan_encode_value): Change second argument to
enum ubsan_encode_value_phase PHASE from bool IN_EXPAND_P,
adjust uses, for UBSAN_ENCODE_VALUE_GENERIC use just
create_tmp_var_raw instead of create_tmp_var and use a
TARGET_EXPR.
(ubsan_expand_bounds_ifn, ubsan_build_overflow_builtin,
instrument_bool_enum_load, ubsan_instrument_float_cast): Adjust
ubsan_encode_value callers.
PR sanitizer/81111
* ubsan.c (ubsan_encode_value): If current_function_decl is NULL,
use create_tmp_var_raw instead of create_tmp_var, mark it addressable
just by setting TREE_ADDRESSABLE on the result and use a TARGET_EXPR.
PR sanitizer/81125
* g++.dg/ubsan/pr81125.C: New test.
PR sanitizer/81111
* g++.dg/ubsan/pr81111.C: New test.
From-SVN: r249480
Backported from mainline
2017-06-13 Jakub Jelinek <jakub@redhat.com>
PR c++/80973
* cp-gimplify.c (cp_genericize_r): Don't instrument MEM_REF second
argument even if it has REFERENCE_TYPE.
* g++.dg/ubsan/pr80973.C: New test.
From-SVN: r249479
Backported from mainline
2017-06-13 Jakub Jelinek <jakub@redhat.com>
PR c++/80984
* cp-gimplify.c (cp_genericize): Only look for VAR_DECLs in
BLOCK_VARS (outer) chain.
(cxx_omp_const_qual_no_mutable): Likewise.
* g++.dg/opt/nrv18.C: New test.
From-SVN: r249478
gcc/
PR target/71778
* config/arm/arm-builtins.c (arm_expand_builtin_args): Return TARGET
if given a non-constant argument for an intrinsic which requires a
constant.
gcc/testsuite/
PR target/71778
* gcc.target/arm/pr71778.c: New.
From-SVN: r249379
* config/sparc/sparc.h (MASK_ISA): Add MASK_LEON and MASK_LEON3.
(MASK_FEATURES): New macro.
* config/sparc/sparc.c (sparc_option_override): Remove the special
handling of -mfpu and generalize it to all MASK_FEATURES switches.
From-SVN: r249190
2017-06-09 Janus Weil <janus@gcc.gnu.org>
Backport from trunk
PR fortran/70601
* trans-expr.c (gfc_conv_procedure_call): Fix detection of allocatable
function results.
2017-06-09 Janus Weil <janus@gcc.gnu.org>
Backport from trunk
PR fortran/70601
* gfortran.dg/proc_ptr_comp_50.f90: New test.
From-SVN: r249066
PR c++/81011
* cp-gimplify.c (cxx_omp_finish_clause): When changing clause
to OMP_CLAUSE_SHARED, also clear OMP_CLAUSE_SHARED_FIRSTPRIVATE
and OMP_CLAUSE_SHARED_READONLY flags.
* g++.dg/gomp/pr81011.C: New test.
From-SVN: r249032
2017-06-07 Richard Biener <rguenther@suse.de>
Backport from mainline
2017-05-02 Richard Biener <rguenther@suse.de>
PR tree-optimization/80549
* tree-cfgcleanup.c (mfb_keep_latches): New helper.
(cleanup_tree_cfg_noloop): Create forwarders to known loop
headers if they do not have a preheader.
* gcc.dg/torture/pr80549.c: New testcase.
2017-05-19 Richard Biener <rguenther@suse.de>
PR c++/80593
* c-warn.c (strict_aliasing_warning): Do not warn for accesses
to alias-set zero memory.
* g++.dg/warn/Wstrict-aliasing-bogus-char-2.C: New testcase.
* g++.dg/warn/Wstrict-aliasing-6.C: Adjust expected outcome.
2017-05-26 Richard Biener <rguenther@suse.de>
PR tree-optimization/80842
* tree-ssa-ccp.c (set_lattice_value): Always meet with the old
value.
* gcc.dg/torture/pr80842.c: New testcase.
2017-05-31 Richard Biener <rguenther@suse.de>
PR tree-optimization/80906
* graphite-isl-ast-to-gimple.c (copy_loop_close_phi_nodes): Get
and pass through iv_map.
(copy_bb_and_scalar_dependences): Adjust.
(translate_pending_phi_nodes): Likewise.
(copy_loop_close_phi_args): Handle code-generating IVs instead
of ICEing.
* gcc.dg/graphite/pr80906.c: New testcase.
2017-05-11 Richard Biener <rguenther@suse.de>
PR tree-optimization/80705
* tree-vect-data-refs.c (vect_analyze_data_refs): DECL_NONALIASED
bases are not vectorizable.
* gcc.dg/vect/bb-slp-pr80705.c: New testcase.
From-SVN: r248970
PR c/80919
* c-format.c (matching_type_p): Return false if any of the types
requires structural equality.
* gcc.dg/format/pr80919.c: New test.
From-SVN: r248963
Back port from mainline
[gcc]
2017-05-19 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80718
* config/rs6000/vsx.md (vsx_splat_<mode>, VSX_D iterator): Prefer
VSX registers over GPRs, particularly on ISA 2.07 which does not
have the MTVSRDD instruction.
[gcc/testsuite]
2017-05-19 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80718
* gcc.target/powerpc/pr80718.c: New test.
From-SVN: r248936
2017-06-05 Janus Weil <janus@gcc.gnu.org>
Backport from trunk
PR fortran/80766
* resolve.c (resolve_fl_derived): Make sure that vtype symbols are
properly resolved.
2017-06-05 Janus Weil <janus@gcc.gnu.org>
Backport from trunk
PR fortran/80766
* gfortran.dg/typebound_call_28.f90: New test.
From-SVN: r248873
2017-05-31 Martin Jambor <mjambor@suse.cz>
Backport from mainline
2017-04-24 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/80293
* tree-sra.c (scalarizable_type_p): New parameter const_decl, make
char arrays not totally scalarizable if it is false.
(analyze_all_variable_accesses): Pass correct value in the new
parameter. Add a statistics counter.
testsuite/
* g++.dg/tree-ssa/pr80293.C: New test.
From-SVN: r248724
PR sanitizer/80659
* c-decl.c (build_compound_literal): Set DECL_ARTIFICIAL and
DECL_IGNORED_P even for non-static compound literals.
* gcc.dg/asan/pr80659.c: New test.
From-SVN: r248491
PR sanitizer/80875
* fold-const.c (fold_binary_loc) <case MULT_EXPR>: Check if OP1
can be negated.
* c-c++-common/ubsan/pr80875.c: New test.
From-SVN: r248490
[gcc]
2017-05-25 Michael Meissner <meissner@linux.vnet.ibm.com>
Backport from trunk
2017-05-18 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* config/rs6000/predicates.md (simple_offsettable_mem_operand):
New predicate.
* config/rs6000/rs6000.md (ALTIVEC_DFORM): New iterator.
(define_peephole2 for Altivec d-form load): Add peepholes to catch
cases where the register allocator uses a move and an offsettable
memory operation to/from a FPR register on ISA 2.06/2.07.
(define_peephole2 for Altivec d-form store): Likewise.
Backport from trunk
2017-05-09 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/68163
* config/rs6000/rs6000.md (f32_lr): Delete mode attributes that
are now unused after splitting mov{sf,sd}_hardfloat.
(f32_lr2): Likewise.
(f32_lm): Likewise.
(f32_lm2): Likewise.
(f32_li): Likewise.
(f32_li2): Likewise.
(f32_lv): Likewise.
(f32_sr): Likewise.
(f32_sr2): Likewise.
(f32_sm): Likewise.
(f32_sm2): Likewise.
(f32_si): Likewise.
(f32_si2): Likewise.
(f32_sv): Likewise.
(f32_dm): Likewise.
(f32_vsx): Likewise.
(f32_av): Likewise.
(mov<mode>_hardfloat): Split into separate movsf and movsd pieces.
For movsf, order stores so the VSX stores occur before the GPR
store which encourages the register allocator to use a traditional
FPR instead of a GPR. For movsd, order the stores so that the GPR
store comes before the VSX stores to allow the power6 to work.
This is due to the power6 not having a 32-bit integer store
instruction from a FPR.
(movsf_hardfloat): Likewise.
(movsd_hardfloat): Likewise.
[gcc/testsuite]
2017-05-25 Michael Meissner <meissner@linux.vnet.ibm.com>
Backport from trunk
2017-05-18 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80510
* gcc.target/powerpc/pr80510-1.c: New test.
* gcc.target/powerpc/pr80510-2.c: Likewise.
Backport from trunk
2017-05-09 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/68163
* gcc.target/powerpc/pr68163.c: New test.
From-SVN: r248480
2017-05-23 Paul Thomas <pault@gcc.gnu.org>
Backport from trunk
PR fortran/80333
* trans-io.c (nml_get_addr_expr): If we are dealing with class
type data set tmp tree to get that address.
(transfer_namelist_element): Set the array spec to point to the
the class data.
* gfortran.dg/dtio_30.f03: New test.
* list_read.c (nml_read_obj): Compute pointer into class/type
arrays from the nl->dim information. Update it for each iteration
of the loop for the given object.
From-SVN: r248388
Backport from mainline
2017-05-18 Sheldon Lobo <sheldon.lobo@oracle.com>
* config/sparc/sparc.c (sparc_option_override): Set function
alignment for -mcpu=niagara7 to 64 to match the I$ line.
* config/sparc/sparc.h (BRANCH_COST): Set the SPARC M7 branch
latency to 1.
* config/sparc/sparc.h (BRANCH_COST): Set the SPARC T4 branch
latency to 2.
* config/sparc/sol2.h: Fix a ASM_CPU32_DEFAULT_SPEC typo.
Backport from mainline
2017-05-18 Sheldon Lobo <sheldon.lobo@oracle.com>
* gcc.target/sparc/niagara7-align.c: New test.
From-SVN: r248380
2017-05-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
2017-05-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/p8-vec-xl-xst.c: Fix target string to
LE-only.
From-SVN: r248349
* gcc-interface/decl.c (gnat_to_gnu_entity): Skip regular processing
for Itypes that are E_Access_Subtype.
<E_Access_Subtype>: Use the DECL of the base type directly.
From-SVN: r248324
2017-05-17 Jerry DeLisle <jvdelisle@gcc.gnu.org>
Backport from trunk
PR libgfortran/80727
* transfer.c (read_sf_internal): Remove bogus code to detect EOR.
(read_block_form): For internal units, generate EOR if no more
bytes left in unit and we are trying to read with ADVANCE='NO'.
* gfortran.dg/read_3.f90: New test.
From-SVN: r248167
2017-05-17 Jerry DeLisle <jvdelisle@gcc.gnu.org>
Backport from trunk
PR fortran/78659
* io.c (dtio_procs_present): Add new function to check for DTIO
procedures relative to I/O statement READ or WRITE.
(gfc_resolve_dt): Add namelist checks using the new function.
* resolve.c (dtio_procs_present): Remove function and related
namelist checks. (resolve_fl_namelist): Add check specific to
Fortran 95 restriction on namelist objects.
* gfortran.dg/namelist_91.f90: New test.
* gfortran.dg/namelist_92.f90: New test.
* gfortran.dg/namelist_93.f90: New test.
* gfortran.dg/namelist_94.f90: New test.
From-SVN: r248166
2017-05-15 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/80752
* expr.c (gfc_generate_initializer): If type conversion fails,
check for error and return NULL.
2017-05-15 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/80752
gfortran.dg/pr80752.f90: New test.
From-SVN: r248076
[gcc]
2017-05-13 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
2017-05-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_vect_nonmem): New static var.
(rs6000_init_cost): Initialize rs6000_vect_nonmem.
(rs6000_add_stmt_cost): Update rs6000_vect_nonmem.
(rs6000_finish_cost): Avoid vectorizing simple copy loops with
VF=2 that require versioning.
[gcc/testsuite]
2017-05-13 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
2017-05-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/versioned-copy-loop.c: New file.
From-SVN: r248010
[gcc]
2017-05-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
2017-05-10 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (altivec_init_builtins): Define POWER8
built-ins for vec_xl and vec_xst with short and char pointer
arguments.
[gcc/testsuite]
2017-05-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline
2017-05-10 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/p8-vec-xl-xst.c: New file.
From-SVN: r247999
[gcc]
2017-05-09 Michael Meissner <meissner@linux.vnet.ibm.com>
Back port from mainline
2017-05-05 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/79038
PR target/79202
PR target/79203
* config/rs6000/rs6000.md (u code attribute): Add FIX and
UNSIGNED_FIX.
(extendsi<mode>2): Add support for doing sign extension via
VUPKHSW and XXPERMDI if the value is in Altivec registers and we
don't have ISA 3.0 instructions.
(extendsi<mode>2 splitter): Likewise.
(fix_trunc<mode>si2): If we are at ISA 2.07 (VSX small integer),
generate the normal insns since SImode can now go in vector
registers. Disallow the special UNSPECs needed for previous
machines to hide SImode being used. Add new insns
fctiw{,w}_<mode>_smallint if SImode can go in vector registers.
(fix_trunc<mode>si2_stfiwx): Likewise.
(fix_trunc<mode>si2_internal): Likewise.
(fixuns_trunc<mode>si2): Likewise.
(fixuns_trunc<mode>si2_stfiwx): Likewise.
(fctiw<u>z_<mode>_smallint): Likewise.
(fctiw<u>z_<mode>_mem): New combiner pattern to prevent conversion
of floating point to 32-bit integer from doing a direct move to
the GPR registers to do a store.
(fctiwz_<mode>): Break long line.
[gcc/testsuite]
2017-05-09 Michael Meissner <meissner@linux.vnet.ibm.com>
Back port from mainline
2017-05-05 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/79038
PR target/79202
PR target/79203
* gcc.target/powerpc/ppc-round3.c: New test.
* gcc.target/powerpc/ppc-round2.c: Update expected code.
From-SVN: r247820
2017-05-05 Janus Weil <janus@gcc.gnu.org>
Backport from trunk
PR fortran/80121
* trans-expr.c (gfc_conv_procedure_call): Deallocate the components
of allocatable intent(out) arguments.
2017-05-05 Janus Weil <janus@gcc.gnu.org>
Backport from trunk
PR fortran/80121
* gfortran.dg/intent_out_9.f90: New test case.
From-SVN: r247662
2017-05-05 Janus Weil <janus@gcc.gnu.org>
Backport from trunk
PR fortran/80392
* trans-types.c (gfc_get_derived_type): Prevent an infinite loop when
building a derived type that includes a procedure pointer component
with a polymorphic result.
2017-05-05 Janus Weil <janus@gcc.gnu.org>
Backport from trunk
PR fortran/80392
* gfortran.dg/proc_ptr_comp_49.f90: New test case.
From-SVN: r247655
2017-05-04 Jerry DeLisle <jvdelisle@gcc.gnu.org>
Backport from trunk.
PR fortran/80484
* io.c (format_lex): Check for '/' and set token to FMT_SLASH.
(check_format): Move FMT_DT checking code to data_desc section.
* module.c (gfc_match_use): Include the case of INTERFACE_DTIO.
Backport from mainline
PR fortran/80484
* gfortran.dg/dtio_29.f03: New test.
From-SVN: r247615
2017-05-03 Richard Biener <rguenther@suse.de>
Backport from mainline
2017-04-20 Richard Biener <rguenther@suse.de>
PR tree-optimization/80453
* tree-ssa-sccvn.h (struct vn_phi_s): Add cclhs and ccrhs members.
* tree-ssa-sccvn.c (cond_stmts_equal_p): Use recorded lhs and rhs
from the conditions.
(vn_phi_eq): Pass them down.
(vn_phi_lookup): Record them.
(vn_phi_insert): Likewise.
2017-04-25 Richard Biener <rguenther@suse.de>
PR tree-optimization/80492
* alias.c (compare_base_decls): Handle registers with asm
specification conservatively.
* gcc.dg/pr80492.c: New testcase.
2017-04-27 Richard Biener <rguenther@suse.de>
PR middle-end/80539
* tree-chrec.c (chrec_fold_plus_poly_poly): Deal with not
being in loop-closed SSA form conservatively.
(chrec_fold_multiply_poly_poly): Likewise.
* gcc.dg/torture/pr80539.c: New testcase.
From-SVN: r247545
Backported from mainline
2017-04-21 Jakub Jelinek <jakub@redhat.com>
PR c/80468
* c-decl.c (finish_declspecs) <case cts_int_n>: If int_n_idx is not
enabled, set specs->type to integer_type_node.
* gcc.dg/pr80468.c: New test.
From-SVN: r247534
PR c++/80534
* tree.c (type_cache_hasher::equal): Only compare
TYPE_TYPELESS_STORAGE flag on non-aggregate element types.
(build_array_type_1): Only hash TYPE_TYPELESS_STORAGE flag on
non-aggregate element types.
* tree.h (TYPE_TYPELESS_STORAGE): Fix comment typo, add more details
about the flag on ARRAY_TYPEs in the comment, formatting fix.
c-family/
* c-common.c (complete_array_type): Only hash TYPE_TYPELESS_STORAGE
flag on non-aggregate element types.
testsuite/
* g++.dg/other/pr80534-1.C: New test.
* g++.dg/other/pr80534-2.C: New test.
From-SVN: r247337
PR target/77728
* config/arm/arm.c: Include gimple.h.
(aapcs_layout_arg): Emit -Wpsabi note if arm_needs_doubleword_align
returns negative, increment ncrn only if it returned positive.
(arm_needs_doubleword_align): Return int instead of bool,
ignore DECL_ALIGN of non-FIELD_DECL TYPE_FIELDS chain
members, but if there is any such non-FIELD_DECL
> PARM_BOUNDARY aligned decl, return -1 instead of false.
(arm_function_arg): Emit -Wpsabi note if arm_needs_doubleword_align
returns negative, increment nregs only if it returned positive.
(arm_setup_incoming_varargs): Likewise.
(arm_function_arg_boundary): Emit -Wpsabi note if
arm_needs_doubleword_align returns negative, return
DOUBLEWORD_ALIGNMENT only if it returned positive.
testsuite/
* g++.dg/abi/pr77728-1.C: New test.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r247259
PR target/80482
Backport from mainline
This patch changes the parameter testing for powerpc vector builtins to relax
the existing requirement that the parameters be identical to instead that they
be compatible. This allows for mixing parameters with differing qualified
(const, volatile, etc.) types.
See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80482 for more information.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu and
powerpc64be-unknown-linux-gnu with no regressions. Is this ok for trunk?
[gcc]
2017-04-25 Bill Seurer <seurer@linux.vnet.ibm.com>
Backport from mainline
PR target/80482
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Change
type checks to test for compatibility instead of equality.
[gcc/testsuite]
2017-04-25 Bill Seurer <seurer@linux.vnet.ibm.com>
Backport from mainline
PR target/80482
* gcc.target/powerpc/vec-constvolatile.c: New test.
From-SVN: r247256
PR target/77728
* config/aarch64/aarch64.c (struct aarch64_fn_arg_alignment): New
type.
(aarch64_function_arg_alignment): Return aarch64_fn_arg_alignment
struct. Ignore DECL_ALIGN of decls other than FIELD_DECL for
the alignment computation, but return their maximum in warn_alignment.
(aarch64_layout_arg): Adjust aarch64_function_arg_alignment caller.
Emit a -Wpsabi note if warn_alignment is 16 bytes, but alignment
is smaller.
(aarch64_function_arg_boundary): Likewise. Simplify using MIN/MAX.
(aarch64_gimplify_va_arg_expr): Adjust aarch64_function_arg_alignment
caller.
testsuite/
* g++.dg/abi/pr77728-2.C: New test.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r247241
We do this already for TImode values but it was missing for vector
modes.
gcc/ChangeLog:
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/80464
* config/s390/vector.md: Split MEM->GPR vector moves for
non-s_operand addresses.
gcc/testsuite/ChangeLog:
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/80464
* gfortran.fortran-torture/compile/pr80464.f90: New test.
From-SVN: r247191
The P constraint letter is supposed to match every constant which is
acceptable during reload. However, constraints do not appear to be
able to handle const_wide_int yet. It works with predicates so the
alternative is modelled with a new predicate now.
gcc/ChangeLog:
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/79895
* config/s390/predicates.md (reload_const_wide_int_operand): New
predicate.
* config/s390/s390.md ("movti"): Remove d/P alternative.
("movti_bigconst"): New pattern definition.
gcc/testsuite/ChangeLog:
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
PR target/79895
* gcc.target/s390/pr79895.c: New test.
From-SVN: r247190
The attached patch optimizes the atomic_exchange and atomic_compare
patterns on s390 and s390x (mostly limited to SImode and DImode).
Among general optimizaation, the changes fix most of the problems
reported in PR 80080:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80080
gcc/ChangeLog:
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR target/80080
* s390-protos.h (s390_expand_cs_hqi): Removed.
(s390_expand_cs, s390_expand_atomic_exchange_tdsi): New prototypes.
* config/s390/s390.c (s390_emit_compare_and_swap): Handle all integer
modes as well as CCZ1mode and CCZmode.
(s390_expand_atomic_exchange_tdsi, s390_expand_atomic): Adapt to new
signature of s390_emit_compare_and_swap.
(s390_expand_cs_hqi): Likewise, make static.
(s390_expand_cs_tdsi): Generate an explicit compare before trying
compare-and-swap, in some cases.
(s390_expand_cs): Wrapper function.
(s390_expand_atomic_exchange_tdsi): New backend specific expander for
atomic_exchange.
(s390_match_ccmode_set): Allow CCZmode <-> CCZ1 mode.
* config/s390/s390.md ("atomic_compare_and_swap<mode>"): Merge the
patterns for small and large integers. Forbid symref memory operands.
Move expander to s390.c. Require cc register.
("atomic_compare_and_swap<DGPR:mode><CCZZ1:mode>_internal")
("*atomic_compare_and_swap<TDI:mode><CCZZ1:mode>_1")
("*atomic_compare_and_swapdi<CCZZ1:mode>_2")
("*atomic_compare_and_swapsi<CCZZ1:mode>_3"): Use s_operand to forbid
symref memory operands. Remove CC mode and call s390_match_ccmode
instead.
("atomic_exchange<mode>"): Allow and implement all integer modes.
gcc/testsuite/ChangeLog:
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
Backport from mainline
2017-04-25 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR target/80080
* gcc.target/s390/md/atomic_compare_exchange-1.c: New test.
* gcc.target/s390/md/atomic_compare_exchange-1.inc: New test.
* gcc.target/s390/md/atomic_exchange-1.inc: New test.
From-SVN: r247189
PR rtl-optimization/80501
* combine.c (make_compound_operation_int): Set subreg_code to SET
even for AND with mask of the sign bit of mode.
* gcc.c-torture/execute/pr80501.c: New test.
From-SVN: r247129
Backport from mainline r247033
gcc/cp:
PR c++/80473
* init.c (build_new_1): Suppress notes about over-aligned new when
the warning is suppressed.
gcc/testsuite:
PR c++/80473
* g++.dg/diagnostic/pr80473.C: New test.
From-SVN: r247035
PR middle-end/80423
* tree.h (build_array_type): Add typeless_storage default argument.
* tree.c (type_cache_hasher::equal): Also compare
TYPE_TYPELESS_STORAGE flag for ARRAY_TYPEs.
(build_array_type): Add typeless_storage argument, set
TYPE_TYPELESS_STORAGE to it, if shared also hash it, and pass to
recursive call.
(build_nonshared_array_type): Adjust build_array_type_1 caller.
(build_array_type): Likewise. Add typeless_storage argument.
c-family/
* c-common.c (complete_array_type): Preserve TYPE_TYPELESS_STORAGE.
cp/
* tree.c (build_cplus_array_type): Call build_array_type
with the intended TYPE_TYPELESS_STORAGE flag value, instead
of calling build_array_type and modifying later TYPE_TYPELESS_STORAGE
on the shared type.
testsuite/
* g++.dg/other/pr80423.C: New test.
From-SVN: r247014
The testcase uses 32 bit or bigger pointer offsets, and
that triggers an ptrofftype_p assert in tree.c.
gcc/testsuite
2017-04-19 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
* gcc.dg/pr80170.c: Require ptr32plus.
From-SVN: r247011
PR tree-optimization/80426
* tree-vrp.c (extract_range_from_binary_expr_1): For an additive
operation on symbolic operands, also compute the overflow for the
invariant part when the operation degenerates into a negation.
PR tree-optimization/80426
* gcc.c-torture/execute/20170419-1.c: New test.
Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
From-SVN: r247007
PR debug/80461
* dwarf2out.c (modified_type_die, gen_type_die_with_usage):
Check for t with zero TYPE_QUALS_NO_ADDR_SPACE.
* g++.dg/debug/pr80461.C: New test.
From-SVN: r247002
PR c++/80459
* c-c++-common/opaque-vector.c (SIZEOF_MAXINT): Define.
(f): Don't test long double vectors if __SIZEOF_LONG_DOUBLE__
is not power of 2, or is more than 16 or more than SIZEOF_MAXINT.
From-SVN: r247001
This patch skips pr80341.c for targets with int size less than 32 bits.
The assertion in the testcase holds only if sizeof(int) > sizeof(short),
which isn't true for smaller int size targets like the avr.
gcc/testsuite
2017-04-19 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
* gcc.dg/torture/pr80341.c: Require int32plus.
From-SVN: r246994
* config/sparc/predicates.md (input_operand): Add comment. Return
true for any memory operand when LRA is in progress.
* config/sparc/sparc.c (sparc_expand_move): Minor formatting fix.
Co-Authored-By: Jeff Law <law@redhat.com>
Co-Authored-By: Vladimir Makarov <vmakarov@redhat.com>
From-SVN: r246989
PR tree-optimization/80443
* tree-vrp.c (intersect_ranges): For signed 1-bit precision type,
instead of adding 1, subtract -1 and similarly instead of subtracting
1 add -1.
* gcc.c-torture/compile/pr80443.c: New test.
From-SVN: r246981
PR middle-end/80422
* cfgcleanup.c (try_crossjump_to_edge): Verify SRC1 and SRC2 have
predecessors after walking up the insn chain.
PR middle-end/80422
* gcc.c-torture/compile/pr80422.c: New test.
From-SVN: r246975
PR debug/80263
* dwarf2out.c (modified_type_die): Try harder not to emit internal
sizetype type into debug info.
* gcc.dg/debug/dwarf2/pr80263.c: New test.
From-SVN: r246973
PR middle-end/79788
PR middle-end/80375
* c-common.c (c_common_type_for_mode): Don't handle
widest_*_literal_type_node here.
c_common_signed_or_unsigned_type): Likewise.
(c_common_nodes_and_builtins): Set widest_*_literal_type_node
to *intTI_type_node or *intDI_type_node depending on whether
TImode is supported by the target or not.
* gcc.dg/pr79788-1.c: New test.
* gcc.dg/pr79788-2.c: New test.
From-SVN: r246965
Bin's commit r246810, for PR80153, fixes 20050830-1.c for -m64 (it
already passed for -m32). So, this patch removes the remaining xfail.
gcc/testsuite/
PR tree-optimization/66612
* gcc.target/powerpc/20050830-1.c: Remove xfail.
From-SVN: r246939
2017-04-14 Janus Weil <janus@gcc.gnu.org>
PR fortran/80361
* class.c (generate_finalization_wrapper): Give the finalization wrapper
the recursive attribute.
2017-04-14 Janus Weil <janus@gcc.gnu.org>
PR fortran/80361
* gfortran.dg/class_62.f90: New test case.
From-SVN: r246934
We use a negative ID number to link together the doloop_begin and
doloop_end instructions. This negative ID number is setup within
doloop_begin, at this point the ID is stored into the loop end
instruction (doloop_end_i) and placed into the doloop_begin_i
instruction.
In arc.c (arc_reorg) we extract the ID from the doloop_end_i
instruction in order to find the matching doloop_begin_i instruction,
though the ID is only used in some cases.
Currently in arc_reorg when we extract the ID we negate it. This
negation is invalid. The ID stored in both doloop_end_i and
doloop_begin_i is already negative, the negation in arc_reorg means
that if we need to use the ID to find the doloop_begin_i then we will
never find it (as the IDs will never match).
This commit removes the unneeded negation, moves the extraction of the
ID into a more appropriately scoped block and adds a new test for this
issue.
gcc/ChangeLog:
* config/arc/arc.c (arc_reorg): Move loop_end_id into a more local
block, and do not negate it, the stored id is already negative.
gcc/testsuite/ChangeLog:
* gcc.target/arc/loop-1.c: New file.
Co-Authored-By: Guy Benyei <guybe@mellanox.com>
From-SVN: r246933
[gcc]
2017-04-14 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80098
* config/rs6000/rs6000-cpus.def (OTHER_P9_VECTOR_MASKS): Define
masks of options that should be turned off if the VSX vector
options are turned off.
(OTHER_P8_VECTOR_MASKS): Likewise.
(OTHER_VSX_VECTOR_MASKS): Likewise.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Call
rs6000_disable_incompatible_switches to validate no type switches
like -mvsx.
(rs6000_incompatible_switch): New function to disallow turning on
other vector options if -mno-vsx, -mno-power8-vector, or
-mno-power9-vector are specified.
[gcc/testsuite]
2017-04-14 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/80098
* gcc.target/powerpc/pr80098-1.c: New test.
* gcc.target/powerpc/pr80098-2.c: Likewise.
* gcc.target/powerpc/pr80098-3.c: Likewise.
* gcc.target/powerpc/pr80098-4.c: Likewise.
From-SVN: r246930
PR sanitizer/80403
* fold-const.c (fold_ternary_loc): Revert
use op0 instead of fold_convert_loc (loc, type, arg0) part of
2017-04-12 change.
* g++.dg/ubsan/pr80403-2.C: New test.
From-SVN: r246917
2017-04-13 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/80343
* lra-remat.c (update_scratch_ops): Assign original hard reg to
new scratch pseudo.
2017-04-13 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/80343
* gcc.target/powerpc/pr80343.c: New.
From-SVN: r246914
PR sanitizer/80414
* ubsan.c (ubsan_expand_bounds_ifn): Pass original index
to ubsan_encode_value.
* c-c++-common/ubsan/bounds-15.c: New test.
From-SVN: r246909
PR debug/80321
* dwarf2out.c (decls_for_scope): Ignore declarations of
current_function_decl in BLOCK_NONLOCALIZED_VARS.
* gcc.dg/debug/pr80321.c: New test.
2017-04-13 Eric Botcazou <ebotcazou@adacore.com>
* gnat.dg/debug10.adb: New test.
* gnat.dg/debug10_pkg.ads: New helper.
From-SVN: r246900
PR tree-optimization/79390
* optabs.c (emit_conditional_move): If the preferred op2/op3 operand
order does not result in usable sequence, retry with reversed operand
order.
* gcc.target/i386/pr70465-2.c: Xfail the scan-assembler-not test.
From-SVN: r246882
PR sanitizer/80403
PR sanitizer/80404
PR sanitizer/80405
* fold-const.c (fold_ternary_loc): Use op1 instead of arg1 as argument
to fold_build2_loc. Convert TREE_OPERAND (tem, 0) to type. Use
op0 instead of fold_convert_loc (loc, type, arg0).
* g++.dg/ubsan/pr80403.C: New test.
* g++.dg/ubsan/pr80404.C: New test.
* g++.dg/ubsan/pr80405.C: New test.
From-SVN: r246881
PR c/80163
* expr.c <CASE_CONVERT>: For EXPAND_INITIALIZER determine SIGN_EXTEND
vs. ZERO_EXTEND based on signedness of treeop0's type rather than
signedness of the result type.
* gcc.dg/torture/pr80163.c: New test.
From-SVN: r246876
2017-04-12 Richard Biener <rguenther@suse.de>
Jeff Law <law@redhat.com>
PR tree-optimization/80359
* tree-ssa-dse.c (maybe_trim_partially_dead_store): Do not
trim stores to TARGET_MEM_REFs.
* gcc.dg/torture/pr80359.c: New testcase.
Co-Authored-By: Jeff Law <law@redhat.com>
From-SVN: r246875
PR c++/80370
* decl.c (cp_finish_decomp): If processing_template_decl on
non-dependent decl, only set TREE_TYPE on the v[i] decls, but don't
change their DECL_VALUE_EXPR nor cp_finish_decl them. Instead make
sure DECL_VALUE_EXPR is the canonical NULL type ARRAY_REF for tsubst
processing.
* pt.c (value_dependent_expression_p) <case VAR_DECL>: For variables
with DECL_VALUE_EXPR, return true if DECL_VALUE_EXPR is type
dependent.
* g++.dg/cpp1z/decomp28.C: New test.
From-SVN: r246857
PR rtl-optimization/80385
* simplify-rtx.c (simplify_unary_operation_1): Don't transform
(not (neg X)) into (plus X -1) for complex or non-integral modes.
* g++.dg/opt/pr80385.C: New test.
From-SVN: r246850
2017-04-11 Martin Liska <mliska@suse.cz>
PR ipa/80212
* cgraph.c (cgraph_node::dump): Dump calls_comdat_local.
* ipa-split.c (split_function): Create a local comdat symbol
if caller is in a comdat group.
2017-04-11 Martin Liska <mliska@suse.cz>
PR ipa/80212
* g++.dg/ipa/pr80212.C: New test.
From-SVN: r246848
gcc/ChangeLog:
PR middle-end/80364
* gimple-ssa-sprintf.c (get_int_range): Remove second argument and
always use the int type. Use INTEGRAL_TYPE_P() rather than testing
for INTEGER_TYPE.
(directive::set_width, directive::set_precision, format_character):
Adjust.
(parse_directive): Use INTEGRAL_TYPE_P() rather than testing for
INTEGER_TYPE.
gcc/testsuite/ChangeLog:
PR middle-end/80364
* gcc.dg/tree-ssa/builtin-sprintf-warn-16.c: New test.
From-SVN: r246846
This patch fixes a whole bunch of failures reported for
gcc.dg/tree-ssa/builtin-sprintf-warn-{3,10}.c for the avr target.
builtin-sprintf-warn-10.c fails because the bounds in the warning
messages expect 4 digit wide exponents i.e. __DBL_MAX_EXP__ > 999.
For the avr, floats and doubles are both 32 bits wide, __DBL_MAX_EXP__
== 128, and the max number of exponent digits can only be 3 .
The computed size thus ends up one short of the value the test
expects. The patch makes the test run only for targets with double64plus.
builtin-sprintf-warn-3.c fails because the test appears to assume all
non lp64 targets to be ilp32. For the avr, pointer size and int size
are equal, but both are 16 bits, not 32. The patch fixes this by
explicitly adding avr to the dejagnu selector.
gcc/testsuite
2017-04-06 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
* gcc.dg/tree-ssa/builtin-sprintf-warn-10.c: Require double64plus.
* gcc.dg/tree-ssa/builtin-sprintf-warn-3.c (void test_too_large):
Add avr-*-* to non-lp64 selector.
From-SVN: r246831
2017-04-10 Nicolas Koenig <koenigni@student.ethz.ch>
Paul Thomas <pault@gcc.gnu.org>
PR fortran/69498
* module.c (gfc_match_submodule): Add error
if function is called in the wrong state.
2017-04-10 Nicolas Koenig <koenigni@student.ethz.ch>
PR fortran/69498
* gfortran.dg/submodule_unexp.f90: Modified test
to account for new error.
* gfortran.dg/submodule_twice.f90: New Test
Co-Authored-By: Paul Thomas <pault@gcc.gnu.org>
From-SVN: r246826
PR c++/80176
* tree.c (lvalue_kind): For COMPONENT_REF with BASELINK second
operand, if it is a static member function, recurse on the
BASELINK.
* g++.dg/init/ref23.C: New test.
From-SVN: r246825
2017-04-10 Janus Weil <janus@gcc.gnu.org>
PR fortran/80046
* expr.c (gfc_check_pointer_assign): Check if procedure pointer
components in a pointer assignment need an explicit interface.
2017-04-10 Janus Weil <janus@gcc.gnu.org>
PR fortran/80046
* gfortran.dg/proc_ptr_comp_48.f90: New test case.
From-SVN: r246823
PR tree-optimization/80374
* tree-ssa-dom.c (derive_equivalences_from_bit_ior): Do not try to
record anything if we can not convert integer_zero_node to the
desired type.
PR tree-optimization/80374
* g++.dg/pr80374.c: New test.
From-SVN: r246819
gcc/ChangeLog:
2017-04-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
PR target/80108
* config/rs6000/rs6000.c (rs6000_option_override_internal):
Enhance special handling given to the TARGET_P9_MINMAX option in
relation to certain other options.
gcc/testsuite/ChangeLog:
2017-04-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
PR target/80108
* gcc.target/powerpc/ppc-fortran/ppc-fortran.exp: New file.
* gcc.target/powerpc/ppc-fortran/pr80108-1.f90: New test.
From-SVN: r246818
PR sanitizer/80348
* typeck.c (cp_build_binary_op): Use NULL_TREE instead of NULL. Set
ORIG_TYPE earlier and not only when shortening.
* g++.dg/ubsan/div-by-zero-3.C: New test.
From-SVN: r246812
PR tree-optimization/80153
* tree-affine.c (aff_combination_to_tree): Get base pointer from
the first element of pointer type aff_tree. Build result expr in
aff_tree's type.
(add_elt_to_tree): Convert to type unconditionally. Remove other
fold_convert calls.
* tree-ssa-loop-ivopts.c (alloc_iv): Pass in consistent types.
(rewrite_use_nonlinear_expr): Check invariant using iv information.
gcc/testsuite
PR tree-optimization/80153
* gcc.c-torture/execute/pr80153.c: New.
From-SVN: r246810
2017-04-10 Richard Biener <rguenther@suse.de>
PR middle-end/80362
* fold-const.c (fold_binary_loc): Look at unstripped ops when
looking for NEGATE_EXPR in -A / -B to A / B folding.
* gcc.dg/torture/pr80362.c: New testcase.
From-SVN: r246805
2017-04-10 Richard Biener <rguenther@suse.de>
PR tree-optimization/80304
* tree-ssa-loop-im.c (ref_indep_loop_p_1): Also recurse
for safelen.
* gcc.dg/torture/pr80304.c: New testcase.
From-SVN: r246803
PR c++/80095
* call.c (build_over_call): Don't check cxx_dialect.
* cp-gimplify.c (cp_gimplify_init_expr): Don't check cxx_dialect nor
whether SUB is a CONSTRUCTOR.
* init.c (build_new_1): Don't check cxx_dialect.
* tree.c (replace_placeholders): Add a function comment. Return if
not in C++14, or if the object isn't a (member of a) class.
* typeck2.c (store_init_value): Don't check cxx_dialect nor whether
TYPE is CLASS_TYPE_P.
* g++.dg/cpp1y/nsdmi-aggr8.C: New test.
From-SVN: r246772
2017-04-07 Martin Liska <mliska@suse.cz>
PR ipa/80212
* g++.dg/ipa/pr80212.C: New test.
2017-04-07 Martin Liska <mliska@suse.cz>
PR ipa/80212
* ipa-split.c (split_function): Add function part to a same comdat
group.
From-SVN: r246759
2017-04-07 Richard Biener <rguenther@suse.de>
PR tree-optimization/80334
* g++.dg/torture/pr80334.C: Use __BIGGEST_ALIGNMENT__ for
alignas on stack.
From-SVN: r246757
2017-04-07 Richard Biener <rguenther@suse.de>
PR middle-end/80341
* tree.c (get_unwidened): Also handle ! for_type case for
INTEGER_CSTs.
* convert.c (do_narrow): Split out from ...
(convert_to_integer_1): ... here. Do not pass final truncation
type to get_unwidened for TRUNC_DIV_EXPR.
* gcc.dg/torture/pr80341.c: New testcase.
From-SVN: r246756
PR debug/80234
* dwarf2out.c (gen_member_die): Handle C++17 inline static data
members with redundant out-of-class redeclaration.
* g++.dg/debug/dwarf2/pr80234-1.C: New test.
* g++.dg/debug/dwarf2/pr80234-2.C: New test.
From-SVN: r246743
2017-04-05 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/70703
* ira-color.c (update_costs_from_allocno): Use the smallest mode.
(update_conflict_hard_regno_costs): Use long instead of unsigned
arithmetic for cost calculation.
2017-04-05 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/70703
* gcc.target/i386/pr70703.c: New.
From-SVN: r246707
builtin_eh_return requires the return address to be saved on the
stack. The patch prevents using an FPR for that.
gcc/ChangeLog:
2017-04-05 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR target/79890
* config/s390/s390.c (s390_register_info_gprtofpr): Return if
call_eh_return is true.
gcc/testsuite/ChangeLog:
2017-04-05 Dominik Vogt <vogt@linux.vnet.ibm.com>
PR target/79890
* gcc.target/s390/pr79890.c: New test case.
From-SVN: r246701
PR target/80310
* tree-nvr.c: Include internal-fn.h.
(pass_return_slot::execute): Ignore internal calls without
direct optab.
* c-c++-common/ubsan/pr80310.c: New test.
From-SVN: r246699
PR c++/80297
* genmatch.c (capture::gen_transform): For GENERIC unshare_expr
captures used multiple times, except for the last use.
* generic-match-head.c: Include gimplify.h.
* g++.dg/torture/pr80297.C: New test.
Co-Authored-By: Richard Biener <rguenther@suse.de>
From-SVN: r246693
2017-04-03 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
PR target/80307
* config/arm/arm.c (thumb1_rtx_costs): Give a cost of 32
instructions for small multiply cores.
gcc/testsuite/
PR target/80307
* gcc.target/arm/small-multiply-m0-1.c: Do not skip test if not
targeting any CPU or architecture.
* gcc.target/arm/small-multiply-m0-2.c: Likewise.
* gcc.target/arm/small-multiply-m0-3.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-1.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-2.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-3.c: Likewise.
* gcc.target/arm/small-multiply-m1-1.c: Likewise.
* gcc.target/arm/small-multiply-m1-2.c: Likewise.
* gcc.target/arm/small-multiply-m1-3.c: Likewise.
From-SVN: r246682
2017-03-18 Nicolas Koenig <koenigni@student.ethz.ch>
PR fortran/69498
* symbol.c (gfc_delete_symtree): If there is a period in the name, ignore
everything before it.
2017-03-18 Nicolas Koenig <koenigni@student.ethz.ch>
PR fortran/69498
* gfortran.dg/submodule_unexp.f90: New test.
From-SVN: r246679
PR target/80286
* config/i386/i386.c (ix86_expand_args_builtin): If op has scalar
int mode, convert_modes it to mode as unsigned, otherwise use
lowpart_subreg to mode rather than SImode.
* config/i386/sse.md (<mask_codefor>ashr<mode>3<mask_name>,
ashr<mode>3, ashr<mode>3<mask_name>, <shift_insn><mode>3<mask_name>):
Use DImode instead of SImode for the shift count operand.
* config/i386/mmx.md (mmx_ashr<mode>3, mmx_<shift_insn><mode>3):
Likewise.
testsuite/
* gcc.target/i386/avx-pr80286.c: New test.
* gcc.dg/pr80286.c: New test.
From-SVN: r246676
2017-04-04 Richard Biener <rguenther@suse.de>
PR middle-end/80281
* match.pd (A + (-B) -> A - B): Make sure to preserve unsigned
arithmetic done for the negate or the plus. Simplify.
(A - (-B) -> A + B): Likewise.
* fold-const.c (split_tree): Make sure to not negate pointers.
* gcc.dg/torture/pr80281.c: New testcase.
From-SVN: r246674
The function simplify_binary_operation_1 has code that does
/* Convert (compare (gt (flags) 0) (lt (flags) 0)) to (flags). */
but this transformation is only valid if "flags" has the same machine
mode as the outer compare. This fixes it.
PR rtl-optimization/60818
* simplify-rtx.c (simplify_binary_operation_1): Do not replace
a compare of comparisons with the thing compared if this results
in a different machine mode.
gcc/testsuite/
PR rtl-optimization/60818
* gcc.c-torture/compile/pr60818.c: New testcase.
From-SVN: r246666
This patch fixes the vcond shift testcase that failed since setting
PARAM_MIN_VECT_LOOP_BOUND in the s390 backend.
gcc/testsuite/ChangeLog:
2017-04-03 Robin Dapp <rdapp@linux.vnet.ibm.com>
* gcc.target/s390/vector/vcond-shift.c (foo, foo2, foo3, baz, baf)
(bal): Increase iteration count and assume alignment.
From-SVN: r246644
2017-04-02 Andrew Pinski <apinski@cavium.com>
* gcc.c-torture/compile/nested-3.c: New testcase.
* gcc.c-torture/execute/20170401-1.c: New testcase.
* gcc.c-torture/execute/20170401-2.c: New testcase.
From-SVN: r246639
PR rtl-optimization/79405
* fwprop.c (propagations_left): New variable.
(forward_propagate_into): Decrement it.
(fwprop_init): Initialize it.
(fw_prop): If the variable has reached zero, stop propagating.
(fwprop_addr): Ditto.
gcc/testsuite/
PR rtl-optimization/79405
gcc.dg/pr79405.c: New testcase.
From-SVN: r246627
PR debug/79255
* dwarf2out.c (decls_for_scope): If BLOCK_NONLOCALIZED_VAR is
a FUNCTION_DECL, pass it as decl instead of origin to
process_scope_var.
* gcc.dg/pr79255.c: New test.
From-SVN: r246622
PR c++/79572
* c-ubsan.h (ubsan_maybe_instrument_reference): Change argument to
tree *.
* c-ubsan.c (ubsan_maybe_instrument_reference): Likewise. Handle
not just NOP_EXPR to REFERENCE_TYPE, but also INTEGER_CST with
REFERENCE_TYPE.
* cp-gimplify.c (cp_genericize_r): Sanitize INTEGER_CSTs with
REFERENCE_TYPE. Adjust ubsan_maybe_instrument_reference caller
for NOP_EXPR to REFERENCE_TYPE.
* g++.dg/ubsan/null-8.C: New test.
From-SVN: r246621
Jakub Jelinek
Eric Botcazou
Uros Bizjak
Michael Meissner
Jose E. Marchesi
Georg-Johann Lay
Tom de Vries
Richard Biener
Jerry DeLisle
Segher Boessenkool
Marek Polacek
Thomas Preud'homme
Martin Liska
James Greenhalgh
Janus Weil
Uros Bizjak
Thomas Koenig
David S. Miller
Prakhar Bahuguna
Martin Jambor
Andreas Krebbel
Sheldon Lobo
Bill Schmidt
Eric Botcazou
Steven G. Kargl
GCC Administrator
Martin Sebor
Ramana Radhakrishnan
Bill Seurer
Dominik Vogt
Jonathan Wakely
Senthil Kumar Selvaraj
Jeff Law
Richard Sandiford
Bernd Edlinger
Kelvin Nilsen
Dominique d'Humieres
Andrew Burgess
Vladimir Makarov
Denis Khalikov
Jakub Jelinek
Martin Sebor
Nicolas Koenig
David Edelsohn
Daniel Santos
Bin Cheng
Nathan Sidwell
Rainer Orth
Volker Reichelt
Peter Bergner
Robin Dapp
Bin Cheng
Andrew Pinski
Pat Haugen