* config/v850/lib1funcs.S: Add support for e3v5 architecture
variant.
* config/v850/constraints.md (Q): Define as a memory constraint.
* config/v850/predicates.md (label_ref_operand): New predicate.
(e3v5_shift_operand): New predicate.
(ior_operator): New predicate.
* config/v850/t-v850: Add e3v5 multilib.
* config/v850/v850-protos.h (v850_adjust_insn_length): Prototype.
(v850_gen_movdi): Prototype.
* config/v850/v850.c: Add support for e3v5 architecture.
Rename all uses of TARGET_V850E || TARGET_V850E2_ALL to
TARGET_V850E_UP.
(construct_save_jarl): Add e3v5 long JARL support.
(v850_adjust_insn_length): New function. Adjust length of call
insns when using e3v5 instructions.
(v850_gen_movdi): New function: Generate instructions to move a
DImode value.
* config/v850/v850.h (TARGET_CPU_v850e3v5): Define.
(CPP_SPEC): Define __v850e3v5__ as appropriate.
(TARGET_USE_FPU): Enable for e3v5.
(CONST_OK_FOR_W): New macro.
(ADJUST_INSN_LENGTH): Define.
* config/v850/v850.md (UNSPEC_LOOP): Define.
(attr cpu): Add v850e3v5.
Rename all uses of TARGET_V850E2 to TARGET_V850E2V3_UP.
(movdi): New pattern.
(movdi_internal): New pattern.
(cbranchsf4): Conditionalize on TARGET_USE_FPU.
(cbranchdf4): Conditionalize on TARGET_USE_FPU.
(cstoresf4): Likewise.
(cstoredf4): Likewise.
(insv): New pattern.
(rotlso3_a): New pattern.
(rotlsi3_b): New pattern
(rotlsi3_v850e3v5): New pattern.
(doloop_begin): New pattern.
(fix_loop_counter): New pattern.
(doloop_end): New pattern.
(branch_normal): Add e3v5 long branch support.
(branch_invert): Likewise.
(branch_z_normal): Likewise.
(branch_z_invert): Likewise.
(branch_nz_normal): Likewise.
(branch_nz_invert): Likewise.
(call_internal_short): Add e3v5 register-indirect JARL support.
(call_internal_long): Likewise.
(call_value_internal_short): Likewise.
(call_value_internal_long): Likewise.
* config/v850/v850.opt (mv850e3v5, mv850e2v4): New options.
(mloop): New option.
* config.gcc: Add support for configuring v840e3v5 target.
* doc/invoke.texi: Document new v850 specific command line
options.
From-SVN: r195623
gcc: PR target/54663
* config.gcc (microblaze*-linux*): Add tmake_file to allow building
of microblaze-c.o.
libgcc:
* config.host(microblaze*-linux*): tmake_file: Remove
t-slibgcc-nolc-override, add t-slibgcc-libgcc.
* config/microblaze/t-microblaze: Set LIB2FUNCS_EXCLUDE
to exclude functions from being built with libgcc.c and use
the microblaze assembly.
From-SVN: r195488
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Cast the
results of (dcache_lsize - 1) and (icache_lsize - 1) to the type
__UINTPTR_TYPE__; also cast 'base' to the same type before the
alignment operation.
From-SVN: r195266
* fixed-bit.c (SATFRACT) <FROM_TYPE=1, TO_TYPE=4>: Only
declare / set min_low, min_high if TO_MODE_UNSIGNED == 0.
(SATFRACT) <FROM_TYPE=TO_TYPE=4>: Only declare / set min_low,
min_high if FROM_MODE_UNSIGNED == 0 and TO_MODE_UNSIGNED == 0.
From-SVN: r195141
libgcc/
Adjust decimal point of signed accum mode to GCC default.
PR target/54222
* config/avr/t-avr (LIB1ASMFUNCS): Add _fractsfsq _fractsfusq,
_divqq_helper.
* config/avr/lib1funcs-fixed.S (__fractqqsf, __fracthqsf)
(__fractsasf, __fractsfha, __fractusqsf, __fractsfsa)
(__mulha3, __mulsa3)
(__divqq3, __divha3, __divsa3): Adjust to new position of
decimal point of signed accum types.
(__mulusa3_round): New function.
(__mulusa3): Use it.
(__divqq_helper): New function.
(__udivuqq3): Use it.
gcc/
Adjust decimal point of signed accum mode to GCC default.
PR target/54222
* config/avr/avr-modes.def (HA, SA, DA): Remove mode adjustments.
(TA): Move decimal point one bit to the right.
* config/avr/avr.c (avr_out_fract): Rewrite.
From-SVN: r193721
This patch addresses the bogus "Invocation mismatch" messages seen in parallel
profiledbootstrap builds of gcc. See PR bootstrap/55051 for a discussion of
why this is occurring and why this checking is inaccurate. Leave it in when
!GCOV_LOCKED, to warn about concurrent update issues requiring locking.
2012-11-18 Teresa Johnson <tejohnson@google.com>
PR bootstrap/55051
* libgcov.c (gcov_exit): Remove merged program summary
comparison unless !GCOV_LOCKED.
From-SVN: r193612
* generic-morestack.c (__generic_morestack): Align the returned
stack pointer to a 32 byte boundary.
* config/i386/morestack.S (__morestack_non_split) [32-bit]: Don't
increment the return address until we have decided that we don't
have a varargs function.
(__morestack) [32-bit]: Align stack correctly when calling C
functions.
(__morestack) [64-bit]: Likewise.
From-SVN: r193264
* config/i386/crtfastmath.c (set_fast_math): Use __builtin_ia32_fxsave.
Clear only fxsave.mxcsr_mask. Use saved mxcsr from fxsave structure
when appropriate. Correct structure element types.
* config/i386/t-crtfm (crtfastmath.o): Compile with -mfxsr, remove
-minline-all-stringops from compile flags.
From-SVN: r192855
* config/mmix/crti.S: Mark program and data addresses using PRELD.
Remove typo'd and unnecessary alignment-LOC for .data. Remove
no-longer-needed LDBU insns.
From-SVN: r192646
2012-10-07 Matthias Klose <doko@ubuntu.com>
* config/arm/unwind-arm.h (__gnu_unwind_24bit): Mark parameters
as unused.
(_Unwind_decode_typeinfo_ptr): Mark base as unused.
From-SVN: r192182
2012-10-07 Matthias Klose <doko@ubuntu.com>
* config/arm/unwind-arm.h (__gnu_unwind_24bit): Mark parameters
as unused.
(_Unwind_decode_typeinfo_ptr): Mark base as unused.
From-SVN: r192181
