Commit Graph

178214 Commits

Author SHA1 Message Date
Richard Biener
c4facd483d tree-optimization/96163 - fix placement issue with SLP and vectors
This avoids placing stmts beyond the vectorizer region begin which
confuses vect_stmt_dominates_stmt_p.

2020-07-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/96163
	* tree-vect-slp.c (vect_schedule_slp_instance): Put new stmts
	at least after region begin.

	* g++.dg/vect/pr96163.cc: New testcase.
2020-07-13 16:50:07 +02:00
Mark Eggleston
3f06901101 Fortran : ICE in gfc_find_array_ref(): No ref found PR95981
When looking for an array reference allow NULL references.  If
no array reference is found dim_rank_check should return false.

2020-07-13  Steven G. Kargl  <kargl@gcc.gnu.org>

gcc/fortran/

	PR fortran/95981
	* check.c (dim_rank_check): Allow NULL references in call to
	gfc_find_array_ref and return false if no reference is found.

2020-07-13  Mark Eggleston  <markeggleston@gcc.gnu.org>

gcc/testsuite/

	PR fortran/95981
	* gfortran.dg/pr95981.f90: New test.
2020-07-13 15:11:45 +01:00
Szabolcs Nagy
a1faa8e247 aarch64: Add missing ACLE support for PAC-RET
Define the __ARM_FEATURE_PAC_DEFAULT feature test
macro when PAC-RET branch protection is enabled.

2020-07-13  Szabolcs Nagy  <szabolcs.nagy@arm.com>

gcc/ChangeLog:

	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Add
	__ARM_FEATURE_PAC_DEFAULT support.
2020-07-13 13:49:21 +01:00
Szabolcs Nagy
6a391e06f9 doc: Clarify __builtin_return_address [PR94891]
The expected semantics and valid usage of __builtin_return_address is
not clear since it exposes implementation internals that are normally
not meaningful to portable c code.

This documentation change tries to clarify the semantics in case the
return address is stored in a mangled form. This affects AArch64 when
pointer authentication is used for the return address signing (i.e.
-mbranch-protection=pac-ret).

2020-07-13  Szabolcs Nagy  <szabolcs.nagy@arm.com>

gcc/ChangeLog:

	PR target/94891
	* doc/extend.texi: Update the text for  __builtin_return_address.
2020-07-13 13:49:21 +01:00
Szabolcs Nagy
b097c7a27f libgcc: fix the handling of return address mangling [PR94891]
Mangling, currently only used on AArch64 for return address signing,
is an internal representation that should not be exposed via

  __builtin_return_address return value,
  __builtin_eh_return handler argument,
  _Unwind_DebugHook handler argument.

Note that a mangled address might not even fit into a void *, e.g.
with AArch64 ilp32 ABI the return address is stored as 64bit, so
the mangled return address cannot be accessed via _Unwind_GetPtr.

This patch changes the unwinder hooks as follows:

MD_POST_EXTRACT_ROOT_ADDR is removed: root address comes from
__builtin_return_address which is not mangled.

MD_POST_EXTRACT_FRAME_ADDR is renamed to MD_DEMANGLE_RETURN_ADDR,
it now operates on _Unwind_Word instead of void *, so the hook
should work when return address signing is enabled on AArch64 ilp32.
(But for that __builtin_aarch64_autia1716 should be fixed to operate
on 64bit input instead of a void *.)

MD_POST_FROB_EH_HANDLER_ADDR is removed: it is the responsibility of
__builtin_eh_return to do the mangling if necessary.

2020-07-13  Szabolcs Nagy  <szabolcs.nagy@arm.com>

libgcc/ChangeLog:

	PR target/94891
	* config/aarch64/aarch64-unwind.h (MD_POST_EXTRACT_ROOT_ADDR): Remove.
	(MD_POST_FROB_EH_HANDLER_ADDR): Remove.
	(MD_POST_EXTRACT_FRAME_ADDR): Rename to ...
	(MD_DEMANGLE_RETURN_ADDR): This.
	(aarch64_post_extract_frame_addr): Rename to ...
	(aarch64_demangle_return_addr): This.
	(aarch64_post_frob_eh_handler_addr): Remove.
	* unwind-dw2.c (uw_update_context): Demangle return address.
	(uw_frob_return_addr): Remove.
2020-07-13 13:49:20 +01:00
Szabolcs Nagy
2bc95be3bb aarch64: fix __builtin_eh_return with pac-ret [PR94891]
Currently __builtin_eh_return takes a signed return address, which can
cause ABI and API issues: 1) pointer representation problems if the
address is passed around before eh return, 2) the source code needs
pac-ret specific changes and needs to know if pac-ret is used in the
current frame, 3) signed address may not be representible as void *
(with ilp32 abi).

Using address signing to protect eh return is ineffective because the
instruction sequence in the unwinder that starts from the address
signing and ends with a ret can be used as a return to anywhere gadget.
Using indirect branch istead of ret with bti j landing pads at the
target can reduce the potential of such gadget, which also implies
that __builtin_eh_return should not take a signed address.

This is a big hammer fix to the ABI and API issues: it turns pac-ret
off for the caller completely (not just on the eh return path).  To
harden the caller against ROP attacks, it should use indirect branch
instead of ret, this is not attempted so the patch remains small and
backportable.

2020-07-13  Szabolcs Nagy  <szabolcs.nagy@arm.com>

gcc/ChangeLog:

	PR target/94891
	* config/aarch64/aarch64.c (aarch64_return_address_signing_enabled):
	Disable return address signing if __builtin_eh_return is used.

gcc/testsuite/ChangeLog:

	PR target/94891
	* gcc.target/aarch64/return_address_sign_1.c: Update test.
	* gcc.target/aarch64/return_address_sign_b_1.c: Likewise.
2020-07-13 13:49:20 +01:00
Szabolcs Nagy
463a54e5d4 aarch64: fix return address access with pac [PR94891][PR94791]
This is a big hammer fix for __builtin_return_address (PR target/94891)
returning signed addresses (sometimes, depending on wether lr happens
to be signed or not at the time of call which depends on optimizations),
and similarly -pg may pass signed return address to _mcount
(PR target/94791).

At the time of return address expansion we don't know if it's signed or
not so it is done unconditionally.

2020-07-13  Szabolcs Nagy  <szabolcs.nagy@arm.com>

gcc/ChangeLog:

	PR target/94891
	PR target/94791
	* config/aarch64/aarch64-protos.h (aarch64_return_addr_rtx): Declare.
	* config/aarch64/aarch64.c (aarch64_return_addr_rtx): New.
	(aarch64_return_addr): Use aarch64_return_addr_rtx.
	* config/aarch64/aarch64.h (PROFILE_HOOK): Likewise.
2020-07-13 13:49:20 +01:00
Richard Sandiford
5834e96a08 ipa-devirt: Fix crash in obj_type_ref_class [PR95114]
The testcase has failed since r9-5035, because obj_type_ref_class
tries to look up an ODR type when no ODR type information is
available.  (The information was available earlier in the
compilation, but was freed during pass_ipa_free_lang_data.)
We then crash dereferencing the null get_odr_type result.

The test passes with -O2.  However, it fails again if -fdump-tree-all
is used, since obj_type_ref_class is called indirectly from the
dump routines.

Other code creates ODR type entries on the fly by passing “true”
as the insert parameter.  But obj_type_ref_class can't do that
unconditionally, since it should have no side-effects when used
from the dumping code.

Following a suggestion from Honza, this patch adds parameters
to say whether the routines are being called from dump routines
and uses those to derive the insert parameter.

gcc/
	PR middle-end/95114
	* tree.h (virtual_method_call_p): Add a default-false parameter
	that indicates whether the function is being called from dump
	routines.
	(obj_type_ref_class): Likewise.
	* tree.c (virtual_method_call_p): Likewise.
	* ipa-devirt.c (obj_type_ref_class): Likewise.  Lazily add ODR
	type information for the type when the parameter is false.
	* tree-pretty-print.c (dump_generic_node): Update calls to
	virtual_method_call_p and obj_type_ref_class accordingly.

gcc/testsuite/
	PR middle-end/95114
	* g++.target/aarch64/pr95114.C: New test.
2020-07-13 13:47:39 +01:00
Jonathan Wakely
ba8fe4b483 libstdc++: Fix istream::ignore exit conditions (PR 94749, PR 96161)
My previous fix for PR 94749 did fix the reported case, so that the next
character is not discarded if it happens to equal the delimiter when __n
characters have already been read. But it introduced a new bug, which is
that the delimiter character would *not* be discarded if the number of
characters discarded is numeric_limits<streamsize>::max() or more before
reaching the delimiter.

The new bug happens because I changed the code to check _M_gcount < __n.
But when __n == numeric_limits<streamsize>::max() that is false, and so
we don't discard the delimiter. It's not sufficient to check for the
delimiter when the __large_ignore condition is true, because there's an
edge case where the delimiter is reached when _M_gcount == __n and so
we break out of the loop without setting __large_ignore.

PR 96161 is a similar bug to the original PR 94749 report, where eofbit
is set after discarding __n characters if there happen to be no more
characters in the stream.

This patch fixes both cases (and the regression) by checking different
conditions for the __n == max case and the __n < max case. For the
former case, we know that we must have either reached the delimiter or
EOF, and the value of _M_gcount doesn't matter (except to avoid integer
overflow). For the latter case we need to check _M_gcount first and only
set eofbit or discard the delimiter if it didn't reach __n. For the
latter case overflow can't happen because _M_gcount <= __n < max.

libstdc++-v3/ChangeLog:

	PR libstdc++/94749
	PR libstdc++/96161
	* include/bits/istream.tcc (basic_istream::ignore(streamsize))
	[n == max]: Check overflow conditions on _M_gcount. Rely on
	the fact that either EOF or the delimiter was reached.
	[n < max]: Check _M_gcount < n before checking for EOF or
	delimiter.
	(basic_istream::ignore(streamsize, char_type): Likewise.
	* src/c++98/compatibility.cc (istream::ignore(streamsize))
	(wistream::ignore(streamsize)): Likewise.
	* src/c++98/istream.cc (istream::ignore(streamsize, char_type))
	(wistream::ignore(streamsize, char_type)): Likewise.
	* testsuite/27_io/basic_istream/ignore/char/94749.cc: Check that
	delimiter is discarded if the number of characters ignored
	doesn't fit in streamsize.
	* testsuite/27_io/basic_istream/ignore/wchar_t/94749.cc:
	Likewise.
	* testsuite/27_io/basic_istream/ignore/char/96161.cc: New test.
	* testsuite/27_io/basic_istream/ignore/wchar_t/96161.cc: New test.
2020-07-13 12:09:44 +01:00
Julian Brown
b20097c65d openacc: Don't strip TO_PSET/POINTER for enter/exit data
OpenACC 2.6 specifies that the array descriptor (when present) must be
copied to the target before attaching pointers in Fortran. This patch
reverses the stripping of GOMP_MAP_TO_PSET and GOMP_MAP_POINTER that
was introduced by the "OpenACC reference count overhaul" patch.

2020-07-10  Julian Brown  <julian@codesourcery.com>
	    Thomas Schwinge  <thomas@codesourcery.com>

gcc/
	* gimplify.c (gimplify_scan_omp_clauses): Do not strip
	GOMP_MAP_TO_PSET/GOMP_MAP_POINTER for OpenACC enter/exit data
	directives (see also PR92929).

gcc/testsuite/
	* gfortran.dg/goacc/finalize-1.f: Update expected dump output.

libgomp/
	* testsuite/libgomp.oacc-fortran/dynamic-pointer-1.f90: New test.

Co-Authored-By: Thomas Schwinge <thomas@codesourcery.com>
2020-07-13 03:21:20 -07:00
Richard Biener
7a4770f039 fix global variable alignment for testcase gcc.dg/torture/pr96133.c
The testcase was errorneously accessing the global variable via a
type that might require bigger alignment than provided.  Fix that
via an appropriate attribute.

2020-07-13  Richard Biener  <rguenther@suse.de>

	PR testsuite/96180
	* gcc.dg/torture/pr96133.c: Align global variable.
2020-07-13 11:42:49 +02:00
Roger Sayle
b8697d0cd0 middle-end: Remove truly_noop_truncation check from convert.c
This patch eliminates a check of targetm.truly_noop_truncation from
the early middle-end, where the gimple/generic being generated by
GCC's front-ends is being inappropriately influenced by the target's
TRULY_NOOP_TRUNCATION.  The (recent) intention of TRULY_NOOP_TRUNCATION
is to indicate that a backend requires explicit truncation instructions
rather than using SUBREGs to perform truncations.  A long standing
(and probably unintentional) side-effect has been that this setting
also controls whether the middle-end narrows integer operations at
the tree-level.  Understandably, GCC and its testsuite assume that
GIMPLE and GENERIC behave consistently across platforms, and alas
defining TRULY_NOOP_TRUNCATION away from the default triggers several
regressions (including gcc.dg/fold-rotate-1.c).

2020-07-13  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
	* convert.c (convert_to_integer_1): Narrow integer operations
	even on targets that require explicit truncation instructions.
2020-07-13 09:49:34 +01:00
Hans-Peter Nilsson
9a2ae08b02 cris: Add new pass eliminating compares after delay-slot-filling
Delayed-branch-slot-filling a.k.a. reorg or dbr, often causes
opportunities for more compare-elimination than were visible for
the cmpelim pass.  With cc0, these were caught by the
elimination pass run in "final", thus the missed opportunities
is a regression.  A simple reorg-aware pass run just after reorg
handles most of them, if not all.  I chose to keep the "mach2"
pass identifier string I copy-pasted from the SPARC port instead
of inventing one like "postdbr_cmpelim".  Note the gap in numbers
in the test-case file names.

gcc:
	PR target/93372
	* config/cris/cris-passes.def: New file.
	* config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def.
	* config/cris/cris.c: Add infrastructure bits and pass execute
	function cris_postdbr_cmpelim.
	* config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim): Declare.

gcc/testsuite:
	* gcc.target/cris/pr93372-44.c, gcc.target/cris/pr93372-46.c: New.
2020-07-13 10:14:40 +02:00
Hans-Peter Nilsson
881fb2091c cris: Remove config/cris/t-cris gt-cris.h cargo
Getting tired of:

make[1]: Entering directory 'x/gccobj/gcc'
Makefile:2682: warning: overriding recipe for target 'gt-cris.h'
xx/gcc/gcc/config/cris/t-cris:29: warning: ignoring old recipe for target 'gt-cris.h'

I'm just going to assume it is just stale cruft no longer (if
ever) needed since nothing else but sh/t-sh has it, and the
commit log shows just (x prepended to avoid commit-log parsing
confusion):
x    Merge from pch-branch up to tag pch-commit-20020603.
x
x    From-SVN: r54232

Building "works better"; the related warning is gone.

This effectively empties the t-cris file, but stuff will be
added soon enough that it's kept around.

gcc:
	* config/cris/t-cris: Remove gt-cris.h-related excessive cargo.
2020-07-13 10:14:18 +02:00
Hans-Peter Nilsson
ef07c7a588 cris: Use addi.b for additions where flags aren't inspected
Comparing to the cc0 version of the CRIS port, I ran a few
microbenchmarks, for example gcc.c-torture/execute/arith-rand.c,
where there's sometimes an addition between an operation of
interest and the test on the result.

Unfortunately this patch doesn't remedy all the performance
regression for that program.  But, this patch by itself helps
and makes sense to commit separately: lots of addi.b in
previously empty delay-slots, with functions shortened by one or
a few insns, in libgcc.  I had an experience with the
reload-related caveat of % on constraints, which is "fixed"
documentationwise since long (soon 15 years ago;
be3914df4cc8/r105517).  I removed an even older related FIXME.

gcc:
	PR target/93372
	* config/cris/cris.md ("*add<mode>3_addi"): New splitter.
	("*addi_b_<mode>"): New pattern.
	("*addsi3<setnz>"): Remove stale %-related comment.

gcc/testsuite:
	PR target/93372
	* gcc.target/cris/pr93372-45.c: New test.
2020-07-13 10:13:51 +02:00
Hans-Peter Nilsson
f4ac1a7fee cris: Correct output templates in define_subst patterns.
Whoops.  This little gem had the effect of making the output
operand (0) constraints disappear but not the input operand (1)
constraints for define_subst:ed patterns, probably because
there's another (match_dup 1) in the output template (not
investigated).

That went surprisingly unnoticed until I added a pass leaning
just a little bit harder on the define_subst:ed patterns and
then only by the libgfortran library generating assembly with
nominally incorrect syntax.  (There was a move to a special
register from a general register, and it incorrectly matched a
pattern affecting condition codes.)

gcc:
	* config/cris/cris.md ("setnz_subst", "setnz_subst", "setcc_subst"):
	Use match_dup in output template, not match_operand.
2020-07-13 10:13:35 +02:00
Richard Biener
79fcdd2dd9 make var-tracking iteration consistent
This eliminates the visited bitmap and makes whether a to be processed
block goes to the next or the current iteration only depend on its
position in RPO order rather than on whether it was visited in the
current iteration.  As optimization single-BB iteration is processed
immediately.

2020-07-10  Richard Biener  <rguenther@suse.de>

	* var-tracking.c (bb_heap_node_t): Remove unused typedef.
	(vt_find_locations): Eliminate visited bitmap in favor of
	RPO order check.  Dump statistics about the number of
	local BB dataflow computes.
2020-07-13 09:30:12 +02:00
Hans-Peter Nilsson
a4aca1edaf PR94600: fix volatile access to the whole of a compound object.
The store to the whole of each volatile object was picked apart
like there had been an individual assignment to each of the
fields.  Reads were added as part of that; see PR for details.
The reads from volatile memory were a clear bug; individual
stores questionable.  A separate patch clarifies the docs.

gcc:

2020-07-09  Richard Biener  <rguenther@suse.de>

	PR middle-end/94600
	* expr.c (expand_constructor): Make a temporary also if we're
	storing to volatile memory.

gcc/testsuite:

2020-07-09  Hans-Peter Nilsson  <hp@axis.com>

	PR middle-end/94600
	* gcc.dg/pr94600-1.c, gcc.dg/pr94600-2.c, gcc.dg/pr94600-3.c,
	gcc.dg/pr94600-4.c, gcc.dg/pr94600-5.c, gcc.dg/pr94600-6.c,
	gcc.dg/pr94600-7.c, gcc.dg/pr94600-8.c: New tests.
2020-07-13 08:08:39 +02:00
Xionghu Luo
56d78c58c2 rs6000: Define define_insn_and_split to split unspec sldi+or to rldimi
Combine pass could recognize the pattern defined and split it in split1,
this patch could optimize:

21: r130:DI=r133:DI<<0x20
11: {r129:DI=zero_extend(unspec[[r145:DI]] 87);clobber scratch;}
22: r134:DI=r130:DI|r129:DI

to

21: {r149:DI=zero_extend(unspec[[r145:DI]] 87);clobber scratch;}
22: r134:DI=r149:DI&0xffffffff|r133:DI<<0x20

rldimi is generated instead of sldi+or.

gcc/ChangeLog:

2020-07-13  Xionghu Luo  <luoxhu@linux.ibm.com>

	* config/rs6000/rs6000.md (rotl_unspec): New
	define_insn_and_split.

gcc/testsuite/ChangeLog:

2020-07-13  Xionghu Luo  <luoxhu@linux.ibm.com>

	* gcc.target/powerpc/vector_float.c: New test.
2020-07-12 20:22:56 -05:00
Xionghu Luo
466dd1629c rs6000: Init V4SF vector without converting SP to DP
Move V4SF to V4SI, init vector like V4SI and move to V4SF back.
Better instruction sequence could be generated on Power9:

lfs + xxpermdi + xvcvdpsp + vmrgew
=>
lwz + (sldi + or) + mtvsrdd

With the patch followed, it could be continue optimized to:

lwz + rldimi + mtvsrdd

The point is to use lwz to avoid converting the single-precision to
double-precision upon load, pack four 32-bit data into one 128-bit
register directly.

gcc/ChangeLog:

2020-07-13  Xionghu Luo  <luoxhu@linux.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vector_init):
	Move V4SF to V4SI, init vector like V4SI and move to V4SF back.
2020-07-12 20:21:05 -05:00
GCC Administrator
9e28851b34 Daily bump. 2020-07-13 00:16:22 +00:00
H.J. Lu
267891bd3c x86: Require Linux target for PR target/93492 tests
Since -fpatchable-function-entry is only supported on Linux and used by
Linux kernel, require Linux target for PR target/93492 tests.

	PR target/93492
	* gcc.target/i386/pr93492-1.c: Require Linux target.
	* gcc.target/i386/pr93492-2.c: Likewise.
	* gcc.target/i386/pr93492-3.c: Likewise.
	* gcc.target/i386/pr93492-4.c: Likewise.
	* gcc.target/i386/pr93492-5.c: Likewise.
2020-07-12 05:06:21 -07:00
GCC Administrator
42f19c385d Daily bump. 2020-07-12 00:16:23 +00:00
Ian Lance Taylor
e109f6e438 compiler: avoid generating unnamed bool type descriptor
We were generating it in cases where a boolean expression was
converted directly to an empty interface type.

Fixes golang/go#40152

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/242002
2020-07-11 12:41:28 -07:00
Ian Lance Taylor
e7d6d8f9f7 compiler: handle aliases to pointer types with interfaces
Test case is https://golang.org/cl/241997.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/241998
2020-07-11 12:38:10 -07:00
Roger Sayle
2b4bbc1707 middle-end: Improve RTL expansion in expand_mul_overflow,
This patch improves the RTL that the middle-end generates for testing
signed overflow following a widening multiplication.  During this
expansion the middle-end generates a truncation which can get used
multiple times.  Placing this intermediate value in a pseudo register
reduces the amount of code generated on platforms where this truncation
requires an explicit instruction.

2020-07-11  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog:
	* internal-fn.c (expand_mul_overflow): When checking for signed
	overflow from a widening multiplication, we access the truncated
	lowpart RES twice, so keep this value in a pseudo register.
2020-07-11 20:03:39 +01:00
Thomas Koenig
90efb2512d Fix ICE on warning with new interface check.
In the test case, there was a warning about INTENT where an EXTERNAL
masked an interface in an outer scope, when the location of the
symbol was not set, leading to an ICE.

Two problems, two-part solution: It makes no sense to warn about
INTENT for artificially generated formal argument lists, and the
location should be set.

gcc/fortran/ChangeLog:

	PR fortran/96073
	* frontend-passes.c (check_externals_procedure):  Add locus
	information for new_sym.
	* interface.c (gfc_check_dummy_characteristics): Do not warn
	about INTENT for artificially generated variables.

gcc/testsuite/ChangeLog:

	PR fortran/96073
	* gfortran.dg/interface_48.f90: New test.
2020-07-11 19:16:58 +02:00
David Edelsohn
2ea10cbd66 ChangeLog: add missing Bugzilla PR. 2020-07-11 11:37:56 -04:00
Richard Sandiford
505032d97d value-range: Fix handling of POLY_INT_CST anti-ranges [PR96146]
The range infrastructure has code to decompose POLY_INT_CST ranges
to worst-case integer bounds.  However, it had the fundamental flaw
(obvious in hindsight) that it applied to anti-ranges too, meaning
that a range 2+2X would end up with a range of ~[2, +INF], i.e.
[-INF, 1].  This patch decays to varying in that case instead.

I'm still a bit uneasy about this.  ISTM that in terms of
generality:

  SSA_NAME => POLY_INT_CST => INTEGER_CST
           => ADDR_EXPR

I.e. an SSA_NAME could store a POLY_INT_CST and a POLY_INT_CST
could store an INTEGER_CST (before canonicalisation).  POLY_INT_CST
is also “as constant as” ADDR_EXPR (well, OK, only some ADDR_EXPRs
are run-time rather than link-time constants, whereas all POLY_INT_CSTs
are, but still).  So it seems like we should at least be able to treat
POLY_INT_CST as symbolic.  On the other hand, I don't have any examples
in which that would be useful.

gcc/
	PR tree-optimization/96146
	* value-range.cc (value_range::set): Only decompose POLY_INT_CST
	bounds to integers for VR_RANGE.  Decay to VR_VARYING for anti-ranges
	involving POLY_INT_CSTs.

gcc/testsuite/
	PR tree-optimization/96146
	* gcc.target/aarch64/sve/acle/general/pr96146.c: New test.
2020-07-11 13:25:26 +01:00
Simon Cook
c19f95fb1b RISC-V: Fix regular expression in target-specific test
Some square brackets were missing escape characters, causing DejaGnu to
try and call a proc with the name "at".

gcc/testsuite/ChangeLog:
	* gcc.target/riscv/read-thread-pointer.c: Fix escaping on
	regular expression.
2020-07-10 21:44:07 -07:00
GCC Administrator
865362954f Daily bump. 2020-07-11 00:16:31 +00:00
David Edelsohn
c5ec2f858b aix: only create named section for VAR_DECL or FUNCTION_DECL
get_constant_section() can be passed constant-like non-DECLs, such as
CONSTRUCTOR or STRING_CST, which make DECL_SECTION_NAME unhappy
(asserted in symtab_node::get).  This patch ensures that xcoff select
section only invokes resolve_unique_section() for DECLs.

gcc/ChangeLog

2020-07-10  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/rs6000.c (rs6000_xcoff_select_section): Only
	create named section for VAR_DECL or FUNCTION_DECL.
2020-07-10 17:39:53 -04:00
Joseph Myers
b2104239c8 c: Add C2X BOOL_MAX and BOOL_WIDTH to limits.h
C2X adds BOOL_MAX and BOOL_WIDTH macros to <limits.h>.  As GCC only
supports values 0 and 1 for _Bool (regardless of the number of bits in
the representation, other bits are padding bits and if any of them are
nonzero, the representation is a trap representation), the values of
those macros can just be hardcoded directly in <limits.h> rather than
needing corresponding predefined macros.

Bootstrapped with no regressions on x86_64-pc-linux-gnu.

gcc/
	* glimits.h [__STDC_VERSION__ > 201710L] (BOOL_MAX, BOOL_WIDTH):
	New macros.

gcc/testsuite/
	* gcc.dg/c11-bool-limits-1.c, gcc.dg/c2x-bool-limits-1.c: New
	tests.
2020-07-10 21:35:51 +00:00
Aaron Sawdey
ed1d3639e4 rs6000: Add execution tests for mma builtins [v4]
This patch adds execution tests that use the MMA builtins and
check for the right answer, and new tests that checks whether
__builtin_cpu_supports and __builtin_cpu_is return sane
answers for power10.

2020-06-30  Rajalakshmi Srinivasaraghavan  <rajis@linux.vnet.ibm.com>
	    Aaron Sawdey  <acsawdey@linux.ibm.com>

gcc/testsuite/
	* gcc.target/powerpc/p10-identify.c: New file.
	* gcc.target/powerpc/p10-arch31.c: New file.
	* gcc.target/powerpc/mma-single-test.c: New file.
	* gcc.target/powerpc/mma-double-test.c: New file.
2020-07-10 16:10:39 -05:00
Alexander Popov
5ada27f8e0 Improve shrink wrapping debug output
Currently if requires_stack_frame_p() returns true for some insn, the
shrink-wrapping debug output contains only the number of a block containing
that insn.

But it is very useful to see the particular insn that requires the prologue.
Let's call print_rtl_single to display that insn in the following pass dump.

gcc/

	* shrink-wrap.c (try_shrink_wrapping): Improve debug output.
2020-07-10 14:26:05 -06:00
Mike Nolta
def4c0b47e This is a harmless bug, as the script still works, but curl's '-O' option isn't the same as wget's.
contrib/ChangeLog:

	* download_prerequisites: Don't pass wget options to curl.
2020-07-10 14:06:23 -06:00
Harald Anlauf
70c884a4b8 PR fortran/95980 - ICE in get_unique_type_string, at fortran/class.c:485
In SELECT TYPE, the argument may be an incorrectly specified unlimited
CLASS variable.  Avoid NULL pointer dereferences for clean error
recovery.

gcc/fortran/
	PR fortran/95980
	* class.c (gfc_add_component_ref, gfc_build_class_symbol):
	Add checks for NULL pointer dereference.
	* primary.c (gfc_variable_attr): Likewise.
	* resolve.c (resolve_variable, resolve_assoc_var)
	(resolve_fl_var_and_proc, resolve_fl_variable_derived)
	(resolve_symbol): Likewise.
2020-07-10 21:35:35 +02:00
Harald Anlauf
8a0b69f0b0 PR fortran/96086 - ICE in gfc_match_select_rank, at fortran/match.c:6645
Handle NULL pointer dereference on SELECT RANK with an invalid
assumed-rank array declaration.

gcc/fortran/
	PR fortran/96086
	* match.c (gfc_match_select_rank): Catch NULL pointer
	dereference.
	* resolve.c (resolve_assoc_var): Catch NULL pointer dereference
	that may occur after an illegal declaration.
2020-07-10 21:00:13 +02:00
Ian Lance Taylor
2b6d99468d libgo: update to Go 1.14.4 release
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/241999
2020-07-10 11:30:23 -07:00
Richard Sandiford
510125d227 expr: Move reduce_bit_field target mode check [PR96151]
In some cases, expand_expr_real_2 prefers to use the mode of the
caller-suggested target instead of the mode of the expression when
passing values to reduce_to_bit_field_precision.  E.g.:

      else if (target == 0)
        op0 = convert_to_mode (mode, op0,
                               TYPE_UNSIGNED (TREE_TYPE
                                              (treeop0)));
      else
        {
          convert_move (target, op0,
                        TYPE_UNSIGNED (TREE_TYPE (treeop0)));
          op0 = target;
        }

where “op0” might not have “mode” for the “else” branch,
but does for all the others.

reduce_to_bit_field_precision discards the suggested target if it
has the wrong mode.  This patch moves that to expand_expr_real_2
instead (conditional on reduce_bit_field).

gcc/
	PR middle-end/96151
	* expr.c (expand_expr_real_2): When reducing bit fields,
	clear the target if it has a different mode from the expression.
	(reduce_to_bit_field_precision): Don't do that here.  Instead
	assert that the target already has the correct mode.
2020-07-10 19:06:46 +01:00
Richard Sandiford
efe99cca78 arm: Treat GNU and Advanced SIMD vectors as distinct [PR92789, PR95726]
This is an arm version of aarch64 patch r11-1741.  The approach
is essentially identical, not much more than s/aarch64/arm/.

To recap, PR95726 is about template look-up for things like:

    foo<float vecf __attribute__((vector_size(16)))>
    foo<float32x4_t>

The immediate cause of the problem is that the hash function usually
returns different hashes for these types, yet the equality function
thinks they are equal.  This then raises the question of how the types
are supposed to be treated.

The answer we chose for AArch64 was that the GNU vector type should
be treated as distinct from float32x4_t, but that each type should
implicitly convert to the other.

This would mean that, as far as the PR is concerned, the hashing
function is right to (sometimes) treat the types differently and
the equality function is wrong to treat them as the same.

The most obvious way to enforce the type difference is to use a
target-specific type attribute.  That on its own is enough to fix
the PR.  The difficulty is deciding whether the knock-on effects
are acceptable.

One obvious effect is that GCC then rejects:

    typedef float vecf __attribute__((vector_size(16)));
    vecf x;
    float32x4_t &z = x;

on the basis that the types are no longer reference-compatible.
For AArch64 we took the approach that this was the correct behaviour.
It is also consistent with current Clang.

A trickier question is whether:

    vecf x;
    float32x4_t y;
    … c ? x : y …

should be valid, and if so, what its type should be [PR92789].
As explained in the comment in the testcase, GCC and Clang both
accepted this, but GCC chose the “then” type while Clang chose
the “else” type.  This can lead to different mangling for (probably
artificial) corner cases, as seen for “sel1” and “sel2” in the
testcase.

Adding the attribute makes GCC reject the conditional expression
as ambiguous.  For AArch64 we took the approach that this too is
the correct behaviour, for the reasons described in the testcase.
However, it does seem to have the potential to break existing code.

gcc/
	PR target/92789
	PR target/95726
	* config/arm/arm.c (arm_attribute_table): Add
	"Advanced SIMD type".
	(arm_comp_type_attributes): Check that the "Advanced SIMD type"
	attributes are equal.
	* config/arm/arm-builtins.c: Include stringpool.h and
	attribs.h.
	(arm_mangle_builtin_vector_type): Use the mangling recorded
	in the "Advanced SIMD type" attribute.
	(arm_init_simd_builtin_types): Add an "Advanced SIMD type"
	attribute to each Advanced SIMD type, using the mangled type
	as the attribute's single argument.

gcc/testsuite/
	PR target/92789
	PR target/95726
	* g++.target/arm/pr95726.C: New test.
2020-07-10 19:06:45 +01:00
Carl Love
02ef74bad6 RS6000, add VSX mask manipulation support
gcc/ChangeLog

2020-07-09  Carl Love  <cel@us.ibm.com>

	* config/rs6000/vsx.md  (VSX_MM): New define_mode_iterator.
	(VSX_MM4): New define_mode_iterator.
	(vec_mtvsrbmi): New define_insn.
	(vec_mtvsr_<mode>): New define_insn.
	(vec_cntmb_<mode>): New define_insn.
	(vec_extract_<mode>): New define_insn.
	(vec_expand_<mode>): New define_insn.
	(define_c_enum unspec): Add entries UNSPEC_MTVSBM, UNSPEC_VCNTMB,
	UNSPEC_VEXTRACT, UNSPEC_VEXPAND.
	* config/rs6000/altivec.h ( vec_genbm, vec_genhm, vec_genwm,
	vec_gendm, vec_genqm, vec_cntm, vec_expandm, vec_extractm): Add
	defines.
	* config/rs6000/rs6000-builtin.def: Add defines BU_P10_2, BU_P10_1.
	(BU_P10_1): Add definitions for mtvsrbm, mtvsrhm, mtvsrwm,
	mtvsrdm, mtvsrqm, vexpandmb, vexpandmh, vexpandmw, vexpandmd,
	vexpandmq, vextractmb, vextractmh, vextractmw, vextractmd, vextractmq.
	(BU_P10_2): Add definitions for cntmbb, cntmbh, cntmbw, cntmbd.
	(BU_P10_OVERLOAD_1): Add definitions for mtvsrbm, mtvsrhm,
	mtvsrwm, mtvsrdm, mtvsrqm, vexpandm, vextractm.
	(BU_P10_OVERLOAD_2): Add defition for cntm.
	* config/rs6000/rs6000-call.c (rs6000_expand_binop_builtin): Add
	checks for CODE_FOR_vec_cntmbb_v16qi, CODE_FOR_vec_cntmb_v8hi,
	CODE_FOR_vec_cntmb_v4si, CODE_FOR_vec_cntmb_v2di.
	(altivec_overloaded_builtins): Add overloaded argument entries for
	P10_BUILTIN_VEC_MTVSRBM, P10_BUILTIN_VEC_MTVSRHM,
	P10_BUILTIN_VEC_MTVSRWM, P10_BUILTIN_VEC_MTVSRDM,
	P10_BUILTIN_VEC_MTVSRQM, P10_BUILTIN_VEC_VCNTMBB,
	P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
	P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
	P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
	P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
	P10_BUILTIN_VEXPANDMQ, P10_BUILTIN_VEXTRACTMB,
	P10_BUILTIN_VEXTRACTMH, P10_BUILTIN_VEXTRACTMW,
	P10_BUILTIN_VEXTRACTMD, P10_BUILTIN_VEXTRACTMQ.
	(builtin_function_type): Add case entries for P10_BUILTIN_MTVSRBM,
	P10_BUILTIN_MTVSRHM, P10_BUILTIN_MTVSRWM, P10_BUILTIN_MTVSRDM,
	P10_BUILTIN_MTVSRQM, P10_BUILTIN_VCNTMBB, P10_BUILTIN_VCNTMBH,
	P10_BUILTIN_VCNTMBW, P10_BUILTIN_VCNTMBD,
	P10_BUILTIN_VEXPANDMB, P10_BUILTIN_VEXPANDMH,
	P10_BUILTIN_VEXPANDMW, P10_BUILTIN_VEXPANDMD,
	P10_BUILTIN_VEXPANDMQ.
	* config/rs6000/rs6000-builtin.def (altivec_overloaded_builtins): Add
	entries	for MTVSRBM, MTVSRHM, MTVSRWM, MTVSRDM, MTVSRQM, VCNTM,
	VEXPANDM, VEXTRACTM.

gcc/testsuite/ChangeLog

2020-07-09  Carl Love  <cel@us.ibm.com>
	* gcc.target/powerpc/vsx_mask-count-runnable.c: New test case.
	* gcc.target/powerpc/vsx_mask-expand-runnable.c: New test case.
	* gcc.target/powerpc/vsx_mask-extract-runnable.c: New test case.
	* gcc.target/powerpc/vsx_mask-move-runnable.c: New test case.
2020-07-10 10:18:26 -05:00
Julian Brown
6f5b4b64d2 openacc: Adjust dynamic reference count semantics
This patch adjusts how dynamic reference counts work so that they match
the semantics of the source program more closely, instead of representing
"excess" reference counts beyond those that represent pointers in the
internal libgomp splay-tree data structure. This allows some corner
cases to be handled more gracefully.

2020-07-10  Julian Brown  <julian@codesourcery.com>
	    Thomas Schwinge  <thomas@codesourcery.com>

	libgomp/
	* libgomp.h (struct splay_tree_key_s): Change virtual_refcount to
	dynamic_refcount.
	(struct gomp_device_descr): Remove GOMP_MAP_VARS_OPENACC_ENTER_DATA.
	* oacc-mem.c (acc_map_data): Substitute virtual_refcount for
	dynamic_refcount.
	(acc_unmap_data): Update comment.
	(goacc_map_var_existing, goacc_enter_datum): Adjust for
	dynamic_refcount semantics.
	(goacc_exit_datum_1, goacc_exit_datum): Re-add some error checking.
	Adjust for dynamic_refcount semantics.
	(goacc_enter_data_internal): Implement "present" case of dynamic
	memory-map handling here.  Update "non-present" case for
	dynamic_refcount semantics.
	(goacc_exit_data_internal): Use goacc_exit_datum_1.
	* target.c (gomp_map_vars_internal): Remove
	GOMP_MAP_VARS_OPENACC_ENTER_DATA handling.  Update for dynamic_refcount
	handling.
	(gomp_unmap_vars_internal): Remove virtual_refcount handling.
	(gomp_load_image_to_device): Substitute dynamic_refcount for
	virtual_refcount.
	* testsuite/libgomp.oacc-c-c++-common/pr92843-1.c: Remove XFAILs.
	* testsuite/libgomp.oacc-c-c++-common/refcounting-1.c: New test.
	* testsuite/libgomp.oacc-c-c++-common/refcounting-2.c: New test.
	* testsuite/libgomp.oacc-c-c++-common/struct-3-1-1.c: New test.
	* testsuite/libgomp.oacc-fortran/deep-copy-6.f90: Remove XFAILs and
	trace output.
	* testsuite/libgomp.oacc-fortran/deep-copy-6-no_finalize.F90: Remove
	trace output.
	* testsuite/libgomp.oacc-fortran/dynamic-incr-structural-1.f90: New
	test.
	* testsuite/libgomp.oacc-c-c++-common/structured-dynamic-lifetimes-4.c:
	Remove stale comment.
	* testsuite/libgomp.oacc-fortran/mdc-refcount-1-1-1.f90: Remove XFAILs.
	* testsuite/libgomp.oacc-fortran/mdc-refcount-1-1-2.F90: Likewise.
	* testsuite/libgomp.oacc-fortran/mdc-refcount-1-2-1.f90: Likewise.
	* testsuite/libgomp.oacc-fortran/mdc-refcount-1-2-2.f90: Likewise.
	* testsuite/libgomp.oacc-fortran/mdc-refcount-1-3-1.f90: Likewise.
	* testsuite/libgomp.oacc-fortran/mdc-refcount-1-4-1.f90: Adjust XFAIL.

Co-Authored-By: Thomas Schwinge <thomas@codesourcery.com>
2020-07-10 08:07:12 -07:00
Julian Brown
cb7effde6f openacc: Helper functions for enter/exit data using single mapping
This patch factors out the parts of goacc_enter_datum and
goacc_exit_datum that can be shared with goacc_enter_data_internal
and goacc_exit_data_internal respectively (in the next patch),
without overloading function return values or complicating code paths
unnecessarily.

2020-07-10  Julian Brown  <julian@codesourcery.com>
	    Thomas Schwinge  <thomas@codesourcery.com>

libgomp/
	* oacc-mem.c (goacc_map_var_existing): New function.
	(goacc_enter_datum): Use above function.
	(goacc_exit_datum_1): New function.
	(goacc_exit_datum): Use above function.

Co-Authored-By: Thomas Schwinge <thomas@codesourcery.com>
2020-07-10 08:07:12 -07:00
Bill Seurer, 507-253-3502, seurer@us.ibm.com
c6b7ba5de6 rs6000: Fix __builtin_altivec_mask_for_load to use correct type
gcc/ChangeLog:

	PR target/95581
	* config/rs6000/rs6000-call.c: Add new type v16qi_ftype_pcvoid.
	(altivec_init_builtins) Change __builtin_altivec_mask_for_load to use
	v16qi_ftype_pcvoid with correct number of parameters.
2020-07-10 08:14:06 -05:00
Martin Liska
e969e9be88
testsuite: Fix WPA scanning.
gcc/testsuite/ChangeLog:

	PR gcov-profile/96148
	* lib/scanwpaipa.exp: Fix wpa dump file suffix the same way
	as other in the file.
2020-07-10 14:45:13 +02:00
Jason Merrill
6324c52bba c++: Support non-type template parms of union type.
Another thing newly allowed by P1907R1.  The ABI group has discussed
representing unions with designated initializers, and has separately
specified how to represent designators; this patch implements both.

gcc/cp/ChangeLog:

	* tree.c (structural_type_p): Allow unions.
	* mangle.c (write_expression): Express unions with a designator.

libiberty/ChangeLog:

	* cp-demangle.c (cplus_demangle_operators): Add di, dx, dX.
	(d_expression_1): Handle di and dX.
	(is_designated_init, d_maybe_print_designated_init): New.
	(d_print_comp_inner): Use d_maybe_print_designated_init.
	* testsuite/demangle-expected: Add designator tests.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp2a/nontype-class-union1.C: New test.
2020-07-10 08:36:50 -04:00
Jason Merrill
50f071d999 c++: Allow floating-point template parms in C++20.
P1907R1 made various adjustments to non-type template parameters, notably
introducing the notion of "structural type".  I implemented an early version
of that specification in r10-4426, but it was adjusted in the final paper to
allow more.  This patch implements allowing template parameters of
floating-point type; still to be implemented are unions and subobjects.

gcc/cp/ChangeLog:

	* pt.c (convert_nontype_argument): Handle REAL_TYPE.
	(invalid_nontype_parm_type_p): Allow all structural types.
	* tree.c (structural_type_p): Use SCALAR_TYPE_P.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/pr81246.C: No error in C++20.
	* g++.dg/cpp0x/variadic74.C: No error in C++20.
	* g++.dg/cpp1z/nontype-auto3.C: No error in C++20.
	* g++.dg/template/crash106.C: No error in C++20.
	* g++.dg/template/crash119.C: No error in C++20.
	* g++.dg/template/nontype12.C: No error in C++20.
	* g++.dg/template/void3.C: Don't require follow-on message.
	* g++.dg/template/void7.C: Don't require follow-on message.
	* g++.dg/template/void9.C: Don't require follow-on message.
2020-07-10 08:36:50 -04:00
Jason Merrill
e47dfca5aa c++: [[no_unique_address]] fixes. [PR96105]
We were wrongly checking is_empty_class on the result of strip_array_types
rather than the actual field type.  We weren't considering the alignment of
the data member.  We needed to handle unions the same way as
layout_nonempty_base_or_field.

gcc/cp/ChangeLog:

	PR c++/96105
	PR c++/96052
	PR c++/95976
	* class.c (check_field_decls): An array of empty classes is not an
	empty data member.
	(layout_empty_base_or_field): Handle explicit alignment.
	Fix union handling.

gcc/testsuite/ChangeLog:

	PR c++/96105
	PR c++/96052
	PR c++/95976
	* g++.dg/cpp2a/no_unique_address4.C: New test.
	* g++.dg/cpp2a/no_unique_address5.C: New test.
	* g++.dg/cpp2a/no_unique_address6.C: New test.
2020-07-10 08:36:40 -04:00
H.J. Lu
a6645a826f x86: Check TARGET_AVX512VL when enabling FMA
Check TARGET_AVX512VL when enabling FMA to avoid

gcc.target/i386/avx512er-vrsqrt28ps-3.c:25:1: error: unrecognizable insn:
(insn 29 28 30 6 (set (reg:V8SF 108)
        (fma:V8SF (reg:V8SF 106)
            (reg:V8SF 105)
            (reg:V8SF 110)))

when TARGET_AVX512VL isn't enabled.

	PR target/96144
	* config/i386/i386-expand.c (ix86_emit_swsqrtsf): Check
	TARGET_AVX512VL when enabling FMA.
2020-07-10 04:32:34 -07:00