164506 Commits

Author SHA1 Message Date
Marek Polacek
f3b13f46fa re PR testsuite/87694 (problem in g++.dg/concepts/memfun-err.C starting with r263343)
PR testsuite/87694
	* g++.dg/concepts/memfun-err.C: Make it a compile test.

From-SVN: r265397
2018-10-22 20:01:56 +00:00
Andrew Stubbs
dbe7895c9d Don't double-count early-clobber matches.
Given a pattern with a number of operands:

(match_operand 0 "" "=&v")
(match_operand 1 "" " v0")
(match_operand 2 "" " v0")
(match_operand 3 "" " v0")

GCC will currently increment "reject" once, for operand 0, and then decrement
it once for each of the other operands, ending with reject == -2 and an
assertion failure.  If there's a conflict then it might try to decrement reject
yet again.

Incidentally, what these patterns are trying to achieve is an allocation in
which operand 0 may match one of the other operands, but may not partially
overlap any of them.  Ideally there'd be a better way to do this.

In any case, it will affect any pattern in which multiple operands may (or
must) match an early-clobber operand.

The patch only allows a reject-- when one has not already occurred, for that
operand.

2018-10-22  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* lra-constraints.c (process_alt_operands): New local array,
	matching_early_clobber.  Check matching_early_clobber before
	decrementing reject, and set matching_early_clobber after.

From-SVN: r265393
2018-10-22 14:23:37 +00:00
Segher Boessenkool
b333d8b6d0 rs6000: Handle print_operand_address for unexpected RTL (PR87598)
As the PR shows, the user can force this to be called on at least some
RTL that is not a valid address.  Most targets treat this as if the
user knows best; let's do the same.


	PR target/87598
	* config/rs6000/rs6000.c (print_operand_address): For unexpected RTL
	call output_addr_const and hope for the best.

From-SVN: r265392
2018-10-22 16:03:22 +02:00
Richard Biener
e86087eeb8 2018-10-22 Richard Biener <rguenther@suse.de>
* gimple-ssa-evrp-analyze.c
	(evrp_range_analyzer::record_ranges_from_incoming_edge): Be
	smarter about what ranges to use.
	* tree-vrp.c (add_assert_info): Dump here.
	(register_edge_assert_for_2): Instead of here at multiple but
	not all places.

	* gcc.dg/tree-ssa/evrp12.c: New testcase.
	* gcc.dg/predict-6.c: Adjust.
	* gcc.dg/tree-ssa/vrp33.c: Disable EVRP.
	* gcc.dg/tree-ssa/vrp02.c: Likewise.
	* gcc.dg/tree-ssa/cunroll-9.c: Likewise.

From-SVN: r265391
2018-10-22 13:57:47 +00:00
Steven Bosscher
d1e14d9720 re PR middle-end/63155 (memory hog)
2018-10-22  Steven Bosscher <steven@gcc.gnu.org>
	Richard Biener  <rguenther@suse.de>

	* bitmap.h: Update data structure documentation, including a
	description of bitmap views as either linked-lists or splay trees.
	(struct bitmap_element_def): Update comments for splay tree bitmaps.
	(struct bitmap_head_def): Likewise.
	(bitmap_list_view, bitmap_tree_view): New prototypes.
	(bitmap_initialize_stat): Initialize a bitmap_head's indx and
	tree_form fields.
	(bmp_iter_set_init): Assert the iterated bitmaps are in list form.
	(bmp_iter_and_init, bmp_iter_and_compl_init): Likewise.
	* bitmap.c (bitmap_elem_to_freelist): Unregister overhead of a
	released bitmap element here.
	(bitmap_element_free): Remove.
	(bitmap_elt_clear_from): Work on splay tree bitmaps.
	(bitmap_list_link_element): Renamed from bitmap_element_link.  Move
	this function similar ones such that linked-list bitmap implementation
	functions are grouped.
	(bitmap_list_unlink_element): Renamed from bitmap_element_unlink,
	and moved for grouping.
	(bitmap_list_insert_element_after): Renamed from
	bitmap_elt_insert_after, and moved for grouping.
	(bitmap_list_find_element): New function spliced from bitmap_find_bit.
	(bitmap_tree_link_left, bitmap_tree_link_right,
	bitmap_tree_rotate_left, bitmap_tree_rotate_right, bitmap_tree_splay,
	bitmap_tree_link_element, bitmap_tree_unlink_element,
	bitmap_tree_find_element): New functions for splay-tree bitmap
	implementation.
	(bitmap_element_link, bitmap_element_unlink, bitmap_elt_insert_after):
	Renamed and moved, see above entries.
	(bitmap_tree_listify_from): New function to convert part of a splay
	tree bitmap to a linked-list bitmap.
	(bitmap_list_view): Convert a splay tree bitmap to linked-list form.
	(bitmap_tree_view): Convert a linked-list bitmap to splay tree form.
	(bitmap_find_bit): Remove.
	(bitmap_clear, bitmap_clear_bit, bitmap_set_bit,
	bitmap_single_bit_set_p, bitmap_first_set_bit, bitmap_last_set_bit):
	Handle splay tree bitmaps.
	(bitmap_copy, bitmap_count_bits, bitmap_and, bitmap_and_into,
	bitmap_elt_copy, bitmap_and_compl, bitmap_and_compl_into,
	bitmap_compl_and_into, bitmap_elt_ior, bitmap_ior, bitmap_ior_into,
	bitmap_xor, bitmap_xor_into, bitmap_equal_p, bitmap_intersect_p,
	bitmap_intersect_compl_p, bitmap_ior_and_compl,
	bitmap_ior_and_compl_into, bitmap_set_range, bitmap_clear_range,
	bitmap_hash): Reject trying to act on splay tree bitmaps.  Make
	corresponding changes to use linked-list specific bitmap_element
	manipulation functions as applicable for efficiency.
	(bitmap_tree_to_vec): New function.
	(debug_bitmap_elt_file): New function split out from ...
	(debug_bitmap_file): ... here.  Handle splay tree bitmaps.
	(bitmap_print): Likewise.

	PR tree-optimization/63155
	* tree-ssa-propagate.c (ssa_prop_init): Use tree-view for the
	SSA edge worklists.
	* tree-ssa-coalesce.c (coalesce_ssa_name): Populate used_in_copies
	in tree-view.

From-SVN: r265390
2018-10-22 13:54:23 +00:00
William Schmidt
ddec5aea56 Index...
Index: gcc/config/rs6000/emmintrin.h
===================================================================
--- gcc/config/rs6000/emmintrin.h	(revision 265318)
+++ gcc/config/rs6000/emmintrin.h	(working copy)
@@ -85,7 +85,7 @@ typedef double __m128d __attribute__ ((__vector_si
 typedef long long __m128i_u __attribute__ ((__vector_size__ (16), __may_alias__, __aligned__ (1)));
 typedef double __m128d_u __attribute__ ((__vector_size__ (16), __may_alias__, __aligned__ (1)));
 
-/* Define two value permute mask */
+/* Define two value permute mask.  */
 #define _MM_SHUFFLE2(x,y) (((x) << 1) | (y))
 
 /* Create a vector with element 0 as F and the rest zero.  */
@@ -201,7 +201,7 @@ _mm_store_pd (double *__P, __m128d __A)
 extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm_storeu_pd (double *__P, __m128d __A)
 {
-  *(__m128d *)__P = __A;
+  *(__m128d_u *)__P = __A;
 }
 
 /* Stores the lower DPFP value.  */
@@ -2175,7 +2175,7 @@ _mm_maskmoveu_si128 (__m128i __A, __m128i __B, cha
 {
   __v2du hibit = { 0x7f7f7f7f7f7f7f7fUL, 0x7f7f7f7f7f7f7f7fUL};
   __v16qu mask, tmp;
-  __m128i *p = (__m128i*)__C;
+  __m128i_u *p = (__m128i_u*)__C;
 
   tmp = (__v16qu)_mm_loadu_si128(p);
   mask = (__v16qu)vec_cmpgt ((__v16qu)__B, (__v16qu)hibit);
Index: gcc/config/rs6000/xmmintrin.h
===================================================================
--- gcc/config/rs6000/xmmintrin.h	(revision 265318)
+++ gcc/config/rs6000/xmmintrin.h	(working copy)
@@ -85,6 +85,10 @@
    vector types, and their scalar components.  */
 typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
 
+/* Unaligned version of the same type.  */
+typedef float __m128_u __attribute__ ((__vector_size__ (16), __may_alias__,
+				       __aligned__ (1)));
+
 /* Internal data types for implementing the intrinsics.  */
 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
 
@@ -172,7 +176,7 @@ _mm_store_ps (float *__P, __m128 __A)
 extern __inline void __attribute__((__gnu_inline__, __always_inline__, __artificial__))
 _mm_storeu_ps (float *__P, __m128 __A)
 {
-  *(__m128 *)__P = __A;
+  *(__m128_u *)__P = __A;
 }
 
 /* Store four SPFP values in reverse order.  The address must be aligned.  */

From-SVN: r265389
2018-10-22 13:38:32 +00:00
Martin Liska
d78bcb133d Revert r263947.
2018-10-22  Martin Liska  <mliska@suse.cz>

  PR tree-optimization/87686
	Revert
	2018-08-29  Martin Liska  <mliska@suse.cz>

	* tree-switch-conversion.c (switch_conversion::expand):
	Strenghten assumption about gswitch statements.
2018-10-22  Martin Liska  <mliska@suse.cz>

  PR tree-optimization/87686
	* g++.dg/tree-ssa/pr87686.C: New test.

From-SVN: r265388
2018-10-22 13:09:33 +00:00
Jakub Jelinek
c7acc2964e Iterate -std=c++-* in i386.exp.
2018-10-22  Jakub Jelinek  <jakub@redhat.com>

	* g++.target/i386/i386.exp: Use g++-dg-runtest to iterate
	properly -std= options.

From-SVN: r265387
2018-10-22 12:25:39 +00:00
Martin Liska
14762cd028 Simplify comparison of attrs in IPA ICF.
2018-10-22  Martin Liska  <mliska@suse.cz>

	* ipa-icf.c (sem_item::compare_attributes): Remove.
	(sem_item::compare_referenced_symbol_properties): Use
	attribute_list_equal instead.
	(sem_function::equals_wpa): Likewise.
	* ipa-icf.h: Remove compare_attributes.

From-SVN: r265386
2018-10-22 12:04:16 +00:00
Richard Biener
f79de13a06 scop-4.c: Avoid out-of-bound access.
2018-10-22  Richard Biener  <rguenther@suse.de>

	* gcc.dg/graphite/scop-4.c: Avoid out-of-bound access.

From-SVN: r265385
2018-10-22 11:33:48 +00:00
Eric Botcazou
39c61276fd utils.c (unchecked_convert): Use local variables for the biased and reverse SSO attributes of both types.
* gcc-interface/utils.c (unchecked_convert): Use local variables for
	the biased and reverse SSO attributes of both types.
	Further extend the processing of integral types in the presence of
	reverse SSO to all scalar types.

From-SVN: r265381
2018-10-22 11:03:17 +00:00
Eric Botcazou
9e4cacfab2 trans.c (Pragma_to_gnu): Use a simple memory constraint in all cases.
* gcc-interface/trans.c (Pragma_to_gnu) <Pragma_Inspection_Point>: Use
	a simple memory constraint in all cases.

	* gcc-interface/lang-specs.h: Bump copyright year.

From-SVN: r265378
2018-10-22 10:43:20 +00:00
Eric Botcazou
bbc960279d warn19.ad[sb]: New test.
* gnat.dg/warn19.ad[sb]: New test.
	* gnat.dg/warn19_pkg.ads: New helper.

From-SVN: r265377
2018-10-22 10:29:57 +00:00
Richard Biener
2c2f867416 re PR c/87682 (gcc/mem-stats.h:172: possible broken comparison operator ?)
2018-10-22  Richard Biener  <rguenther@suse.de>

	PR middle-end/87682
	* mem-stats.h (mem_usage::operator==): Fix pasto.

From-SVN: r265376
2018-10-22 10:25:28 +00:00
Richard Biener
893ade8b74 re PR bootstrap/87640 (internal compiler error: in check, at tree-vrp.c:155)
2018-10-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/87640
	* tree-vrp.c (set_value_range_with_overflow): Decompose
	incomplete result.
	(extract_range_from_binary_expr_1): Adjust.

	* gcc.dg/torture/pr87640.c: New testcase.

From-SVN: r265375
2018-10-22 10:22:48 +00:00
Ilya Leoshkevich
9470d3ecf3 S/390: Add the forgotten test for r265371
The test is part of the originally posted change
(https://gcc.gnu.org/ml/gcc-patches/2018-10/msg01173.html), but was
forgotten during svn commit.

From-SVN: r265373
2018-10-22 08:39:18 +00:00
Martin Jambor
36bbc05db8 Add a fun parameter to three stmt_could_throw... functions
This long patch only does one simple thing, adds an explicit function
parameter to predicates stmt_could_throw_p, stmt_can_throw_external
and stmt_can_throw_internal.

My motivation was ability to use stmt_can_throw_external in IPA
analysis phase without the need to push cfun.  As I have discovered,
we were already doing that in cgraph.c, which this patch avoids as
well.  In the process, I had to add a struct function parameter to
stmt_could_throw_p and decided to also change the interface of
stmt_can_throw_internal just for the sake of some minimal consistency.

In the process I have discovered that calling method
cgraph_node::create_version_clone_with_body (used by ipa-split,
ipa-sra, OMP simd and multiple_target) leads to calls of
stmt_can_throw_external with NULL cfun.  I have worked around this by
making stmt_can_throw_external and stmt_could_throw_p gracefully
accept NULL and just be pessimistic in that case.  The problem with
fixing this in a better way is that struct function for the clone is
created after cloning edges where we attempt to push the yet not
existing cfun, and moving it before would require a bit of surgery in
tree-inline.c.  A slightly hackish but simpler fix might be to
explicitely pass the "old" function to symbol_table::create_edge
because it should be just as good at that moment.  In any event, that
is a topic for another patch.

I believe that currently we incorrectly use cfun in
maybe_clean_eh_stmt_fn and maybe_duplicate_eh_stmt_fn, both in
tree-eh.c, and so I have fixed these cases too.  The bulk of other
changes is just mechanical adding of cfun to all users.

Bootstrapped and tested on x86_64-linux (also with extra NULLing and
restoring cfun to double check it is not used in a place I missed), OK
for trunk?

Thanks,

Martin

2018-10-22  Martin Jambor  <mjambor@suse.cz>

	* tree-eh.h (stmt_could_throw_p): Add function parameter.
	(stmt_can_throw_external): Likewise.
	(stmt_can_throw_internal): Likewise.
	* tree-eh.c (lower_eh_constructs_2): Pass cfun to stmt_could_throw_p.
	(lower_eh_constructs_2): Likewise.
	(stmt_could_throw_p): Add fun parameter, use it instead of cfun.
	(stmt_can_throw_external): Likewise.
	(stmt_can_throw_internal): Likewise.
	(maybe_clean_eh_stmt_fn): Pass cfun to stmt_could_throw_p.
	(maybe_clean_or_replace_eh_stmt): Pass cfun to stmt_could_throw_p.
	(maybe_duplicate_eh_stmt_fn): Pass new_fun to stmt_could_throw_p.
	(maybe_duplicate_eh_stmt): Pass cfun to stmt_could_throw_p.
	(pass_lower_eh_dispatch::execute): Pass cfun to
	stmt_can_throw_external.
	(cleanup_empty_eh): Likewise.
	(verify_eh_edges): Pass cfun to stmt_could_throw_p.
	* cgraph.c (cgraph_edge::set_call_stmt): Pass a function to
	stmt_can_throw_external instead of pushing it to cfun.
	(symbol_table::create_edge): Likewise.
	* gimple-fold.c (fold_builtin_atomic_compare_exchange): Pass cfun to
	stmt_can_throw_internal.
	* gimple-ssa-evrp.c (evrp_dom_walker::before_dom_children): Pass cfun
	to stmt_could_throw_p.
	* gimple-ssa-store-merging.c (handled_load): Pass cfun to
	stmt_can_throw_internal.
	(pass_store_merging::execute): Likewise.
	* gimple-ssa-strength-reduction.c
	(find_candidates_dom_walker::before_dom_children): Pass cfun to
	stmt_could_throw_p.
	* gimplify-me.c (gimple_regimplify_operands): Pass cfun to
	stmt_can_throw_internal.
	* ipa-pure-const.c (check_call): Pass cfun to stmt_could_throw_p and
	to stmt_can_throw_external.
	(check_stmt): Pass cfun to stmt_could_throw_p.
	(check_stmt): Pass cfun to stmt_can_throw_external.
	(pass_nothrow::execute): Likewise.
	* trans-mem.c (expand_call_tm): Pass cfun to stmt_can_throw_internal.
	* tree-cfg.c (is_ctrl_altering_stmt): Pass cfun to
	stmt_can_throw_internal.
	(verify_gimple_in_cfg): Pass cfun to stmt_could_throw_p.
	(stmt_can_terminate_bb_p): Pass cfun to stmt_can_throw_external.
	(gimple_purge_dead_eh_edges): Pass cfun to stmt_can_throw_internal.
	* tree-complex.c (expand_complex_libcall): Pass cfun to
	stmt_could_throw_p and to stmt_can_throw_internal.
	(expand_complex_multiplication): Pass cfun to stmt_can_throw_internal.
	* tree-inline.c (copy_edges_for_bb): Likewise.
	(maybe_move_debug_stmts_to_successors): Likewise.
	* tree-outof-ssa.c (ssa_is_replaceable_p): Pass cfun to
	stmt_could_throw_p.
	* tree-parloops.c (oacc_entry_exit_ok_1): Likewise.
	* tree-sra.c (scan_function): Pass cfun to stmt_can_throw_external.
	* tree-ssa-alias.c (stmt_kills_ref_p): Pass cfun to
	stmt_can_throw_internal.
	* tree-ssa-ccp.c (optimize_atomic_bit_test_and): Likewise.
	* tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Pass cfun to
	stmt_could_throw_p.
	(mark_aliased_reaching_defs_necessary_1): Pass cfun to
	stmt_can_throw_internal.
	* tree-ssa-forwprop.c (pass_forwprop::execute): Likewise.
	* tree-ssa-loop-im.c (movement_possibility): Pass cfun to
	stmt_could_throw_p.
	* tree-ssa-loop-ivopts.c (find_givs_in_stmt_scev): Likewise.
	(add_autoinc_candidates): Pass cfun to stmt_can_throw_internal.
	* tree-ssa-math-opts.c (pass_cse_reciprocals::execute): Likewise.
	(convert_mult_to_fma_1): Likewise.
	(convert_to_divmod): Likewise.
	* tree-ssa-phiprop.c (propagate_with_phi): Likewise.
	* tree-ssa-pre.c (compute_avail): Pass cfun to stmt_could_throw_p.
	* tree-ssa-propagate.c
	(substitute_and_fold_dom_walker::before_dom_children): Likewise.
	* tree-ssa-reassoc.c (suitable_cond_bb): Likewise.
	(maybe_optimize_range_tests): Likewise.
	(linearize_expr_tree): Likewise.
	(reassociate_bb): Likewise.
	* tree-ssa-sccvn.c (copy_reference_ops_from_call): Likewise.
	* tree-ssa-scopedtables.c (hashable_expr_equal_p): Likewise.
	* tree-ssa-strlen.c (adjust_last_stmt): Likewise.
	(handle_char_store): Likewise.
	* tree-vect-data-refs.c (vect_find_stmt_data_reference): Pass cfun to
	stmt_can_throw_internal.
	* tree-vect-patterns.c (check_bool_pattern): Pass cfun to
	stmt_could_throw_p.
	* tree-vect-stmts.c (vect_finish_stmt_generation_1): Likewise.
	(vectorizable_call): Pass cfun to stmt_can_throw_internal.
	(vectorizable_simd_clone_call): Likewise.
	* value-prof.c (gimple_ic): Pass cfun to stmt_could_throw_p.
	(gimple_stringop_fixed_value): Likewise.

From-SVN: r265372
2018-10-22 10:27:50 +02:00
Ilya Leoshkevich
3703b60c90 S/390: Make "b" constraint match literal pool references
Improves the code generation by getting rid of redundant LAs, as seen
in the following example:

	-	la	%r1,0(%r13)
	-	lg	%r4,0(%r1)
	+	lg	%r4,0(%r13)

Also allows to proceed with the merge of movdi_64 and movdi_larl.
Currently LRA decides to spill literal pool references back to the
literal pool, because it preliminarily chooses alternatives with
CT_MEMORY constraints without calling
satisfies_memory_constraint_p (). Later on it notices that the
constraint is wrong and fixes it by spilling.  The constraint in this
case is "b", and the operand is a literal pool reference.  There is
no reason to reject them.  The current behavior was introduced,
apparently unintentionally, by
https://gcc.gnu.org/ml/gcc-patches/2010-09/msg00812.html

The patch affects a little bit more than mentioned in the subject,
because it changes s390_loadrelative_operand_p (), which is called not
only for checking the "b" constraint.  However, the only caller for
which it should really not accept literal pool references is
s390_check_qrst_address (), so it was changed to explicitly do so.

gcc/ChangeLog:

2018-10-22  Ilya Leoshkevich  <iii@linux.ibm.com>

	* config/s390/s390.c (s390_loadrelative_operand_p): Accept
	literal pool references.
	(s390_check_qrst_address): Adapt to the new behavior of
	s390_loadrelative_operand_p ().

gcc/testsuite/ChangeLog:

2018-10-22  Ilya Leoshkevich  <iii@linux.ibm.com>

	* gcc.target/s390/litpool-int.c: New test.

From-SVN: r265371
2018-10-22 08:21:03 +00:00
H.J. Lu
a48be73bab i386: Enable AVX512 memory broadcast for INT andnot
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for INT andnot operations.

gcc/

	PR target/72782
	* config/i386/sse.md (*andnot<mode>3_bcst): New.

gcc/testsuite/

	PR target/72782
	* gcc.target/i386/avx512f-andn-di-zmm-1.c: New test.
	* gcc.target/i386/avx512f-andn-si-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-andn-si-zmm-2.c: Likewise.
	* gcc.target/i386/avx512f-andn-si-zmm-3.c: Likewise.
	* gcc.target/i386/avx512f-andn-si-zmm-4.c: Likewise.
	* gcc.target/i386/avx512f-andn-si-zmm-5.c: Likewise.
	* gcc.target/i386/avx512vl-andn-si-xmm-1.c: Likewise.
	* gcc.target/i386/avx512vl-andn-si-ymm-1.c: Likewise.

From-SVN: r265370
2018-10-22 00:35:48 -07:00
H.J. Lu
0844e4324e i386: Enable AVX512 memory broadcast for INT logic
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for INT logic operations.

gcc/

	PR target/72782
	* config/i386/sse.md (*<code><mode>3_bcst): New.

gcc/testsuite/

	PR target/72782
	* gcc.target/i386/avx512f-and-di-zmm-1.c: New test.
	* gcc.target/i386/avx512f-and-si-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-and-si-zmm-2.c: Likewise.
	* gcc.target/i386/avx512f-and-si-zmm-3.c: Likewise.
	* gcc.target/i386/avx512f-and-si-zmm-4.c: Likewise.
	* gcc.target/i386/avx512f-and-si-zmm-5.c: Likewise.
	* gcc.target/i386/avx512f-and-si-zmm-6.c: Likewise.
	* gcc.target/i386/avx512f-or-di-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-or-si-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-or-si-zmm-2.c: Likewise.
	* gcc.target/i386/avx512f-or-si-zmm-3.c: Likewise.
	* gcc.target/i386/avx512f-or-si-zmm-4.c: Likewise.
	* gcc.target/i386/avx512f-or-si-zmm-5.c: Likewise.
	* gcc.target/i386/avx512f-or-si-zmm-6.c: Likewise.
	* gcc.target/i386/avx512f-xor-di-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-xor-si-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-xor-si-zmm-2.c: Likewise.
	* gcc.target/i386/avx512f-xor-si-zmm-3.c: Likewise.
	* gcc.target/i386/avx512f-xor-si-zmm-4.c: Likewise.
	* gcc.target/i386/avx512f-xor-si-zmm-5.c: Likewise.
	* gcc.target/i386/avx512f-xor-si-zmm-6.c: Likewise.
	* gcc.target/i386/avx512vl-and-si-xmm-1.c: Likewise.
	* gcc.target/i386/avx512vl-and-si-ymm-1.c: Likewise.
	* gcc.target/i386/avx512vl-or-si-xmm-1.c: Likewise.
	* gcc.target/i386/avx512vl-or-si-ymm-1.c: Likewise.
	* gcc.target/i386/avx512vl-xor-si-xmm-1.c: Likewise.
	* gcc.target/i386/avx512vl-xor-si-ymm-1.c: Likewise.

From-SVN: r265369
2018-10-22 00:29:03 -07:00
H.J. Lu
26d50717b8 i386: Enable AVX512 memory broadcast for INT add
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for INT add operations.

gcc/

	PR target/72782
	* config/i386/sse.md (avx512bcst): Updated for V4SI, V2DI, V8SI,
	V4DI, V16SI and V8DI.
	(*sub<mode>3<mask_name>_bcst): New.
	(*add<mode>3<mask_name>_bcst): Likewise.

gcc/testsuite/

	PR target/72782
	* gcc.target/i386/avx512f-add-di-zmm-1.c: New test.
	* gcc.target/i386/avx512f-add-si-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-add-si-zmm-2.c: Likewise.
	* gcc.target/i386/avx512f-add-si-zmm-3.c: Likewise.
	* gcc.target/i386/avx512f-add-si-zmm-4.c: Likewise.
	* gcc.target/i386/avx512f-add-si-zmm-5.c: Likewise.
	* gcc.target/i386/avx512f-add-si-zmm-6.c: Likewise.
	* gcc.target/i386/avx512f-sub-di-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-sub-si-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-sub-si-zmm-2.c: Likewise.
	* gcc.target/i386/avx512f-sub-si-zmm-3.c: Likewise.
	* gcc.target/i386/avx512f-sub-si-zmm-4.c: Likewise.
	* gcc.target/i386/avx512f-sub-si-zmm-5.c: Likewise.
	* gcc.target/i386/avx512vl-add-si-xmm-1.c: Likewise.
	* gcc.target/i386/avx512vl-add-si-ymm-1.c: Likewise.
	* gcc.target/i386/avx512vl-sub-si-xmm-1.c: Likewise.
	* gcc.target/i386/avx512vl-sub-si-ymm-1.c: Likewise.

From-SVN: r265368
2018-10-22 00:25:51 -07:00
GCC Administrator
0067ddcc0f Daily bump.
From-SVN: r265366
2018-10-22 00:17:02 +00:00
William Schmidt
5d9c5a9668 emmintrin.h (_mm_movemask_pd): Replace __vector __m64 with __vector unsigned long long for compatibility.
2018-10-21  Bill Schmidt  <wschmidt@linux.ibm.com>
	    Jinsong Ji  <jji@us.ibm.com>

	* config/rs6000/emmintrin.h (_mm_movemask_pd): Replace __vector
	__m64 with __vector unsigned long long for compatibility.
	(_mm_movemask_epi8): Likewise.
	* config/rs6000/xmmintrin.h (_mm_cvtps_pi32): Likewise.
	(_mm_cvttps_pi32): Likewise.
	(_mm_cvtpi32_ps): Likewise.
	(_mm_cvtps_pi16): Likewise.
	(_mm_loadh_pi): Likewise.
	(_mm_storeh_pi): Likewise.
	(_mm_movehl_ps): Likewise.
	(_mm_movelh_ps): Likewise.
	(_mm_loadl_pi): Likewise.
	(_mm_storel_pi): Likewise.
	(_mm_movemask_ps): Likewise.
	(_mm_shuffle_pi16): Likewise.

From-SVN: r265362
2018-10-21 23:30:51 +00:00
H.J. Lu
9d165ca698 Move testsuite ChangeLog entries to testsuite/ChangeLog
From-SVN: r265360
2018-10-21 13:38:27 -07:00
H.J. Lu
3be6195b32 i386: Update AVX512 FMSUB/FNMADD/FNMSUB tests
Update AVX512 tests to test the newly added FMSUB, FNMADD and FNMSUB
builtin functions.

	PR target/72782
	* gcc.target/i386/avx-1.c (__builtin_ia32_vfmsubpd512_mask): New.
	(__builtin_ia32_vfmsubpd512_maskz): Likewise.
	(__builtin_ia32_vfmsubps512_mask): Likewise.
	(__builtin_ia32_vfmsubps512_maskz): Likewise.
	(__builtin_ia32_vfnmaddpd512_mask3): Likewise.
	(__builtin_ia32_vfnmaddpd512_maskz): Likewise.
	(__builtin_ia32_vfnmaddps512_mask3): Likewise.
	(__builtin_ia32_vfnmaddps512_maskz): Likewise.
	(__builtin_ia32_vfnmsubpd512_maskz): Likewise.
	(__builtin_ia32_vfnmsubps512_maskz): Likewise.
	* testsuite/gcc.target/i386/sse-13.c
	(__builtin_ia32_vfmsubpd512_mask): Likewise.
	(__builtin_ia32_vfmsubpd512_maskz): Likewise.
	(__builtin_ia32_vfmsubps512_mask): Likewise.
	(__builtin_ia32_vfmsubps512_maskz): Likewise.
	(__builtin_ia32_vfnmaddpd512_mask3): Likewise.
	(__builtin_ia32_vfnmaddpd512_maskz): Likewise.
	(__builtin_ia32_vfnmaddps512_mask3): Likewise.
	(__builtin_ia32_vfnmaddps512_maskz): Likewise.
	(__builtin_ia32_vfnmsubpd512_maskz): Likewise.
	(__builtin_ia32_vfnmsubps512_maskz): Likewise.
	* testsuite/gcc.target/i386/sse-23.c
	(__builtin_ia32_vfmsubpd512_mask): Likewise.
	(__builtin_ia32_vfmsubpd512_maskz): Likewise.
	(__builtin_ia32_vfmsubps512_mask): Likewise.
	(__builtin_ia32_vfmsubps512_maskz): Likewise.
	(__builtin_ia32_vfnmaddpd512_mask3): Likewise.
	(__builtin_ia32_vfnmaddpd512_maskz): Likewise.
	(__builtin_ia32_vfnmaddps512_mask3): Likewise.
	(__builtin_ia32_vfnmaddps512_maskz): Likewise.
	(__builtin_ia32_vfnmsubpd512_maskz): Likewise.
	(__builtin_ia32_vfnmsubps512_maskz): Likewise.

From-SVN: r265359
2018-10-21 13:30:06 -07:00
H.J. Lu
38ef6fb19d i386: Enable AVX512 memory broadcast for FNMSUB
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for FNMSUB operations.  In order to
support AVX512 memory broadcast for FNMSUB, FNMSUB builtin functions are
also added, instead of passing the negated value to FMA builtin functions.

gcc/

	PR target/72782
	* config/i386/avx512fintrin.h (_mm512_fnmsub_round_pd): Use
	__builtin_ia32_vfnmsubpd512_mask.
	(_mm512_mask_fnmsub_round_pd): Likewise.
	(_mm512_fnmsub_pd): Likewise.
	(_mm512_mask_fnmsub_pd): Likewise.
	(_mm512_maskz_fnmsub_round_pd): Use
	__builtin_ia32_vfnmsubpd512_maskz.
	(_mm512_maskz_fnmsub_pd): Likewise.
	(_mm512_fnmsub_round_ps): Use __builtin_ia32_vfnmsubps512_mask.
	(_mm512_mask_fnmsub_round_ps): Likewise.
	(_mm512_fnmsub_ps): Likewise.
	(_mm512_mask_fnmsub_ps): Likewise.
	(_mm512_maskz_fnmsub_round_ps): Use
	__builtin_ia32_vfnmsubps512_maskz.
	(_mm512_maskz_fnmsub_ps): Likewise.
	* config/i386/avx512vlintrin.h (_mm256_mask_fnmsub_pd): Use
	__builtin_ia32_vfnmsubpd256_mask.
	(_mm256_maskz_fnmsub_pd): Use __builtin_ia32_vfnmsubpd256_maskz.
	(_mm_mask_fnmsub_pd): Use __builtin_ia32_vfmaddpd128_mask
	(_mm_maskz_fnmsub_pd): Use __builtin_ia32_vfnmsubpd128_maskz.
	(_mm256_mask_fnmsub_ps): Use __builtin_ia32_vfnmsubps256_mask.
	(_mm256_mask_fnmsub_ps): Use __builtin_ia32_vfnmsubps256_mask.
	(_mm256_maskz_fnmsub_ps): Use __builtin_ia32_vfnmsubps256_maskz.
	(_mm_mask_fnmsub_ps): Use __builtin_ia32_vfnmsubps128_mask.
	(_mm_maskz_fnmsub_ps): Use __builtin_ia32_vfnmsubps128_maskz.
	* config/i386/fmaintrin.h (_mm_fnmsub_pd): Use
	__builtin_ia32_vfnmsubpd.
	(_mm256_fnmsub_pd): Use __builtin_ia32_vfnmsubpd256.
	(_mm_fnmsub_ps): Use __builtin_ia32_vfnmsubps.
	(_mm256_fnmsub_ps): Use __builtin_ia32_vfnmsubps256.
	(_mm_fnmsub_sd): Use __builtin_ia32_vfnmsubsd3.
	(_mm_fnmsub_ss): Use __builtin_ia32_vfnmsubss3.
	* config/i386/i386-builtin.def: Add
	__builtin_ia32_vfnmsubpd256_mask,
	__builtin_ia32_vfnmsubpd256_maskz,
	__builtin_ia32_vfnmsubpd128_mask,
	__builtin_ia32_vfnmsubpd128_maskz,
	__builtin_ia32_vfnmsubps256_mask,
	__builtin_ia32_vfnmsubps256_maskz,
	__builtin_ia32_vfnmsubps128_mask,
	__builtin_ia32_vfnmsubps128_maskz,
	__builtin_ia32_vfnmsubpd512_mask,
	__builtin_ia32_vfnmsubpd512_maskz,
	__builtin_ia32_vfnmsubps512_mask,
	__builtin_ia32_vfnmsubps512_maskz, __builtin_ia32_vfnmsubss3,
	__builtin_ia32_vfnmsubsd3, __builtin_ia32_vfnmsubps,
	__builtin_ia32_vfnmsubpd, __builtin_ia32_vfnmsubps256 and.
	__builtin_ia32_vfnmsubpd256.
	* config/i386/sse.md (fma4i_fnmsub_<mode>): New.
	(<avx512>_fnmsub_<mode>_maskz<round_expand_name>): Likewise.
	(*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1):
	Likewise.
	(*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_2):
	Likewise.
	(*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_3):
	Likewise.
	(fmai_vmfnmsub_<mode><round_name>): Likewise.

gcc/testsuite/

	PR target/72782
	* gcc.target/i386/avx512f-fnmsub-df-zmm-1.c: New test.
	* gcc.target/i386/avx512f-fnmsub-sf-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-fnmsub-sf-zmm-2.c: Likewise.
	* gcc.target/i386/avx512f-fnmsub-sf-zmm-3.c: Likewise.
	* gcc.target/i386/avx512f-fnmsub-sf-zmm-4.c: Likewise.
	* gcc.target/i386/avx512f-fnmsub-sf-zmm-5.c: Likewise.
	* gcc.target/i386/avx512f-fnmsub-sf-zmm-6.c: Likewise.
	* gcc.target/i386/avx512f-fnmsub-sf-zmm-7.c: Likewise.
	* gcc.target/i386/avx512f-fnmsub-sf-zmm-8.c: Likewise.
	* gcc.target/i386/avx512vl-fnmsub-sf-xmm-1.c: Likewise.
	* gcc.target/i386/avx512vl-fnmsub-sf-ymm-1.c: Likewise.

From-SVN: r265358
2018-10-21 13:28:56 -07:00
H.J. Lu
5ca9497788 i386: Enable AVX512 memory broadcast for FNMADD
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for FNMADD operations.  In order to
support AVX512 memory broadcast for FNMADD, FNMADD builtin functions are
also added, instead of passing the negated value to FMA builtin functions.

gcc/

	PR target/72782
	* config/i386/avx512fintrin.h (_mm512_fnmadd_round_pd): Use
	__builtin_ia32_vfnmaddpd512_mask.
	(_mm512_mask_fnmadd_round_pd): Likewise.
	(_mm512_fnmadd_pd): Likewise.
	(_mm512_mask_fnmadd_pd): Likewise.
	(_mm512_maskz_fnmadd_round_pd): Use
	__builtin_ia32_vfnmaddpd512_maskz.
	(_mm512_maskz_fnmadd_pd): Likewise.
	(_mm512_fnmadd_round_ps): Use __builtin_ia32_vfnmaddps512_mask.
	(_mm512_mask_fnmadd_round_ps): Likewise.
	(_mm512_fnmadd_ps): Likewise.
	(_mm512_mask_fnmadd_ps): Likewise.
	(_mm512_maskz_fnmadd_round_ps): Use
	__builtin_ia32_vfnmaddps512_maskz.
	(_mm512_maskz_fnmadd_ps): Likewise.
	* config/i386/avx512vlintrin.h (_mm256_mask_fnmadd_pd): Use
	__builtin_ia32_vfnmaddpd256_mask.
	(_mm256_maskz_fnmadd_pd): Use __builtin_ia32_vfnmaddpd256_maskz.
	(_mm_mask_fnmadd_pd): Use __builtin_ia32_vfmaddpd128_mask
	(_mm_maskz_fnmadd_pd): Use __builtin_ia32_vfnmaddpd128_maskz.
	(_mm256_mask_fnmadd_ps): Use __builtin_ia32_vfnmaddps256_mask.
	(_mm256_mask_fnmadd_ps): Use __builtin_ia32_vfnmaddps256_mask.
	(_mm256_maskz_fnmadd_ps): Use __builtin_ia32_vfnmaddps256_maskz.
	(_mm_mask_fnmadd_ps): Use __builtin_ia32_vfnmaddps128_mask.
	(_mm_maskz_fnmadd_ps): Use __builtin_ia32_vfnmaddps128_maskz.
	* config/i386/fmaintrin.h (_mm_fnmadd_pd): Use
	__builtin_ia32_vfnmaddpd.
	(_mm256_fnmadd_pd): Use __builtin_ia32_vfnmaddpd256.
	(_mm_fnmadd_ps): Use __builtin_ia32_vfnmaddps.
	(_mm256_fnmadd_ps): Use __builtin_ia32_vfnmaddps256.
	(_mm_fnmadd_sd): Use __builtin_ia32_vfnmaddsd3.
	(_mm_fnmadd_ss): Use __builtin_ia32_vfnmaddss3.
	* config/i386/i386-builtin.def: Add
	__builtin_ia32_vfnmaddpd256_mask,
	__builtin_ia32_vfnmaddpd256_maskz,
	__builtin_ia32_vfnmaddpd128_mask,
	__builtin_ia32_vfnmaddpd128_maskz,
	__builtin_ia32_vfnmaddps256_mask,
	__builtin_ia32_vfnmaddps256_maskz,
	__builtin_ia32_vfnmaddps128_mask,
	__builtin_ia32_vfnmaddps128_maskz,
	__builtin_ia32_vfnmaddpd512_mask,
	__builtin_ia32_vfnmaddpd512_maskz,
	__builtin_ia32_vfnmaddps512_mask,
	__builtin_ia32_vfnmaddps512_maskz, __builtin_ia32_vfnmaddss3,
	__builtin_ia32_vfnmaddsd3, __builtin_ia32_vfnmaddps,
	__builtin_ia32_vfnmaddpd, __builtin_ia32_vfnmaddps256 and.
	__builtin_ia32_vfnmaddpd256.
	* config/i386/sse.md (fma4i_fnmadd_<mode>): New.
	(<avx512>_fnmadd_<mode>_maskz<round_expand_name>): Likewise.
	(*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1):
	Likewise.
	(*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_2):
	Likewise.
	(*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_3):
	Likewise.
	(fmai_vmfnmadd_<mode><round_name>): Likewise.

gcc/testsuite/

	PR target/72782
	* gcc.target/i386/avx512f-fnmadd-df-zmm-1.c: New test.
	* gcc.target/i386/avx512f-fnmadd-sf-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-fnmadd-sf-zmm-2.c: Likewise.
	* gcc.target/i386/avx512f-fnmadd-sf-zmm-3.c: Likewise.
	* gcc.target/i386/avx512f-fnmadd-sf-zmm-4.c: Likewise.
	* gcc.target/i386/avx512f-fnmadd-sf-zmm-5.c: Likewise.
	* gcc.target/i386/avx512f-fnmadd-sf-zmm-6.c: Likewise.
	* gcc.target/i386/avx512f-fnmadd-sf-zmm-7.c: Likewise.
	* gcc.target/i386/avx512f-fnmadd-sf-zmm-8.c: Likewise.
	* gcc.target/i386/avx512vl-fnmadd-sf-xmm-1.c: Likewise.
	* gcc.target/i386/avx512vl-fnmadd-sf-ymm-1.c: Likewise.

From-SVN: r265357
2018-10-21 13:27:09 -07:00
H.J. Lu
fe7f972d6e Enable AVX512 memory broadcast for FMSUB
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for FMSUB operations.  In order to
support AVX512 memory broadcast for FMSUB, FMSUB builtin functions are
also added, instead of passing the negated value to FMA builtin functions.

gcc/

	PR target/72782
	* config/i386/avx512fintrin.h (_mm512_fmsub_round_pd): Use
	__builtin_ia32_vfmsubpd512_mask.
	(_mm512_mask_fmsub_round_pd): Likewise.
	(_mm512_fmsub_pd): Likewise.
	(_mm512_mask_fmsub_pd): Likewise.
	(_mm512_maskz_fmsub_round_pd): Use
	__builtin_ia32_vfmsubpd512_maskz.
	(_mm512_maskz_fmsub_pd): Likewise.
	(_mm512_fmsub_round_ps): Use __builtin_ia32_vfmsubps512_mask.
	(_mm512_mask_fmsub_round_ps): Likewise.
	(_mm512_fmsub_ps): Likewise.
	(_mm512_mask_fmsub_ps): Likewise.
	(_mm512_maskz_fmsub_round_ps): Use
	__builtin_ia32_vfmsubps512_maskz.
	(_mm512_maskz_fmsub_ps): Likewise.
	* config/i386/avx512vlintrin.h (_mm256_mask_fmsub_pd): Use
	__builtin_ia32_vfmsubpd256_mask.
	(_mm256_maskz_fmsub_pd): Use __builtin_ia32_vfmsubpd256_maskz.
	(_mm_mask_fmsub_pd): Use __builtin_ia32_vfmaddpd128_mask
	(_mm_maskz_fmsub_pd): Use __builtin_ia32_vfmsubpd128_maskz.
	(_mm256_mask_fmsub_ps): Use __builtin_ia32_vfmsubps256_mask.
	(_mm256_mask_fmsub_ps): Use __builtin_ia32_vfmsubps256_mask.
	(_mm256_maskz_fmsub_ps): Use __builtin_ia32_vfmsubps256_maskz.
	(_mm_mask_fmsub_ps): Use __builtin_ia32_vfmsubps128_mask.
	(_mm_maskz_fmsub_ps): Use __builtin_ia32_vfmsubps128_maskz.
	* config/i386/fmaintrin.h (_mm_fmsub_pd): Use
	__builtin_ia32_vfmsubpd.
	(_mm256_fmsub_pd): Use __builtin_ia32_vfmsubpd256.
	(_mm_fmsub_ps): Use __builtin_ia32_vfmsubps.
	(_mm256_fmsub_ps): Use __builtin_ia32_vfmsubps256.
	(_mm_fmsub_sd): Use __builtin_ia32_vfmsubsd3.
	(_mm_fmsub_ss): Use __builtin_ia32_vfmsubss3.
	* config/i386/i386-builtin.def: Add
	__builtin_ia32_vfmsubpd256_mask,
	__builtin_ia32_vfmsubpd256_maskz,
	__builtin_ia32_vfmsubpd128_mask,
	__builtin_ia32_vfmsubpd128_maskz,
	__builtin_ia32_vfmsubps256_mask,
	__builtin_ia32_vfmsubps256_maskz,
	__builtin_ia32_vfmsubps128_mask,
	__builtin_ia32_vfmsubps128_maskz,
	__builtin_ia32_vfmsubpd512_mask,
	__builtin_ia32_vfmsubpd512_maskz,
	__builtin_ia32_vfmsubps512_mask,
	__builtin_ia32_vfmsubps512_maskz, __builtin_ia32_vfmsubss3,
	__builtin_ia32_vfmsubsd3, __builtin_ia32_vfmsubps,
	__builtin_ia32_vfmsubpd, __builtin_ia32_vfmsubps256 and.
	__builtin_ia32_vfmsubpd256.
	* config/i386/sse.md (fma4i_fmsub_<mode>): New.
	(<avx512>_fmsub_<mode>_maskz<round_expand_name>): Likewise.
	(*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1):
	Likewise.
	(*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_2):
	Likewise.
	(*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_3):
	Likewise.
	(fmai_vmfmsub_<mode><round_name>): Likewise.

gcc/testsuite/

	PR target/72782
	* gcc.target/i386/avx512f-fmsub-df-zmm-1.c: New test.
	* gcc.target/i386/avx512f-fmsub-sf-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-fmsub-sf-zmm-2.c: Likewise.
	* gcc.target/i386/avx512f-fmsub-sf-zmm-3.c: Likewise.
	* gcc.target/i386/avx512f-fmsub-sf-zmm-4.c: Likewise.
	* gcc.target/i386/avx512f-fmsub-sf-zmm-5.c: Likewise.
	* gcc.target/i386/avx512f-fmsub-sf-zmm-6.c: Likewise.
	* gcc.target/i386/avx512f-fmsub-sf-zmm-7.c: Likewise.
	* gcc.target/i386/avx512f-fmsub-sf-zmm-8.c: Likewise.
	* gcc.target/i386/avx512vl-fmsub-sf-xmm-1.c: Likewise.
	* gcc.target/i386/avx512vl-fmsub-sf-ymm-1.c: Likewise.

From-SVN: r265356
2018-10-21 13:24:50 -07:00
Paul Thomas
88c08ac43c re PR fortran/71880 (pointer to allocatable character)
2018-10-21  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/71880
	* trans-expr.c (gfc_trans_pointer_assignment): Set the string
	length for array valued deferred length lhs.

2018-10-21  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/71880
	* gfortran.dg/deferred_character_31.f90 : New test.

From-SVN: r265353
2018-10-21 17:32:06 +00:00
H.J. Lu
ea1adf1d53 i386: Update FP add/sub with AVX512 memory broadcast
* config/i386/sse.md (*<plusminus_insn><mode>3<mask_name>_bcst_1):
	Remove plus.  Renamed to ...
	(*sub<mode>3<mask_name>_bcst): This.
	(*add<mode>3<mask_name>_bcst_2): Renamede to ...
	(*add<mode>3<mask_name>_bcst): This.

From-SVN: r265352
2018-10-21 03:46:48 -07:00
H.J. Lu
c038638ea9 i386: Enable AVX512 memory broadcast for FP mul
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for FP mul operations.

gcc/

	PR target/72782
	* config/i386/sse.md (*mul<mode>3<mask_name>_bcst): New.

gcc/testsuite/

	PR target/72782
	* gcc.target/i386/avx512f-mul-df-zmm-1.c: New test.
	* gcc.target/i386/avx512f-mul-sf-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-mul-sf-zmm-2.c: Likewise.
	* gcc.target/i386/avx512f-mul-sf-zmm-3.c: Likewise.
	* gcc.target/i386/avx512f-mul-sf-zmm-4.c: Likewise.
	* gcc.target/i386/avx512f-mul-sf-zmm-5.c: Likewise.
	* gcc.target/i386/avx512f-mul-sf-zmm-6.c: Likewise.
	* gcc.target/i386/avx512vl-mul-sf-xmm-1.c: Likewise.
	* gcc.target/i386/avx512vl-mul-sf-ymm-1.c: Likewise.

From-SVN: r265351
2018-10-21 03:35:36 -07:00
H.J. Lu
01fd9f8d21 i386: Add missing AVX512VL or/xor intrinsics
gcc/

	PR target/87662
	* i386/avx512vlintrin.h (_mm256_or_epi32): New.
	(_mm_or_epi32): Likewise.
	(_mm256_xor_epi32): Likewise.
	(_mm_xor_epi32): Likewise.
	(_mm256_or_epi64): Likewise.
	(_mm_or_epi64): Likewise.
	(_mm256_xor_epi64): Likewise.
	(_mm_xor_epi64): Likewise.

gcc/testsuite/

	PR target/87662
	* gcc.target/i386/pr87662.c

From-SVN: r265350
2018-10-21 03:23:58 -07:00
GCC Administrator
69862942e1 Daily bump.
From-SVN: r265349
2018-10-21 00:16:34 +00:00
H.J. Lu
fda5d5e6e0 i386: Enable AVX512 memory broadcast for FP div
Many AVX512 vector operations can broadcast from a scalar memory source.
This patch enables memory broadcast for FP div operations.

gcc/

	PR target/72782
	* config/i386/sse.md (*<avx512>_div<mode>3<mask_name>_bcst): New.

gcc/testsuite/

	PR target/72782
	* gcc.target/i386/avx512f-div-df-zmm-1.c: New test.
	* gcc.target/i386/avx512f-div-sf-zmm-1.c: Likewise.
	* gcc.target/i386/avx512f-div-sf-zmm-2.c: Likewise.
	* gcc.target/i386/avx512f-div-sf-zmm-3.c: Likewise.
	* gcc.target/i386/avx512f-div-sf-zmm-4.c: Likewise.
	* gcc.target/i386/avx512f-div-sf-zmm-5.c: Likewise.
	* gcc.target/i386/avx512vl-div-sf-xmm-1.c: Likewise.
	* gcc.target/i386/avx512vl-div-sf-ymm-1.c: Likewise.

From-SVN: r265345
2018-10-20 13:41:10 -07:00
François Dumont
f65c0c735e testsuite_containers.h (forward_members_unordered<>::forward_members_unordered (const value_type&)): Add local_iterator pre and post increment checks.
2018-10-20  François Dumont  <fdumont@gcc.gnu.org>

	* testsuite/util/testsuite_containers.h
	(forward_members_unordered<>::forward_members_unordered
	(const value_type&)): Add local_iterator pre and post increment checks.
	* config/abi/pre/gnu.ver: Add GLIBCXX_3.4.26 new symbol.

From-SVN: r265344
2018-10-20 20:00:45 +00:00
Marek Polacek
be515b4ce0 *.C: Use target c++17 instead of explicit dg-options.
* g++.dg/*.C: Use target c++17 instead of explicit dg-options.
	* lib/g++-dg.exp: Don't test C++11 by default.  Add C++17 to
	the list of default stds to test.

From-SVN: r265343
2018-10-20 17:21:19 +00:00
Jakub Jelinek
ca66a6cd61 re PR middle-end/87647 (ICE on valid code in decode_addr_const, at varasm.c:2958)
PR middle-end/87647
	* varasm.c (decode_addr_const): Handle COMPOUND_LITERAL_EXPR.

	* gcc.c-torture/compile/pr87647.c: New test.

From-SVN: r265341
2018-10-20 10:58:00 +02:00
Andreas Schwab
79e61dc249 * doc/ux.texi: Move @section directly after @node.
From-SVN: r265340
2018-10-20 07:29:15 +00:00
GCC Administrator
425057a316 Daily bump.
From-SVN: r265339
2018-10-20 00:17:03 +00:00
Jakub Jelinek
173670e2b4 re PR middle-end/85488 (segmentation fault when compiling code using the ordered(n) clause in OpenMP 4.5)
PR middle-end/85488
	PR middle-end/87649
	* omp-low.c (check_omp_nesting_restrictions): Diagnose ordered without
	depend closely nested inside of loop with ordered clause with
	a parameter.

	* c-c++-common/gomp/doacross-2.c: New test.
	* c-c++-common/gomp/sink-3.c: Expect another error during error
	recovery.

From-SVN: r265335
2018-10-20 00:52:06 +02:00
Jonathan Wakely
f324588755 Skip tests for GNU extensions when testing with strict mode
Tests for the implicit allocator rebinding extension will fail if the
extension is disabled, so skip them.

	* testsuite/23_containers/array/requirements/explicit_instantiation/
	3.cc: Skip test when compiled with a -std=c++NN strict mode.
	* testsuite/23_containers/deque/requirements/explicit_instantiation/
	3.cc: Likewise.
	* testsuite/23_containers/forward_list/requirements/
	explicit_instantiation/3.cc: Likewise.
	* testsuite/23_containers/list/requirements/explicit_instantiation/
	3.cc: Likewise.
	* testsuite/23_containers/map/requirements/explicit_instantiation/
	3.cc: Likewise.
	* testsuite/23_containers/multimap/requirements/explicit_instantiation/
	3.cc: Likewise.
	* testsuite/23_containers/multiset/requirements/explicit_instantiation/
	3.cc: Likewise.
	* testsuite/23_containers/set/requirements/explicit_instantiation/
	3.cc: Likewise.
	* testsuite/23_containers/unordered_map/requirements/
	explicit_instantiation/3.cc: Likewise.
	* testsuite/23_containers/unordered_multimap/requirements/
	explicit_instantiation/3.cc: Likewise.
	* testsuite/23_containers/unordered_multiset/requirements/
	explicit_instantiation/3.cc: Likewise.
	* testsuite/23_containers/unordered_set/requirements/
	explicit_instantiation/3.cc: Likewise.
	* testsuite/23_containers/vector/ext_pointer/explicit_instantiation/
	3.cc: Likewise.
	* testsuite/23_containers/vector/requirements/explicit_instantiation/
	3.cc: Likewise.

From-SVN: r265334
2018-10-19 22:50:15 +01:00
Jonathan Wakely
92bab15297 Fix testsuite failures due to extra errors in strict dialects
When __STRICT_ANSI__ is defined the incorrect allocators used in these
tests also trigger and additional static assertion. Prune those extra
errors so that the tests don't fail when built with strict dialects.

	* testsuite/23_containers/deque/48101_neg.cc: Prune additional errors
	printed when __STRICT_ANSI__ is defined.
	* testsuite/23_containers/forward_list/48101_neg.cc: Likewise.
	* testsuite/23_containers/list/48101_neg.cc: Likewise.
	* testsuite/23_containers/multiset/48101_neg.cc: Likewise.
	* testsuite/23_containers/set/48101_neg.cc: Likewise.
	* testsuite/23_containers/unordered_multiset/48101_neg.cc: Likewise.
	* testsuite/23_containers/unordered_set/48101_neg.cc: Likewise.
	* testsuite/23_containers/vector/48101_neg.cc: Likewise.

From-SVN: r265333
2018-10-19 22:50:03 +01:00
Jonathan Wakely
f8f3939037 Conditionally disable tests of non-standard extensions
These tests include uses of the extension to allow allocators with the
wrong value_type in containers. Skip those parts of the tests when
__STRICT_ANIS__ is defined.

	* testsuite/23_containers/forward_list/requirements/
	explicit_instantiation/5.cc [__STRICT_ANSI__]: Don't test non-standard
	extension.
	* testsuite/23_containers/list/requirements/explicit_instantiation/
	5.cc [__STRICT_ANSI__]: Likewise.
	* testsuite/23_containers/map/requirements/explicit_instantiation/5.cc
	[__STRICT_ANSI__]: Likewise.
	* testsuite/23_containers/multimap/requirements/explicit_instantiation/
	5.cc [__STRICT_ANSI__]: Likewise.
	* testsuite/23_containers/multiset/requirements/explicit_instantiation/
	5.cc [__STRICT_ANSI__]: Likewise.
	* testsuite/23_containers/set/requirements/explicit_instantiation/5.cc
	[__STRICT_ANSI__]: Likewise.
	* testsuite/23_containers/unordered_map/requirements/debug_container.cc
	[__STRICT_ANSI__]: Likewise.
	* testsuite/23_containers/unordered_map/requirements/
	explicit_instantiation/5.cc [__STRICT_ANSI__]: Likewise.
	* testsuite/23_containers/unordered_multimap/requirements/
	explicit_instantiation/5.cc [__STRICT_ANSI__]: Likewise.
	* testsuite/23_containers/unordered_multiset/requirements/
	explicit_instantiation/5.cc [__STRICT_ANSI__]: Likewise.
	* testsuite/23_containers/unordered_set/requirements/
	explicit_instantiation/5.cc [__STRICT_ANSI__]: Likewise.

From-SVN: r265332
2018-10-19 22:49:49 +01:00
Jonathan Wakely
78ed0f80c3 Fix tests that use allocators with incorrect value types
As a GNU extension we allow containers to be instantiated with
allocators that use a different value type from the container, and
automatically rebind the allocator to the correct type. This extension
is disabled in strict modes (when __STRICT_ANSI__ is defined, i.e.
-std=c++NN dialects). These testcases unintentionally rely on the
extension and so fail for strict modes.

Tests which intentionally make use of the extension will still fail in
strict dialects, but will be addressed in a later change.

	* testsuite/20_util/scoped_allocator/1.cc: Use allocator with correct
	value type for the container.
	* testsuite/23_containers/forward_list/cons/14.cc: Likewise.
	* testsuite/23_containers/map/56613.cc: Likewise.
	* testsuite/23_containers/unordered_map/55043.cc: Likewise.
	* testsuite/23_containers/unordered_map/allocator/copy.cc: Likewise.
	* testsuite/23_containers/unordered_map/allocator/copy_assign.cc:
	Likewise.
	* testsuite/23_containers/unordered_map/allocator/minimal.cc:
	Likewise.
	* testsuite/23_containers/unordered_map/allocator/move.cc: Likewise.
	* testsuite/23_containers/unordered_map/allocator/move_assign.cc:
	Likewise.
	* testsuite/23_containers/unordered_map/allocator/noexcept.cc:
	Likewise.
	* testsuite/23_containers/unordered_map/cons/81891.cc: Likewise.
	* testsuite/23_containers/unordered_map/requirements/exception/
	basic.cc: Likewise.
	* testsuite/23_containers/unordered_map/requirements/exception/
	generation_prohibited.cc: Likewise.
	* testsuite/23_containers/unordered_map/requirements/exception/
	propagation_consistent.cc: Likewise.
	* testsuite/23_containers/unordered_multimap/55043.cc: Likewise.
	* testsuite/23_containers/unordered_multimap/allocator/copy.cc:
	Likewise.
	* testsuite/23_containers/unordered_multimap/allocator/copy_assign.cc:
	Likewise.
	* testsuite/23_containers/unordered_multimap/allocator/minimal.cc:
	Likewise.
	* testsuite/23_containers/unordered_multimap/allocator/move.cc:
	Likewise.
	* testsuite/23_containers/unordered_multimap/allocator/move_assign.cc:
	Likewise.
	* testsuite/23_containers/unordered_multimap/allocator/noexcept.cc:
	Likewise.
	* testsuite/23_containers/unordered_multimap/requirements/exception/
	basic.cc: Likewise.
	* testsuite/23_containers/unordered_multimap/requirements/exception/
	generation_prohibited.cc: Likewise.
	* testsuite/23_containers/unordered_multimap/requirements/exception/
	propagation_consistent.cc: Likewise.
	* testsuite/23_containers/unordered_multimap/requirements/
	explicit_instantiation/5.cc: Likewise.
	* testsuite/ext/malloc_allocator/sanity.cc: Likewise.

From-SVN: r265331
2018-10-19 22:49:40 +01:00
Jonathan Wakely
e7f2d0bdb5 Disable tests that only pass for GNU dialects
The airy and hypergeometric functions are non-standard extensions and
are only defined for -std=gnu++NN dialects, not -std=c++NN ones.

	* ext/special_functions/airy_ai/check_nan.cc: Skip test for
	non-standard extension when a strict -std=c++NN dialect is used.
	* ext/special_functions/airy_ai/check_value.cc: Likewise.
	* ext/special_functions/airy_ai/compile.cc: Likewise.
	* ext/special_functions/airy_bi/check_nan.cc: Likewise.
	* ext/special_functions/airy_bi/check_value.cc: Likewise.
	* ext/special_functions/airy_bi/compile.cc: Likewise.
	* ext/special_functions/conf_hyperg/check_nan.cc: Likewise.
	* ext/special_functions/conf_hyperg/check_value.cc: Likewise.
	* ext/special_functions/conf_hyperg/compile.cc: Likewise.
	* ext/special_functions/hyperg/check_nan.cc: Likewise.
	* ext/special_functions/hyperg/check_value.cc: Likewise.
	* ext/special_functions/hyperg/compile.cc: Likewise.

From-SVN: r265330
2018-10-19 22:49:32 +01:00
Jonathan Wakely
88412b71ee Remove duplicate tests
These tests originally existed to check the containers in C++11 mode,
when the default was C++98 mode. Now that the default is C++14 (and we
run most tests for all modes) it serves no purpose to have two copies of
the tests when neither is explicitly using -std=gnu++98 anyway.

	* testsuite/23_containers/list/requirements/explicit_instantiation/
	5_c++0x.cc: Remove redundant test that is functionally identical to
	the 5.cc test.
	* testsuite/23_containers/map/requirements/explicit_instantiation/
	5_c++0x.cc: Likewise.
	* testsuite/23_containers/multimap/requirements/explicit_instantiation/
	5_c++0x.cc: Likewise.
	* testsuite/23_containers/multiset/requirements/explicit_instantiation/
	5_c++0x.cc: Likewise.
	* testsuite/23_containers/set/requirements/explicit_instantiation/
	5_c++0x.cc: Likewise.

From-SVN: r265329
2018-10-19 22:49:19 +01:00
David Malcolm
92646d2577 gccint.texi: add user experience guidelines
gcc/ChangeLog:
	* Makefile.in (TEXI_GCCINT_FILES): Add ux.texi.
	* doc/gccint.texi: Include ux.texi and use it in top-level menu.
	* doc/ux.texi: New file.

From-SVN: r265322
2018-10-19 19:50:02 +00:00
Ian Lance Taylor
12d5ebf963 compiler: don't export any functions with special names
This keeps init functions from appearing in the export data.  Checking
    for special names in general means that we don't need to check
    specifically for nested functions or thunks, which have special names.
    
    Reviewed-on: https://go-review.googlesource.com/c/143237

From-SVN: r265321
2018-10-19 19:43:47 +00:00
William Schmidt
3146c60f16 re PR tree-optimization/87473 (ICE in create_add_on_incoming_edge, at gimple-ssa-strength-reduction.c:2344)
[gcc]

2018-10-19  Bill Schmidt  <wschmidt@linux.ibm.com>

	PR tree-optimization/87473
	* gimple-ssa-strength-reduction.c (record_phi_increments_1): For
	phi arguments identical to the base expression of the phi
	candidate, record a phi-adjust increment of zero minus the index
	expression of the hidden basis.
	(phi_incr_cost_1): For phi arguments identical to the base
	expression of the phi candidate, the difference to compare against
	the increment is zero minus the index expression of the hidden
	basis, and there is no potential savings from replacing the (phi)
	statement.
	(ncd_with_phi): For phi arguments identical to the base expression
	of the phi candidate, the difference to compare against the
	increment is zero minus the index expression of the hidden basis.
	(all_phi_incrs_profitable_1): For phi arguments identical to the
	base expression of the phi candidate, the increment to be checked
	for profitability is zero minus the index expression of the hidden
	basis.

[gcc/testsuite]

2018-10-19  Bill Schmidt  <wschmidt@linux.ibm.com>

	PR tree-optimization/87473
	* gcc.c-torture/compile/pr87473.c: New file.

From-SVN: r265319
2018-10-19 18:28:11 +00:00
Segher Boessenkool
273f3d4bb4 rs6000: Put CR0 first in REG_ALLOC_ORDER
IRA and LRA prefer to use CR7 (which is first in REG_ALLOC_ORDER) over
CR0, although the latter often is cheaper ("x" vs. "y" constraints).
We should figure out why this is and fix it; but until that is done,
this patch makes CR0 the first allocated register: it improves the
current code, and it is required for later patches to be effective.

(It changes two testcases to no longer look at what CR field is
allocated).


	* config/rs6000/rs6000.h (REG_ALLOC_ORDER): Move 68 (that is, CR0) to
	be the first CR field allocated.

gcc/testsuite/
	* gcc.target/powerpc/safe-indirect-jump-2.c: Do not check assigned CR
	field number.
	* gcc.target/powerpc/safe-indirect-jump-3.c: Ditto.

From-SVN: r265318
2018-10-19 17:40:57 +02:00