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GCC Administrator
f518da46fb Daily bump. 
From-SVN: r259263
 2018-04-10 00:16:21 +00:00
Paolo Carlini
52912c9160 re PR c++/85227 (ICE with structured binding of a forward declared variable) 
/cp
2018-04-09  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/85227
	* decl.c (cp_finish_decomp): In a template, if the type is incomplete
	issue a pedwarn and defer trying to do bindings.

/testsuite
2018-04-09  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/85227
	* g++.dg/cpp1z/decomp44.C: New.
	* g++.dg/cpp1z/decomp45.C: Likewise.

From-SVN: r259259
 2018-04-09 22:33:35 +00:00
Thomas Koenig
f0caea4872 re PR fortran/83064 (DO CONCURRENT and auto-parallelization) 
2018-04-09  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/83064
	* trans-stmt.c (gfc_trans_forall_loop): Remove annotation for
	parallell processing of DO CONCURRENT -ftree-parallelize-loops
	is set.

2018-04-09  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/83064
	* gfortran.dg/do_concurrent_5.f90: New test.
	* gfortran.dg/vect/vect-do-concurrent-1.f90: Adjust dg-bogus
	message.

From-SVN: r259258
 2018-04-09 21:52:05 +00:00
Jason Merrill
06756ed901 PR c++/85279 - dump_expr doesn't understand decltype. 
* error.c (dump_expr): Handle DECLTYPE_TYPE.

From-SVN: r259257
 2018-04-09 17:16:05 -04:00
Thomas Koenig
06e8d82eba re PR fortran/51260 (PARAMETER array with constructor initializer: Compile-time simplify single element access) 
2018-04-09  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/51260
	* resolve.c (resolve_variable): Simplify cases where access to a
	parameter array results in a single constant.

2018-04-09  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/51260
	* gfortran.dg/parameter_array_element_3.f90: New test.

From-SVN: r259256
 2018-04-09 21:05:13 +00:00
Jason Merrill
17434237d3 PR c++/85262 - ICE with redundant qualification on constructor. 
* call.c (build_new_method_call_1): Move make_args_non_dependent
	after A::A() handling.

From-SVN: r259255
 2018-04-09 16:53:31 -04:00
Jason Merrill
e9f59cfa4a PR c++/85277 - ICE with invalid offsetof. 
* semantics.c (finish_offsetof): Avoid passing non-DECL to %qD.
	Adjust -Winvalid-offsetof diagnostic to say conditionally supported.

From-SVN: r259254
 2018-04-09 16:40:06 -04:00
Jason Merrill
68a8efea50 PR c++/85264 - ICE with excess template-parameter-list. 
* parser.c (cp_parser_check_template_parameters): Add template_id_p
	parameter.  Don't allow an extra template header if true.
	(cp_parser_class_head): Pass template_id_p.
	(cp_parser_elaborated_type_specifier): Likewise.
	(cp_parser_alias_declaration): Likewise.
	(cp_parser_check_declarator_template_parameters): Likewise.

From-SVN: r259253
 2018-04-09 15:50:03 -04:00
Jakub Jelinek
6e4f1148ce re PR c++/85194 (ICE with structured binding in broken for-loop) 
PR c++/85194
	* parser.c (cp_parser_simple_declaration): For structured bindings,
	if *maybe_range_for_decl is NULL after parsing it, set it to
	error_mark_node.

	* g++.dg/cpp1z/decomp43.C: New test.

From-SVN: r259252
 2018-04-09 21:48:48 +02:00
Martin Sebor
78c3f9becd invoke.texi (-finline-small-functions): Mention other optimization options. 
gcc/doc/ChangeLog:

	* invoke.texi (-finline-small-functions): Mention other optimization
	options.
	(-findirect-inlining, -fpartial-inlining): Same.
	(-finline-functions-called-once): Same.
	(-freorder-blocks-and-partition): Same.

From-SVN: r259250
 2018-04-09 13:01:04 -06:00
Jakub Jelinek
45d07f0608 re PR rtl-optimization/80463 (ICE with -fselective-scheduling2 and -fvar-tracking-assignments) 
PR rtl-optimization/80463
	* g++.dg/pr80463.C: Add -w to dg-options.

From-SVN: r259249
 2018-04-09 20:21:03 +02:00
Jan Hubicka
687d5dfe16 re PR rtl-optimization/84058 (RTl partitioning fixup should drag very small blocks back to hot partition) 
PR rtl/84058
	* cfgcleanup.c (try_forward_edges): Do not give up on crossing
	jumps; choose last target that matches the criteria (i.e.
	no partition changes for non-crossing jumps).
	* cfgrtl.c (cfg_layout_redirect_edge_and_branch): Add basic
	support for redirecting crossing jumps to non-crossing.

From-SVN: r259244
 2018-04-09 16:33:51 +00:00
Jason Merrill
13c60208d0 PR c++/85256 - ICE capturing pointer to VLA. 
* lambda.c (add_capture): Distinguish between variable-size and
	variably-modified types.

From-SVN: r259240
 2018-04-09 11:32:05 -04:00
Jason Merrill
cca538a46e * g++.dg/opt/pr85196.C: Fix for -std=c++17. 
From-SVN: r259239
 2018-04-09 11:31:59 -04:00
Alexey Brodkin
83b2a5f40d [ARC] Fix stack usage info for naked functions. 
gcc/
2018-04-09  Alexey Brodkin <abrodkin@synopsys.com>

	* config/arc/arc.c (arc_expand_prologue): Set stack usage info
	also for naked functions.

From-SVN: r259238
 2018-04-09 17:05:30 +02:00
Claudiu Zissulescu
f7ace5d5c2 [ARC] Add/update combiner patterns. 
gcc/
2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (add_shift): New pattern.
	(add_shift2): Likewise.
	(sub_shift): Likewise.
	(sub_shift_cmp0_noout): Likewise.
	(compare_si_ashiftsi): Likewise.
	(xbfu_cmp0_noout): New combine pattern.
	(xbfu_cmp0"): Likewise.
	(movsi_set_cc_insn): Place the predicable variant first.
	(commutative_binary_cmp0_noout): Remove clobber.
	(commutative_binary_cmp0): New pattern.
	(noncommutative_binary_cmp0): Likewise.
	(noncommutative_binary_cmp0_noout): Likewise.
	(noncommutative_binary_comparison_result_used): Removed.
	(rsub_cmp0): New pattern.
	(rsub_cmp0_noout): Likewise.
	(extzvsi): Changed, keep only meaningful variants.
	(SQH, SEZ): New iterators.
	(SQH_postfix): New mode attribute.
	(SEZ_prefix): New code attribute.
	(<SEZ_prefix>xt<SQH_postfix>_cmp0_noout): New instruction pattern.
	(<SEZ_prefix>xt<SQH_postfix>_cmp0): Likewise.
	* config/arc/predicates.md (cc_set_register): Use CC_REG instead
	of numerical value.
	(noncommutative_operator): Check the availability of barrel
	shifter option.

From-SVN: r259237
 2018-04-09 17:05:19 +02:00
Richard Biener
46e58e180d re PR tree-optimization/85284 (Loop miscompilation starting with r238367) 
2018-04-09  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/85284
	* tree-ssa-loop-niter.c (number_of_iterations_exit_assumptions):
	Only use the niter constraining form of simple_iv when the exit
	is always executed.

	* gcc.dg/torture/pr85284.c: New testcase.

From-SVN: r259234
 2018-04-09 13:27:33 +00:00
Tom de Vries
f04fd9038e [nvptx] Add memory_barrier insn 
2018-04-09  Tom de Vries  <tom@codesourcery.com>

	PR target/84041
	* config/nvptx/nvptx.md (define_c_enum "unspecv"): Add UNSPECV_MEMBAR.
	(define_expand "*memory_barrier"): New define_expand.
	(define_insn "memory_barrier"): New insn.

From-SVN: r259233
 2018-04-09 13:22:00 +00:00
Andrey Belevantsev
6abce7391a re PR rtl-optimization/80463 (ICE with -fselective-scheduling2 and -fvar-tracking-assignments) 
PR rtl-optimization/80463
       PR rtl-optimization/83972
       PR rtl-optimization/83480

       * sel-sched-ir.c (has_dependence_note_mem_dep): Take into account the
       correct producer for the insn.
       (tidy_control_flow): Fixup seqnos in case of debug insns.

       * gcc.dg/pr80463.c: New test.
       * g++.dg/pr80463.C: Likewise.
       * gcc.dg/pr83972.c: Likewise.

From-SVN: r259231
 2018-04-09 13:19:50 +03:00
Andrey Belevantsev
8e9a9b0142 re PR rtl-optimization/83913 (Compile time and memory hog w/ selective scheduling) 
PR rtl-optimization/83913

       * sel-sched-ir.c (merge_expr_data): Choose the middle between two
       different sched-times when merging exprs.

       * gcc.dg/pr83913.c: New test.

From-SVN: r259230
 2018-04-09 12:42:25 +03:00
Andrey Belevantsev
ab6dceab10 re PR rtl-optimization/83962 (ICE: verify_flow_info failed (too many outgoing branch edges from bb 8)) 
PR rtl-optimization/83962

       * sel-sched-ir.c (tidy_control_flow): Correct the order in which we call
       tidy_fallthru_edge and tidy_control_flow.

       * gcc.dg/pr83962.c: New test.

From-SVN: r259229
 2018-04-09 12:16:34 +03:00
Andrey Belevantsev
33bacbcba5 re PR rtl-optimization/83530 (ICE in reset_sched_cycles_in_current_ebb, at sel-sched.c:7150) 
PR rtl-optimization/83530

       * sel-sched.c (force_next_insn): New global variable.
       (remove_insn_for_debug): When force_next_insn is true, also leave only
       next insn in the ready list.
       (sel_sched_region): When the region wasn't scheduled, make another pass
       over it with force_next_insn set to 1.

       * gcc.dg/pr83530.c: New test.

From-SVN: r259228
 2018-04-09 12:08:28 +03:00
GCC Administrator
a0873952aa Daily bump. 
From-SVN: r259227
 2018-04-09 00:16:27 +00:00
Martin Sebor
de8a29bd84 invoke.texi (-Wrestrict, [...]): Tweak text. 
gcc/ChangeLog:

	* invoke.texi (-Wrestrict, -fprintf-return-value): Tweak text.

From-SVN: r259224
 2018-04-08 10:14:31 -06:00
Monk Chiang
8b9322f0a5 [NDS32] Add intrinsic functions for interrupt control. 
gcc/
	* config.gcc (nds32le-*-*, nds32be-*-*): Add nds32/nds32_intrinsic.h
	into tm_file.
	* config/nds32/constants.md (unspec_volatile_element): Add enum values
	for interrupt control.
	* config/nds32/nds32-intrinsic.c: Implementation of intrinsic
	functions for interrupt control.
	* config/nds32/nds32-intrinsic.md: Likewise.
	* config/nds32/nds32_intrinsic.h: Likewise.
	* config/nds32/nds32.h (nds32_builtins): Likewise.

From-SVN: r259223
 2018-04-08 14:28:44 +00:00
Chung-Ju Wu
5f2a98c3f5 [NDS32] Add strict_aligned_p to machine_function and implement TARGET_EXPAND_TO_RTL_HOOK. 
gcc/
	* config/nds32/nds32.c (nds32_init_machine_status,
	nds32_legitimate_index_p, nds32_legitimate_address_p): Consider
	strict_aligned_p field.
	(nds32_expand_to_rtl_hook): New function.
	(TARGET_EXPAND_TO_RTL_HOOK): Define.
	* config/nds32/nds32.h (machine_function): Add strict_aligned_p field.

From-SVN: r259222
 2018-04-08 11:14:09 +00:00
Kito Cheng
63ab910dd7 [NDS32] Implement n7 pipeline. 
gcc/
	* config.gcc (nds32*-*-*): Check that n7 is valid to --with-cpu.
	* config/nds32/nds32-n7.md: New file.
	* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N7.
	* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n7
	pipeline.
	* config/nds32/nds32-protos.h: More declarations for n7 pipeline.
	* config/nds32/nds32.md (pipeline_model): Add n7.
	* config/nds32/nds32.opt (mcpu): Support n7 pipeline cpus.
	* config/nds32/pipelines.md: Include n7 settings.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>

From-SVN: r259221
 2018-04-08 09:21:30 +00:00
Kito Cheng
7c1583bdd8 [NDS32] Implement e8 pipeline. 
gcc/
	* config.gcc (nds32*-*-*): Check that e8 is valid to --with-cpu.
	* config/nds32/nds32-e8.md: New file.
	* config/nds32/nds32-opts.h (nds32-cpu_type): Add CPU_E8.
	* config/nds32/nds32-pipelines-auxiliary.c: Implementation for e8
	pipeline.
	* config/nds32/nds32-protos.h: More declarations for e8 pipeline.
	* config/nds32/nds32.md (pipeline_model): Add e8.
	* config/nds32/nds32.opt (mcpu): Support e8 pipeline cpus.
	* config/nds32/pipelines.md: Include e8 settings.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>

From-SVN: r259220
 2018-04-08 09:02:31 +00:00
Kito Cheng
8fd5214127 [NDS32] Implement n8 pipeline. 
gcc/
	* config.gcc (nds32*-*-*): Check that n6/n8/s8 are valid to --with-cpu.
	* config/nds32/nds32-n8.md: New file.
	* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N6 and CPU_N8.
	* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n8
	pipeline.
	* config/nds32/nds32-protos.h: More declarations for n8 pipeline.
	* config/nds32/nds32-utils.c: More implementations for n8 pipeline.
	* config/nds32/nds32.md (pipeline_model): Add n8.
	* config/nds32/nds32.opt (mcpu): Support n8 pipeline cpus.
	* config/nds32/pipelines.md: Include n8 settings.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>

From-SVN: r259219
 2018-04-08 08:31:52 +00:00
Kito Cheng
b99353a2aa [NDS32] Implment n9 pipeline. 
gcc/
	* config.gcc (nds32*): Add nds32-utils.o into extra_objs.
	* config/nds32/nds32-n9-2r1w.md: New file.
	* config/nds32/nds32-n9-3r2w.md: New file.
	* config/nds32/nds32-opts.h (nds32_cpu_type, nds32_mul_type,
	nds32_register_ports): New or modify for cpu n9.
	* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n9
	pipeline.
	* config/nds32/nds32-protos.h: More declarations for n9 pipeline.
	* config/nds32/nds32-utils.c: New file.
	* config/nds32/nds32.h (TARGET_PIPELINE_N9, TARGET_PIPELINE_SIMPLE,
	TARGET_MUL_SLOW): Define.
	* config/nds32/nds32.md (pipeline_model): New attribute.
	* config/nds32/nds32.opt (mcpu, mconfig-mul, mconfig-register-ports):
	New options that support cpu n9.
	* config/nds32/pipelines.md: Include n9 settings.
	* config/nds32/t-nds32 (nds32-utils.o): Add dependency.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>

From-SVN: r259218
 2018-04-08 08:12:19 +00:00
Chung-Ju Wu
43fa41c1aa [NDS32] New option -malways-align and -malign-functions. 
gcc/
	* config/nds32/nds32-md-auxiliary.c (output_cond_branch): Output align
	information if necessary.
	(output_cond_branch_compare_zero): Likewise.
	* config/nds32/nds32.c (nds32_adjust_insn_length): Consider align case.
	(nds32_target_alignment): Refine for alignment.
	* config/nds32/nds32.h (NDS32_ALIGN_P): Define.
	(FUNCTION_BOUNDARY): Modify.
	* config/nds32/nds32.md (call_internal, call_value_internal): Consider
	align case.
	* config/nds32/nds32.opt (malways-align, malign-functions): New.

From-SVN: r259217
 2018-04-08 06:00:34 +00:00
Monk Chiang
57aaf0cc9e [NDS32] Add intrinsic functions for TLB operation and data prefech. 
gcc/
	* config/nds32/constants.md (unspec_volatile_element): Add values for
	TLB operation and data prefetch.
	* config/nds32/nds32-intrinsic.c: Implementation of intrinsic
	functions for TLB operation and data prefetch.
	* config/nds32/nds32-intrinsic.md: Likewise.
	* config/nds32/nds32_intrinsic.h: Likewise.
	* config/nds32/nds32.c (nds32_dpref_names): Likewise.
	(nds32_print_operand): Likewise.
	* config/nds32/nds32.h (nds32_builtins): Likewise.

From-SVN: r259216
 2018-04-08 03:21:08 +00:00
GCC Administrator
82d800ce37 Daily bump. 
From-SVN: r259215
 2018-04-08 00:16:24 +00:00
Thomas Koenig
f913ff2adc re PR middle-end/82976 (Error: non-trivial conversion at assignment since r254526) 
2018-04-07  Thomas Koenig  <tkoenig@gcc.gnu.org>
	Andrew Pinski <pinsika@gcc.gnu.org>

	PR middle-end/82976
	* match.pd: Use constant_boolean_node of correct type instead of
	boolean_true_node or boolean_false_node for simplifying
	pointer comparisons to zero.

2018-04-07  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR middle-end/82976
	* gfortran.dg/realloc_on_assign_16a.f90: New test.


Co-Authored-By: Andrew Pinski <pinskia@gcc.gnu.org>

From-SVN: r259212
 2018-04-07 23:52:03 +00:00
Jakub Jelinek
7c75d64658 re PR tree-optimization/80021 (untranslateable diagnostic "type variant differs by " #flag ".") 
PR tree-optimization/80021
	* tree.c (verify_type_variant): Make error call in verify_variant_match
	translatable and remove final full stop.

From-SVN: r259211
 2018-04-07 12:57:53 +02:00
Chung-Ju Wu
ca3a4a555d [NDS32] Support dwarf exception handling. 
gcc/
	* config/nds32/constants.md (unspec_volatile_element): Add
	UNSPEC_VOLATILE_EH_RETURN.
	* config/nds32/nds32-md-auxiliary.c (nds32_output_stack_push,
	nds32_output_stack_pop): Support dwarf exception handling process.
	* config/nds32/nds32-protos.h (nds32_dynamic_chain_address): Declare.
	* config/nds32/nds32.c (nds32_init_machine_status): Support dwarf
	exception handling process.
	(nds32_compute_stack_frame): Likewise.
	(nds32_return_addr_rtx): Likewise.
	(nds32_initial_elimination_offset): Likewise.
	(nds32_expand_prologue): Likewise.
	(nds32_expand_epilogue): Likewise.
	(nds32_dynamic_chain_address): New function.
	* config/nds32/nds32.h (machine_function): Add fields for dwarf
	exception handling.
	(DYNAMIC_CHAIN_ADDRESS): Define.
	(EH_RETURN_DATA_REGNO): Define.
	(EH_RETURN_STACKADJ_RTX): Define.
	* config/nds32/nds32.md (eh_return, nds32_eh_return): Implement
	patterns for dwarf exception handling.

From-SVN: r259210
 2018-04-07 10:52:19 +00:00
Chung-Ju Wu
30044989cc [NDS32] Clean up nds32.h. 
gcc/
	* config/nds32/nds32.h: Clean up obsolete macros.

From-SVN: r259209
 2018-04-07 10:12:48 +00:00
Monk Chiang
2feae6cdf2 [NDS32] Add intrinsic functions for particular instructions. 
gcc/
	* config/nds32/constants.md (unspec_element, unspec_volatile_element):
	Add enum values for particular instructions.
	* config/nds32/nds32-intrinsic.c: Implementation of expanding
	particular intrinsic functions.
	* config/nds32/nds32-intrinsic.md: Likewise.
	* config/nds32/nds32_intrinsic.h: Likewise.
	* config/nds32/nds32.h (nds32_builtins): Likewise.
	* config/nds32/nds32.md (type): Add pbsad and pbsada.
	(btst, ave): New patterns for particular instructions.

From-SVN: r259208
 2018-04-07 08:16:41 +00:00
Monk Chiang
154e3ea6f7 [NDS32] Add intrinsic functions for atomic load/store and memory sync. 
gcc/
	* config/nds32/constants.md (unspec_element, unspec_volatile_element):
	Add enum values for atomic load/store and memory sync.
	* config/nds32/nds32-intrinsic.c: Implementation for atomic load/store
	and memory sync.
	* config/nds32/nds32-intrinsic.md: Likewise.
	* config/nds32/nds32_intrinsic.h: Likewise.
	* config/nds32/nds32.h (nds32_builtins): Likewise.

From-SVN: r259207
 2018-04-07 07:40:49 +00:00
Jakub Jelinek
eda71a9eea re PR tree-optimization/85257 (wrong code with -O -fno-tree-ccp and reading zeroed vector member) 
PR tree-optimization/85257
	* fold-const.c (native_encode_vector): If not all elts could fit
	and off is -1, return 0 rather than offset.
	* tree-ssa-sccvn.c (vn_reference_lookup_3): Pass
	(offseti - offset2) / BITS_PER_UNIT as 4th argument to
	native_encode_expr.  Verify len * BITS_PER_UNIT >= maxsizei.  Don't
	adjust buffer in native_interpret_expr call.

	* gcc.dg/pr85257.c: New test.

From-SVN: r259206
 2018-04-07 09:20:42 +02:00
Monk Chiang
f1a0afe2aa [NDS32] Add intrinsic functions for cache control. 
gcc/
	* config/nds32/constants.md (unspec_volatile_element): Add cache
	control enum values.
	* config/nds32/nds32-intrinsic.c: Add cache control expand functions.
	* config/nds32/nds32-intrinsic.md: Add cache control patterns.
	* config/nds32/nds32.c (nds32_cctl_names): New.
	(nds32_print_operand): Handle cache control register names.
	* config/nds32/nds32.h (nds32_builtins): New enum values.
	* config/nds32/nds32_intrinsic.h: Add cache control enum types and
	macros.
	* config/nds32/nds32.md (type): Add mmu.
	* config/nds32/pipelines.md (simple_insn): Add mmu.

From-SVN: r259205
 2018-04-07 06:21:56 +00:00
Chung-Ju Wu
79f0e157d5 [NDS32] Remove unused insn type: call. 
gcc/
	* config/nds32/nds32.md (type): Remove call.
	* config/nds32/pipelines.md (simple_insn): Likewise.

From-SVN: r259204
 2018-04-07 05:49:58 +00:00
Monk Chiang
0bb4423d43 [NDS32] Add intrinsic functions for FPU. 
gcc/
	* config/nds32/constants.md (unspec_volatile_element): Add
	UNSPEC_VOLATILE_FMFCSR, UNSPEC_VOLATILE_FMTCSR and
	UNSPEC_VOLATILE_FMFCFG.
	* config/nds32/nds32-intrinsic.c (bdesc_noarg): New builtin
	description for fmfcfg and fmfcsr.
	(bdesc_1arg): Add fmtcsr.
	(bdesc_2arg): Add fcpynss, fcpyss, fcpynsd and fcpysd.
	(nds32_expand_builtin_impl): Deal with FPU intrinsic functions.
	* config/nds32/nds32-intrinsic.md (unspec_fcpynsd, unspec_fcpysd,
	unspec_fcpynss, unspec_fcpysd, unspec_fcpyss, unspec_fmfcsr,
	unspec_fmfcfg): New patterns.
	* config/nds32/nds32.h (nds32_builtins): Add NDS32_BUILTIN_FMFCFG,
	NDS32_BUILTIN_FMFCSR, NDS32_BUILTIN_FMTCSR, NDS32_BUILTIN_FCPYNSS,
	NDS32_BUILTIN_FCPYSS,NDS32_BUILTIN_FCPYNSD and NDS32_BUILTIN_FCPYSD.
	* config/nds32/nds32_intrinsic.h (__nds32__fcpynsd, __nds32__fcpynss,
	__nds32__fcpysd, __nds32__fcpyss, __nds32__fmfcsr, __nds32__fmtcsr,
	__nds32__fmfcfg): Define.

From-SVN: r259203
 2018-04-07 05:40:07 +00:00
Monk Chiang
2095a9d538 [NDS32] Add more intrinsic register names. 
gcc/
	* config/nds32/nds32.c (nds32_intrinsic_register_names): Add more
	intrinsic register names.
	* config/nds32/nds32_intrinsic.h (nds32_intrinsic_registers): Add more
	intrinsic register enum values and macros.

From-SVN: r259202
 2018-04-07 04:24:48 +00:00
Chung-Ju Wu
f62a2af5df [NDS32] Support [$ra + $rb << 3] form for load/store address. 
gcc/
	* config/nds32/nds32.c (nds32_legitimate_index_p): Modify condition
	for load/store addressing form.
	(nds32_print_operand_address): Likewise.

From-SVN: r259201
 2018-04-07 04:07:53 +00:00
GCC Administrator
e0617fb647 Daily bump. 
From-SVN: r259200
 2018-04-07 00:16:14 +00:00
Eric Botcazou
69128a1730 re PR middle-end/85196 (ICE in extract_insn, at recog.c:2311: unrecognizable insn) 
PR target/85196
	* config/sparc/sparc.c (sparc_expand_move): Deal with symbolic operands
	based on LABEL_REF.  Remove useless assertion.
	(pic_address_needs_scratch): Fix formatting.
	(sparc_legitimize_pic_address): Minor tweaks.
	(sparc_delegitimize_address): Adjust assertion accordingly.
	* config/sparc/sparc.md (movsi_pic_label_ref): Change label_ref_operand
	into symbolic_operand.
	(movsi_high_pic_label_ref): Likewise.
	(movsi_lo_sum_pic_label_ref): Likewise.
	(movdi_pic_label_ref): Likewise.
	(movdi_high_pic_label_ref): Likewise.
	(movdi_lo_sum_pic_label_ref): Likewise.

From-SVN: r259194
 2018-04-06 22:30:05 +00:00
Joel Sherrill
5f690e68cb Fix ChangeLog 
From-SVN: r259193
 2018-04-06 21:07:38 +00:00
Amaan Cheval
6fa08cbe64 config.gcc (x86_64-*-rtems*): Add rtems.h to tm_file for custom LIB_SPEC setup. 
2018-04-06  Amaan Cheval  <amaan.cheval@gmail.com>

	* config.gcc (x86_64-*-rtems*): Add rtems.h to tm_file for
	custom LIB_SPEC setup.

From-SVN: r259192
 2018-04-06 21:01:23 +00:00
Ruslan Bukin
4d47fe5a8f RISC-V: Support for FreeBSD. 
gcc/
	* config.gcc (riscv*-*-freebsd*): Add RISC-V FreeBSD support.
	* config/riscv/freebsd.h: New.
	libgcc/
	* config.host (riscv*-*-freebsd*): Add RISC-V FreeBSD support.

From-SVN: r259190
 2018-04-06 13:04:17 -07:00