2012-01-26 12:43:49 +01:00
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/*
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* Calxeda Highbank SoC emulation
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*
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* Copyright (c) 2010-2012 Calxeda
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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2015-12-07 17:23:45 +01:00
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#include "qemu/osdep.h"
|
2019-05-23 16:35:08 +02:00
|
|
|
#include "qemu-common.h"
|
2020-10-28 12:36:57 +01:00
|
|
|
#include "qemu/datadir.h"
|
include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 09:01:28 +01:00
|
|
|
#include "qapi/error.h"
|
2013-02-04 15:40:22 +01:00
|
|
|
#include "hw/sysbus.h"
|
2019-08-12 07:23:45 +02:00
|
|
|
#include "migration/vmstate.h"
|
2019-05-23 15:47:43 +02:00
|
|
|
#include "hw/arm/boot.h"
|
2013-02-04 15:40:22 +01:00
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|
|
#include "hw/loader.h"
|
2012-10-24 08:43:34 +02:00
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|
|
#include "net/net.h"
|
2019-08-12 07:23:59 +02:00
|
|
|
#include "sysemu/runstate.h"
|
2012-12-17 18:20:04 +01:00
|
|
|
#include "sysemu/sysemu.h"
|
2013-02-04 15:40:22 +01:00
|
|
|
#include "hw/boards.h"
|
2013-12-17 20:42:28 +01:00
|
|
|
#include "qemu/error-report.h"
|
2016-06-06 17:59:31 +02:00
|
|
|
#include "hw/char/pl011.h"
|
2017-09-04 16:21:53 +02:00
|
|
|
#include "hw/ide/ahci.h"
|
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|
|
|
#include "hw/cpu/a9mpcore.h"
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|
|
#include "hw/cpu/a15mpcore.h"
|
2017-11-13 14:55:24 +01:00
|
|
|
#include "qemu/log.h"
|
2020-09-03 22:43:22 +02:00
|
|
|
#include "qom/object.h"
|
2020-12-15 15:42:15 +01:00
|
|
|
#include "cpu.h"
|
2012-01-26 12:43:49 +01:00
|
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|
|
2013-12-17 20:42:29 +01:00
|
|
|
#define SMP_BOOT_ADDR 0x100
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#define SMP_BOOT_REG 0x40
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|
#define MPCORE_PERIPHBASE 0xfff10000
|
2012-01-26 12:43:49 +01:00
|
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|
|
2015-11-10 14:37:33 +01:00
|
|
|
#define MVBAR_ADDR 0x200
|
2016-01-29 23:50:43 +01:00
|
|
|
#define BOARD_SETUP_ADDR (MVBAR_ADDR + 8 * sizeof(uint32_t))
|
2015-11-10 14:37:33 +01:00
|
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|
|
2013-12-17 20:42:29 +01:00
|
|
|
#define NIRQ_GIC 160
|
2012-01-26 12:43:49 +01:00
|
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|
|
/* Board init. */
|
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|
|
2015-11-10 14:37:33 +01:00
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|
static void hb_write_board_setup(ARMCPU *cpu,
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|
|
|
|
const struct arm_boot_info *info)
|
|
|
|
|
{
|
2016-01-29 23:50:43 +01:00
|
|
|
arm_write_secure_board_setup_dummy_smc(cpu, info, MVBAR_ADDR);
|
2015-11-10 14:37:33 +01:00
|
|
|
}
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|
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|
|
2012-05-14 00:08:10 +02:00
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static void hb_write_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
|
2012-01-26 12:43:49 +01:00
|
|
|
{
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|
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|
|
int n;
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|
|
|
|
uint32_t smpboot[] = {
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|
|
|
|
0xee100fb0, /* mrc p15, 0, r0, c0, c0, 5 - read current core id */
|
|
|
|
|
0xe210000f, /* ands r0, r0, #0x0f */
|
|
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|
|
0xe3a03040, /* mov r3, #0x40 - jump address is 0x40 + 0x10 * core id */
|
|
|
|
|
0xe0830200, /* add r0, r3, r0, lsl #4 */
|
2012-12-11 12:30:37 +01:00
|
|
|
0xe59f2024, /* ldr r2, privbase */
|
2012-01-26 12:43:49 +01:00
|
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|
0xe3a01001, /* mov r1, #1 */
|
2012-12-11 12:30:37 +01:00
|
|
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0xe5821100, /* str r1, [r2, #256] - set GICC_CTLR.Enable */
|
|
|
|
|
0xe3a010ff, /* mov r1, #0xff */
|
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|
|
|
0xe5821104, /* str r1, [r2, #260] - set GICC_PMR.Priority to 0xff */
|
|
|
|
|
0xf57ff04f, /* dsb */
|
2012-01-26 12:43:49 +01:00
|
|
|
0xe320f003, /* wfi */
|
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|
|
0xe5901000, /* ldr r1, [r0] */
|
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|
|
|
0xe1110001, /* tst r1, r1 */
|
|
|
|
|
0x0afffffb, /* beq <wfi> */
|
|
|
|
|
0xe12fff11, /* bx r1 */
|
2013-12-17 20:42:29 +01:00
|
|
|
MPCORE_PERIPHBASE /* privbase: MPCore peripheral base address. */
|
2012-01-26 12:43:49 +01:00
|
|
|
};
|
|
|
|
|
for (n = 0; n < ARRAY_SIZE(smpboot); n++) {
|
|
|
|
|
smpboot[n] = tswap32(smpboot[n]);
|
|
|
|
|
}
|
2019-10-20 01:47:13 +02:00
|
|
|
rom_add_blob_fixed_as("smpboot", smpboot, sizeof(smpboot), SMP_BOOT_ADDR,
|
|
|
|
|
arm_boot_address_space(cpu, info));
|
2012-01-26 12:43:49 +01:00
|
|
|
}
|
|
|
|
|
|
2012-05-14 01:05:40 +02:00
|
|
|
static void hb_reset_secondary(ARMCPU *cpu, const struct arm_boot_info *info)
|
2012-01-26 12:43:49 +01:00
|
|
|
{
|
2012-05-14 01:05:40 +02:00
|
|
|
CPUARMState *env = &cpu->env;
|
|
|
|
|
|
2012-01-26 12:43:49 +01:00
|
|
|
switch (info->nb_cpus) {
|
|
|
|
|
case 4:
|
Switch non-CPU callers from ld/st*_phys to address_space_ld/st*
Switch all the uses of ld/st*_phys to address_space_ld/st*,
except for those cases where the address space is the CPU's
(ie cs->as). This was done with the following script which
generates a Coccinelle patch.
A few over-80-columns lines in the result were rewrapped by
hand where Coccinelle failed to do the wrapping automatically,
as well as one location where it didn't put a line-continuation
'\' when wrapping lines on a change made to a match inside
a macro definition.
===begin===
#!/bin/sh -e
# Usage:
# ./ldst-phys.spatch.sh > ldst-phys.spatch
# spatch -sp_file ldst-phys.spatch -dir . | sed -e '/^+/s/\t/ /g' > out.patch
# patch -p1 < out.patch
for FN in ub uw_le uw_be l_le l_be q_le q_be uw l q; do
cat <<EOF
@ cpu_matches_ld_${FN} @
expression E1,E2;
identifier as;
@@
ld${FN}_phys(E1->as,E2)
@ other_matches_ld_${FN} depends on !cpu_matches_ld_${FN} @
expression E1,E2;
@@
-ld${FN}_phys(E1,E2)
+address_space_ld${FN}(E1,E2, MEMTXATTRS_UNSPECIFIED, NULL)
EOF
done
for FN in b w_le w_be l_le l_be q_le q_be w l q; do
cat <<EOF
@ cpu_matches_st_${FN} @
expression E1,E2,E3;
identifier as;
@@
st${FN}_phys(E1->as,E2,E3)
@ other_matches_st_${FN} depends on !cpu_matches_st_${FN} @
expression E1,E2,E3;
@@
-st${FN}_phys(E1,E2,E3)
+address_space_st${FN}(E1,E2,E3, MEMTXATTRS_UNSPECIFIED, NULL)
EOF
done
===endit===
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2015-04-26 17:49:24 +02:00
|
|
|
address_space_stl_notdirty(&address_space_memory,
|
|
|
|
|
SMP_BOOT_REG + 0x30, 0,
|
|
|
|
|
MEMTXATTRS_UNSPECIFIED, NULL);
|
2020-10-20 12:59:38 +02:00
|
|
|
/* fallthrough */
|
2012-01-26 12:43:49 +01:00
|
|
|
case 3:
|
Switch non-CPU callers from ld/st*_phys to address_space_ld/st*
Switch all the uses of ld/st*_phys to address_space_ld/st*,
except for those cases where the address space is the CPU's
(ie cs->as). This was done with the following script which
generates a Coccinelle patch.
A few over-80-columns lines in the result were rewrapped by
hand where Coccinelle failed to do the wrapping automatically,
as well as one location where it didn't put a line-continuation
'\' when wrapping lines on a change made to a match inside
a macro definition.
===begin===
#!/bin/sh -e
# Usage:
# ./ldst-phys.spatch.sh > ldst-phys.spatch
# spatch -sp_file ldst-phys.spatch -dir . | sed -e '/^+/s/\t/ /g' > out.patch
# patch -p1 < out.patch
for FN in ub uw_le uw_be l_le l_be q_le q_be uw l q; do
cat <<EOF
@ cpu_matches_ld_${FN} @
expression E1,E2;
identifier as;
@@
ld${FN}_phys(E1->as,E2)
@ other_matches_ld_${FN} depends on !cpu_matches_ld_${FN} @
expression E1,E2;
@@
-ld${FN}_phys(E1,E2)
+address_space_ld${FN}(E1,E2, MEMTXATTRS_UNSPECIFIED, NULL)
EOF
done
for FN in b w_le w_be l_le l_be q_le q_be w l q; do
cat <<EOF
@ cpu_matches_st_${FN} @
expression E1,E2,E3;
identifier as;
@@
st${FN}_phys(E1->as,E2,E3)
@ other_matches_st_${FN} depends on !cpu_matches_st_${FN} @
expression E1,E2,E3;
@@
-st${FN}_phys(E1,E2,E3)
+address_space_st${FN}(E1,E2,E3, MEMTXATTRS_UNSPECIFIED, NULL)
EOF
done
===endit===
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2015-04-26 17:49:24 +02:00
|
|
|
address_space_stl_notdirty(&address_space_memory,
|
|
|
|
|
SMP_BOOT_REG + 0x20, 0,
|
|
|
|
|
MEMTXATTRS_UNSPECIFIED, NULL);
|
2020-10-20 12:59:38 +02:00
|
|
|
/* fallthrough */
|
2012-01-26 12:43:49 +01:00
|
|
|
case 2:
|
Switch non-CPU callers from ld/st*_phys to address_space_ld/st*
Switch all the uses of ld/st*_phys to address_space_ld/st*,
except for those cases where the address space is the CPU's
(ie cs->as). This was done with the following script which
generates a Coccinelle patch.
A few over-80-columns lines in the result were rewrapped by
hand where Coccinelle failed to do the wrapping automatically,
as well as one location where it didn't put a line-continuation
'\' when wrapping lines on a change made to a match inside
a macro definition.
===begin===
#!/bin/sh -e
# Usage:
# ./ldst-phys.spatch.sh > ldst-phys.spatch
# spatch -sp_file ldst-phys.spatch -dir . | sed -e '/^+/s/\t/ /g' > out.patch
# patch -p1 < out.patch
for FN in ub uw_le uw_be l_le l_be q_le q_be uw l q; do
cat <<EOF
@ cpu_matches_ld_${FN} @
expression E1,E2;
identifier as;
@@
ld${FN}_phys(E1->as,E2)
@ other_matches_ld_${FN} depends on !cpu_matches_ld_${FN} @
expression E1,E2;
@@
-ld${FN}_phys(E1,E2)
+address_space_ld${FN}(E1,E2, MEMTXATTRS_UNSPECIFIED, NULL)
EOF
done
for FN in b w_le w_be l_le l_be q_le q_be w l q; do
cat <<EOF
@ cpu_matches_st_${FN} @
expression E1,E2,E3;
identifier as;
@@
st${FN}_phys(E1->as,E2,E3)
@ other_matches_st_${FN} depends on !cpu_matches_st_${FN} @
expression E1,E2,E3;
@@
-st${FN}_phys(E1,E2,E3)
+address_space_st${FN}(E1,E2,E3, MEMTXATTRS_UNSPECIFIED, NULL)
EOF
done
===endit===
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2015-04-26 17:49:24 +02:00
|
|
|
address_space_stl_notdirty(&address_space_memory,
|
|
|
|
|
SMP_BOOT_REG + 0x10, 0,
|
|
|
|
|
MEMTXATTRS_UNSPECIFIED, NULL);
|
2012-01-26 12:43:49 +01:00
|
|
|
env->regs[15] = SMP_BOOT_ADDR;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define NUM_REGS 0x200
|
2012-10-23 12:30:10 +02:00
|
|
|
static void hb_regs_write(void *opaque, hwaddr offset,
|
2012-01-26 12:43:49 +01:00
|
|
|
uint64_t value, unsigned size)
|
|
|
|
|
{
|
|
|
|
|
uint32_t *regs = opaque;
|
|
|
|
|
|
|
|
|
|
if (offset == 0xf00) {
|
|
|
|
|
if (value == 1 || value == 2) {
|
2017-05-15 23:41:13 +02:00
|
|
|
qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
|
2012-01-26 12:43:49 +01:00
|
|
|
} else if (value == 3) {
|
2017-05-15 23:41:13 +02:00
|
|
|
qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
|
2012-01-26 12:43:49 +01:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2017-11-13 14:55:24 +01:00
|
|
|
if (offset / 4 >= NUM_REGS) {
|
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR,
|
|
|
|
|
"highbank: bad write offset 0x%" HWADDR_PRIx "\n", offset);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
regs[offset / 4] = value;
|
2012-01-26 12:43:49 +01:00
|
|
|
}
|
|
|
|
|
|
2012-10-23 12:30:10 +02:00
|
|
|
static uint64_t hb_regs_read(void *opaque, hwaddr offset,
|
2012-01-26 12:43:49 +01:00
|
|
|
unsigned size)
|
|
|
|
|
{
|
2017-11-13 14:55:24 +01:00
|
|
|
uint32_t value;
|
2012-01-26 12:43:49 +01:00
|
|
|
uint32_t *regs = opaque;
|
2017-11-13 14:55:24 +01:00
|
|
|
|
|
|
|
|
if (offset / 4 >= NUM_REGS) {
|
|
|
|
|
qemu_log_mask(LOG_GUEST_ERROR,
|
|
|
|
|
"highbank: bad read offset 0x%" HWADDR_PRIx "\n", offset);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
value = regs[offset / 4];
|
2012-01-26 12:43:49 +01:00
|
|
|
|
|
|
|
|
if ((offset == 0x100) || (offset == 0x108) || (offset == 0x10C)) {
|
|
|
|
|
value |= 0x30000000;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return value;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static const MemoryRegionOps hb_mem_ops = {
|
|
|
|
|
.read = hb_regs_read,
|
|
|
|
|
.write = hb_regs_write,
|
|
|
|
|
.endianness = DEVICE_NATIVE_ENDIAN,
|
|
|
|
|
};
|
|
|
|
|
|
2013-07-24 00:52:40 +02:00
|
|
|
#define TYPE_HIGHBANK_REGISTERS "highbank-regs"
|
2020-09-16 20:25:19 +02:00
|
|
|
OBJECT_DECLARE_SIMPLE_TYPE(HighbankRegsState, HIGHBANK_REGISTERS)
|
2013-07-24 00:52:40 +02:00
|
|
|
|
2020-09-03 22:43:22 +02:00
|
|
|
struct HighbankRegsState {
|
2013-07-24 00:52:40 +02:00
|
|
|
/*< private >*/
|
|
|
|
|
SysBusDevice parent_obj;
|
|
|
|
|
/*< public >*/
|
|
|
|
|
|
2013-12-06 19:43:30 +01:00
|
|
|
MemoryRegion iomem;
|
2012-01-26 12:43:49 +01:00
|
|
|
uint32_t regs[NUM_REGS];
|
2020-09-03 22:43:22 +02:00
|
|
|
};
|
2012-01-26 12:43:49 +01:00
|
|
|
|
2021-03-13 18:11:48 +01:00
|
|
|
static const VMStateDescription vmstate_highbank_regs = {
|
2012-01-26 12:43:49 +01:00
|
|
|
.name = "highbank-regs",
|
|
|
|
|
.version_id = 0,
|
|
|
|
|
.minimum_version_id = 0,
|
|
|
|
|
.fields = (VMStateField[]) {
|
|
|
|
|
VMSTATE_UINT32_ARRAY(regs, HighbankRegsState, NUM_REGS),
|
|
|
|
|
VMSTATE_END_OF_LIST(),
|
|
|
|
|
},
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static void highbank_regs_reset(DeviceState *dev)
|
|
|
|
|
{
|
2013-07-24 00:52:40 +02:00
|
|
|
HighbankRegsState *s = HIGHBANK_REGISTERS(dev);
|
2012-01-26 12:43:49 +01:00
|
|
|
|
|
|
|
|
s->regs[0x40] = 0x05F20121;
|
|
|
|
|
s->regs[0x41] = 0x2;
|
|
|
|
|
s->regs[0x42] = 0x05F30121;
|
|
|
|
|
s->regs[0x43] = 0x05F40121;
|
|
|
|
|
}
|
|
|
|
|
|
2016-03-07 08:05:43 +01:00
|
|
|
static void highbank_regs_init(Object *obj)
|
2012-01-26 12:43:49 +01:00
|
|
|
{
|
2016-03-07 08:05:43 +01:00
|
|
|
HighbankRegsState *s = HIGHBANK_REGISTERS(obj);
|
|
|
|
|
SysBusDevice *dev = SYS_BUS_DEVICE(obj);
|
2012-01-26 12:43:49 +01:00
|
|
|
|
2016-03-07 08:05:43 +01:00
|
|
|
memory_region_init_io(&s->iomem, obj, &hb_mem_ops, s->regs,
|
2013-06-07 03:25:08 +02:00
|
|
|
"highbank_regs", 0x1000);
|
2013-12-06 19:43:30 +01:00
|
|
|
sysbus_init_mmio(dev, &s->iomem);
|
2012-01-26 12:43:49 +01:00
|
|
|
}
|
|
|
|
|
|
2012-01-24 20:12:29 +01:00
|
|
|
static void highbank_regs_class_init(ObjectClass *klass, void *data)
|
|
|
|
|
{
|
2011-12-08 04:34:16 +01:00
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
2012-01-24 20:12:29 +01:00
|
|
|
|
2011-12-08 04:34:16 +01:00
|
|
|
dc->desc = "Calxeda Highbank registers";
|
|
|
|
|
dc->vmsd = &vmstate_highbank_regs;
|
|
|
|
|
dc->reset = highbank_regs_reset;
|
2012-01-24 20:12:29 +01:00
|
|
|
}
|
|
|
|
|
|
2013-01-10 16:19:07 +01:00
|
|
|
static const TypeInfo highbank_regs_info = {
|
2013-07-24 00:52:40 +02:00
|
|
|
.name = TYPE_HIGHBANK_REGISTERS,
|
2011-12-08 04:34:16 +01:00
|
|
|
.parent = TYPE_SYS_BUS_DEVICE,
|
|
|
|
|
.instance_size = sizeof(HighbankRegsState),
|
2016-03-07 08:05:43 +01:00
|
|
|
.instance_init = highbank_regs_init,
|
2011-12-08 04:34:16 +01:00
|
|
|
.class_init = highbank_regs_class_init,
|
2012-01-26 12:43:49 +01:00
|
|
|
};
|
|
|
|
|
|
2012-02-09 15:20:55 +01:00
|
|
|
static void highbank_regs_register_types(void)
|
2012-01-26 12:43:49 +01:00
|
|
|
{
|
2011-12-08 04:34:16 +01:00
|
|
|
type_register_static(&highbank_regs_info);
|
2012-01-26 12:43:49 +01:00
|
|
|
}
|
|
|
|
|
|
2012-02-09 15:20:55 +01:00
|
|
|
type_init(highbank_regs_register_types)
|
2012-01-26 12:43:49 +01:00
|
|
|
|
|
|
|
|
static struct arm_boot_info highbank_binfo;
|
|
|
|
|
|
2013-07-05 14:21:36 +02:00
|
|
|
enum cxmachines {
|
|
|
|
|
CALXEDA_HIGHBANK,
|
2013-07-05 14:21:37 +02:00
|
|
|
CALXEDA_MIDWAY,
|
2013-07-05 14:21:36 +02:00
|
|
|
};
|
|
|
|
|
|
2012-01-26 12:43:49 +01:00
|
|
|
/* ram_size must be set to match the upper bound of memory in the
|
|
|
|
|
* device tree (linux/arch/arm/boot/dts/highbank.dts), which is
|
|
|
|
|
* normally 0xff900000 or -m 4089. When running this board on a
|
|
|
|
|
* 32-bit host, set the reg value of memory to 0xf7ff00000 in the
|
|
|
|
|
* device tree and pass -m 2047 to QEMU.
|
|
|
|
|
*/
|
2014-05-07 16:42:57 +02:00
|
|
|
static void calxeda_init(MachineState *machine, enum cxmachines machine_id)
|
2012-01-26 12:43:49 +01:00
|
|
|
{
|
2013-07-05 14:21:36 +02:00
|
|
|
DeviceState *dev = NULL;
|
2012-01-26 12:43:49 +01:00
|
|
|
SysBusDevice *busdev;
|
|
|
|
|
qemu_irq pic[128];
|
|
|
|
|
int n;
|
2019-05-18 22:54:26 +02:00
|
|
|
unsigned int smp_cpus = machine->smp.cpus;
|
2012-01-26 12:43:49 +01:00
|
|
|
qemu_irq cpu_irq[4];
|
2015-05-12 12:57:19 +02:00
|
|
|
qemu_irq cpu_fiq[4];
|
2018-08-24 14:17:33 +02:00
|
|
|
qemu_irq cpu_virq[4];
|
|
|
|
|
qemu_irq cpu_vfiq[4];
|
2012-01-26 12:43:49 +01:00
|
|
|
MemoryRegion *sysram;
|
|
|
|
|
MemoryRegion *sysmem;
|
|
|
|
|
char *sysboot_filename;
|
|
|
|
|
|
2015-11-10 14:37:33 +01:00
|
|
|
switch (machine_id) {
|
|
|
|
|
case CALXEDA_HIGHBANK:
|
2017-09-13 18:04:57 +02:00
|
|
|
machine->cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
|
2015-11-10 14:37:33 +01:00
|
|
|
break;
|
|
|
|
|
case CALXEDA_MIDWAY:
|
2017-09-13 18:04:57 +02:00
|
|
|
machine->cpu_type = ARM_CPU_TYPE_NAME("cortex-a15");
|
2015-11-10 14:37:33 +01:00
|
|
|
break;
|
2017-09-13 18:04:57 +02:00
|
|
|
default:
|
|
|
|
|
assert(0);
|
2012-01-26 12:43:49 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (n = 0; n < smp_cpus; n++) {
|
2014-04-04 18:42:34 +02:00
|
|
|
Object *cpuobj;
|
2012-04-20 09:39:15 +02:00
|
|
|
ARMCPU *cpu;
|
2013-12-17 20:42:28 +01:00
|
|
|
|
2017-09-13 18:04:57 +02:00
|
|
|
cpuobj = object_new(machine->cpu_type);
|
2014-04-04 18:42:34 +02:00
|
|
|
cpu = ARM_CPU(cpuobj);
|
2013-12-17 20:42:28 +01:00
|
|
|
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 18:05:54 +02:00
|
|
|
object_property_set_int(cpuobj, "psci-conduit", QEMU_PSCI_CONDUIT_SMC,
|
|
|
|
|
&error_abort);
|
2015-11-10 14:37:33 +01:00
|
|
|
|
|
|
|
|
if (n) {
|
|
|
|
|
/* Secondary CPUs start in PSCI powered-down state */
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 18:05:54 +02:00
|
|
|
object_property_set_bool(cpuobj, "start-powered-off", true,
|
|
|
|
|
&error_abort);
|
2014-12-16 00:09:51 +01:00
|
|
|
}
|
|
|
|
|
|
2020-09-14 15:56:17 +02:00
|
|
|
if (object_property_find(cpuobj, "reset-cbar")) {
|
qom: Put name parameter before value / visitor parameter
The object_property_set_FOO() setters take property name and value in
an unusual order:
void object_property_set_FOO(Object *obj, FOO_TYPE value,
const char *name, Error **errp)
Having to pass value before name feels grating. Swap them.
Same for object_property_set(), object_property_get(), and
object_property_parse().
Convert callers with this Coccinelle script:
@@
identifier fun = {
object_property_get, object_property_parse, object_property_set_str,
object_property_set_link, object_property_set_bool,
object_property_set_int, object_property_set_uint, object_property_set,
object_property_set_qobject
};
expression obj, v, name, errp;
@@
- fun(obj, v, name, errp)
+ fun(obj, name, v, errp)
Chokes on hw/arm/musicpal.c's lcd_refresh() with the unhelpful error
message "no position information". Convert that one manually.
Fails to convert hw/arm/armsse.c, because Coccinelle gets confused by
ARMSSE being used both as typedef and function-like macro there.
Convert manually.
Fails to convert hw/rx/rx-gdbsim.c, because Coccinelle gets confused
by RXCPU being used both as typedef and function-like macro there.
Convert manually. The other files using RXCPU that way don't need
conversion.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com>
Message-Id: <20200707160613.848843-27-armbru@redhat.com>
[Straightforwad conflict with commit 2336172d9b "audio: set default
value for pcspk.iobase property" resolved]
2020-07-07 18:05:54 +02:00
|
|
|
object_property_set_int(cpuobj, "reset-cbar", MPCORE_PERIPHBASE,
|
|
|
|
|
&error_abort);
|
2013-12-17 20:42:28 +01:00
|
|
|
}
|
qdev: Convert bus-less devices to qdev_realize() with Coccinelle
All remaining conversions to qdev_realize() are for bus-less devices.
Coccinelle script:
// only correct for bus-less @dev!
@@
expression errp;
expression dev;
@@
- qdev_init_nofail(dev);
+ qdev_realize(dev, NULL, &error_fatal);
@ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@
expression errp;
expression dev;
symbol true;
@@
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize(DEVICE(dev), NULL, errp);
@ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@
expression errp;
expression dev;
symbol true;
@@
- object_property_set_bool(dev, true, "realized", errp);
+ qdev_realize(DEVICE(dev), NULL, errp);
Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c. Worked around by temporarily renaming the macro for
the spatch run.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-57-armbru@redhat.com>
2020-06-10 07:32:45 +02:00
|
|
|
qdev_realize(DEVICE(cpuobj), NULL, &error_fatal);
|
2013-08-20 15:54:29 +02:00
|
|
|
cpu_irq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_IRQ);
|
2015-05-12 12:57:19 +02:00
|
|
|
cpu_fiq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_FIQ);
|
2018-08-24 14:17:33 +02:00
|
|
|
cpu_virq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_VIRQ);
|
|
|
|
|
cpu_vfiq[n] = qdev_get_gpio_in(DEVICE(cpu), ARM_CPU_VFIQ);
|
2012-01-26 12:43:49 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
sysmem = get_system_memory();
|
|
|
|
|
/* SDRAM at address zero. */
|
2020-02-19 17:08:48 +01:00
|
|
|
memory_region_add_subregion(sysmem, 0, machine->ram);
|
2012-01-26 12:43:49 +01:00
|
|
|
|
|
|
|
|
sysram = g_new(MemoryRegion, 1);
|
2018-04-26 12:04:39 +02:00
|
|
|
memory_region_init_ram(sysram, NULL, "highbank.sysram", 0x8000,
|
Fix bad error handling after memory_region_init_ram()
Symptom:
$ qemu-system-x86_64 -m 10000000
Unexpected error in ram_block_add() at /work/armbru/qemu/exec.c:1456:
upstream-qemu: cannot set up guest memory 'pc.ram': Cannot allocate memory
Aborted (core dumped)
Root cause: commit ef701d7 screwed up handling of out-of-memory
conditions. Before the commit, we report the error and exit(1), in
one place, ram_block_add(). The commit lifts the error handling up
the call chain some, to three places. Fine. Except it uses
&error_abort in these places, changing the behavior from exit(1) to
abort(), and thus undoing the work of commit 3922825 "exec: Don't
abort when we can't allocate guest memory".
The three places are:
* memory_region_init_ram()
Commit 4994653 (right after commit ef701d7) lifted the error
handling further, through memory_region_init_ram(), multiplying the
incorrect use of &error_abort. Later on, imitation of existing
(bad) code may have created more.
* memory_region_init_ram_ptr()
The &error_abort is still there.
* memory_region_init_rom_device()
Doesn't need fixing, because commit 33e0eb5 (soon after commit
ef701d7) lifted the error handling further, and in the process
changed it from &error_abort to passing it up the call chain.
Correct, because the callers are realize() methods.
Fix the error handling after memory_region_init_ram() with a
Coccinelle semantic patch:
@r@
expression mr, owner, name, size, err;
position p;
@@
memory_region_init_ram(mr, owner, name, size,
(
- &error_abort
+ &error_fatal
|
err@p
)
);
@script:python@
p << r.p;
@@
print "%s:%s:%s" % (p[0].file, p[0].line, p[0].column)
When the last argument is &error_abort, it gets replaced by
&error_fatal. This is the fix.
If the last argument is anything else, its position is reported. This
lets us check the fix is complete. Four positions get reported:
* ram_backend_memory_alloc()
Error is passed up the call chain, ultimately through
user_creatable_complete(). As far as I can tell, it's callers all
handle the error sanely.
* fsl_imx25_realize(), fsl_imx31_realize(), dp8393x_realize()
DeviceClass.realize() methods, errors handled sanely further up the
call chain.
We're good. Test case again behaves:
$ qemu-system-x86_64 -m 10000000
qemu-system-x86_64: cannot set up guest memory 'pc.ram': Cannot allocate memory
[Exit 1 ]
The next commits will repair the rest of commit ef701d7's damage.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <1441983105-26376-3-git-send-email-armbru@redhat.com>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
2015-09-11 16:51:43 +02:00
|
|
|
&error_fatal);
|
2012-01-26 12:43:49 +01:00
|
|
|
memory_region_add_subregion(sysmem, 0xfff88000, sysram);
|
2020-10-26 15:30:16 +01:00
|
|
|
if (machine->firmware != NULL) {
|
|
|
|
|
sysboot_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, machine->firmware);
|
2012-01-26 12:43:49 +01:00
|
|
|
if (sysboot_filename != NULL) {
|
2015-04-01 18:57:29 +02:00
|
|
|
if (load_image_targphys(sysboot_filename, 0xfff88000, 0x8000) < 0) {
|
2020-10-26 15:30:16 +01:00
|
|
|
error_report("Unable to load %s", machine->firmware);
|
2015-12-17 17:35:09 +01:00
|
|
|
exit(1);
|
2012-01-26 12:43:49 +01:00
|
|
|
}
|
2015-03-05 03:58:32 +01:00
|
|
|
g_free(sysboot_filename);
|
2012-01-26 12:43:49 +01:00
|
|
|
} else {
|
2020-10-26 15:30:16 +01:00
|
|
|
error_report("Unable to find %s", machine->firmware);
|
2015-12-17 17:35:09 +01:00
|
|
|
exit(1);
|
2012-01-26 12:43:49 +01:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2014-05-07 16:42:57 +02:00
|
|
|
switch (machine_id) {
|
2013-07-05 14:21:36 +02:00
|
|
|
case CALXEDA_HIGHBANK:
|
2020-06-10 07:31:59 +02:00
|
|
|
dev = qdev_new("l2x0");
|
2013-07-05 14:21:37 +02:00
|
|
|
busdev = SYS_BUS_DEVICE(dev);
|
sysbus: Convert to sysbus_realize() etc. with Coccinelle
Convert from qdev_realize(), qdev_realize_and_unref() with null @bus
argument to sysbus_realize(), sysbus_realize_and_unref().
Coccinelle script:
@@
expression dev, errp;
@@
- qdev_realize(DEVICE(dev), NULL, errp);
+ sysbus_realize(SYS_BUS_DEVICE(dev), errp);
@@
expression sysbus_dev, dev, errp;
@@
+ sysbus_dev = SYS_BUS_DEVICE(dev);
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
- sysbus_dev = SYS_BUS_DEVICE(dev);
@@
expression sysbus_dev, dev, errp;
expression expr;
@@
sysbus_dev = SYS_BUS_DEVICE(dev);
... when != dev = expr;
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(DEVICE(dev), NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
Whitespace changes minimized manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-46-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 07:32:34 +02:00
|
|
|
sysbus_realize_and_unref(busdev, &error_fatal);
|
2013-07-05 14:21:37 +02:00
|
|
|
sysbus_mmio_map(busdev, 0, 0xfff12000);
|
|
|
|
|
|
2020-06-10 07:31:59 +02:00
|
|
|
dev = qdev_new(TYPE_A9MPCORE_PRIV);
|
2013-07-05 14:21:36 +02:00
|
|
|
break;
|
2013-07-05 14:21:37 +02:00
|
|
|
case CALXEDA_MIDWAY:
|
2020-06-10 07:31:59 +02:00
|
|
|
dev = qdev_new(TYPE_A15MPCORE_PRIV);
|
2013-07-05 14:21:37 +02:00
|
|
|
break;
|
2013-07-05 14:21:36 +02:00
|
|
|
}
|
2012-01-26 12:43:49 +01:00
|
|
|
qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
|
|
|
|
|
qdev_prop_set_uint32(dev, "num-irq", NIRQ_GIC);
|
2013-01-20 02:47:33 +01:00
|
|
|
busdev = SYS_BUS_DEVICE(dev);
|
sysbus: Convert to sysbus_realize() etc. with Coccinelle
Convert from qdev_realize(), qdev_realize_and_unref() with null @bus
argument to sysbus_realize(), sysbus_realize_and_unref().
Coccinelle script:
@@
expression dev, errp;
@@
- qdev_realize(DEVICE(dev), NULL, errp);
+ sysbus_realize(SYS_BUS_DEVICE(dev), errp);
@@
expression sysbus_dev, dev, errp;
@@
+ sysbus_dev = SYS_BUS_DEVICE(dev);
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
- sysbus_dev = SYS_BUS_DEVICE(dev);
@@
expression sysbus_dev, dev, errp;
expression expr;
@@
sysbus_dev = SYS_BUS_DEVICE(dev);
... when != dev = expr;
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(DEVICE(dev), NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
Whitespace changes minimized manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-46-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 07:32:34 +02:00
|
|
|
sysbus_realize_and_unref(busdev, &error_fatal);
|
2013-12-17 20:42:29 +01:00
|
|
|
sysbus_mmio_map(busdev, 0, MPCORE_PERIPHBASE);
|
2012-01-26 12:43:49 +01:00
|
|
|
for (n = 0; n < smp_cpus; n++) {
|
|
|
|
|
sysbus_connect_irq(busdev, n, cpu_irq[n]);
|
2015-05-12 12:57:19 +02:00
|
|
|
sysbus_connect_irq(busdev, n + smp_cpus, cpu_fiq[n]);
|
2018-08-24 14:17:33 +02:00
|
|
|
sysbus_connect_irq(busdev, n + 2 * smp_cpus, cpu_virq[n]);
|
|
|
|
|
sysbus_connect_irq(busdev, n + 3 * smp_cpus, cpu_vfiq[n]);
|
2012-01-26 12:43:49 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (n = 0; n < 128; n++) {
|
|
|
|
|
pic[n] = qdev_get_gpio_in(dev, n);
|
|
|
|
|
}
|
|
|
|
|
|
2020-06-10 07:31:59 +02:00
|
|
|
dev = qdev_new("sp804");
|
2012-01-26 12:43:49 +01:00
|
|
|
qdev_prop_set_uint32(dev, "freq0", 150000000);
|
|
|
|
|
qdev_prop_set_uint32(dev, "freq1", 150000000);
|
2013-01-20 02:47:33 +01:00
|
|
|
busdev = SYS_BUS_DEVICE(dev);
|
sysbus: Convert to sysbus_realize() etc. with Coccinelle
Convert from qdev_realize(), qdev_realize_and_unref() with null @bus
argument to sysbus_realize(), sysbus_realize_and_unref().
Coccinelle script:
@@
expression dev, errp;
@@
- qdev_realize(DEVICE(dev), NULL, errp);
+ sysbus_realize(SYS_BUS_DEVICE(dev), errp);
@@
expression sysbus_dev, dev, errp;
@@
+ sysbus_dev = SYS_BUS_DEVICE(dev);
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
- sysbus_dev = SYS_BUS_DEVICE(dev);
@@
expression sysbus_dev, dev, errp;
expression expr;
@@
sysbus_dev = SYS_BUS_DEVICE(dev);
... when != dev = expr;
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(DEVICE(dev), NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
Whitespace changes minimized manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-46-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 07:32:34 +02:00
|
|
|
sysbus_realize_and_unref(busdev, &error_fatal);
|
2012-01-26 12:43:49 +01:00
|
|
|
sysbus_mmio_map(busdev, 0, 0xfff34000);
|
|
|
|
|
sysbus_connect_irq(busdev, 0, pic[18]);
|
2018-04-20 16:52:43 +02:00
|
|
|
pl011_create(0xfff36000, pic[20], serial_hd(0));
|
2012-01-26 12:43:49 +01:00
|
|
|
|
2020-06-10 07:31:59 +02:00
|
|
|
dev = qdev_new(TYPE_HIGHBANK_REGISTERS);
|
2013-01-20 02:47:33 +01:00
|
|
|
busdev = SYS_BUS_DEVICE(dev);
|
sysbus: Convert to sysbus_realize() etc. with Coccinelle
Convert from qdev_realize(), qdev_realize_and_unref() with null @bus
argument to sysbus_realize(), sysbus_realize_and_unref().
Coccinelle script:
@@
expression dev, errp;
@@
- qdev_realize(DEVICE(dev), NULL, errp);
+ sysbus_realize(SYS_BUS_DEVICE(dev), errp);
@@
expression sysbus_dev, dev, errp;
@@
+ sysbus_dev = SYS_BUS_DEVICE(dev);
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
- sysbus_dev = SYS_BUS_DEVICE(dev);
@@
expression sysbus_dev, dev, errp;
expression expr;
@@
sysbus_dev = SYS_BUS_DEVICE(dev);
... when != dev = expr;
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(DEVICE(dev), NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
Whitespace changes minimized manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-46-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 07:32:34 +02:00
|
|
|
sysbus_realize_and_unref(busdev, &error_fatal);
|
2012-01-26 12:43:49 +01:00
|
|
|
sysbus_mmio_map(busdev, 0, 0xfff3c000);
|
|
|
|
|
|
|
|
|
|
sysbus_create_simple("pl061", 0xfff30000, pic[14]);
|
|
|
|
|
sysbus_create_simple("pl061", 0xfff31000, pic[15]);
|
|
|
|
|
sysbus_create_simple("pl061", 0xfff32000, pic[16]);
|
|
|
|
|
sysbus_create_simple("pl061", 0xfff33000, pic[17]);
|
|
|
|
|
sysbus_create_simple("pl031", 0xfff35000, pic[19]);
|
|
|
|
|
sysbus_create_simple("pl022", 0xfff39000, pic[23]);
|
|
|
|
|
|
2017-09-04 16:21:53 +02:00
|
|
|
sysbus_create_simple(TYPE_SYSBUS_AHCI, 0xffe08000, pic[83]);
|
2012-01-26 12:43:49 +01:00
|
|
|
|
2012-07-24 17:35:11 +02:00
|
|
|
if (nd_table[0].used) {
|
2012-01-26 12:43:49 +01:00
|
|
|
qemu_check_nic_model(&nd_table[0], "xgmac");
|
2020-06-10 07:31:59 +02:00
|
|
|
dev = qdev_new("xgmac");
|
2012-01-26 12:43:49 +01:00
|
|
|
qdev_set_nic_properties(dev, &nd_table[0]);
|
sysbus: Convert to sysbus_realize() etc. with Coccinelle
Convert from qdev_realize(), qdev_realize_and_unref() with null @bus
argument to sysbus_realize(), sysbus_realize_and_unref().
Coccinelle script:
@@
expression dev, errp;
@@
- qdev_realize(DEVICE(dev), NULL, errp);
+ sysbus_realize(SYS_BUS_DEVICE(dev), errp);
@@
expression sysbus_dev, dev, errp;
@@
+ sysbus_dev = SYS_BUS_DEVICE(dev);
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
- sysbus_dev = SYS_BUS_DEVICE(dev);
@@
expression sysbus_dev, dev, errp;
expression expr;
@@
sysbus_dev = SYS_BUS_DEVICE(dev);
... when != dev = expr;
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(DEVICE(dev), NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
Whitespace changes minimized manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-46-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 07:32:34 +02:00
|
|
|
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
|
2013-01-20 02:47:33 +01:00
|
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xfff50000);
|
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[77]);
|
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, pic[78]);
|
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, pic[79]);
|
2012-01-26 12:43:49 +01:00
|
|
|
|
|
|
|
|
qemu_check_nic_model(&nd_table[1], "xgmac");
|
2020-06-10 07:31:59 +02:00
|
|
|
dev = qdev_new("xgmac");
|
2012-01-26 12:43:49 +01:00
|
|
|
qdev_set_nic_properties(dev, &nd_table[1]);
|
sysbus: Convert to sysbus_realize() etc. with Coccinelle
Convert from qdev_realize(), qdev_realize_and_unref() with null @bus
argument to sysbus_realize(), sysbus_realize_and_unref().
Coccinelle script:
@@
expression dev, errp;
@@
- qdev_realize(DEVICE(dev), NULL, errp);
+ sysbus_realize(SYS_BUS_DEVICE(dev), errp);
@@
expression sysbus_dev, dev, errp;
@@
+ sysbus_dev = SYS_BUS_DEVICE(dev);
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
- sysbus_dev = SYS_BUS_DEVICE(dev);
@@
expression sysbus_dev, dev, errp;
expression expr;
@@
sysbus_dev = SYS_BUS_DEVICE(dev);
... when != dev = expr;
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(sysbus_dev, errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(DEVICE(dev), NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
@@
expression dev, errp;
@@
- qdev_realize_and_unref(dev, NULL, errp);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);
Whitespace changes minimized manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-46-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
2020-06-10 07:32:34 +02:00
|
|
|
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
|
2013-01-20 02:47:33 +01:00
|
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xfff51000);
|
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[80]);
|
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, pic[81]);
|
|
|
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, pic[82]);
|
2012-01-26 12:43:49 +01:00
|
|
|
}
|
|
|
|
|
|
2017-02-15 11:05:44 +01:00
|
|
|
/* TODO create and connect IDE devices for ide_drive_get() */
|
|
|
|
|
|
2020-02-19 17:08:48 +01:00
|
|
|
highbank_binfo.ram_size = machine->ram_size;
|
2012-01-26 12:43:49 +01:00
|
|
|
/* highbank requires a dtb in order to boot, and the dtb will override
|
|
|
|
|
* the board ID. The following value is ignored, so set it to -1 to be
|
|
|
|
|
* clear that the value is meaningless.
|
|
|
|
|
*/
|
|
|
|
|
highbank_binfo.board_id = -1;
|
|
|
|
|
highbank_binfo.nb_cpus = smp_cpus;
|
|
|
|
|
highbank_binfo.loader_start = 0;
|
|
|
|
|
highbank_binfo.write_secondary_boot = hb_write_secondary;
|
|
|
|
|
highbank_binfo.secondary_cpu_reset_hook = hb_reset_secondary;
|
2020-12-15 15:42:15 +01:00
|
|
|
highbank_binfo.board_setup_addr = BOARD_SETUP_ADDR;
|
|
|
|
|
highbank_binfo.write_board_setup = hb_write_board_setup;
|
|
|
|
|
highbank_binfo.secure_board_setup = true;
|
2015-11-10 14:37:33 +01:00
|
|
|
|
2019-08-09 08:57:21 +02:00
|
|
|
arm_load_kernel(ARM_CPU(first_cpu), machine, &highbank_binfo);
|
2012-01-26 12:43:49 +01:00
|
|
|
}
|
|
|
|
|
|
2014-05-07 16:42:57 +02:00
|
|
|
static void highbank_init(MachineState *machine)
|
2013-07-05 14:21:36 +02:00
|
|
|
{
|
2014-05-07 16:42:57 +02:00
|
|
|
calxeda_init(machine, CALXEDA_HIGHBANK);
|
2013-07-05 14:21:36 +02:00
|
|
|
}
|
|
|
|
|
|
2014-05-07 16:42:57 +02:00
|
|
|
static void midway_init(MachineState *machine)
|
2013-07-05 14:21:37 +02:00
|
|
|
{
|
2014-05-07 16:42:57 +02:00
|
|
|
calxeda_init(machine, CALXEDA_MIDWAY);
|
2013-07-05 14:21:37 +02:00
|
|
|
}
|
|
|
|
|
|
2015-09-19 10:49:44 +02:00
|
|
|
static void highbank_class_init(ObjectClass *oc, void *data)
|
2015-09-04 20:37:08 +02:00
|
|
|
{
|
2015-09-19 10:49:44 +02:00
|
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
|
|
|
|
2015-09-04 20:37:08 +02:00
|
|
|
mc->desc = "Calxeda Highbank (ECX-1000)";
|
|
|
|
|
mc->init = highbank_init;
|
2017-02-15 11:05:44 +01:00
|
|
|
mc->block_default_type = IF_IDE;
|
|
|
|
|
mc->units_per_default_bus = 1;
|
2015-09-04 20:37:08 +02:00
|
|
|
mc->max_cpus = 4;
|
2017-09-07 14:54:54 +02:00
|
|
|
mc->ignore_memory_transaction_failures = true;
|
2020-02-19 17:08:48 +01:00
|
|
|
mc->default_ram_id = "highbank.dram";
|
2015-09-04 20:37:08 +02:00
|
|
|
}
|
2012-01-26 12:43:49 +01:00
|
|
|
|
2015-09-19 10:49:44 +02:00
|
|
|
static const TypeInfo highbank_type = {
|
|
|
|
|
.name = MACHINE_TYPE_NAME("highbank"),
|
|
|
|
|
.parent = TYPE_MACHINE,
|
|
|
|
|
.class_init = highbank_class_init,
|
|
|
|
|
};
|
2013-07-05 14:21:37 +02:00
|
|
|
|
2015-09-19 10:49:44 +02:00
|
|
|
static void midway_class_init(ObjectClass *oc, void *data)
|
2012-01-26 12:43:49 +01:00
|
|
|
{
|
2015-09-19 10:49:44 +02:00
|
|
|
MachineClass *mc = MACHINE_CLASS(oc);
|
|
|
|
|
|
2015-09-04 20:37:08 +02:00
|
|
|
mc->desc = "Calxeda Midway (ECX-2000)";
|
|
|
|
|
mc->init = midway_init;
|
2017-02-15 11:05:44 +01:00
|
|
|
mc->block_default_type = IF_IDE;
|
|
|
|
|
mc->units_per_default_bus = 1;
|
2015-09-04 20:37:08 +02:00
|
|
|
mc->max_cpus = 4;
|
2017-09-07 14:54:54 +02:00
|
|
|
mc->ignore_memory_transaction_failures = true;
|
2020-02-19 17:08:48 +01:00
|
|
|
mc->default_ram_id = "highbank.dram";
|
2012-01-26 12:43:49 +01:00
|
|
|
}
|
|
|
|
|
|
2015-09-19 10:49:44 +02:00
|
|
|
static const TypeInfo midway_type = {
|
|
|
|
|
.name = MACHINE_TYPE_NAME("midway"),
|
|
|
|
|
.parent = TYPE_MACHINE,
|
|
|
|
|
.class_init = midway_class_init,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static void calxeda_machines_init(void)
|
|
|
|
|
{
|
|
|
|
|
type_register_static(&highbank_type);
|
|
|
|
|
type_register_static(&midway_type);
|
|
|
|
|
}
|
|
|
|
|
|
2016-02-16 21:59:04 +01:00
|
|
|
type_init(calxeda_machines_init)
|