2007-11-17 18:14:51 +01:00
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#ifndef HW_PC_H
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#define HW_PC_H
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2009-03-06 00:01:23 +01:00
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#include "qemu-common.h"
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2012-12-17 18:19:49 +01:00
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#include "exec/memory.h"
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2014-06-10 13:15:17 +02:00
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#include "hw/boards.h"
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2013-02-05 17:06:20 +01:00
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#include "hw/isa/isa.h"
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#include "hw/block/fdc.h"
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2012-10-24 08:43:34 +02:00
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#include "net/net.h"
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2013-02-05 17:06:20 +01:00
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#include "hw/i386/ioapic.h"
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2009-03-06 00:01:23 +01:00
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2013-05-30 11:57:26 +02:00
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#include "qemu/range.h"
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2013-07-24 17:56:09 +02:00
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#include "qemu/bitmap.h"
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#include "sysemu/sysemu.h"
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#include "hw/pci/pci.h"
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2014-06-02 15:24:57 +02:00
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#include "hw/boards.h"
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2014-10-14 18:40:06 +02:00
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#include "hw/compat.h"
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2015-06-29 10:20:22 +02:00
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#include "hw/mem/pc-dimm.h"
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2016-03-04 17:00:32 +01:00
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#include "hw/mem/nvdimm.h"
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2013-05-30 11:57:26 +02:00
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2013-12-08 10:38:17 +01:00
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#define HPET_INTCAP "hpet-intcap"
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2015-12-17 17:16:08 +01:00
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#ifdef CONFIG_KVM
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#define kvm_pit_in_kernel() \
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(kvm_irqchip_in_kernel() && !kvm_irqchip_is_split())
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#define kvm_pic_in_kernel() \
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(kvm_irqchip_in_kernel() && !kvm_irqchip_is_split())
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#define kvm_ioapic_in_kernel() \
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(kvm_irqchip_in_kernel() && !kvm_irqchip_is_split())
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#else
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#define kvm_pit_in_kernel() 0
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#define kvm_pic_in_kernel() 0
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#define kvm_ioapic_in_kernel() 0
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#endif
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2014-06-02 15:25:08 +02:00
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/**
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* PCMachineState:
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2014-06-02 15:25:24 +02:00
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* @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
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2014-06-02 15:25:08 +02:00
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*/
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2014-06-02 15:24:57 +02:00
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struct PCMachineState {
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/*< private >*/
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MachineState parent_obj;
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2014-06-02 15:25:08 +02:00
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/* <public> */
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2015-12-11 19:42:21 +01:00
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/* State for other subsystems/APIs: */
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2015-06-29 10:20:22 +02:00
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MemoryHotplugState hotplug_memory;
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2015-12-11 19:42:23 +01:00
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Notifier machine_done;
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2014-06-02 15:25:24 +02:00
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2015-12-11 19:42:21 +01:00
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/* Pointers to devices and objects: */
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2014-06-02 15:25:24 +02:00
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HotplugHandler *acpi_dev;
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2014-10-22 05:24:29 +02:00
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ISADevice *rtc;
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2015-12-11 19:42:21 +01:00
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PCIBus *bus;
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2015-12-11 19:42:31 +01:00
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FWCfgState *fw_cfg;
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2014-06-20 03:40:25 +02:00
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2015-12-11 19:42:21 +01:00
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/* Configuration options: */
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2014-06-20 03:40:25 +02:00
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uint64_t max_ram_below_4g;
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2014-11-21 17:18:52 +01:00
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OnOffAuto vmport;
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2015-06-18 18:30:52 +02:00
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OnOffAuto smm;
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2016-03-04 17:00:32 +01:00
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AcpiNVDIMMState acpi_nvdimm_state;
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2015-12-11 19:42:21 +01:00
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/* RAM information (sizes, addresses, configuration): */
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2015-08-07 21:55:51 +02:00
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ram_addr_t below_4g_mem_size, above_4g_mem_size;
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2015-12-11 19:42:32 +01:00
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/* CPU and apic information: */
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bool apic_xrupt_override;
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unsigned apic_id_limit;
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2016-03-03 15:28:56 +01:00
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CPUArchIdList *possible_cpus;
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2015-12-11 19:42:32 +01:00
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/* NUMA information: */
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uint64_t numa_nodes;
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uint64_t *node_mem;
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uint64_t *node_cpu;
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2014-06-02 15:24:57 +02:00
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};
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2014-06-02 15:25:24 +02:00
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#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
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2014-06-02 15:25:27 +02:00
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#define PC_MACHINE_MEMHP_REGION_SIZE "hotplug-memory-region-size"
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2014-06-20 03:40:25 +02:00
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#define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
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2014-10-03 23:33:37 +02:00
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#define PC_MACHINE_VMPORT "vmport"
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2015-06-18 18:30:52 +02:00
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#define PC_MACHINE_SMM "smm"
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nvdimm acpi: build ACPI NFIT table
NFIT is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT)
Currently, we only support PMEM mode. Each device has 3 structures:
- SPA structure, defines the PMEM region info
- MEM DEV structure, it has the @handle which is used to associate specified
ACPI NVDIMM device we will introduce in later patch.
Also we can happily ignored the memory device's interleave, the real
nvdimm hardware access is hidden behind host
- DCR structure, it defines vendor ID used to associate specified vendor
nvdimm driver. Since we only implement PMEM mode this time, Command
window and Data window are not needed
The NVDIMM functionality is controlled by the parameter, 'nvdimm', which
is introduced for the machine, there is a example to enable it:
-machine pc,nvdimm -m 8G,maxmem=100G,slots=100 -object \
memory-backend-file,id=mem1,share,mem-path=/tmp/nvdimm1,size=10G -device \
nvdimm,memdev=mem1,id=nv1
It is disabled on default
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-12-02 08:20:58 +01:00
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#define PC_MACHINE_NVDIMM "nvdimm"
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2014-06-02 15:25:24 +02:00
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2014-06-02 15:25:12 +02:00
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/**
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* PCMachineClass:
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2015-12-11 19:42:21 +01:00
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*
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* Methods:
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*
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2014-06-02 15:25:12 +02:00
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* @get_hotplug_handler: pointer to parent class callback @get_hotplug_handler
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2015-12-11 19:42:21 +01:00
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*
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* Compat fields:
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*
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2015-12-01 23:58:06 +01:00
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* @enforce_aligned_dimm: check that DIMM's address/size is aligned by
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* backend's alignment value if provided
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2015-12-11 19:42:21 +01:00
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* @acpi_data_size: Size of the chunk of memory at the top of RAM
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* for the BIOS ACPI tables and other BIOS
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* datastructures.
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* @gigabyte_align: Make sure that guest addresses aligned at
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* 1Gbyte boundaries get mapped to host
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* addresses aligned at 1Gbyte boundaries. This
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* way we can use 1GByte pages in the host.
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*
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2014-06-02 15:25:12 +02:00
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*/
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2014-06-02 15:24:57 +02:00
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struct PCMachineClass {
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/*< private >*/
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MachineClass parent_class;
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2014-06-02 15:25:12 +02:00
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/*< public >*/
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2015-12-11 19:42:21 +01:00
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/* Methods: */
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2014-06-02 15:25:12 +02:00
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HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
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DeviceState *dev);
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2015-12-01 23:58:03 +01:00
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2015-12-11 19:42:21 +01:00
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/* Device configuration: */
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2015-12-01 23:58:03 +01:00
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bool pci_enabled;
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2015-12-11 19:42:21 +01:00
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bool kvmclock_enabled;
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/* Compat options: */
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/* ACPI compat: */
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2015-12-01 23:58:03 +01:00
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bool has_acpi_build;
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bool rsdp_in_ram;
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2015-12-11 19:42:21 +01:00
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int legacy_acpi_table_size;
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unsigned acpi_data_size;
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/* SMBIOS compat: */
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2015-12-01 23:58:03 +01:00
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bool smbios_defaults;
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bool smbios_legacy_mode;
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bool smbios_uuid_encoded;
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2015-12-11 19:42:21 +01:00
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/* RAM / address space compat: */
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2015-12-01 23:58:03 +01:00
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bool gigabyte_align;
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bool has_reserved_memory;
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2015-12-01 23:58:06 +01:00
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bool enforce_aligned_dimm;
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2015-12-11 19:42:21 +01:00
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bool broken_reserved_end;
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2015-11-24 04:33:57 +01:00
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/* TSC rate migration: */
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bool save_tsc_khz;
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2014-06-02 15:24:57 +02:00
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};
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#define TYPE_PC_MACHINE "generic-pc-machine"
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#define PC_MACHINE(obj) \
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OBJECT_CHECK(PCMachineState, (obj), TYPE_PC_MACHINE)
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#define PC_MACHINE_GET_CLASS(obj) \
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OBJECT_GET_CLASS(PCMachineClass, (obj), TYPE_PC_MACHINE)
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#define PC_MACHINE_CLASS(klass) \
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OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
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2007-11-17 18:14:51 +01:00
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/* PC-style peripherals (also used by other machines). */
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2013-05-30 11:57:26 +02:00
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typedef struct PcPciInfo {
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Range w32;
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Range w64;
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} PcPciInfo;
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2013-09-16 17:09:11 +02:00
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#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
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#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
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#define ACPI_PM_PROP_S4_VAL "s4_val"
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#define ACPI_PM_PROP_SCI_INT "sci_int"
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#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
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#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
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#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
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#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
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#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
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2015-06-28 19:58:56 +02:00
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#define ACPI_PM_PROP_TCO_ENABLED "enable_tco"
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2013-09-16 17:09:11 +02:00
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2007-11-17 18:14:51 +01:00
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/* parallel.c */
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2015-02-04 18:33:07 +01:00
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void parallel_hds_isa_init(ISABus *bus, int n);
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2011-02-05 15:51:57 +01:00
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2011-10-06 16:44:26 +02:00
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bool parallel_mm_init(MemoryRegion *address_space,
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2012-10-23 12:30:10 +02:00
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hwaddr base, int it_shift, qemu_irq irq,
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2011-02-05 15:51:57 +01:00
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CharDriverState *chr);
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2007-11-17 18:14:51 +01:00
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/* i8259.c */
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2012-01-10 16:31:16 +01:00
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extern DeviceState *isa_pic;
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2011-12-15 22:09:51 +01:00
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qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq);
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2011-10-16 15:30:27 +02:00
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qemu_irq *kvm_i8259_init(ISABus *bus);
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2012-01-10 16:31:16 +01:00
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int pic_read_irq(DeviceState *d);
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int pic_get_output(DeviceState *d);
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2015-02-06 14:18:24 +01:00
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void hmp_info_pic(Monitor *mon, const QDict *qdict);
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void hmp_info_irq(Monitor *mon, const QDict *qdict);
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2007-11-17 18:14:51 +01:00
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2015-09-22 15:18:20 +02:00
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/* ioapic.c */
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void kvm_ioapic_dump_state(Monitor *mon, const QDict *qdict);
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2015-09-22 15:18:21 +02:00
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void ioapic_dump_state(Monitor *mon, const QDict *qdict);
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2015-09-22 15:18:20 +02:00
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2011-10-07 09:19:35 +02:00
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/* Global System Interrupts */
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2010-06-19 09:41:43 +02:00
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2011-10-07 09:19:35 +02:00
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#define GSI_NUM_PINS IOAPIC_NUM_PINS
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2010-05-14 09:29:15 +02:00
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2011-10-07 09:19:35 +02:00
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typedef struct GSIState {
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2011-10-07 09:19:36 +02:00
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qemu_irq i8259_irq[ISA_NUM_IRQS];
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2011-10-07 09:19:35 +02:00
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qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
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} GSIState;
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void gsi_handler(void *opaque, int n, int level);
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2010-05-14 09:29:15 +02:00
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2007-11-17 18:14:51 +01:00
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/* vmport.c */
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2013-06-22 08:07:06 +02:00
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typedef uint32_t (VMPortReadFunc)(void *opaque, uint32_t address);
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2011-12-15 22:09:51 +01:00
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static inline void vmport_init(ISABus *bus)
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2011-02-05 15:34:41 +01:00
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{
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2011-12-15 22:09:51 +01:00
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isa_create_simple(bus, "vmport");
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2011-02-05 15:34:41 +01:00
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}
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2013-06-22 08:07:06 +02:00
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void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
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2011-02-05 15:34:52 +01:00
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void vmmouse_get_data(uint32_t *data);
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void vmmouse_set_data(const uint32_t *data);
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2007-11-17 18:14:51 +01:00
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/* pckbd.c */
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void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
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void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
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2011-08-11 00:28:17 +02:00
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MemoryRegion *region, ram_addr_t size,
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2012-10-23 12:30:10 +02:00
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hwaddr mask);
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2010-05-22 09:59:01 +02:00
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void i8042_isa_mouse_fake_event(void *opaque);
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void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
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2007-11-17 18:14:51 +01:00
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/* pc.c */
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extern int fd_bootchk;
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2015-06-18 18:30:52 +02:00
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bool pc_machine_is_smm_enabled(PCMachineState *pcms);
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2010-05-14 09:29:09 +02:00
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void pc_register_ferr_irq(qemu_irq irq);
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2010-05-14 09:29:15 +02:00
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void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
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2015-10-15 05:12:12 +02:00
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void pc_cpus_init(PCMachineState *pcms);
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2013-04-30 18:00:53 +02:00
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void pc_hot_add_cpu(const int64_t id, Error **errp);
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2012-12-03 10:47:27 +01:00
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void pc_acpi_init(const char *default_dsdt);
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2013-05-30 11:57:26 +02:00
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2015-12-11 19:42:33 +01:00
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void pc_guest_info_init(PCMachineState *pcms);
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2013-05-30 11:57:26 +02:00
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2013-07-29 16:47:57 +02:00
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#define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
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#define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
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#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
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#define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
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#define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
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2013-08-27 07:37:26 +02:00
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#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
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2013-07-29 16:47:57 +02:00
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2013-10-29 13:57:34 +01:00
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void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
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MemoryRegion *pci_address_space);
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2013-07-29 16:47:57 +02:00
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2015-12-11 19:42:25 +01:00
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void xen_load_linux(PCMachineState *pcms);
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2015-12-11 19:42:24 +01:00
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|
|
void pc_memory_init(PCMachineState *pcms,
|
|
|
|
MemoryRegion *system_memory,
|
|
|
|
MemoryRegion *rom_memory,
|
|
|
|
MemoryRegion **ram_memory);
|
2015-05-29 07:26:59 +02:00
|
|
|
qemu_irq pc_allocate_cpu_irq(void);
|
2011-12-15 22:09:51 +01:00
|
|
|
DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
|
|
|
|
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
|
2011-05-03 18:06:54 +02:00
|
|
|
ISADevice **rtc_state,
|
2015-05-28 22:04:08 +02:00
|
|
|
bool create_fdctrl,
|
2013-12-08 10:38:17 +01:00
|
|
|
bool no_vmport,
|
2016-01-22 16:09:21 +01:00
|
|
|
uint32_t hpet_irqs);
|
2011-12-15 22:09:51 +01:00
|
|
|
void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
|
2015-08-07 21:55:49 +02:00
|
|
|
void pc_cmos_init(PCMachineState *pcms,
|
2015-06-25 15:35:07 +02:00
|
|
|
BusState *ide0, BusState *ide1,
|
2011-02-05 17:32:23 +01:00
|
|
|
ISADevice *s);
|
2012-11-14 21:54:01 +01:00
|
|
|
void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
|
2010-05-14 09:29:15 +02:00
|
|
|
void pc_pci_device_init(PCIBus *pci_bus);
|
2010-05-14 09:29:09 +02:00
|
|
|
|
2010-05-14 09:29:04 +02:00
|
|
|
typedef void (*cpu_set_smm_t)(int smm, void *arg);
|
|
|
|
|
2012-11-14 21:54:01 +01:00
|
|
|
void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
|
|
|
|
|
2015-12-30 21:11:51 +01:00
|
|
|
ISADevice *pc_find_fdc0(void);
|
2016-02-17 19:25:31 +01:00
|
|
|
int cmos_get_fd_drive_type(FloppyDriveType fd0);
|
2015-12-30 21:11:51 +01:00
|
|
|
|
2016-02-19 19:20:26 +01:00
|
|
|
#define FW_CFG_IO_BASE 0x510
|
|
|
|
|
2009-06-18 12:57:00 +02:00
|
|
|
/* acpi_piix.c */
|
2010-03-29 21:23:52 +02:00
|
|
|
|
2013-08-03 00:18:51 +02:00
|
|
|
I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
|
|
|
|
qemu_irq sci_irq, qemu_irq smi_irq,
|
2015-06-18 18:30:17 +02:00
|
|
|
int smm_enabled, DeviceState **piix4_pm);
|
2007-11-17 18:14:51 +01:00
|
|
|
void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
|
|
|
|
|
2008-12-18 00:28:44 +01:00
|
|
|
/* hpet.c */
|
|
|
|
extern int no_hpet;
|
|
|
|
|
2007-11-17 18:14:51 +01:00
|
|
|
/* piix_pci.c */
|
2009-08-28 15:28:15 +02:00
|
|
|
struct PCII440FXState;
|
|
|
|
typedef struct PCII440FXState PCII440FXState;
|
|
|
|
|
2015-07-15 07:37:41 +02:00
|
|
|
#define TYPE_I440FX_PCI_HOST_BRIDGE "i440FX-pcihost"
|
|
|
|
#define TYPE_I440FX_PCI_DEVICE "i440FX"
|
|
|
|
|
2015-07-15 07:37:43 +02:00
|
|
|
#define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX"
|
|
|
|
|
2015-07-15 07:37:41 +02:00
|
|
|
PCIBus *i440fx_init(const char *host_type, const char *pci_type,
|
|
|
|
PCII440FXState **pi440fx_state, int *piix_devfn,
|
2011-12-15 22:09:54 +01:00
|
|
|
ISABus **isa_bus, qemu_irq *pic,
|
2011-08-08 15:09:04 +02:00
|
|
|
MemoryRegion *address_space_mem,
|
|
|
|
MemoryRegion *address_space_io,
|
2011-08-15 16:17:38 +02:00
|
|
|
ram_addr_t ram_size,
|
2013-12-21 03:02:50 +01:00
|
|
|
ram_addr_t below_4g_mem_size,
|
2013-07-29 16:47:57 +02:00
|
|
|
ram_addr_t above_4g_mem_size,
|
2011-08-15 16:17:38 +02:00
|
|
|
MemoryRegion *pci_memory,
|
|
|
|
MemoryRegion *ram_memory);
|
2007-11-17 18:14:51 +01:00
|
|
|
|
2013-07-24 17:56:11 +02:00
|
|
|
PCIBus *find_i440fx(void);
|
2009-08-28 15:28:13 +02:00
|
|
|
/* piix4.c */
|
2008-10-26 14:43:07 +01:00
|
|
|
extern PCIDevice *piix4_dev;
|
2011-12-15 22:09:58 +01:00
|
|
|
int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn);
|
2007-11-17 18:14:51 +01:00
|
|
|
|
|
|
|
/* vga.c */
|
2008-09-28 02:42:12 +02:00
|
|
|
enum vga_retrace_method {
|
|
|
|
VGA_RETRACE_DUMB,
|
|
|
|
VGA_RETRACE_PRECISE
|
|
|
|
};
|
|
|
|
|
|
|
|
extern enum vga_retrace_method vga_retrace_method;
|
2007-11-17 18:14:51 +01:00
|
|
|
|
2012-10-23 12:30:10 +02:00
|
|
|
int isa_vga_mm_init(hwaddr vram_base,
|
|
|
|
hwaddr ctrl_base, int it_shift,
|
2011-08-15 16:17:37 +02:00
|
|
|
MemoryRegion *address_space);
|
2007-11-17 18:14:51 +01:00
|
|
|
|
|
|
|
/* ne2000.c */
|
2011-12-15 22:09:51 +01:00
|
|
|
static inline bool isa_ne2000_init(ISABus *bus, int base, int irq, NICInfo *nd)
|
2011-02-05 16:39:57 +01:00
|
|
|
{
|
2013-06-07 13:49:13 +02:00
|
|
|
DeviceState *dev;
|
|
|
|
ISADevice *isadev;
|
2007-11-17 18:14:51 +01:00
|
|
|
|
2011-02-05 16:39:57 +01:00
|
|
|
qemu_check_nic_model(nd, "ne2k_isa");
|
|
|
|
|
2013-06-07 13:49:13 +02:00
|
|
|
isadev = isa_try_create(bus, "ne2k_isa");
|
|
|
|
if (!isadev) {
|
2011-02-05 16:44:45 +01:00
|
|
|
return false;
|
|
|
|
}
|
2013-06-07 13:49:13 +02:00
|
|
|
dev = DEVICE(isadev);
|
|
|
|
qdev_prop_set_uint32(dev, "iobase", base);
|
|
|
|
qdev_prop_set_uint32(dev, "irq", irq);
|
|
|
|
qdev_set_nic_properties(dev, nd);
|
|
|
|
qdev_init_nofail(dev);
|
2011-02-05 16:44:45 +01:00
|
|
|
return true;
|
2011-02-05 16:39:57 +01:00
|
|
|
}
|
2007-11-17 18:14:51 +01:00
|
|
|
|
2012-02-22 08:18:51 +01:00
|
|
|
/* pc_sysfw.c */
|
2013-08-09 19:35:02 +02:00
|
|
|
void pc_system_firmware_init(MemoryRegion *rom_memory,
|
|
|
|
bool isapc_ram_fw);
|
2012-02-22 08:18:51 +01:00
|
|
|
|
2013-04-26 05:24:46 +02:00
|
|
|
/* pvpanic.c */
|
2013-07-24 17:56:12 +02:00
|
|
|
uint16_t pvpanic_port(void);
|
2013-04-26 05:24:46 +02:00
|
|
|
|
2010-02-15 18:33:46 +01:00
|
|
|
/* e820 types */
|
|
|
|
#define E820_RAM 1
|
|
|
|
#define E820_RESERVED 2
|
|
|
|
#define E820_ACPI 3
|
|
|
|
#define E820_NVS 4
|
|
|
|
#define E820_UNUSABLE 5
|
|
|
|
|
|
|
|
int e820_add_entry(uint64_t, uint64_t, uint32_t);
|
2014-04-23 15:42:36 +02:00
|
|
|
int e820_get_num_entries(void);
|
|
|
|
bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
|
2010-02-15 18:33:46 +01:00
|
|
|
|
2016-05-17 16:43:10 +02:00
|
|
|
#define PC_COMPAT_2_6 \
|
2016-05-12 19:24:26 +02:00
|
|
|
HW_COMPAT_2_6 \
|
|
|
|
{\
|
|
|
|
.driver = TYPE_X86_CPU,\
|
|
|
|
.property = "cpuid-0xb",\
|
|
|
|
.value = "off",\
|
|
|
|
},
|
2016-05-17 16:43:10 +02:00
|
|
|
|
2015-11-30 15:56:36 +01:00
|
|
|
#define PC_COMPAT_2_5 \
|
2016-05-17 16:43:10 +02:00
|
|
|
PC_COMPAT_2_6 \
|
2015-11-30 15:56:36 +01:00
|
|
|
HW_COMPAT_2_5
|
|
|
|
|
2016-04-09 21:26:38 +02:00
|
|
|
/* Helper for setting model-id for CPU models that changed model-id
|
|
|
|
* depending on QEMU versions up to QEMU 2.4.
|
|
|
|
*/
|
|
|
|
#define PC_CPU_MODEL_IDS(v) \
|
|
|
|
{\
|
|
|
|
.driver = "qemu32-" TYPE_X86_CPU,\
|
|
|
|
.property = "model-id",\
|
|
|
|
.value = "QEMU Virtual CPU version " v,\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "qemu64-" TYPE_X86_CPU,\
|
|
|
|
.property = "model-id",\
|
|
|
|
.value = "QEMU Virtual CPU version " v,\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "athlon-" TYPE_X86_CPU,\
|
|
|
|
.property = "model-id",\
|
|
|
|
.value = "QEMU Virtual CPU version " v,\
|
|
|
|
},
|
|
|
|
|
2015-09-11 22:14:25 +02:00
|
|
|
#define PC_COMPAT_2_4 \
|
2015-11-30 15:56:37 +01:00
|
|
|
HW_COMPAT_2_4 \
|
2016-04-09 21:26:38 +02:00
|
|
|
PC_CPU_MODEL_IDS("2.4.0") \
|
2015-11-30 15:56:37 +01:00
|
|
|
{\
|
|
|
|
.driver = "Haswell-" TYPE_X86_CPU,\
|
|
|
|
.property = "abm",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Haswell-noTSX-" TYPE_X86_CPU,\
|
|
|
|
.property = "abm",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Broadwell-" TYPE_X86_CPU,\
|
|
|
|
.property = "abm",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Broadwell-noTSX-" TYPE_X86_CPU,\
|
|
|
|
.property = "abm",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "host" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "host-cache-info",\
|
|
|
|
.value = "on",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = TYPE_X86_CPU,\
|
|
|
|
.property = "check",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "qemu64" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "sse4a",\
|
|
|
|
.value = "on",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "qemu64" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "abm",\
|
|
|
|
.value = "on",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "qemu64" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "popcnt",\
|
|
|
|
.value = "on",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "qemu32" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "popcnt",\
|
|
|
|
.value = "on",\
|
|
|
|
},{\
|
|
|
|
.driver = "Opteron_G2" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "rdtscp",\
|
|
|
|
.value = "on",\
|
|
|
|
},{\
|
|
|
|
.driver = "Opteron_G3" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "rdtscp",\
|
|
|
|
.value = "on",\
|
|
|
|
},{\
|
|
|
|
.driver = "Opteron_G4" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "rdtscp",\
|
|
|
|
.value = "on",\
|
|
|
|
},{\
|
|
|
|
.driver = "Opteron_G5" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "rdtscp",\
|
|
|
|
.value = "on",\
|
|
|
|
},
|
2015-09-11 22:14:25 +02:00
|
|
|
|
2015-11-13 20:07:13 +01:00
|
|
|
|
2015-05-14 20:53:03 +02:00
|
|
|
#define PC_COMPAT_2_3 \
|
2015-11-30 15:56:37 +01:00
|
|
|
HW_COMPAT_2_3 \
|
2016-04-09 21:26:38 +02:00
|
|
|
PC_CPU_MODEL_IDS("2.3.0") \
|
2015-11-30 15:56:37 +01:00
|
|
|
{\
|
|
|
|
.driver = TYPE_X86_CPU,\
|
|
|
|
.property = "arat",\
|
|
|
|
.value = "off",\
|
|
|
|
},{\
|
|
|
|
.driver = "qemu64" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "level",\
|
|
|
|
.value = stringify(4),\
|
|
|
|
},{\
|
|
|
|
.driver = "kvm64" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "level",\
|
|
|
|
.value = stringify(5),\
|
|
|
|
},{\
|
|
|
|
.driver = "pentium3" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "level",\
|
|
|
|
.value = stringify(2),\
|
|
|
|
},{\
|
|
|
|
.driver = "n270" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "level",\
|
|
|
|
.value = stringify(5),\
|
|
|
|
},{\
|
|
|
|
.driver = "Conroe" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "level",\
|
|
|
|
.value = stringify(4),\
|
|
|
|
},{\
|
|
|
|
.driver = "Penryn" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "level",\
|
|
|
|
.value = stringify(4),\
|
|
|
|
},{\
|
|
|
|
.driver = "Nehalem" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "level",\
|
|
|
|
.value = stringify(4),\
|
|
|
|
},{\
|
|
|
|
.driver = "n270" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "xlevel",\
|
|
|
|
.value = stringify(0x8000000a),\
|
|
|
|
},{\
|
|
|
|
.driver = "Penryn" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "xlevel",\
|
|
|
|
.value = stringify(0x8000000a),\
|
|
|
|
},{\
|
|
|
|
.driver = "Conroe" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "xlevel",\
|
|
|
|
.value = stringify(0x8000000a),\
|
|
|
|
},{\
|
|
|
|
.driver = "Nehalem" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "xlevel",\
|
|
|
|
.value = stringify(0x8000000a),\
|
|
|
|
},{\
|
|
|
|
.driver = "Westmere" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "xlevel",\
|
|
|
|
.value = stringify(0x8000000a),\
|
|
|
|
},{\
|
|
|
|
.driver = "SandyBridge" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "xlevel",\
|
|
|
|
.value = stringify(0x8000000a),\
|
|
|
|
},{\
|
|
|
|
.driver = "IvyBridge" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "xlevel",\
|
|
|
|
.value = stringify(0x8000000a),\
|
|
|
|
},{\
|
|
|
|
.driver = "Haswell" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "xlevel",\
|
|
|
|
.value = stringify(0x8000000a),\
|
|
|
|
},{\
|
|
|
|
.driver = "Haswell-noTSX" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "xlevel",\
|
|
|
|
.value = stringify(0x8000000a),\
|
|
|
|
},{\
|
|
|
|
.driver = "Broadwell" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "xlevel",\
|
|
|
|
.value = stringify(0x8000000a),\
|
|
|
|
},{\
|
|
|
|
.driver = "Broadwell-noTSX" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "xlevel",\
|
|
|
|
.value = stringify(0x8000000a),\
|
|
|
|
},
|
2015-05-14 20:53:03 +02:00
|
|
|
|
|
|
|
#define PC_COMPAT_2_2 \
|
2015-11-30 15:56:37 +01:00
|
|
|
HW_COMPAT_2_2 \
|
2016-04-09 21:26:38 +02:00
|
|
|
PC_CPU_MODEL_IDS("2.3.0") \
|
2015-11-30 15:56:37 +01:00
|
|
|
{\
|
|
|
|
.driver = "kvm64" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "kvm32" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Conroe" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Penryn" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Nehalem" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Westmere" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "SandyBridge" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Haswell" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Broadwell" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Opteron_G1" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Opteron_G2" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Opteron_G3" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Opteron_G4" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Opteron_G5" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vme",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Haswell" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "f16c",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Haswell" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "rdrand",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Broadwell" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "f16c",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Broadwell" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "rdrand",\
|
|
|
|
.value = "off",\
|
|
|
|
},
|
2015-05-14 20:53:03 +02:00
|
|
|
|
|
|
|
#define PC_COMPAT_2_1 \
|
2015-11-30 15:56:37 +01:00
|
|
|
HW_COMPAT_2_1 \
|
2016-04-09 21:26:38 +02:00
|
|
|
PC_CPU_MODEL_IDS("2.1.0") \
|
2015-11-30 15:56:37 +01:00
|
|
|
{\
|
|
|
|
.driver = "coreduo" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vmx",\
|
|
|
|
.value = "on",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "core2duo" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "vmx",\
|
|
|
|
.value = "on",\
|
|
|
|
},
|
2015-05-14 20:53:03 +02:00
|
|
|
|
2014-05-05 16:52:50 +02:00
|
|
|
#define PC_COMPAT_2_0 \
|
2016-04-09 21:26:38 +02:00
|
|
|
PC_CPU_MODEL_IDS("2.0.0") \
|
2015-11-30 15:56:37 +01:00
|
|
|
{\
|
|
|
|
.driver = "virtio-scsi-pci",\
|
|
|
|
.property = "any_layout",\
|
|
|
|
.value = "off",\
|
|
|
|
},{\
|
|
|
|
.driver = "PIIX4_PM",\
|
|
|
|
.property = "memory-hotplug-support",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "apic",\
|
|
|
|
.property = "version",\
|
|
|
|
.value = stringify(0x11),\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "nec-usb-xhci",\
|
|
|
|
.property = "superspeed-ports-first",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "nec-usb-xhci",\
|
|
|
|
.property = "force-pcie-endcap",\
|
|
|
|
.value = "on",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "pci-serial",\
|
|
|
|
.property = "prog_if",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "pci-serial-2x",\
|
|
|
|
.property = "prog_if",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "pci-serial-4x",\
|
|
|
|
.property = "prog_if",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "virtio-net-pci",\
|
|
|
|
.property = "guest_announce",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "ICH9-LPC",\
|
|
|
|
.property = "memory-hotplug-support",\
|
|
|
|
.value = "off",\
|
|
|
|
},{\
|
|
|
|
.driver = "xio3130-downstream",\
|
|
|
|
.property = COMPAT_PROP_PCP,\
|
|
|
|
.value = "off",\
|
|
|
|
},{\
|
|
|
|
.driver = "ioh3420",\
|
|
|
|
.property = COMPAT_PROP_PCP,\
|
|
|
|
.value = "off",\
|
|
|
|
},
|
2014-05-05 16:52:50 +02:00
|
|
|
|
2013-11-20 07:32:31 +01:00
|
|
|
#define PC_COMPAT_1_7 \
|
2016-04-09 21:26:38 +02:00
|
|
|
PC_CPU_MODEL_IDS("1.7.0") \
|
2015-11-30 15:56:37 +01:00
|
|
|
{\
|
|
|
|
.driver = TYPE_USB_DEVICE,\
|
|
|
|
.property = "msos-desc",\
|
|
|
|
.value = "no",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "PIIX4_PM",\
|
|
|
|
.property = "acpi-pci-hotplug-with-bridge-support",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "hpet",\
|
|
|
|
.property = HPET_INTCAP,\
|
|
|
|
.value = stringify(4),\
|
|
|
|
},
|
2013-11-20 07:32:31 +01:00
|
|
|
|
e1000: add interrupt mitigation support
This patch partially implements the e1000 interrupt mitigation mechanisms.
Using a single QEMUTimer, it emulates the ITR register (which is the newer
mitigation register, recommended by Intel) and approximately emulates
RADV and TADV registers. TIDV and RDTR register functionalities are not
emulated (RDTR is only used to validate RADV, according to the e1000 specs).
RADV, TADV, TIDV and RDTR registers make up the older e1000 mitigation
mechanism and would need a timer each to be completely emulated. However,
a single timer has been used in order to reach a good compromise between
emulation accuracy and simplicity/efficiency.
The implemented mechanism can be enabled/disabled specifying the command
line e1000-specific boolean parameter "mitigation", e.g.
qemu-system-x86_64 -device e1000,mitigation=on,... ...
For more information, see the Software developer's manual at
http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf.
Interrupt mitigation boosts performance when the guest suffers from
an high interrupt rate (i.e. receiving short UDP packets at high packet
rate). For some numerical results see the following link
http://info.iet.unipi.it/~luigi/papers/20130520-rizzo-vm.pdf
Signed-off-by: Vincenzo Maffione <v.maffione@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de> (for pc-* machines)
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-08-02 18:30:52 +02:00
|
|
|
#define PC_COMPAT_1_6 \
|
2016-04-09 21:26:38 +02:00
|
|
|
PC_CPU_MODEL_IDS("1.6.0") \
|
2015-11-30 15:56:37 +01:00
|
|
|
{\
|
|
|
|
.driver = "e1000",\
|
|
|
|
.property = "mitigation",\
|
|
|
|
.value = "off",\
|
|
|
|
},{\
|
|
|
|
.driver = "qemu64-" TYPE_X86_CPU,\
|
|
|
|
.property = "model",\
|
|
|
|
.value = stringify(2),\
|
|
|
|
},{\
|
|
|
|
.driver = "qemu32-" TYPE_X86_CPU,\
|
|
|
|
.property = "model",\
|
|
|
|
.value = stringify(3),\
|
|
|
|
},{\
|
|
|
|
.driver = "i440FX-pcihost",\
|
|
|
|
.property = "short_root_bus",\
|
|
|
|
.value = stringify(1),\
|
|
|
|
},{\
|
|
|
|
.driver = "q35-pcihost",\
|
|
|
|
.property = "short_root_bus",\
|
|
|
|
.value = stringify(1),\
|
|
|
|
},
|
e1000: add interrupt mitigation support
This patch partially implements the e1000 interrupt mitigation mechanisms.
Using a single QEMUTimer, it emulates the ITR register (which is the newer
mitigation register, recommended by Intel) and approximately emulates
RADV and TADV registers. TIDV and RDTR register functionalities are not
emulated (RDTR is only used to validate RADV, according to the e1000 specs).
RADV, TADV, TIDV and RDTR registers make up the older e1000 mitigation
mechanism and would need a timer each to be completely emulated. However,
a single timer has been used in order to reach a good compromise between
emulation accuracy and simplicity/efficiency.
The implemented mechanism can be enabled/disabled specifying the command
line e1000-specific boolean parameter "mitigation", e.g.
qemu-system-x86_64 -device e1000,mitigation=on,... ...
For more information, see the Software developer's manual at
http://download.intel.com/design/network/manuals/8254x_GBe_SDM.pdf.
Interrupt mitigation boosts performance when the guest suffers from
an high interrupt rate (i.e. receiving short UDP packets at high packet
rate). For some numerical results see the following link
http://info.iet.unipi.it/~luigi/papers/20130520-rizzo-vm.pdf
Signed-off-by: Vincenzo Maffione <v.maffione@gmail.com>
Reviewed-by: Andreas Färber <afaerber@suse.de> (for pc-* machines)
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2013-08-02 18:30:52 +02:00
|
|
|
|
2013-05-27 22:23:54 +02:00
|
|
|
#define PC_COMPAT_1_5 \
|
2016-04-09 21:26:38 +02:00
|
|
|
PC_CPU_MODEL_IDS("1.5.0") \
|
2015-11-30 15:56:37 +01:00
|
|
|
{\
|
|
|
|
.driver = "Conroe-" TYPE_X86_CPU,\
|
|
|
|
.property = "model",\
|
|
|
|
.value = stringify(2),\
|
|
|
|
},{\
|
|
|
|
.driver = "Conroe-" TYPE_X86_CPU,\
|
|
|
|
.property = "level",\
|
|
|
|
.value = stringify(2),\
|
|
|
|
},{\
|
|
|
|
.driver = "Penryn-" TYPE_X86_CPU,\
|
|
|
|
.property = "model",\
|
|
|
|
.value = stringify(2),\
|
|
|
|
},{\
|
|
|
|
.driver = "Penryn-" TYPE_X86_CPU,\
|
|
|
|
.property = "level",\
|
|
|
|
.value = stringify(2),\
|
|
|
|
},{\
|
|
|
|
.driver = "Nehalem-" TYPE_X86_CPU,\
|
|
|
|
.property = "model",\
|
|
|
|
.value = stringify(2),\
|
|
|
|
},{\
|
|
|
|
.driver = "Nehalem-" TYPE_X86_CPU,\
|
|
|
|
.property = "level",\
|
|
|
|
.value = stringify(2),\
|
|
|
|
},{\
|
|
|
|
.driver = "virtio-net-pci",\
|
|
|
|
.property = "any_layout",\
|
|
|
|
.value = "off",\
|
|
|
|
},{\
|
|
|
|
.driver = TYPE_X86_CPU,\
|
|
|
|
.property = "pmu",\
|
|
|
|
.value = "on",\
|
|
|
|
},{\
|
|
|
|
.driver = "i440FX-pcihost",\
|
|
|
|
.property = "short_root_bus",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},{\
|
|
|
|
.driver = "q35-pcihost",\
|
|
|
|
.property = "short_root_bus",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},
|
2013-05-27 22:23:54 +02:00
|
|
|
|
2013-02-08 14:06:15 +01:00
|
|
|
#define PC_COMPAT_1_4 \
|
2016-04-09 21:26:38 +02:00
|
|
|
PC_CPU_MODEL_IDS("1.4.0") \
|
2015-11-30 15:56:37 +01:00
|
|
|
{\
|
|
|
|
.driver = "scsi-hd",\
|
|
|
|
.property = "discard_granularity",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},{\
|
|
|
|
.driver = "scsi-cd",\
|
|
|
|
.property = "discard_granularity",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},{\
|
|
|
|
.driver = "scsi-disk",\
|
|
|
|
.property = "discard_granularity",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},{\
|
|
|
|
.driver = "ide-hd",\
|
|
|
|
.property = "discard_granularity",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},{\
|
|
|
|
.driver = "ide-cd",\
|
|
|
|
.property = "discard_granularity",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},{\
|
|
|
|
.driver = "ide-drive",\
|
|
|
|
.property = "discard_granularity",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},{\
|
|
|
|
.driver = "virtio-blk-pci",\
|
|
|
|
.property = "discard_granularity",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},{\
|
|
|
|
.driver = "virtio-serial-pci",\
|
|
|
|
.property = "vectors",\
|
|
|
|
/* DEV_NVECTORS_UNSPECIFIED as a uint32_t string */\
|
|
|
|
.value = stringify(0xFFFFFFFF),\
|
|
|
|
},{ \
|
|
|
|
.driver = "virtio-net-pci", \
|
|
|
|
.property = "ctrl_guest_offloads", \
|
|
|
|
.value = "off", \
|
|
|
|
},{\
|
|
|
|
.driver = "e1000",\
|
|
|
|
.property = "romfile",\
|
|
|
|
.value = "pxe-e1000.rom",\
|
|
|
|
},{\
|
|
|
|
.driver = "ne2k_pci",\
|
|
|
|
.property = "romfile",\
|
|
|
|
.value = "pxe-ne2k_pci.rom",\
|
|
|
|
},{\
|
|
|
|
.driver = "pcnet",\
|
|
|
|
.property = "romfile",\
|
|
|
|
.value = "pxe-pcnet.rom",\
|
|
|
|
},{\
|
|
|
|
.driver = "rtl8139",\
|
|
|
|
.property = "romfile",\
|
|
|
|
.value = "pxe-rtl8139.rom",\
|
|
|
|
},{\
|
|
|
|
.driver = "virtio-net-pci",\
|
|
|
|
.property = "romfile",\
|
|
|
|
.value = "pxe-virtio.rom",\
|
|
|
|
},{\
|
|
|
|
.driver = "486-" TYPE_X86_CPU,\
|
|
|
|
.property = "model",\
|
|
|
|
.value = stringify(0),\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "n270" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "movbe",\
|
|
|
|
.value = "off",\
|
|
|
|
},\
|
|
|
|
{\
|
|
|
|
.driver = "Westmere" "-" TYPE_X86_CPU,\
|
|
|
|
.property = "pclmulqdq",\
|
|
|
|
.value = "off",\
|
|
|
|
},
|
2013-02-08 14:06:15 +01:00
|
|
|
|
2015-05-15 19:18:55 +02:00
|
|
|
#define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
|
2015-05-15 19:18:56 +02:00
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static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
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{ \
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MachineClass *mc = MACHINE_CLASS(oc); \
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optsfn(mc); \
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mc->name = namestr; \
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mc->init = initfn; \
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} \
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static const TypeInfo pc_machine_type_##suffix = { \
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.name = namestr TYPE_MACHINE_SUFFIX, \
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.parent = TYPE_PC_MACHINE, \
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.class_init = pc_machine_##suffix##_class_init, \
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}; \
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2015-05-15 19:18:53 +02:00
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static void pc_machine_init_##suffix(void) \
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{ \
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2015-05-15 19:18:56 +02:00
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type_register(&pc_machine_type_##suffix); \
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2015-05-15 19:18:53 +02:00
|
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} \
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2016-02-16 21:59:04 +01:00
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type_init(pc_machine_init_##suffix)
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2015-05-15 19:18:53 +02:00
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2015-07-15 07:37:47 +02:00
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extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
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2007-11-17 18:14:51 +01:00
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#endif
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