Commit Graph

231 Commits

Author SHA1 Message Date
Paolo Bonzini fbe37ef3e1 build: move other target-*/ objects to nested Makefile.objs
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:21:11 +02:00
Paolo Bonzini 9cdc8df314 build: move libobj-y variable to nested Makefile.objs
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 07:19:23 +02:00
Paolo Bonzini 5e8861a036 build: move obj-TARGET-y variables to nested Makefile.objs
Also drop duplicate occurrence of device-hotplug.o.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 07:17:36 +02:00
Andreas Färber b7e516ce04 Kill off cpu_state_reset()
In commit 1bba0dc932 cpu_reset()
was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()
that would operate on QOM objects.

All callers have been updated except for one in target-mips, so drop all
implementations except for the one in target-mips and move the
declaration there until MIPSCPU reset can be fully QOM'ified.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> (for mb + cris)
Acked-by: Alexander Graf <agraf@suse.de> (for ppc)
Acked-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-04 23:00:45 +02:00
Andreas Färber 445e957194 target-sh4: Let cpu_sh4_init() return SuperHCPU
Turn cpu_init macro into a static inline function returning
CPUSH4State for backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-06-04 23:00:42 +02:00
Andreas Färber 2b4b490656 target-sh4: Start QOM'ifying CPU init
Move code from cpu_sh4_init() into a QOM initfn.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-30 11:32:10 +02:00
Andreas Färber c4bb0f99e7 target-sh4: QOM'ify CPU reset
Move code from cpu_state_reset() to QOM superh_cpu_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-30 11:32:10 +02:00
Andreas Färber 339894bec9 target-sh4: QOM'ify CPU
Embed CPUSH4State as first member of SuperHCPU.

Let CPUClass::reset() call cpu_state_reset() for now.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
2012-04-30 11:32:10 +02:00
Blue Swirl 2050396801 Use uintptr_t for various op related functions
Use uintptr_t instead of void * or unsigned long in
several op related functions, env->mem_io_pc and
GETPC() macro.

Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-14 14:23:37 +00:00
Andreas Färber 9349b4f9fd Rename CPUState -> CPUArchState
Scripted conversion:
  for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do
    sed -i "s/CPUState/CPUArchState/g" $file
  done

All occurrences of CPUArchState are expected to be replaced by QOM CPUState,
once all targets are QOM'ified and common fields have been extracted.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:27 +01:00
Andreas Färber 73e5716c89 target-sh4: Don't overuse CPUState
Scripted conversion:
  sed -i "s/CPUState/CPUSH4State/g" target-sh4/*.[hc]
  sed -i "s/#define CPUSH4State/#define CPUState/" target-sh4/cpu.h

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:25 +01:00
Andreas Färber 1bba0dc932 Rename cpu_reset() to cpu_state_reset()
Frees the identifier cpu_reset for QOM CPUs (manual rename).

Don't hide the parameter type behind explicit casts, use static
functions with strongly typed argument to indirect.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:24 +01:00
Stefan Weil 2d0b9ac6d6 target-sh4: Clean includes
Remove some include statements which are not needed.

Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-02-28 22:33:43 +01:00
Aurelien Jarno 0cdb95549f target-sh4: ignore ocbp and ocbwb instructions
ocbp and ocbwb controls the writeback of a cache line to memory. They
are supposed to do nothing in case of a cache miss. Given QEMU only
partially emulate caches, it is safe to ignore these instructions.

This fixes a kernel oops when trying to access an rtl8139 NIC with
recent versions.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-01-10 18:20:10 +01:00
Stefan Weil f840fa995f target-sh4: Fix operands for fipr, ftrv instructions
Coverity complained about right shifts of opcode (16, 18) which were
larger than the size of opcode (16 bit).

Using the correct shift values fixes this.

Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-01-07 18:16:24 +01:00
Anthony Liguori cac1e30af7 Merge remote-tracking branch 'stefanha/trivial-patches' into staging 2011-12-05 08:44:33 -06:00
Dong Xu Wang 4abf79a428 fix spelling in target sub directory
Cc: Richard Henderson <rth@twiddle.net>
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Alexander Graf <agraf@suse.de>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-12-02 10:50:57 +00:00
Benoît Canet b279e5efc0 sh_intc: convert interrupt controller to memory API
Signed-off-by: Benoit Canet <benoit.canet@gmail.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-11-24 18:32:03 +02:00
Blue Swirl bccd9ec5f0 softmmu_header: pass CPUState to tlb_fill
Pass CPUState pointer to tlb_fill() instead of architecture local
cpu_single_env hacks.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01 09:31:26 +00:00
Anthony Liguori 7267c0947d Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-20 23:01:08 -05:00
Blue Swirl 97b348e7d2 Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)
is not used in cpu_*_handle_mmu_fault() functions, remove them
and adjust callers.

Acked-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-07 09:32:01 +00:00
Blue Swirl 3e4571724f exec.h cleanup
Move softmmu_exec.h include directives from target-*/exec.h to
target-*/op_helper.c. Move also various other stuff only used in
op_helper.c there.

Define global env in dyngen-exec.h.

For i386, move wrappers for segment and FPU helpers from user-exec.c
to op_helper.c. Implement raise_exception_err_env() to handle dynamic
CPUState. Move the function declarations to cpu.h since they can be
used outside of op_helper.c context.

LM32, s390x, UniCore32: remove unused cpu_halted(), regs_to_env() and
env_to_regs().

ARM: make raise_exception() static.

Convert
#include "exec.h"
to
#include "cpu.h"
#include "dyngen-exec.h"
and remove now unused target-*/exec.h.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-30 09:41:14 +00:00
Blue Swirl 2b41f10e18 Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:35 +00:00
Blue Swirl f081c76ccf Move cpu_has_work and cpu_pc_from_tb to cpu.h
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is
needed by later patches.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:31 +00:00
Blue Swirl f3e270377a exec.h: fix coding style and change cpu_has_work to return bool
Before the next patch, fix coding style of the areas affected.

Change the type of the return value from cpu_has_work() and
qemu_cpu_has_work() to bool.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:26 +00:00
Blue Swirl 1162c041c1 cpu_loop_exit: avoid using AREG0
Make cpu_loop_exit() take a parameter for CPUState instead of relying
on global env.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:13 +00:00
Stefan Weil 618ba8e6a1 Remove unused function parameter from cpu_restore_state
The previous patch removed the need for parameter puc.
Is is now unused, so remove it.

Cc: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-20 10:37:03 +02:00
Stefan Weil e87b7cb0f0 Remove unused function parameters from gen_pc_load and rename the function
Function gen_pc_load was introduced in commit
d2856f1ad4.
The only reason for parameter searched_pc was
a debug statement in target-i386/translate.c.

Parameter puc was needed by target-sparc until
commit d7da2a1040.

Remove searched_pc from the debug statement and remove both
parameters from the parameter list of gen_pc_load.

As the function name gen_pc_load was also misleading,
it is now called restore_state_to_opc. This new name
was suggested by Peter Maydell, thanks.

v2: Remove last parameter, too, and rename the function.

v3: Fix [] typo in target-arm/translate.c.
    Fix wrong SHA1 object name in commit message (copy+paste error).

Cc: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-20 10:33:59 +02:00
Aurelien Jarno d6c424c56e target-sh4: get rid of CPU_{Float,Double}U
SH4 is always using softfloat, so it's possible to have helpers directly
taking float32 or float64 value. This allow to get rid of conversions
through CPU_{Float,Double}U.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12 21:51:50 +02:00
Stefan Weil 4b4a72e556 Fix conversions from pointer to tcg_target_long
tcg_gen_exit_tb takes a parameter of type tcg_target_long,
so the type casts of pointer to long should be replaced by
type casts of pointer to tcg_target_long (suggested by Blue Swirl).

These changes are needed for build environments where
sizeof(long) != sizeof(void *), especially for w64.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10 00:45:16 +02:00
Paolo Bonzini eda48c344f inline cpu_halted into sole caller
All implementations are now the same, and there is only one caller,
so inline the function there.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-03-13 14:44:21 +00:00
Aurelien Jarno efac415471 target-sh4: move intr_at_halt out of cpu_halted()
All targets except SH4 have the same cpu_halted() routine, and it has
only one caller. It is therefore a good candidate for inlining.

The difference is the handling of the intr_at_halt, which is necessary
to ignore SR.BL when sleeping. Move intr_at_halt handling out of it, by
setting this variable while executing the sleep instruction, and
clearing it when the CPU has been woken-up by an interrupt, whatever the
state of SR.BL. Also rename this variable in_sleep.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-03-03 23:33:22 +01:00
Aurelien Jarno 7026259f79 target-sh4: fix negc
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-02-04 20:19:33 +01:00
Alexandre Courbot e3f114f761 target-sh4: update PTEH upon MMU exception
Update the PTEH register to contain the VPN at which an MMU
exception occured as specified by the SH4 reference.

Signed-off-by: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-26 14:30:24 +01:00
Aurelien Jarno bc656a2968 sh4: implement missing mmaped TLB read functions
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-26 14:30:24 +01:00
Aurelien Jarno 9f97309a70 sh4: implement missing mmaped TLB write functions
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-26 14:30:24 +01:00
Alexandre Courbot bec43cc3b6 target-sh4: fix index of address read error exception
Exception index of address read error should be 0x0e0.

Signed-off-by: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-25 08:36:30 +01:00
Alexandre Courbot e40a67beed target-sh4: fix TLB invalidation code
In cpu_sh4_invalidate_tlb, the UTLB was invalidated twice and the
ITLB left unchaged, probably because of some unfortunate copy/paste.

Signed-off-by: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-25 08:36:29 +01:00
Aurelien Jarno b2d9eda5d4 target-sh4: implement negc using TCG
Using setcond it's now possible to generate a relatively short negc
instruction in TCG.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-16 13:19:20 +01:00
Aurelien Jarno 2411fde9a4 target-sh4: use rotl/rotr when possible
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-16 13:19:20 +01:00
Aurelien Jarno 0c16e71e6a target-sh4: correct use of ! and &
Fix wrong usage of ! and & in MMU related functions. Thanks to Blue
Swirl for reporting the issue.

Reported-by: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-15 13:50:38 +01:00
Aurelien Jarno c5c191370e target-sh4: use setcond when possible
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:18 +01:00
Aurelien Jarno be15c50d8e target-sh4: log instructions start in TCG code
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:18 +01:00
Aurelien Jarno 6f396c8f38 target-sh4: simplify comparisons after a 'and' op
When a TCG variable is anded with a value and the compared with the same
value, we can simply invert the comparison and compare it with 0. The
generated code is smaller.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:18 +01:00
Aurelien Jarno 4f6493ff8a target-sh4: fix reset on r2d
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:18 +01:00
Aurelien Jarno fd4bab102c target-sh4: optimize exceptions
As exception is not the normal path, don't bother saving PC, before
raising one, instead rely on code retranslation to get the CPU state.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:18 +01:00
Aurelien Jarno 17075f10ff target-sh4: add ftrv instruction
Add the ftrv XMTRX,FVn instruction, which computes the 4-row x 4-column
matrix XMTRX by the 4-dimensional vector FVn.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:18 +01:00
Aurelien Jarno af8c2bde4b target-sh4: add fipr instruction
Add the fipr FVm,FVn instruction, which computes the inner products of
a 4-dimensional single precision floating-point vector.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:18 +01:00
Aurelien Jarno 21829e9b39 target-sh4: implement FPU exceptions
FPU exception support where not implemented on SH4. Implement them by
clearing the softfloat exceptions flags before an FP instruction (the
SH4 FPU also clear them before an instruction), and calling a function
to update the FPSCR register after an FP instruction. This function
update the corresponding FPSCR bits (both flags and cumulative flags)
and trigger exception if enabled.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:18 +01:00
Aurelien Jarno a0d4ac333a target-sh4: implement flush-to-zero
When the FPSCR.DN bit is set, the SH4 FPU treat denormalized numbers as
zero. Enable the corresponding softfloat option when this bit is set.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:18 +01:00