00dbbb03b6
Revert "TCG: enable debug"
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This reverts commit 5166, commited by error.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5169 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-05 14:22:24 +00:00
b24a39fab0
TCG: enable debug
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5166 c046a42c-6fe2-441c-8c8c-71466251a162
2008-09-05 14:19:35 +00:00
79383c9c08
Fix some warnings that would be generated by gcc -Wredundant-decls
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-30 09:51:20 +00:00
70fa887c14
Relax qemu_ld/st constraints for !SOFTMMU case
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5038 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-21 01:14:07 +00:00
735ee40d92
Relax qemu_ld/st constraints for !SOFTMMU case
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5034 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-20 22:39:22 +00:00
109719ec9e
Avoid clobbering input/aliased registers in !SOFTMMU+64bit+bswap case
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5033 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-20 22:39:19 +00:00
0b7c1d897f
Clear the upper 32 bits of addr_reg in TARGET_LONG_BITS == 32 case
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5032 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-20 22:39:17 +00:00
a2a546b3fc
Move tcg_out_tlb_read into #ifdef CONFIG_SOFTMMU block to avoid compiler warning
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5031 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-20 22:39:14 +00:00
8fcd36920e
Fix some warnings that would be generated by gcc -Wmissing-prototypes
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5022 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 20:26:25 +00:00
6f41b7772d
Fix 64 bit constant generation
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5020 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 20:14:16 +00:00
90cbed4656
Fix 32 bit address overflow
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5019 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 16:13:02 +00:00
bffe143153
Restore AREG0 after calls
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5018 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-17 14:34:27 +00:00
56fc64dfd0
Sparc code generator update (fix qemu_ld & qemu_st)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5014 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-16 19:54:01 +00:00
53c3748794
Sparc code generator update
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5009 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-15 18:14:44 +00:00
bf6bca527c
Account for MacOS X ABI reserved space in linkage area (Andreas Faerber)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4985 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-03 19:04:11 +00:00
f9bf298717
Preliminary MacOS X on PPC32 support
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Big thanks to BlueSwirl for Sparc failure analysis.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4984 c046a42c-6fe2-441c-8c8c-71466251a162
2008-08-03 19:04:07 +00:00
52781543ad
On ppc32 make tb_set_jmp_target1 behave like it does on a ppc64
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Avoids nasty warnings about flush_icache_range from gcc4 and inability
to compile [cpu-]exec.c with gcc3 and -O, also the function is much
too large to be candidate for inlining anyway.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4974 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-29 20:08:17 +00:00
fe6f943f3b
Immediate versions of some operations
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4962 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-28 23:46:06 +00:00
000a2d866a
Do not try handle "special" arguments of and/or/xor/shl/shr, upper level does it
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4961 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-28 23:46:03 +00:00
e924bbec7a
Set the L field of CMP[L][I] when dealing with 64 bit quantities
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This (along with previous 2 commits) makes X86_64 work on ppc64 too.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4960 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-28 19:42:23 +00:00
880e52b8b0
Fix preprocessor guard condition
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4959 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-28 19:42:20 +00:00
95153fde07
Remove leftover from previous way to load 64 bit constants
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4958 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-28 19:42:17 +00:00
4a40e23194
Special-case some paths inside tcg_out_tlb_read
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a. Use 32bit arithmetics in TARGET_LONG_BITS == 32 case
b. Optimize byte access case in TARGET_LONG_BITS == 64 case
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4955 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-27 11:09:21 +00:00
301f6d903a
Fix the opcode value of LWA
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That should teach one to not blindly trust documentation that will
(out of the blue) use decimal and binary representation for numbers in
the same chart for no apparent reason and without any prefixes, sigh..
Unbreaks MIPS.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4954 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-27 10:28:15 +00:00
e97b640d47
Try to avoid glibc global register mangling, again
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4953 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 17:19:35 +00:00
c070355d39
Relax memory operations constraints
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4950 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 11:21:03 +00:00
b01d9fea6c
Fix qemu_ld64 constraint list
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4949 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 11:21:00 +00:00
e03ae7f9b3
Use proper offset for LR save slot
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4948 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 11:20:57 +00:00
5424fd1018
Reduce amount of space reserved for tb jump
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4947 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 11:20:54 +00:00
6fc9dbcc17
Fix and improve 64 bit immediate loading
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4946 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 11:20:50 +00:00
450e62e768
Fix EXTSW arguments
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4945 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-26 11:20:44 +00:00
e7d05e6f1d
Use proper value for TCG_TARGET_CALL_STACK_OFFSET
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4941 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-24 22:56:21 +00:00
a69abbe0b3
Emit and use adhoc function descriptor for code_gen_prologue on PPC64
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Thus avoiding fragile inline assembly hackery to call into generated
code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4939 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-24 17:37:09 +00:00
6926be2a59
Remove neg_i32 debugging leftover
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4935 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23 20:01:27 +00:00
e46b9681e5
Provide extNs_M instructions
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4934 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23 20:01:23 +00:00
1d58ee9f3b
Remove stray "i" from mul_i64
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4933 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23 20:01:19 +00:00
810260a8f3
Preliminary PPC64/Linux host support
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ppc64.ld from Heikki Lindholm's patch
http://marc.info/?l=qemu-devel&m=114086179024634&w=2
Issues:
x86_64 tripple faults shortly after decompressing the kernel
No immediate versions of most 64 bit operations
More...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4932 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-23 19:17:46 +00:00
d643ccca01
64 bit signed comparison fix (Juergen Lock)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4855 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-07 20:15:54 +00:00
d795eb86d7
Fix 64 bit constant generation
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4854 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-07 19:34:45 +00:00
e924c48573
Fuse EQ and NE handling in tcg_out_brcond2
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4845 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-03 23:49:14 +00:00
8c5e95d807
Mask LL portion of B to 24 bits in tcg_out_b (Thanks to Thiemo Seufer)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4841 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-03 18:51:23 +00:00
a50f5b9186
Suppress bogus compiler warnings.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4803 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29 15:25:29 +00:00
ca88500f43
According to gcc-4.3.0/gcc/config/rs6000/crtsavres.asm R13 is volatile
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4779 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-23 05:47:06 +00:00
a35e86c55f
Shuffle contents of tcg_target_reg_alloc_order
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Move reserved/volatile registers down. Currently qemu_ld/stXX are
marked with TCG_OPF_CALL_CLOBBER and since memory accesses are
frequent and R3 through R12 are volatile moving this down results in
less spills and tighter generated code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4778 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-23 05:47:03 +00:00
17ca26e791
Save LR into proper place on callers stack frame
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4745 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-18 01:58:52 +00:00
c596defdb9
Reimplement brcond2 and refactor brcond
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4738 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-12 12:33:10 +00:00
8df1ca4ba5
Allocate register pair for 64-bit registers on 32-bit host.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4730 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-11 11:03:34 +00:00
0d5bd3631f
Remove stray variable
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4725 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-10 01:47:17 +00:00
77b73de676
Use rem/div[u]_i32 drop div[u]2_i32
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4722 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09 23:44:44 +00:00
fa4fbfb98a
Emit trampolines manually in prologue
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4715 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09 19:57:36 +00:00
5d794885a2
Fix test for signed div fast path
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4714 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09 19:57:27 +00:00
398ce98e4f
Fix div[u]2.
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Previous code assummed 32 by 32 bit divmod operation, and survived
x86_64 test only by sheer luck. MIPS wasn't so forgiving.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4705 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09 06:06:25 +00:00
0a878c4760
PPC TCG Fixes
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* Fix typo in aliased div2
* "Optimize" aliased div2/divu2
* Fix two remaining branch retranslation problems
(Kudos to Andrzej Zaborowski)
* Rework goto_tb and set_jmp_target1
* Use correct size when flushing icache
* Use correct register selection for ORI
(Was harmless since in both cases srcreg was equal to dstreg)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4691 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-07 20:31:33 +00:00
c588979bfc
Allocate a register pair instead of a single register.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4688 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-07 04:31:49 +00:00
1235fc066a
Spelling fixes, by Stefan Weil.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4655 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-03 19:51:57 +00:00
932a690969
support of long calls for PPC (malc)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4629 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-30 20:56:52 +00:00
f3f478a7ef
Fix signed/unsigned issues of immediate version of brcond (malc)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4588 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-26 19:11:07 +00:00
2662e13f68
ppc TCG target (malc)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4584 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 18:59:57 +00:00
560f92cc34
jump simplification
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4583 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 18:49:06 +00:00
affa3264db
jump optimizations
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4582 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 18:41:58 +00:00
0a6b7b7813
update
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4581 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 18:24:40 +00:00
b314f2706b
suppressed unused macro handling
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4580 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 18:21:31 +00:00
641d5fbe6b
added local temporaries
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4576 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 17:24:00 +00:00
8384dd67fe
Implement byte swapping accesses
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4574 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 11:19:24 +00:00
9b7b85d260
Fix off-by-one unwinding error.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-25 00:36:06 +00:00
d0660ed482
Relax a constraint for qemu_ld64 on ARM host.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4567 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 23:12:19 +00:00
eae6ce5238
Fix a deadly typo, correct comments.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4566 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 22:56:51 +00:00
3979144c49
Fix ARM host TLB.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4564 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 20:07:07 +00:00
b101234a8e
Implement 64-bit constant loads
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4561 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 18:09:50 +00:00
26cc915cff
Use sethi and arith functions, fix comment
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4560 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 18:06:35 +00:00
77fcd0934a
Fix stack offsets and alignment
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4559 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 16:41:17 +00:00
64e3257c03
Define stack offsets
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4554 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 05:36:16 +00:00
bcb0126ff4
More TCGv type fixes.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4553 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:24:25 +00:00
cb63669a54
Fix ARM conditional branch bug.
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Add tcg_gen_brcondi.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-24 02:22:00 +00:00
91a3c1b00d
Comment non-obvious calculation. Don't clobber r3 in qemu_st64.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4548 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 18:51:15 +00:00
e936243aca
A branch insn must not overwrite the branch target before relocation.
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When a branch to label is translated it generates a reloc that is filled in
when the label is translated. However, when handling an exception and
searching for the pc we abort the translation early and we sometimes
translate the branch but not the corresponding label and so no relocation
is done. When the block is executed again the branch points to no-where.
It seems tcg/sparc/ is going to suffer from the same issue.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4547 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 18:50:44 +00:00
e8996ee012
added tcg_temp_free() and improved the handling of constants
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4544 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 17:33:39 +00:00
225b437649
Fix qemu_ld/st for mem_index > 0 on arm host.
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offsetof(CPUState, tlb_table[mem_index][0].addr_read) with mem_index > 0
was larger than max immediate offset for ldr and str (12-bit) so insert an
additional insn to add the mem_index offset.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4542 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 12:55:11 +00:00
bedba0cd07
Define TCG_TARGET_CALL_STACK_OFFSET on arm.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4541 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 12:47:22 +00:00
24bf7b3a1d
compilation fix
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4540 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 11:58:32 +00:00
a23a9ec615
profiler clean up
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4537 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-23 09:52:20 +00:00
7e4597d7ae
added debug_insn_start debug instruction
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4531 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 16:56:05 +00:00
4dc81f2822
debug output: write helper names
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4529 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 16:08:32 +00:00
39cf05d322
more generic call codegen
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4528 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 14:59:57 +00:00
cf60bce405
fixed zero shifts (64 bit case)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4527 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 14:39:25 +00:00
34151a20ea
small shift opts
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4525 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 13:25:14 +00:00
e5097dc8e3
fixed dead global variable update
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4512 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 16:24:20 +00:00
204c1674ef
Fix 8-bit signed load/store and a typo.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4504 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-20 11:28:35 +00:00
650bbb361e
Implement neg_i32, clean-up.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4503 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-20 11:26:40 +00:00
a2a64a1f2d
Remove dyngen ARM code, which did't build.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4501 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-20 00:01:55 +00:00
811d4cf4b0
ARM host support for TCG targets.
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Updated from previous version to use the tcg prologue/epilogue mechanism, may be slower than direct call.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4500 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-19 23:59:38 +00:00
c44f945a92
Better solution for the alignment problem
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4498 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-19 16:32:18 +00:00
48d38ca52b
Switch most MIPS logical and arithmetic instructions to TCG.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4496 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 22:50:49 +00:00
57e49b4074
Fix constant checks on Sparc64 host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4486 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 08:11:14 +00:00
d4929d58a1
Fix TCG alignment problems on Sparc64 host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4485 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 07:49:05 +00:00
c6e113f568
added 'pure' function attribute - fixed indirect function calls
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4469 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 12:42:15 +00:00
0b6ce4cffe
added not pseudo op - more _tl macros
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4468 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 12:40:44 +00:00
9a7f32283c
Fix qemu_ld/st branches, constification, use orcc for tst synthetic op
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4466 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 09:41:14 +00:00
f5ef6aacd4
Implement qemu_ld/st, fix brcond, handle more corner cases
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4463 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-16 20:15:58 +00:00
cf7c2ca5ff
Implement brcond, ldst with large offset; fix direct jump, prologue
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4461 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-15 19:44:09 +00:00
aurel32
blueswir1
malc
bellard
pbrook
ths
balrog