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192 Commits

Author SHA1 Message Date
Igor Kovalenko 5210977a85 sparc64: trap handling corrections 
On Sun, Jul 12, 2009 at 12:09 PM, Blue Swirl<blauwirbel@gmail.com> wrote:
> On 7/12/09, Igor Kovalenko <igor.v.kovalenko@gmail.com> wrote:
>> Good trap handling is required to process interrupts.
>>  This patch fixes the following:
>>
>>  - sparc64 has no wim register
>>  - sparc64 has no psret register, use IE bit of pstate
>>   extract IE checking code to cpu_interrupts_enabled
>>  - alternate globals are not available if cpu has GL feature
>>   in this case bit AG of pstate is constant zero
>>  - write to pstate must actually write pstate
>>   even if cpu has GL feature
>>
>>  Also timer interrupt is handled using do_interrupt.
>
> A bit too much for one patch. Please also remove the code instead of
> commenting out.

I now excluded timer interrupt related part.
To my mind other changes are essentially tied together.

> PUT_PSR for Sparc64 needs CC_OP = CC_OP_FLAGS; like Sparc32.

Fixed, please find attached the updated version.

--
Kind regards,
Igor V. Kovalenko
 2009-07-12 08:46:54 +00:00
Igor Kovalenko 5b0f0bec71 sparc64: fix helper_st_asi little endian case typo 
On Sun, Jul 12, 2009 at 12:43 AM, Stuart Brady<sdbrady@ntlworld.com> wrote:
> On Sat, Jul 11, 2009 at 10:22:18PM +0400, Igor Kovalenko wrote:
>> It is clear that intention is to byte-swap value to be written, not
>> the target address.
>
> @@ -1949,13 +1949,13 @@ void helper_st_asi(target_ulong addr, ta
>     case 0x89: // Secondary LE
>         switch(size) {
>         case 2:
> -            addr = bswap16(addr);
> +            addr = bswap16(val);
>             ^^^^
> Shouldn't that be 'val = bswap16(val)' (and likewise for the 32-bit and
> 64-bit cases)?  Also needs a 'signed-off-by:'...
>
> Cheers,
> --
> Stuart Brady
>

Thanks, that part I did not runtime-tested.
Not sure if those asi stores are of any use for user-mode emulator.

Please find attached the corrected version.

Signed-off-by: igor.v.kovalenko@gmail.com

--
Kind regards,
Igor V. Kovalenko
 2009-07-12 07:44:11 +00:00
Blue Swirl 001faf3269 Replace gcc variadic macro extension with C99 version 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-05-13 17:53:17 +00:00
Blue Swirl 6c78ea32e1 Convert udiv/sdiv 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-05-10 07:42:54 +00:00
Blue Swirl 3b2d1e9286 Convert tagged ops 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-05-10 10:38:35 +03:00
Blue Swirl 2ca1d92b07 Convert subx 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-05-10 10:38:34 +03:00
Blue Swirl d4b0d46898 Convert sub 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-05-10 10:38:34 +03:00
Blue Swirl 38482a77f0 Convert logical operations and umul/smul 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-05-10 10:38:34 +03:00
Blue Swirl 789c91ef39 Convert addx 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-05-10 07:19:22 +00:00
Blue Swirl bdf9f35dad Convert add 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-05-10 07:19:17 +00:00
Blue Swirl 8393617c1a Use dynamical computation for condition codes 
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
 2009-05-10 07:19:11 +00:00
Blue Swirl 9c22a62396 Fix a warning in sparc64-linux-user build 2009-04-25 16:28:27 +00:00
Igor Kovalenko 697a77e6e7 sparc64 support TSB related MMU registers 
Posting updated patch to the list...

>>> On Fri, Apr 24, 2009 at 9:42 PM, Blue Swirl <blauwirbel@gmail.com> wrote:
>>>  >
>>>  > Nice, though I didn't notice any visible improvement in my tests.
>>>
>>> This early in boot process there is not much to output; and I test
>>>  recent kernel which may use different startup sequence.
>>>  I modified openbios cif handler to output arguments and I now can see
>>>  visible difference.
>>>
>>>
>>>  >
>>>  > About the patch, there are a few problems:
>>>  > - it breaks Sparc32
>>>
>>> You mean it stops working?
>>
>> Does not even build.

Fixed now.

>>>  > - commented out code is ugly
>>>  > - if and else should be on the same line as '{' or '}'
>>>  > - long lines should be wrapped
>>>  > - in the line:
>>>  > +    return (((tag_access_register & 0x1fff)<<48)|(tag_access_register >> 22));
>>>  >  there should be white space between ) and << and 48.
>>>  >
>>>

>>
>> Also the ")|(" in between is crowded.
>>
>> Maybe the coding style does not describe this well enough.

BTW Supplying indent template would be great.

Please see the updated patch qemu-sparc64-tsb-asi-2.patch attached.

--
Kind regards,
Igor V. Kovalenko
 2009-04-25 18:17:19 +03:00
blueswir1 d78f399542 Delete some unused macros detected with -Wp,-Wunused-macros use 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6856 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-03-16 16:33:01 +00:00
aliguori 8fec2b8c45 global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost) 
These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-15 22:36:53 +00:00
aliguori 93fcfe39a0 Convert references to logfile/loglevel to use qemu_log*() macros 
This is a large patch that changes all occurrences of logfile/loglevel
global variables to use the new qemu_log*() macros.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
 2009-01-15 22:34:14 +00:00
blueswir1 4017190e2d Add SuperSPARC MMU breakpoint registers (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6125 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-23 15:30:50 +00:00
blueswir1 f4a5a5ba92 Add missing "static" 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5977 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-12-11 17:29:00 +00:00
pbrook a7812ae412 TCG variable type checking. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-17 14:43:54 +00:00
blueswir1 c55bda30f6 Fix error in fexpand (spotted by sparse) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5438 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-07 18:54:35 +00:00
blueswir1 e18231a3ff Show size for unassigned accesses (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-06 18:46:28 +00:00
blueswir1 f4b1a842d7 Rearrange tick functions 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5408 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-03 19:04:42 +00:00
blueswir1 9827e450e4 Fix MXCC printf warning (based on patch by Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5393 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-02 18:06:50 +00:00
blueswir1 cc6747f4c9 Add mmu tlb demap support (Igor Kovalenko) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5332 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-27 19:43:18 +00:00
blueswir1 c99657d303 Implement some UA2007 block ASIs 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5328 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-26 18:07:24 +00:00
blueswir1 b158a785d2 Implement UA2005 hypervisor traps 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5327 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-26 18:05:23 +00:00
blueswir1 d81fd7220e Move also DEBUG_PCALL (see r5085) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5326 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-26 18:02:48 +00:00
blueswir1 9d92659858 Add software and timer interrupt support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5299 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-22 19:50:28 +00:00
blueswir1 1121f87961 Fix arguments used in cas/casx, thanks to Igor Kovalenko for spotting 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5296 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-22 16:52:28 +00:00
blueswir1 a7ec422912 Use the new concat_i32_i64 op for std and stda 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5281 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-21 14:49:09 +00:00
blueswir1 9f4576f08b Fix array subscript above array bounds error 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5219 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-14 19:16:21 +00:00
blueswir1 d84763bc17 Convert rest of ops using float32 to TCG, remove FT0 and FT1 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5193 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-10 20:09:22 +00:00
blueswir1 c5d04e99f3 Partially convert float128 conversion ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5192 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-10 20:00:18 +00:00
blueswir1 e2ea21b396 Convert basic 64 bit VIS ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5191 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-10 19:57:35 +00:00
blueswir1 1d01299d29 Convert basic 32 bit VIS ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5190 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-10 19:57:13 +00:00
blueswir1 714547bbc7 Convert basic float32 ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5189 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-10 19:54:51 +00:00
blueswir1 3a3b925d47 Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5185 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-09 19:02:49 +00:00
blueswir1 e83ce55068 Implement no-fault loads 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5148 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-03 17:32:10 +00:00
blueswir1 91736d378b Fix Sparc64 boot on i386 host: 
- move do_interrupt() back to op_helper.c
 - move non-helper prototypes from helper.h to exec.h
 - move some prototypes from cpu.h to exec.h
 - do not export either set_cwp() or cpu_set_cwp() from op_helper.c,
   but instead provide inline functions


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5109 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-29 20:50:21 +00:00
blueswir1 7621a90da8 Fix udiv and sdiv on Sparc64 (Vince Weaver) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5085 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-25 19:43:53 +00:00
blueswir1 5578ceab94 Use initial CPU definition structure for some CPU fields instead of copying 
them around, based on patch by Luis Pureza.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5042 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-21 17:33:42 +00:00
blueswir1 06057e6f6c Fix faligndata (Vince Weaver) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4992 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-06 19:50:16 +00:00
blueswir1 43e9e742b9 Fix I/D MMU tag reads 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4991 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-06 18:16:08 +00:00
blueswir1 c19148bd8f Make MAXTL dynamic, bounds check tl when indexing 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4942 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-25 07:42:14 +00:00
blueswir1 fb79ceb91a Make UA200x features selectable, add MMU types 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4911 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-20 18:22:16 +00:00
blueswir1 7f626233a0 Remove unused variable 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4908 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-19 18:35:29 +00:00
blueswir1 db166940e2 Implement nucleus quad ldda 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4902 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-19 13:25:28 +00:00
blueswir1 e6bf7d70b5 Fix saving and loading of trap state 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4883 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-17 19:17:19 +00:00
blueswir1 2cade6a3f6 Support for address masking 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4882 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-17 12:53:05 +00:00
blueswir1 a5a52cf246 Fix MMU registers, add more E-cache ASIs 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4881 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-16 16:58:49 +00:00
blueswir1 f7350b47da Implement some Ultrasparc cache ASIs used by SILO 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4858 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-08 15:51:32 +00:00
blueswir1 9fac3a3a7e Fix boot problem on i386 host introduced in r4690 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4758 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-20 15:06:42 +00:00
blueswir1 1a14026e11 Allow NWINDOWS selection (CPU feature with model specific defaults) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4690 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-07 08:07:37 +00:00
blueswir1 75d0187a52 Remove unused (for now) reg_REGWPTR (original patch by Glauber Costa) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4617 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-29 16:38:41 +00:00
blueswir1 f2bc7e7fa1 Move non-op functions from op_helper.c to helper.c and vice versa. 
Rearrange interrupt handling to match other targets.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4590 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-27 17:35:30 +00:00
pbrook 9b7b85d260 Fix off-by-one unwinding error. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-25 00:36:06 +00:00
blueswir1 a4e7dd5267 Remove currently unnecessary alignment masking 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4505 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-20 19:36:22 +00:00
blueswir1 77f193daa8 Wrap long lines 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4440 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-12 16:13:33 +00:00
blueswir1 c2bc0e3880 Remove someexplicit alignment checks (initial patch by Fabrice Bellard) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4431 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-11 19:24:10 +00:00
bellard 7c60cc4bca suppressed fixed registers 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4408 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-10 10:58:20 +00:00
blueswir1 22548760ca Fix compiler warnings 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-10 10:12:00 +00:00
blueswir1 64a88d5d3a CPU feature selection support 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4399 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-09 20:13:43 +00:00
blueswir1 0828b4485a Move #include to speed up compilation 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4398 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-09 20:12:09 +00:00
blueswir1 7fa76c0bf3 Complete the TCG conversion 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4323 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-04 11:58:45 +00:00
blueswir1 4e14008f3a Revert the previous patch 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4236 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-22 19:05:18 +00:00
blueswir1 25bc827cf2 Move 128-bit float emulation under linux-user 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4234 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-22 16:42:40 +00:00
blueswir1 2b29924f8c Convert align checks to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4097 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-21 18:08:59 +00:00
blueswir1 72a9747b79 Convert save, restore, saved, restored, and flushw to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4092 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-21 17:57:29 +00:00
blueswir1 44e7757c2a Convert other float and VIS ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4091 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-21 17:56:02 +00:00
blueswir1 3b89f26c11 Convert udiv and sdiv ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4088 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-18 18:10:42 +00:00
blueswir1 d35527d9f9 Convert CCR and CWP ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4086 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-18 18:08:25 +00:00
blueswir1 1f5063fb97 Convert array8/16/32 and alignaddr to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4085 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-18 18:06:54 +00:00
blueswir1 bb5529bb62 Convert ldfsr and stfsr to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4067 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-15 18:11:06 +00:00
blueswir1 375ee38b4b Convert Sparc64 trap state ops to TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4018 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-05 17:59:48 +00:00
blueswir1 7e8c2b6ca8 Convert float helpers to TCG, fix fabsq in the process 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4014 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-04 20:00:18 +00:00
blueswir1 1a2fb1c009 Modify Sparc32/64 to use TCG 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3989 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-24 14:10:06 +00:00
blueswir1 3deaeab717 Sparc32 MMU register fixes (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3979 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-11 18:27:33 +00:00
blueswir1 045380be94 More ASIs 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3882 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-01-01 17:07:39 +00:00
blueswir1 0b09be2b2f Nicer debug output for exceptions 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3878 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-30 17:13:01 +00:00
blueswir1 7d85892b9b Initial support for Sun4d machines (SS-1000, SS-2000) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3869 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-28 20:57:43 +00:00
blueswir1 8543e2cfce Improved ASI debugging (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3868 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-28 18:50:23 +00:00
blueswir1 666c87aa3b Add ASIs (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3801 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-10 19:58:20 +00:00
blueswir1 9c2b428ee1 Fix compilation and warnings on PPC host 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3746 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-28 18:08:28 +00:00
blueswir1 1f58732916 128-bit float support for user mode 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-25 18:40:20 +00:00
blueswir1 3dd9a152e1 More MMU registers (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3738 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-25 12:43:10 +00:00
blueswir1 d07b4d0ea7 Fix MXCC register 64 bit read word order (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3709 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-19 19:14:10 +00:00
pbrook 87ecb68bdf Break up vl.h. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-17 17:14:51 +00:00
blueswir1 2761992d13 Remove unnecessary register masking (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3663 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-17 08:21:43 +00:00
blueswir1 bbf7d96b45 Fix MXCC error register (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3662 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-17 08:19:57 +00:00
blueswir1 295db11371 Add MXCC module reset register (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3661 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-17 08:18:59 +00:00
bellard bd37ec2141 removed warning 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3616 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-11 19:50:22 +00:00
blueswir1 6d5f237a59 CPU specific boot mode (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-07 17:03:37 +00:00
ths 273af66025 Adjust s390 addresses (the MSB is defined as "to be ignored"). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 14:39:49 +00:00
blueswir1 eed152bba5 Use shared ctpop64 helper 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3468 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-28 14:35:04 +00:00
blueswir1 20b749f607 Avoid gcc warnings 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3412 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 07:09:08 +00:00
blueswir1 1e64e78d0c Fix compiling Sparc64 on PPC host 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3411 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 07:07:47 +00:00
blueswir1 e909ec2f11 Use ldq and stq for 8 byte accesses (original patch by Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3405 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-17 17:37:13 +00:00
blueswir1 94ced07534 Fix bug in Sparc32 sta op (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3399 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 20:27:00 +00:00
blueswir1 6f27aba62e Sparc64 hypervisor mode 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3398 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 17:07:21 +00:00
blueswir1 952a328ff5 SuperSparc MXCC support (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3397 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 16:29:21 +00:00