Commit Graph

1033 Commits

Author SHA1 Message Date
Vitaly Chipounov 7162ab21fe x86: Fixed incorrect segment base address addition in 64-bits mode
According to the Intel manual
"Intel® 64 and IA-32 Architectures Software Developer’s Manual
Volume 3", "3.4.4 Segment Loading Instructions in IA-32e Mode":

"When in compatibility mode, FS and GS overrides operate as defined by
32-bit mode behavior regardless of the value loaded into the upper 32
linear-address bits of the hidden descriptor register base field.
Compatibility mode ignores the upper 32 bits when calculating an effective address."

However, the code misses the 64-bit mode case, where an instruction with
address and segment size override would be translated incorrectly. For example,
inc dword ptr gs:260h[ebx*4] gets incorrectly translated to:

(uint32_t)(gs.base + ebx * 4 + 0x260)
instead of
gs.base + (uint32_t)(ebx * 4 + 0x260)

Signed-off-by: Vitaly Chipounov <vitaly.chipounov@epfl.ch>
Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-29 08:45:57 +00:00
Mao, Junjie 434acb817b Recognize PCID feature
This patch makes Qemu recognize the PCID feature specified from configuration or command line options.

Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-07-21 10:54:40 +01:00
Anthony Liguori 09f06a6c60 Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
* qemu-kvm/uq/master:
  virtio: move common irqfd handling out of virtio-pci
  virtio: move common ioeventfd handling out of virtio-pci
  event_notifier: add event_notifier_set_handler
  memory: pass EventNotifier, not eventfd
  ivshmem: wrap ivshmem_del_eventfd loops with transaction
  ivshmem: use EventNotifier and memory API
  event_notifier: add event_notifier_init_fd
  event_notifier: remove event_notifier_test
  event_notifier: add event_notifier_set
  apic: Defer interrupt updates to VCPU thread
  apic: Reevaluate pending interrupts on LVT_LINT0 changes
  apic: Resolve potential endless loop around apic_update_irq
  kvm: expose tsc deadline timer feature to guest
  kvm_pv_eoi: add flag support
  kvm: Don't abort on kvm_irqchip_add_msi_route()
2012-07-18 14:44:43 -05:00
Jan Kiszka 5d62c43a17 apic: Defer interrupt updates to VCPU thread
KVM performs TPR raising asynchronously to QEMU, specifically outside
QEMU's global lock. When an interrupt is injected into the APIC and TPR
is checked to decide if this can be delivered, a stale TPR value may be
used, causing spurious interrupts in the end.

Fix this by deferring apic_update_irq to the context of the target VCPU.
We introduce a new interrupt flag for this, CPU_INTERRUPT_POLL. When it
is set, the VCPU calls apic_poll_irq before checking for further pending
interrupts. To avoid special-casing KVM, we also implement this logic
for TCG mode.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-07-10 11:31:09 +03:00
Peter Maydell bedc2ac1a7 target-i386: make it clearer that op table accesses don't overrun
Rephrase some of the expressions used to select an entry
in the SSE op table arrays so that it's clearer that they
don't overrun the op table array size.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-07 09:06:15 +00:00
Peter Maydell 96d7073fb0 target-i386: Remove confusing X86_64_DEF macro
The X86_64_DEF macro is a confusing way of making some terms
in a conditional only appear if TARGET_X86_64 is defined. We
only use it in two places, and in both cases this is for making
the same test, so abstract that check out into a function
where we can use a more conventional #ifdef.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-07 09:05:54 +00:00
Peter Maydell a87dacc89a target-i386: Remove unused macros
Commit 11f8cdb removed all the uses of the X86_64_ONLY
macro. The BUGGY_64() macro has been unused for a long time:
it originally marked some ops which couldn't be enabled
because of issues with the pre-TCG code generation scheme.
Remove the now-unnecessary definitions of both macros.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-07 09:05:45 +00:00
Stefan Weil 11f8cdbc64 target-i386: Fix compilation with --enable-debug
commit c4baa0503d improved SSE table
type safety which now raises compiler errors when latest QEMU was
configured with --enable-debug.

Fix this by splitting the SSE tables even further to separate
helper functions with different signatures.

Instead of crashing by calling address 0, the code now jumps to
label illegal_op.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-07-05 18:55:57 +00:00
Liu, Jinsong a75b3e0f64 kvm: expose tsc deadline timer feature to guest
This patch exposes tsc deadline timer feature to guest if
1). in-kernel irqchip is used, and
2). kvm has emulated tsc deadline timer, and
3). user authorize the feature exposing via -cpu or +/- tsc-deadline

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-07-03 17:36:32 -03:00
Michael S. Tsirkin bfee7546df kvm_pv_eoi: add flag support
Support the new PV EOI flag in kvm - it recently got merged
into kvm.git. Set by default with -cpu kvm.
Set for -cpu qemu by adding +kvm_pv_eoi.
Clear by adding -kvm_pv_eoi to -cpu option.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-07-03 16:57:20 -03:00
Blue Swirl 9cc85c281b x86: rename op_helper.c to seg_helper.c
Rename what is remaining of op_helper.c to seg_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:09 +00:00
Blue Swirl 10774999ca x86: split off memory access helpers
Move memory access helpers to mem_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:09 +00:00
Blue Swirl f7b2429f52 x86: split off misc helpers
Move various functions to misc_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:09 +00:00
Blue Swirl ab109e5947 x86: split off SMM helpers
Move SMM helpers to smm_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:09 +00:00
Blue Swirl 6bada5e80e x86: split off SVM helpers
Move SVM helpers to svm_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:09 +00:00
Blue Swirl d758207801 x86: split off integer helpers
Move integer and bit field helpers to int_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl 5918fffb1d x86: split off condition code helpers
Move condition code helpers to cc_helper.c.

Move the shared inline functions lshift(), cpu_load_eflags() and
cpu_cc_compute_all() to cpu.h.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl 997ff0d9a9 x86: prepare eflags helpers for general use
Adjust function names and add an explicit CPUX86State
parameter instead of relying on AREG0.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl 38de4c46f2 x86: split condition code and shift templates
Move shift templates from helper_template.h to
shift_helper_template.h and the condition code helpers
to cc_helper_template.h.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl a04759f6ae x86: fix coding style in helper_template.h
Fix coding style in helper_template.h before next commit.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl c4baa0503d x86: improve SSE table type safety
SSE function tables could easily be corrupted because of use
of void pointers.

Introduce function pointer types and helper variables in order
to improve type safety.

Split sse_op_table3 according to types used.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl f299f4374a x86: split off FPU helpers
Move FPU and MMX/SSE helpers to fpu_helpers.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl e01d9d31d9 x86: fix coding style in ops_sse.h
Fix coding style in ops_sse.h before next commit.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl 9dd69d65aa x86: avoid an extern declaration
After the previous patch, we can use the proper
declaration in a common header file.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl 599b9a5a51 x86: split off exception handlers
Move exception handlers from op_helper.c to excp_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl 77b2bc2c09 x86: avoid AREG0 for exceptions
Add an explicit CPUX86State parameter instead of relying on AREG0.

Merge raise_exception_env() to raise_exception(), likewise with
raise_exception_err_env() and raise_exception_err().

Introduce cpu_svm_check_intercept_param() and cpu_vmexit()
as wrappers.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Blue Swirl 20054ef03e x86: prepare op_helper.c for splitting
Fix coding style and a few typos.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-28 20:28:08 +00:00
Igor Mammedov d65e9815b1 target-i386: move tcg initialization into x86_cpu_initfn()
In order to make cpu object not depended on external ad-hoc
initialization routines, move tcg initialization from cpu_x86_init
inside cpu object "x86_cpu_initfn()".

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
2012-06-25 15:40:03 +02:00
Igor Mammedov 130a038550 target-i386: drop usage of prev_debug_excp_handler
Chains of exception handlers are currently unused feature, drop it
for now so as not to expose prev_debug_excp_handler at global
scope when moving tcg initialization into target-i386/cpu.c

Later we probably could re-invent better interface for this.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
2012-06-25 15:34:02 +02:00
Stefan Weil 09faecf257 target-i386: Use QEMU instead of Qemu
This new 'QEmu' was recently added.
Replace it by the official all upper case 'QEMU'.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-06-22 10:34:21 +01:00
Blue Swirl 71547a3bf3 qemu-log: use LOG_UNIMP for some target CPU cases
Use LOG_UNIMP for some target CPU cases.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Acked-by: Alexander Graf <agraf@suse.de>
2012-06-21 18:45:22 +00:00
Crístian Viana 93bfef4c6e Allow machines to configure the QEMU_VERSION that's exposed via hardware
QEMU exposes its version to the guest's hardware and in some cases that is wrong
(e.g. Windows prints messages about driver updates when you switch
the QEMU version).
There is a new field now on the struct QEmuMachine, hw_version, which may
contain the version that the specific machine should report. If that field is
set, then that machine will report that version to the guest.

Signed-off-by: Crístian Viana <vianac@linux.vnet.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-06-19 13:36:56 -05:00
Stefan Weil fc0608ac14 Fix some more license versions (GPL2+ instead of GPL2)
Signed-off-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
2012-06-11 22:20:21 +02:00
Andreas Färber fa0298872e target-i386: Use uint32 visitor for [x]level properties
This simplifies the code and resolves TODOs.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-06-08 16:11:14 +02:00
Paolo Bonzini fbe37ef3e1 build: move other target-*/ objects to nested Makefile.objs
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:21:11 +02:00
Paolo Bonzini 5f86146fb3 dump: remove dumping stuff from cpu-all.h
This simplifies things, because they will only be included for softmmu
targets and because the stubs are taken out-of-line in separate files,
which in the future could even be compiled only once.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:20:17 +02:00
Paolo Bonzini 4720bd0506 dump: change cpu_get_note_size to return ssize_t
So that it can use the same prototype in both cases.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 09:19:31 +02:00
Paolo Bonzini 9cdc8df314 build: move libobj-y variable to nested Makefile.objs
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 07:19:23 +02:00
Paolo Bonzini 5e8861a036 build: move obj-TARGET-y variables to nested Makefile.objs
Also drop duplicate occurrence of device-hotplug.o.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-06-07 07:17:36 +02:00
Anthony Liguori 349417004a Merge remote-tracking branch 'qmp/queue/qmp' into staging
* qmp/queue/qmp: (29 commits)
  Add 'query-events' command to QMP to query async events
  qapi: convert netdev_del
  qapi: convert netdev_add
  net: net_client_init(): use error_set()
  net: purge the monitor object from all init functions
  qemu-config: introduce qemu_find_opts_err()
  qemu-config: find_list(): use error_set()
  qerror: introduce QERR_INVALID_OPTION_GROUP
  qemu-option: qemu_opts_from_qdict(): use error_set()
  qemu-option: introduce qemu_opt_set_err()
  qemu-option: opt_set(): use error_set()
  qemu-option: qemu_opts_validate(): use error_set()
  qemu-option: qemu_opt_parse(): use error_set()
  qemu-option: parse_option_size(): use error_set()
  qemu-option: parse_option_bool(): use error_set()
  qemu-option: parse_option_number(): use error_set()
  qemu-option: qemu_opts_create(): use error_set()
  introduce a new monitor command 'dump-guest-memory' to dump guest's memory
  make gdb_id() generally avialable and rename it to cpu_index()
  target-i386: Add API to get note's size
  ...
2012-06-06 20:57:56 +08:00
Andreas Färber b7e516ce04 Kill off cpu_state_reset()
In commit 1bba0dc932 cpu_reset()
was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()
that would operate on QOM objects.

All callers have been updated except for one in target-mips, so drop all
implementations except for the one in target-mips and move the
declaration there until MIPSCPU reset can be fully QOM'ified.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael Walle <michael@walle.cc> (for lm32)
Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> (for mb + cris)
Acked-by: Alexander Graf <agraf@suse.de> (for ppc)
Acked-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-04 23:00:45 +02:00
Andreas Färber b47ed9969f target-i386: Let cpu_x86_init() return X86CPU
Turn cpu_init macro into a static inline function returning CPUX86State
for backwards compatibility.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-06-04 23:00:42 +02:00
Andreas Färber 232fc23bed target-i386: Pass X86CPU to do_cpu_{init,sipi}()
Allows to use cpu_reset() in place of cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-06-04 23:00:42 +02:00
Wen Congyang 0038ffb096 target-i386: Add API to get note's size
We should know where the note and memory is stored before writing
them to vmcore. If we know this, we can avoid using lseek() when
creating vmcore.

Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2012-06-04 13:49:34 -03:00
Wen Congyang 25ae9c1d8b target-i386: add API to get dump info
Dump info contains: endian, class and architecture. The next
patch will use these information to create vmcore. Note: on
x86 box, the  class is ELFCLASS64 if the memory is larger than 4G.

Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2012-06-04 13:49:34 -03:00
Wen Congyang 90166b71c4 target-i386: Add API to write cpu status to core file
The core file has register's value. But it does not include all registers value.
Store the cpu status into QEMU note, and the user can get more information
from vmcore. If you change QEMUCPUState, please count up QEMUCPUSTATE_VERSION.

Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2012-06-04 13:49:34 -03:00
Wen Congyang 9fecbed0c0 target-i386: Add API to write elf notes to core file
The core file contains register's value. These APIs write registers to
core file, and them will be called in the following patch.

Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2012-06-04 13:49:34 -03:00
Wen Congyang 31a2207a8e Add API to check whether paging mode is enabled
This API will be used in the following patch.

Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2012-06-04 13:49:33 -03:00
Wen Congyang fae001f551 implement cpu_get_memory_mapping()
Walk cpu's page table and collect all virtual address and physical address mapping.
Then, add these mapping into memory mapping list. If the guest does not use paging,
it will do nothing. Note: the I/O memory will be skipped.

Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2012-06-04 13:49:33 -03:00
Eduardo Habkost 1352672860 Expose CPUID leaf 7 only for -cpu host
Changes v2 -> v3;
  - Check for kvm_enabled() before setting cpuid_7_0_ebx_features

Changes v1 -> v2:
  - Use kvm_arch_get_supported_cpuid() instead of host_cpuid() on
    cpu_x86_fill_host().

  We should use GET_SUPPORTED_CPUID for all bits on "-cpu host"
  eventually, but I am not changing all the other CPUID leaves because
  we may not be able to test such an intrusive change in time for 1.1.

Description of the bug:

Since QEMU 0.15, the CPUID information on CPUID[EAX=7,ECX=0] is being
returned unfiltered to the guest, directly from the GET_SUPPORTED_CPUID
return value.

The problem is that this makes the resulting CPU feature flags
unpredictable and dependent on the host CPU and kernel version. This
breaks live-migration badly if migrating from a host CPU that supports
some features on that CPUID leaf (running a recent kernel) to a kernel
or host CPU that doesn't support it.

Migration also is incorrect (the virtual CPU changes under the guest's
feet) if you migrate in the opposite direction (from an old CPU/kernel
to a new CPU/kernel), but with less serious consequences (guests
normally query CPUID information only once on boot).

Fortunately, the bug affects only users using cpudefs with level >= 7.

The right behavior should be to explicitly enable those features on
[cpudef] config sections or on the "-cpu" command-line arguments. Right
now there is no predefined CPU model on QEMU that has those features:
the latest Intel model we have is Sandy Bridge.

I would like to get this fixed on 1.1, so I am submitting this patch,
that enables those features only if "-cpu host" is being used (as we
don't have any pre-defined CPU model that actually have those features).
After 1.1 is released, we can make those features properly configurable
on [cpudef] and -cpu configuration.

One problem is: with this patch, users with the following setup:
- Running QEMU 1.0;
- Using a cpudef having level >= 7;
- Running a kernel that supports the features on CPUID leaf 7; and
- Running on a CPU that supports some features on CPUID leaf 7
won't be able to live-migrate to QEMU 1.1. But for these users
live-migration is already broken (they can't live-migrate to hosts with
older CPUs or older kernels, already), I don't see how to avoid this
problem.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-05-30 10:28:44 +08:00
Andreas Färber 7a05995361 target-i386: Defer MCE init
Commit de024815e3 (target-i386: QOM'ify
CPU init) moved mce_init() call from helper.c:cpu_x86_init() into
X86CPU's cpu.c:x86_cpu_initfn().
mce_init() checks for a family >= 6 though, so we could end up with a
sequence such as for -cpu somecpu,family=6:

  x86_cpu_initfn => X86CPU::family == 5
    mce_init => no-op
  cpu_x86_register => X86CPU::family = 6
  => MCE unexpectedly not init'ed

or for -cpu someothercpu,family=5:

  x86_cpu_initfn => X86CPU::family == 6
    mce_init => init'ed
  cpu_x86_register => X86CPU::family = 5
  => MCE unexpectedly init'ed

Therefore partially revert the above commit. To avoid moving
mce_init() back into helper.c, foresightedly move it into a
new x86_cpu_realize() function and, in lack of ObjectClass::realize,
call it directly from cpu_x86_init().

While at it, move the qemu_init_vcpu() call that used to follow
mce_init() in cpu_x86_init() into the new realizefn as well.

Reported-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-05-12 14:17:52 +02:00
Andreas Färber 89e4896560 target-i386: Introduce "tsc-frequency" property for X86CPU
Use Hz as unit.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25 10:51:36 +02:00
Andreas Färber d480e1aff2 target-i386: Prepare "vendor" property for X86CPU
Using it now would incur converting the three x86_def_t vendor words
into a string for object_property_set_str(), then back to three words
in the "vendor" setter.
The built-in CPU definitions use numeric preprocessor defines to
initialize the three words in a charset-safe way, so do not change the
fields to char[12] just to use the setter.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25 10:51:36 +02:00
Andreas Färber 16b93aa89d target-i386: Introduce "xlevel" property for X86CPU
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25 10:51:36 +02:00
Andreas Färber 8e1898bf94 target-i386: Introduce "level" property for X86CPU
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25 10:51:35 +02:00
Andreas Färber 63e886ebef target-i386: Add property getter for CPU model-id
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25 10:51:35 +02:00
Andreas Färber 35112e415a target-i386: Add property getter for CPU stepping
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25 10:51:35 +02:00
Andreas Färber 67e30c8349 target-i386: Add property getter for CPU model
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-04-25 10:51:35 +02:00
Andreas Färber 95b8519d16 target-i386: Add property getter for CPU family
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25 10:51:35 +02:00
Andreas Färber 938d4c2521 target-i386: Add "model-id" property to X86CPU
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25 10:51:35 +02:00
Andreas Färber 036e2222ca target-i386: Add "stepping" property to X86CPU
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25 10:51:35 +02:00
Andreas Färber c5291a4f2d target-i386: Add "model" property to X86CPU
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25 10:51:35 +02:00
Andreas Färber 71ad61d37e target-i386: Add "family" property to X86CPU
Add the property early in the initfn so that it can be used in helpers
such as mce_init().

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
[AF: Add an error_free(), spotted by Michael Roth]
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25 10:51:35 +02:00
Andreas Färber a88a677f54 target-i386: Add range check for -cpu ,family=x
A family field value of 0xf and extended family field value of 0xff is
the maximum representable unsigned family number.
All other CPUID property values are bounds-checked, so add a check here
for symmetry before we adopt it in a property setter.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25 10:51:35 +02:00
Andreas Färber 61dcd77578 target-i386: Pass X86CPU to cpu_x86_register()
Avoids an x86_env_get_cpu() call there, to work with QOM properties.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2012-04-25 10:51:35 +02:00
Andreas Färber d0a6acf456 target-i386: Fix x86_cpuid_set_model_id()
Don't assume zeroed cpuid_model[] fields.

This didn't break anything yet but QOM properties should be able to set
the value to something else without setting an intermediate zero string.

Reviewed-by: Eduardo Habhost <ehabkost@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
[AF: Use memset() instead of for loop, suggested by Igor]
Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-25 10:45:46 +02:00
Blue Swirl 2050396801 Use uintptr_t for various op related functions
Use uintptr_t instead of void * or unsigned long in
several op related functions, env->mem_io_pc and
GETPC() macro.

Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-14 14:23:37 +00:00
Andreas Färber c1958aea51 target-i386: QOM'ify CPU reset
Move code from cpu_state_reset() into QOM x86_cpu_reset(),
fixing style issues for FPU init.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-10 17:10:27 +02:00
Andreas Färber de024815e3 target-i386: QOM'ify CPU init
Move code from cpu_x86_init() to new QOM x86_cpu_initfn().
Also move mce_init() to cpu.c since it's used nowhere else.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-10 17:10:27 +02:00
Andreas Färber 5fd2087a1b target-i386: QOM'ify CPU
Embed CPUX86State as first member of X86CPU.
Distinguish between "x86_64-cpu" and "i386-cpu".
Drop cpu_x86_close() in favor of calling object_delete() directly.

For now let CPUClass::reset() call cpu_state_reset().

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-10 17:10:27 +02:00
Andreas Färber 30471bc94e target-i386: Rename cpuid.c
Name it cpu.c to align with other QOM'ified targets.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2012-04-10 17:10:27 +02:00
Andreas Färber 9349b4f9fd Rename CPUState -> CPUArchState
Scripted conversion:
  for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do
    sed -i "s/CPUState/CPUArchState/g" $file
  done

All occurrences of CPUArchState are expected to be replaced by QOM CPUState,
once all targets are QOM'ified and common fields have been extracted.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:27 +01:00
Andreas Färber 317ac6201a target-i386: Don't overuse CPUState
Scripted conversion:
  sed -i "s/CPUState/CPUX86State/g" target-i386/*.[hc]
  sed -i "s/#define CPUX86State/#define CPUState/" target-i386/cpu.h

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:25 +01:00
Andreas Färber 1bba0dc932 Rename cpu_reset() to cpu_state_reset()
Frees the identifier cpu_reset for QOM CPUs (manual rename).

Don't hide the parameter type behind explicit casts, use static
functions with strongly typed argument to indirect.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:24 +01:00
Eduardo Habkost eaf3f0974b add "tsc-deadline" flag name to feature_ecx table
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-12 14:05:25 -05:00
Jan Kiszka 3f2cbf0d1a target-i386: Mask NX bit from cpu_get_phys_page_debug result
This was a long pending bug, now revealed by the assert in
phys_page_find that stumbled over the large page index returned by
cpu_get_phys_page_debug for NX-marked pages: We need to mask out NX and
all user-definable bits 52..62 from PDEs and the final PTE to avoid
corrupting physical addresses.

Reviewed-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-11 11:22:39 +00:00
Michael S. Tsirkin 7e680753cf kvm: fill in padding to help valgrind
valgrind warns about padding fields which are passed
to vcpu ioctls uninitialized.
This is not an error in practice because kvm ignored padding.
Since the ioctls in question are off data path and
the cost is zero anyway, initialize padding to 0
to suppress these errors.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-03-07 12:31:48 +02:00
Blue Swirl 5a30d3f19d Merge branch 'upstream' of git://qemu.weilnetz.de/qemu
* 'upstream' of git://qemu.weilnetz.de/qemu:
  Move definition of HOST_LONG_BITS to qemu-common.h
  target-xtensa: Clean includes
  target-unicore32: Clean includes
  target-sh4: Clean includes
  target-s390x: Clean includes
  target-ppc: Clean includes
  target-mips: Clean includes
  target-microblaze: Clean includes
  target-m68k: Clean includes
  target-lm32: Clean includes
  target-i386: Clean includes
  target-cris: Clean includes
  target-arm: Clean includes
  target-alpha: Clean includes
  Remove macro HOST_LONG_SIZE
2012-03-03 17:59:06 +00:00
Anthony Liguori 5918ff68ff Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
* qemu-kvm/uq/master:
  pc-bios: update kvmvapic.bin
  kvmvapic: Use optionrom helpers
  optionsrom: Reserve space for checksum
  kvmvapic: Simplify mp/up_set_tpr
  kvmvapic: Introduce TPR access optimization for Windows guests
  kvmvapic: Add option ROM
  target-i386: Add infrastructure for reporting TPR MMIO accesses
  Allow to use pause_all_vcpus from VCPU context
  Process pending work while waiting for initial kick-off in TCG mode
  Remove useless casts from cpu iterators
  kvm: Set cpu_single_env only once
  kvm: Synchronize cpu state in kvm_arch_stop_on_emulation_error()
2012-03-01 15:26:01 -06:00
Stefan Weil 727d6bff27 target-i386: Clean includes
Remove some include statements which are not needed.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-02-28 22:33:42 +01:00
Andreas Färber dcce6675de target-i386: Introduce x86_cpuid_set_model_id()
Move the logic to transform the 48-char model ID into the 12-word model
value into a helper.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-24 09:06:58 -06:00
Andreas Färber 38c3dc4622 target-i386: Introduce x86_cpuid_version_set_stepping()
Move the logic for setting the stepping field into a helper function.

To make the function self-contained and to prepare for future
unordered/multiple uses, mask out any previous stepping values first.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-24 09:06:58 -06:00
Andreas Färber b0704cbd3f target-i386: Introduce x86_cpuid_version_set_model()
Move the logic for setting the model and extended model fields
into a helper function.

To make the function self-contained and to prepare for future
unordered/multiple uses, mask out any previous model values first.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-24 09:06:58 -06:00
Andreas Färber ed5e1ec3fc target-i386: Introduce x86_cpuid_version_set_family()
Move the logic for setting the family and extended family into a
helper function.

To make the helper self-contained and in preparation of future
unordered/multiple uses, mask out any previous family values first.

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-24 09:06:58 -06:00
Eduardo Habkost 3ac8ebfe1c cpu defs: use Intel flag names for Intel models (v2)
Use 'i64' instead of 'lm' and 'xd' instead of 'nx' on Intel models.

The flags have different names on Intel docs, so use those names for clarity.

This is based on a previous patch from John Cooper where this was introduced
with many other changes at the same time. Original John's patch submission is
at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>.

Changes v1 -> v2:
 - Rebase patch against latest Qemu git tree

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-22 13:24:28 -06:00
Eduardo Habkost f370be3c50 cpu flags: aliases: pclmuldq|pclmulqdq and ffxsr|fxsr_opt
pclmulqdq: /proc/cpuinfo on Linux and all documentation I have seen uses
pclmulqdq as the flag name. As the only document using pclmuldq seems to
be the Intel CPUID documentation (Application Note 485), it looks like a
typo and not the correct name for the flag.

ffxsr: AMD docs refer to fxsr_opt as ffxsr, so allow this named to be
used too.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-02-22 13:24:28 -06:00
Jan Kiszka d362e757d3 target-i386: Add infrastructure for reporting TPR MMIO accesses
This will allow the APIC core to file a TPR access report. Depending on
the accelerator and kernel irqchip mode, it will either be delivered
right away or queued for later reporting.

In TCG mode, we can restart the triggering instruction and can therefore
forward the event directly. KVM does not allows us to restart, so we
postpone the delivery of events recording in the user space APIC until
the current instruction is completed.

Note that KVM without in-kernel irqchip will report the address after
the instruction that triggered the access.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2012-02-18 12:15:55 +02:00
Gleb Natapov d1f8663660 kvm: Synchronize cpu state in kvm_arch_stop_on_emulation_error()
Call to kvm_cpu_synchronize_state() is missing.
kvm_arch_stop_on_emulation_error may look at outdated registers here.

Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-02-16 18:21:46 +02:00
Jan Kiszka 3d4b26494f kvm: Implement kvm_irqchip_in_kernel like kvm_enabled
To both avoid that kvm_irqchip_in_kernel always has to be paired with
kvm_enabled and that the former ends up in a function call, implement it
like the latter. This means keeping the state in a global variable and
defining kvm_irqchip_in_kernel as a preprocessor macro.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-02-08 15:57:50 -02:00
Jan Kiszka 39d6960aab kvm: Allow to set shadow MMU size
Introduce the KVM-specific machine option kvm_shadow_mem. It allows to
set a custom shadow MMU size for the virtual machine. This is useful for
stress testing e.g.

Only x86 supports this for now, but it is in principle a generic
concept for all targets with shadow MMUs.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-02-08 15:57:50 -02:00
Blue Swirl 61eb1f38c1 hyperv: fix build on non-KVM hosts
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-01-23 20:04:51 +00:00
Jan Kiszka 680c1c6fd7 kvm: x86: Add user space part for in-kernel APIC
This introduces the alternative APIC device which makes use of KVM's
in-kernel device model. External NMI injection via LINT1 is emulated by
checking the current state of the in-kernel APIC, only injecting a NMI
into the VCPU if LINT1 is unmasked and configured to DM_NMI.

MSI is not yet supported, so we disable this when the in-kernel model is
in use.

CC: Lai Jiangshan <laijs@cn.fujitsu.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19 12:14:42 +01:00
Jan Kiszka 84b058d7df kvm: Introduce core services for in-kernel irqchip support
Add the basic infrastructure to active in-kernel irqchip support, inject
interrupts into these models, and maintain IRQ routes.

Routing is optional and depends on the host arch supporting
KVM_CAP_IRQ_ROUTING. When it's not available on x86, we looe the HPET as
we can't route GSI0 to IOAPIC pin 2.

In-kernel irqchip support will once be controlled by the machine
property 'kernel_irqchip', but this is not yet wired up.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2012-01-19 12:14:42 +01:00
Vadim Rozenfeld eab70139a6 hyper-v: initialize Hyper-V CPUID leaves.
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-01-19 08:33:12 -02:00
Vadim Rozenfeld 28f52cc04d hyper-v: introduce Hyper-V support infrastructure.
[Jan: fix build with CONFIG_USER_ONLY]

Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2012-01-19 08:32:12 -02:00
Aurelien Jarno 20f8bd483c target-i386: fix compilation with --enable-debug-tcg
Commit 2355c16e74 introduced a new ldmxcsr
helper taking an i32 argument, but the helper is actually passed a long.
Fix that by truncating the long to i32.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-01-13 16:01:40 +01:00
Aurelien Jarno 2355c16e74 target-i386: fix SSE rounding and flush to zero
SSE rounding and flush to zero control has never been implemented. However
given that softfloat-native was using a single state for FPU and SSE and
given that glibc is setting both FPU and SSE state in fesetround(), this
was working correctly up to the switch to softfloat.

Fix that by adding an update_sse_status() function similar to
update_fpu_status(), and callin git on write to mxcsr.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-01-11 09:55:28 +01:00
Aurelien Jarno 170d5b4bb9 target-i386: fix dpps and dppd SSE2 instructions
The helpers implemented dpps and dppd SSE instructions are not passing
the correct argument types to the softfloat functions. While they do
work anyway providing a correct behaviour, this patch fixes that.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-01-11 09:55:28 +01:00
Aurelien Jarno adc7166611 target-i386: fix round{pd,ps,sd,ss} SSE2 instructions
roundps and roundss SSE2 instructions have been broken when switching
target-i386 to softfloat. They use float64_round_to_int to convert a
float32, and while the implicit conversion from float32 to float64 was
correct for softfloat-native, it is not for pure softfloat. Fix that by
using the correct registers and correct functions.

Also fix roundpd and roundsd implementation at the same time, even if
these functions are behaving correctly.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-01-11 09:55:28 +01:00
Aurelien Jarno a4d1f14254 target-i386: fix {min,max}{pd,ps,sd,ss} SSE2 instructions
minpd, minps, minsd, minss and maxpd, maxps, maxsd, maxss SSE2
instructions have been broken when switching target-i386 to softfloat.
It's not possible to use comparison instructions on float types anymore
to softfloat, so use the floatXX_lt function instead, as the
float_XX_min and float_XX_max functions can't be used due to the Intel
specific behaviour.

As it implements the correct NaNs behaviour, let's remove the
corresponding entry from the TODO.

It fixes GDM screen display on Debian Lenny.

Thanks to Peter Maydell and Jason Wessel for their analysis of the
problem.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-01-11 09:55:28 +01:00
Anthony Liguori f3c6a169a3 Merge remote-tracking branch 'qemu-kvm/memory/page_desc' into staging
* qemu-kvm/memory/page_desc: (22 commits)
  Remove cpu_get_physical_page_desc()
  sparc: avoid cpu_get_physical_page_desc()
  virtio-balloon: avoid cpu_get_physical_page_desc()
  vhost: avoid cpu_get_physical_page_desc()
  kvm: avoid cpu_get_physical_page_desc()
  memory: remove CPUPhysMemoryClient
  xen: convert to MemoryListener API
  memory: temporarily add memory_region_get_ram_addr()
  xen, vga: add API for registering the framebuffer
  vhost: convert to MemoryListener API
  kvm: convert to MemoryListener API
  kvm: switch kvm slots to use host virtual address instead of ram_addr_t
  memory: add API for observing updates to the physical memory map
  memory: replace cpu_physical_sync_dirty_bitmap() with a memory API
  framebuffer: drop use of cpu_physical_sync_dirty_bitmap()
  loader: remove calls to cpu_get_physical_page_desc()
  framebuffer: drop use of cpu_get_physical_page_desc()
  memory: introduce memory_region_find()
  memory: add memory_region_is_logging()
  memory: add memory_region_is_rom()
  ...
2012-01-03 14:39:05 -06:00
Gleb Natapov a0fa82085e enable architectural PMU cpuid leaf for kvm
Signed-off-by: Gleb Natapov <gleb@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-12-22 14:53:01 -02:00
Jan Kiszka cce47516cd kvm: x86: Drop redundant apic base and tpr update from kvm_get_sregs
The latter was already commented out, the former is redundant as well.
We always get the latest changes after return from the guest via
kvm_arch_post_run.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-12-22 14:53:01 -02:00
Jan Kiszka fabacc0f79 kvm: x86: Avoid runtime allocation of xsave buffer
Keep a per-VCPU xsave buffer for kvm_put/get_xsave instead of
continuously allocating and freeing it on state sync.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-12-22 14:53:01 -02:00
Jan Kiszka 6b42494b21 kvm: x86: Use symbols for all xsave field
Field 0 (FCW+FSW) and 1 (FTW+FOP) were hard-coded so far.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-12-22 14:53:00 -02:00
Avi Kivity 9f213ed92c kvm: switch kvm slots to use host virtual address instead of ram_addr_t
This simplifies a later switch to the memory API in slot management.

Signed-off-by: Avi Kivity <avi@redhat.com>
2011-12-20 14:14:07 +02:00
Andreas Gustafsson f7e80adf3c target-i386: fix cmpxchg instruction emulation
When the i386 cmpxchg instruction is executed with a memory operand
and the comparison result is "unequal", do the memory write before
changing the accumulator instead of the other way around, because
otherwise the new accumulator value will incorrectly be used in the
comparison when the instruction is restarted after a page fault.

This bug was originally reported on 2010-04-25 as
https://bugs.launchpad.net/qemu/+bug/569760

Signed-off-by: Andreas Gustafsson <gson@gson.org>
2011-12-12 00:46:32 +04:00
Markus Armbruster 45009a3087 x86/cpuid: Tighten parsing of tsc_freq=FREQ
cpu_x86_find_by_name() uses strtosz_suffix_unit(), but screws up the
error checking.  It detects some failures, but not all.  Undetected
failures result in a zero tsc_khz value (error value -1 divided by
1000), which means "no tsc_freq set".

To reproduce, try "-cpu qemu64,tsc_freq=9999999T".
strtosz_suffix_unit() fails, because the value overflows int64_t,

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-11-28 16:20:52 -06:00
Anthony Liguori a1fd24af4d Revert "i386: derive '-cpu host' from KVM_GET_SUPPORTED_CPUID"
This reverts commit 66e3dd9282.

From Avi,

 "Anthony, I think we should revert that commit and refactor cpuid for
  1.1.  The logic is spread over too many places which makes it hard to
  reason about."

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-11-28 08:42:56 -06:00
Anthony Liguori 1571b6cba2 Merge remote-tracking branch 'origin/master' into staging 2011-11-21 14:36:55 -06:00
Blue Swirl bc4268998d x86: fix pcmpestrm and pcmpistrm
Fix obvious typos (decrement and off-by-one error) in pcmpestrm and pcmpistrm
which resulted in infinite loop. Reported by Frank Mehnert,
spotted also by Coverity (bug 84752853).

Reported-by: Frank Mehnert <frank.mehnert@oracle.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-11-19 13:51:27 +00:00
Vagrant Cascadian 126197214e Fix typo: runnning -> running
One n too many for running, need we say more.

Signed-Off-By: Vagrant Cascadian <vagrant@freegeek.org>

Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-11-17 12:57:41 +00:00
Markus Armbruster 04c5b17a74 x86/cpuid: Fix crash on -cpu ""
Spotted by Coverity.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-11-10 12:29:50 +00:00
Markus Armbruster 99e1dec06f x86/cpuid: Plug memory leak in cpudef_setfield()
To reproduce the leak, put two name options into the same [cpudef]
section of target-x86_64.conf.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-11-10 12:29:50 +00:00
Markus Armbruster d3c481b357 x86/cpuid: Convert remaining strdup() to g_strdup()
Fixes missing error checking.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-11-10 12:29:50 +00:00
Avi Kivity 66e3dd9282 i386: derive '-cpu host' from KVM_GET_SUPPORTED_CPUID
The fact that a host cpu supports a feature doesn't mean that QEMU and KVM
will also support it, yet -cpuid host brings host features wholesale.

We need to whitelist each feature separately to make sure we support it.
This patch adds KVM whitelisting (by simply using KVM_GET_SUPPORTED_CPUID
instead of the CPUID instruction).

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-11-09 12:06:20 -06:00
Bharata B Rao f2209eb854 Fix X86 CPU topology in KVM mode
apic id returned to guest kernel in ebx for cpuid(function=1) depends on
CPUX86State->cpuid_apic_id which gets populated after the cpuid information
is cached in the host kernel. This results in broken CPU topology in guest.

Fix this by setting cpuid_apic_id before cpuid information is passed to
the host kernel. This is done by moving the setting of cpuid_apic_id
to cpu_x86_init() where it will work for both KVM as well as TCG modes.

Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Bharata B Rao <bharata.rao@gmail.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-11-02 07:55:05 -05:00
Avi Kivity 21e87c4625 i386: wire up MSR_IA32_MISC_ENABLE
It's needed for its default value - bit 0 specifies that "rep movs" is
good enough for memcpy, and Linux may use a slower memcpu if it is not set,
depending on cpu family/model.

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-10-24 21:33:32 -02:00
Liu, Jinsong aa82ba549a kvm: support TSC deadline MSR with subsection
KVM add emulation of lapic tsc deadline timer for guest.
This patch is co-operation work at qemu side.

Use subsections to save/restore the field (mtosatti).

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-10-24 21:29:07 -02:00
Marcelo Tosatti 38d2c27ea6 Revert "kvm: support TSC deadline MSR"
This reverts commit bfc2455ddb.
New patch with subsections will follow.

Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-10-24 21:27:16 -02:00
Liu, Jinsong bfc2455ddb kvm: support TSC deadline MSR
KVM add emulation of lapic tsc deadline timer for guest.
This patch is co-operation work at qemu side.

Signed-off-by: Liu, Jinsong <jinsong.liu@intel.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-10-03 13:53:14 -03:00
Blue Swirl bccd9ec5f0 softmmu_header: pass CPUState to tlb_fill
Pass CPUState pointer to tlb_fill() instead of architecture local
cpu_single_env hacks.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01 09:31:26 +00:00
Jan Kiszka 86ce7a5e7e target-i386: Remove redundant word mask in port out instructions
T0 was already masked to 16 bits when loading it.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-01 06:21:45 +00:00
Stefan Weil 782ea2c759 target-i386: Remove data type CCTable
Remove also two assert statements which were the last remaining users.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-09-21 10:49:01 +01:00
Anthony Liguori 7f67d8922e Merge remote-tracking branch 'qmp/queue/qmp' into staging 2011-09-20 15:16:00 -05:00
Max Reitz 5c6562c204 target-i386: Fix several SSE3 instructions.
haddp[sd], hsubp[sd] and addsubp[sd] operate on floats, thus it is
necessary to use the appropriate floating point calculation functions.
If this is not done, those functions operate merely on integers, which
is not correct.

Signed-off-by: Max Reitz <max@tyndur.org>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-17 17:13:31 +00:00
Luiz Capitulino 1354869c38 Drop the vm_running global variable
Use runstate_is_running() instead, which is introduced by this commit.

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2011-09-15 16:39:32 -03:00
Luiz Capitulino 1dfb4dd993 Replace the VMSTOP macros with a proper state type
Today, when notifying a VM state change with vm_state_notify(),
we pass a VMSTOP macro as the 'reason' argument. This is not ideal
because the VMSTOP macros tell why qemu stopped and not exactly
what the current VM state is.

One example to demonstrate this problem is that vm_start() calls
vm_state_notify() with reason=0, which turns out to be VMSTOP_USER.

This commit fixes that by replacing the VMSTOP macros with a proper
state type called RunState.

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
2011-09-15 16:39:32 -03:00
Blue Swirl 6115c0a82d kvm: remove unnecessary assignments
Avoid these warnings from clang analyzer:
/src/qemu/target-i386/kvm.c:772:5: warning: Value stored to 'cwd' is never read
    cwd = swd = twd = 0;
/src/qemu/target-i386/kvm.c:772:11: warning: Although the value stored to 'swd' is used in the enclosing expression, the value is never actually read from 'swd'
    cwd = swd = twd = 0;

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-10 14:50:00 +00:00
Anthony Liguori 07ff2c4475 Merge remote-tracking branch 'origin/master' into staging 2011-09-08 09:25:36 -05:00
Richard Henderson 8278604134 target-i386: Compute all flag data inside %cl != 0 test.
The (x << (cl - 1)) quantity is only used if CL != 0.  Move the
computation of that quantity nearer its use.

This avoids the creation of undefined TCG operations when the
constant propagation optimization proves that CL == 0, and thus
CL-1 is outside the range [0-wordsize).

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: malc <av1474@comtv.ru>
2011-09-08 18:10:16 +04:00
Anthony Liguori 9d0baba110 Merge remote-tracking branch 'stefanha/trivial-patches' into staging 2011-09-08 08:59:32 -05:00
Stefan Weil 541dc0d47f Use new macro QEMU_PACKED for packed structures
Most changes were made using these commands:

git grep -la '__attribute__((packed))'|xargs perl -pi -e 's/__attribute__\(\(packed\)\)/QEMU_PACKED/'
git grep -la '__attribute__ ((packed))'|xargs perl -pi -e 's/__attribute__ \(\(packed\)\)/QEMU_PACKED/'
git grep -la '__attribute__((__packed__))'|xargs perl -pi -e 's/__attribute__\(\(__packed__\)\)/QEMU_PACKED/'
git grep -la '__attribute__ ((__packed__))'|xargs perl -pi -e 's/__attribute__ \(\(__packed__\)\)/QEMU_PACKED/'
git grep -la '__attribute((packed))'|xargs perl -pi -e 's/__attribute\(\(packed\)\)/QEMU_PACKED/'

Whitespace in linux-user/syscall_defs.h was fixed manually
to avoid warnings from scripts/checkpatch.pl.

Manual changes were also applied to hw/pc.c.

I did not fix indentation with tabs in block/vvfat.c.
The patch will show 4 errors with scripts/checkpatch.pl.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-09-03 10:45:59 +00:00
Boris Figovsky c6bfc164e8 x86: fix daa opcode for al register values higher than 0xf9
The second if statement should consider the original al register value,
and not the new one.

Signed-off-by: Boris Figovsky <boris.figovksy@ravellosystems.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-09-02 11:08:44 +01:00
Jan Kiszka fdc9c41a5a Fix up some style nits of last uq/master merge
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-08-25 09:21:35 +01:00
Anthony Liguori 7267c0947d Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-20 23:01:08 -05:00
Anthony Liguori 986563b173 Merge remote-tracking branch 'qemu-kvm/uq/master' into staging 2011-08-08 14:38:42 -05:00
Blue Swirl 97b348e7d2 Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)
is not used in cpu_*_handle_mmu_fault() functions, remove them
and adjust callers.

Acked-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-08-07 09:32:01 +00:00
Jan Kiszka d5ab9713d2 Avoid allocating TCG resources in non-TCG mode
Do not allocate TCG-only resources like the translation buffer when
running over KVM or XEN. Saves a "few" bytes in the qemu address space
and is also conceptually cleaner.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-08-05 10:57:36 -05:00
Marcelo Tosatti ac363c9042 Remove #ifdef KVM_CAP_TSC_CONTROL
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-08-05 12:10:55 -03:00
Joerg Roedel e7429073ed qemu-x86: Set tsc_khz in kvm when supported
Make use of the KVM_TSC_CONTROL feature if available.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-08-05 12:04:27 -03:00
Joerg Roedel b862d1fe42 qemu-x86: Add tsc_freq option to -cpu
To let the user configure the desired tsc frequency for the
guest if running in KVM.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-08-05 12:04:27 -03:00
Blue Swirl 3e4571724f exec.h cleanup
Move softmmu_exec.h include directives from target-*/exec.h to
target-*/op_helper.c. Move also various other stuff only used in
op_helper.c there.

Define global env in dyngen-exec.h.

For i386, move wrappers for segment and FPU helpers from user-exec.c
to op_helper.c. Implement raise_exception_err_env() to handle dynamic
CPUState. Move the function declarations to cpu.h since they can be
used outside of op_helper.c context.

LM32, s390x, UniCore32: remove unused cpu_halted(), regs_to_env() and
env_to_regs().

ARM: make raise_exception() static.

Convert
#include "exec.h"
to
#include "cpu.h"
#include "dyngen-exec.h"
and remove now unused target-*/exec.h.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-07-30 09:41:14 +00:00
Blue Swirl 2b41f10e18 Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:35 +00:00
Blue Swirl f081c76ccf Move cpu_has_work and cpu_pc_from_tb to cpu.h
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is
needed by later patches.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:31 +00:00
Blue Swirl f3e270377a exec.h: fix coding style and change cpu_has_work to return bool
Before the next patch, fix coding style of the areas affected.

Change the type of the return value from cpu_has_work() and
qemu_cpu_has_work() to bool.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:26 +00:00
Blue Swirl e694d4e289 x86: use caller supplied CPUState for interrupt related stuff
Several x86 specific functions are called from cpu-exec.c with the
assumption that global env register is valid. This will be changed
later, so make the functions use caller supplied CPUState parameter.

It would be cleaner to move the functions to helper.c, but there are
quite a lot of dependencies between do_interrupt() and other functions.

Add helpers for svm_check_intercept() and cpu_cc_compute_all() instead
of calling the helper (which uses global env, AREG0) directly.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:19 +00:00
Blue Swirl 1162c041c1 cpu_loop_exit: avoid using AREG0
Make cpu_loop_exit() take a parameter for CPUState instead of relying
on global env.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-06-26 18:25:13 +00:00
Marcelo Tosatti ca98557ad2 kvm: fix FPU state subsection
There is no need to specify version on the subsection fields.

Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-06-21 13:53:18 -03:00
Andre Przywara 31e8c69697 KVM: Fix XSAVE feature bit enumeration
When iterating through the XSAVE feature enumeration CPUID leaf (0xD)
we should not stop at the first zero EAX, but instead keep scanning
since there are gaps in the enumeration (ECX=1 for instance).
This fixes the proper usage of AVX in KVM guests.

Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-06-20 15:26:21 -03:00
Jan Kiszka ba9bc59e1f kvm: x86: Pass KVMState to kvm_arch_get_supported_cpuid
kvm_arch_get_supported_cpuid checks for global cpuid restrictions, it
does not require any CPUState reference. Changing its interface allows
to call it before any VCPU is initialized.

CC: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-06-20 15:24:00 -03:00
Jan Kiszka e56ff191b6 kvm: x86: Drop KVM_CAP build dependencies
No longer needed with accompanied kernel headers.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-06-20 15:19:54 -03:00
Jan Kiszka 5802e066eb kvm: Drop CONFIG_KVM_PARA
The kvm_para.h header is now always available.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-06-20 15:16:45 -03:00
Jan Kiszka 42cc8fa620 kvm: x86: Save/restore FPU OP, IP and DP
These FPU states are properly maintained by KVM but not yet by TCG. So
far we unconditionally set them to 0 in the guest which may cause
state corruptions, though not with modern guests.

To avoid breaking backward migration, use a conditional subsection that
is only written if any of the three fields is non-zero. The guest's
FNINIT clears them frequently, and cleared IA32_MISC_ENABLE MSR[2]
reduces the probability of non-zero values further so that this
subsection is not expected to restrict migration in any common scenario.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-06-19 15:57:56 +03:00
Yang, Wei Y f79116867e kvm: Enable CPU SMEP feature
This patchset enables a new CPU feature SMEP (Supervisor Mode Execution
Protection) in QEMU-KVM. SMEP prevents kernel from executing code in application.
Updated Intel SDM describes this CPU feature. The document will be published soon.

SMEP is identified by CPUID leaf 7 EBX[7], which is 0 before. Get the right value by query KVM kernel module, so that guest can get SMEP through CPUID.

 Signed-off-by: Yang, Wei <wei.y.yang@intel.com>
 Singed-off-by: Shan, Haitao <haitao.shan@intel.com>
 Singed-off-by: Li, Xin <xin.li@intel.com>

Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-06-14 09:34:35 -05:00
brillywu@viatech.com.cn b3baa152aa kvm: Add CPUID support for VIA CPU
When KVM is running on VIA CPU with host cpu's model, the
feautures of VIA CPU will be passed into kvm guest by calling
the CPUID instruction for Centaur.

Signed-off-by: BrillyWu<brillywu@viatech.com.cn>
Signed-off-by: KaryJin<karyjin@viatech.com.cn>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-06-14 09:34:35 -05:00
Martin Simmons 8001c294f8 target-i386: Make x86 mfence and lfence illegal without SSE2
While trying to use qemu -cpu pentium3 to test for incorrect uses of certain
SSE2 instructions, I found that QEMU allowed the mfence and lfence
instructions to be executed even though Pentium 3 doesn't support them.

According to the processor specs (and experience on a real Pentium 3), these
instructions are only available with SSE2, but QEMU is checking for SSE.  The
check for the related sfence instruction is correct (it works with SSE).

This trival patch fixes the test.

Signed-off-by: Martin Simmons <martin@lispworks.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-06-08 09:04:29 +01:00
Alexandre Raymond 9bf0960a9a Fix compilation warning due to missing header for sigaction (followup)
This patch removes all references to signal.h when qemu-common.h is included
as they become redundant.

Signed-off-by: Alexandre Raymond <cerbere@gmail.com>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-06-08 09:04:29 +01:00
Aurelien Jarno 66fcf8ffcf target-i386: use floatx80 constants in helper_fld*_ST0()
Instead of using a table which doesn't correspond to anything from
physical in the CPU, use directly the constants in helper_fld*_ST0().

Cc: Andreas Färber <andreas.faerber@web.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-06-03 16:07:52 +02:00
Aurelien Jarno c31da136a0 target-i386: remove old code handling float64
Now that target-i386 uses softfloat, floatx80 is always available and
there is no need anymore to have code handling both float64 and floax80.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-06-03 16:07:50 +02:00
Richard Henderson 85097db695 irq: Privatize CPU_INTERRUPT_NMI.
This interrupt name is used by i386, CRIS, and MicroBlaze.
Copy the name into each target.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-08 16:55:24 +00:00
Richard Henderson 00a152b48b target-i386: Privatize some i386-specific interrupt names.
SMI, VIRQ, INIT, SIPI, and MCE are all only used by the i386 port.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-05-08 16:55:23 +00:00
Paolo Bonzini 4a043713b3 kvm: use qemu_free consistently
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-05-02 09:51:59 -03:00
Glauber Costa 642258c6c7 kvm: add kvmclock to its second bit
We have two bits that can represent kvmclock in cpuid.
They signal the guest which msr set to use. When we tweak flags
involving this value - specially when we use "-", we have to act on both.

Signed-off-by: Glauber Costa <glommer@redhat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-05-02 09:38:35 -03:00
Jan Kiszka e41e0fc61a x86: Allow multiple cpu feature matches of lookup_feature
kvmclock is represented by two feature bits. Therefore, lookup_feature
needs to continue its search even after the first match. Enhance it
accordingly and switch to a bool return type at this chance.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-05-02 09:38:35 -03:00
Glauber Costa 0c31b744f6 kvm: use kernel-provided para_features instead of statically coming up with new capabilities
Use the features provided by KVM_GET_SUPPORTED_CPUID directly to
mask out features from guest-visible cpuid.

The old get_para_features() mechanism is kept for older kernels that do not implement it.

Signed-off-by: Glauber Costa <glommer@redhat.com>
Signed-off-by: Avi Kivity <avi@redhat.com>
2011-05-02 08:24:42 -03:00
Aurelien Jarno a1d8db07fb target-i386: fix constants wrt softfloat
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 11:18:33 +02:00
Aurelien Jarno bcb5fec5af target-i386: fix helper_fprem() and helper_fprem1() wrt softfloat
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 11:18:33 +02:00
Aurelien Jarno a2c9ed3cbf target-i386: fix logarithmic and trigonometric helpers wrt softfloat
Use the new CPU86_LDouble <-> double conversion functions to make logarithmic
and trigonometric helpers working with softfloat.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 11:18:33 +02:00
Aurelien Jarno 47c0143cdd target-i386: add CPU86_LDouble <-> double conversion functions
Add functions to convert CPU86_LDouble to double and vice versa. They
are going to be used to implement logarithmic and trigonometric function
until softfloat implement them.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 11:18:33 +02:00
Aurelien Jarno c2ef9a83be target-i386: replace approx_rsqrt and approx_rcp by softfloat ops
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 11:18:33 +02:00
Aurelien Jarno fec05e4299 target-i386: fix helper_fsqrt() wrt softfloat
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 11:18:33 +02:00
Aurelien Jarno 13822781d4 target-i386: fix helper_fdiv() wrt softfloat
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 11:18:33 +02:00
Aurelien Jarno c9ad19c57b target-i386: fix helper_fxtract() wrt softfloat
With softfloat it's not possible to play with the overflow of an
unsigned value to get the 0 case partially correct. Use a special case
for that. Using a division to generate an infinity is the easiest way
that works for both softfloat and softfloat-native.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 11:18:33 +02:00
Aurelien Jarno 788e733664 target-i386: fix helper_fbld_ST0() wrt softfloat
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 11:18:33 +02:00
Aurelien Jarno be1c17c7fd target-i386: fix helper_fscale() wrt softfloat
Use the scalbn softfloat function to implement helper_fscale(). This
fixes corner cases (e.g. NaN) and makes a few more GNU libc math tests
to pass.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-25 11:18:33 +02:00
Stefan Weil 618ba8e6a1 Remove unused function parameter from cpu_restore_state
The previous patch removed the need for parameter puc.
Is is now unused, so remove it.

Cc: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-20 10:37:03 +02:00
Stefan Weil e87b7cb0f0 Remove unused function parameters from gen_pc_load and rename the function
Function gen_pc_load was introduced in commit
d2856f1ad4.
The only reason for parameter searched_pc was
a debug statement in target-i386/translate.c.

Parameter puc was needed by target-sparc until
commit d7da2a1040.

Remove searched_pc from the debug statement and remove both
parameters from the parameter list of gen_pc_load.

As the function name gen_pc_load was also misleading,
it is now called restore_state_to_opc. This new name
was suggested by Peter Maydell, thanks.

v2: Remove last parameter, too, and rename the function.

v3: Fix [] typo in target-arm/translate.c.
    Fix wrong SHA1 object name in commit message (copy+paste error).

Cc: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-20 10:33:59 +02:00
Aurelien Jarno 211315fb5e softfloat: rename float*_eq() into float*_eq_quiet()
float*_eq functions have a different semantics than other comparison
functions. Fix that by first renaming float*_quiet() into float*_eq_quiet().

Note that it is purely mechanical, and the behaviour should be unchanged.
That said it clearly highlight problems due to this different semantics,
they are fixed later in this patch series.

Cc: Alexander Graf <agraf@suse.de>
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17 20:32:14 +02:00
Aurelien Jarno e0b29ce1cf target-i386: fix CMPUNORDPS/D and CMPORDPS/D instructions
SSE instructions CMPUNORDPS/D and CMPORDPS/D do not trigger an invalid
exception if operands are qNANs.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17 20:32:14 +02:00
Aurelien Jarno 67dd64bfae target-i386: add floatx_{add,mul,sub} and use them
Add floatx_{add,mul,sub} defines, and use them instead of using direct
C operations.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17 20:32:14 +02:00
Aurelien Jarno c41372230e target-i386: use float unions from cpu-all.h
Use float unions from cpu-all.h instead of redefining new (wrong for arm)
ones in target-i386. This also allows building cpu-exec.o with softfloat.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17 20:32:14 +02:00
Aurelien Jarno 1ffd41ee0c target-i386: use CPU_LDoubleU instead of a private union
Use CPU_LDoubleU in cpu_dump_state() instead of redefining a union for
doing the conversion.

Based on a patch from Laurent Vivier <laurent@vivier.eu>.

Cc: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-17 20:32:14 +02:00
Stefan Weil 4b4a72e556 Fix conversions from pointer to tcg_target_long
tcg_gen_exit_tb takes a parameter of type tcg_target_long,
so the type casts of pointer to long should be replaced by
type casts of pointer to tcg_target_long (suggested by Blue Swirl).

These changes are needed for build environments where
sizeof(long) != sizeof(void *), especially for w64.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10 00:45:16 +02:00
Anthony Liguori 4ac8e585c8 Revert "x86: Save/restore PAT MSR"
This reverts commit c995b495b9.

From Jan Kiszka:

 Ouch, indeed. Moreover, CPU_SAVE_VERSION was not updated (likely the
 reason for the breakage). Thanks for debugging this!

 Anthony (or whoever), please revert this unneeded commit in qemu.git.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-03-22 19:05:06 -05:00
Jan Kiszka f2574737f6 kvm: x86: Push kvm_arch_debug to kvm_arch_handle_exit
There are no generic bits remaining in the handling of KVM_EXIT_DEBUG.
So push its logic completely into arch hands, i.e. only x86 so far.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-16 17:11:06 -03:00
Jan Kiszka 2a4dac8350 kvm: x86: Reorder functions in kvm.c
Required for next patch which will access guest debug services from
kvm_arch_handle_exit. No functional changes.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-16 17:11:06 -03:00
Jan Kiszka bb4ea39329 kvm: Align kvm_arch_handle_exit to kvm_cpu_exec changes
Make the return code of kvm_arch_handle_exit directly usable for
kvm_cpu_exec. This is straightforward for x86 and ppc, just s390
would require more work. Avoid this for now by pushing the return code
translation logic into s390's kvm_arch_handle_exit.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
CC: Alexander Graf <agraf@suse.de>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-16 17:11:06 -03:00
Jan Kiszka 0c03266a96 kvm: x86: Synchronize PAT MSR with the kernel
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-16 17:11:05 -03:00
Jan Kiszka c995b495b9 x86: Save/restore PAT MSR
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-16 17:11:05 -03:00
Jan Kiszka ebda377f8c x86: Properly reset PAT MSR
Conforming to the Intel spec, set the power-on value of PAT also on
reset, but save it across INIT.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-16 17:11:05 -03:00
Jan Kiszka 4601f7b04c kvm: x86: Do not leave halt if interrupts are disabled
When an external interrupt is pending but IF is cleared, we must not
leave the halt state prematurely.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-16 17:11:05 -03:00
Huang Ying 3c85e74fbf KVM, MCE, unpoison memory address across reboot
In Linux kernel HWPoison processing implementation, the virtual
address in processes mapping the error physical memory page is marked
as HWPoison.  So that, the further accessing to the virtual
address will kill corresponding processes with SIGBUS.

If the error physical memory page is used by a KVM guest, the SIGBUS
will be sent to QEMU, and QEMU will simulate a MCE to report that
memory error to the guest OS.  If the guest OS can not recover from
the error (for example, the page is accessed by kernel code), guest OS
will reboot the system.  But because the underlying host virtual
address backing the guest physical memory is still poisoned, if the
guest system accesses the corresponding guest physical memory even
after rebooting, the SIGBUS will still be sent to QEMU and MCE will be
simulated.  That is, guest system can not recover via rebooting.

In fact, across rebooting, the contents of guest physical memory page
need not to be kept.  We can allocate a new host physical page to
back the corresponding guest physical address.

This patch fixes this issue in QEMU-KVM via calling qemu_ram_remap()
to clear the corresponding page table entry, so that make it possible
to allocate a new page to recover the issue.

[ Jan: rebasing and tiny cleanups]

Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15 01:19:06 -03:00
Jan Kiszka 75d4949733 kvm: x86: Fail kvm_arch_init_vcpu if MCE initialization fails
There is no reason to continue if the kernel claims to support MCE but
then fails to process our request.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
CC: Huang Ying <ying.huang@intel.com>
CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
CC: Jin Dongming <jin.dongming@np.css.fujitsu.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15 01:19:06 -03:00
Jan Kiszka 32a420243c kvm: x86: Clean up kvm_setup_mce
There is nothing to abstract here. Fold kvm_setup_mce into its caller
and fix up the error reporting (return code of kvm_vcpu_ioctl holds the
error value).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
CC: Huang Ying <ying.huang@intel.com>
CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
CC: Jin Dongming <jin.dongming@np.css.fujitsu.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15 01:19:06 -03:00
Jan Kiszka c34d440a72 kvm: x86: Consolidate TCG and KVM MCE injection code
This switches KVM's MCE injection path to cpu_x86_inject_mce, both for
SIGBUS and monitor initiated events. This means we prepare the MCA MSRs
in the VCPUState also for KVM.

We have to drop the MSRs writeback restrictions for this purpose which
is now safe as every uncoordinated MSR injection is removed with this
patch.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
CC: Huang Ying <ying.huang@intel.com>
CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
CC: Jin Dongming <jin.dongming@np.css.fujitsu.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15 01:19:06 -03:00
Jan Kiszka d5bfda334a x86: Run qemu_inject_x86_mce on target VCPU
We will use the current TCG-only MCE injection path for KVM as well, and
then this read-modify-write of the target VCPU state has to be performed
synchronously in the corresponding thread.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15 01:19:05 -03:00
Jan Kiszka ab443475c9 kvm: x86: Inject pending MCE events on state writeback
The current way of injecting MCE events without updating of and
synchronizing with the CPUState is broken and causes spurious
corruptions of the MCE-related parts of the CPUState.

As a first step towards a fix, enhance the state writeback code with
support for injecting events that are pending in the CPUState. A pending
exception will then be signaled via cpu_interrupt(CPU_INTERRUPT_MCE).
And, just like for TCG, we need to leave the halt state when
CPU_INTERRUPT_MCE is pending (left broken for the to-be-removed old KVM
code).

This will also allow to unify TCG and KVM injection code.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
CC: Huang Ying <ying.huang@intel.com>
CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
CC: Jin Dongming <jin.dongming@np.css.fujitsu.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15 01:19:05 -03:00
Jan Kiszka 990368650f kvm: Rename kvm_arch_process_irqchip_events to async_events
We will broaden the scope of this function on x86 beyond irqchip events.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15 01:19:05 -03:00
Jan Kiszka 419fb20a8e kvm: x86: Move MCE functions together
Pure function suffling to avoid multiple #ifdef KVM_CAP_MCE sections,
no functional changes. While at it, annotate some #ifdef sections.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
CC: Huang Ying <ying.huang@intel.com>
CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
CC: Jin Dongming <jin.dongming@np.css.fujitsu.com>
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
2011-03-15 01:19:05 -03:00