Commit Graph

13449 Commits

Author SHA1 Message Date
Peter Maydell
ff1758533c pl080: Implement save/restore
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:21 +01:00
Peter Maydell
8c60d0652e pl110: Implement save/restore
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:21 +01:00
Peter Maydell
0dc5595c2c pl031: Implement save/restore
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:21 +01:00
Peter Maydell
d6ac172a84 pl050: Implement save/restore
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:21 +01:00
Peter Maydell
b5ad0ae767 arm_sysctl: Implement save/restore
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:21 +01:00
Peter Maydell
a796d0acbb vpb_sic: Implement save/restore
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:21 +01:00
Peter Maydell
ac49d75001 pl190: Implement save/restore
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:21 +01:00
Aurelien Jarno
c2dd2a2352 gt64xxx: qdev conversion
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:21 +01:00
Aurelien Jarno
cf154394bd sh_pci: qdev conversion
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:21 +01:00
Aurelien Jarno
b7d2b02093 sh_serial: process all received characters
When operating on the SCIF, process all the received characters, as long
as the FIFO can handle them.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:20 +01:00
Aurelien Jarno
b7277ac289 sh_serial: remove one level of indirection
The indirection functions are empty since commit
8da3ff1809.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:20 +01:00
Aurelien Jarno
373dfc441d usb-hid: modifiers should generate an event
When a modifier key is pressed or released, the USB HID keyboard still
answers NAK, unless another key is also pressed or released.

The patch fixes that by calling usb_hid_changed() when a modifier key
is pressed or released.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:20 +01:00
Aurelien Jarno
de4af5f792 softfloat: fix floatx80_is_{quiet,signaling}_nan()
floatx80_is_{quiet,signaling}_nan() functions are incorrectly detecting
the type of NaN, depending on SNAN_BIT_IS_ONE, one of the two is
returning the correct value, and the other true for any kind of NaN.

This patch fixes that by applying the same kind of comparison as for
other float formats, but taking into account the explicit bit.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-20 12:37:20 +01:00
Edgar E. Iglesias
3a34dfd7f6 tcg: README, name deposit second argument len/LEN
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-01-20 12:16:57 +01:00
Richard Henderson
c832e3de64 target-i386: Use deposit operation.
Use this for assignment to the low byte or low word of a register.

Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-01-20 12:16:12 +01:00
Richard Henderson
b7767f0f3c tcg: Define "deposit" as an optional operation.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-01-20 12:16:05 +01:00
Edgar E. Iglesias
9f8beb6636 microblaze: Add support for load/store reversed
Load/store reversed (lwr/swr) are insns that endian translate
the sub-word part of the address and byteswap the data lanes.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
2011-01-19 23:18:00 +01:00
Edgar E. Iglesias
9ef5535763 microblaze: Tweak comment, fast cases -> common cases
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-01-19 22:48:07 +01:00
Blue Swirl
1b5f56b134 sparc: fix NaN handling
Fix several bugs in NaN handling:
 * e in fcmpe* only changes qNaN handling
 * FCC is unchanged if an exception is raised
 * clear previous FTT before setting it

Reported-by: Mateusz Loskot <mateusz@loskot.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-18 21:34:51 +00:00
Peter Maydell
5642463aee target-arm: Log instruction start in TCG code
Add support for logging the start of instructions in TCG
code debug dumps for ARM targets.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-01-18 15:23:44 +01:00
Edgar E. Iglesias
5580722456 mips: Break TBs after mfc0_count
Break the TB after reading the count register. This makes it
possible to take timer interrupts immediately after a read of
a possibly expired timer.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-01-18 12:32:46 +01:00
Edgar E. Iglesias
e027e1f075 mips: Expire late timers when reading cp0_count
When reading cp0_count from a timer with a late trigger that should
already have expired, expire it and raise the timer irq.

This makes it possible for guest code (e.g, Linux) that first read
cp0_count, then compare it with cp0_compare and check for raised
timer interrupt lines to run reliably.

Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-01-18 12:28:32 +01:00
Edgar E. Iglesias
b1dfe6437c mips: Break out cpu_mips_timer_expire
Reorganize for future patches, no functional change.

Acked-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-01-18 12:27:52 +01:00
Blue Swirl
4a6648f44e Replace 'extern inline' with 'static inline'
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-17 20:26:30 +00:00
Stefan Weil
29718712eb bsd-user: Fix possible memory leaks and wrong realloc call
These errors were reported by cppcheck:

[bsd-user/elfload.c:1108]: (error) Common realloc mistake: "syms" nulled but not freed upon failure
[bsd-user/elfload.c:1076]: (error) Memory leak: s
[bsd-user/elfload.c:1079]: (error) Memory leak: syms

v2:
* The previous fix for memory leaks was incomplete (thanks to Peter Maydell for te hint).
* Fix wrong realloc usage, too.

Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-17 20:23:47 +00:00
Aurelien Jarno
07d8a50cb0 sm501: add 2D engine copyrect support
Linux kernel started to use the SM501 2D engine for the console, and
especially the copyrect operation.

Implement this operation so that recent kernels can be used with QEMU.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-17 19:29:48 +01:00
Anthony Liguori
9e8a69cfd6 Merge remote branch 'mst/for_anthony' into staging 2011-01-17 09:49:38 -06:00
Hervé Poussineau
51f9b84e75 m48t59: Fix a wrong opaque passed to nvram read and write routines
This fixes boot on PPC prep.

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-16 22:15:58 +01:00
Fabien Chouteau
e2af15b2ad gdbstub: Close connection in gdb_exit
On Windows, this is required to flush the remaining data in the IO stream,
otherwise Gdb do not receive the last packet.

Version 2:
   Fix linux-user build error.

Signed-off-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
2011-01-16 20:56:01 +01:00
Michael Tokarev
a8fb7ff3fd USB keyboard emulation key mapping error
The USB keyboard emulation's translation table in hw/usb-hid.c doesn't
match the codes actually sent for the Logo (a.k.a. "Windows") or Menu
keys. This results in the guest OS not being able to receive these keys
at all when the USB keyboard emulation is being used.

In particular, both the keymap in /usr/share/kvm/keymaps/modifiers and
the evdev table in x_keymap.c map these keys to 0xdb, 0xdc, and 0xdd,
while usb_hid_usage_keys[] seems to be expecting them to be mapped to
0x7d, 0x7e, and 0x7f.

The attached patch seems to fix the problem, at least in my (limited)
testing.

http://bugs.debian.org/578846
http://bugs.debian.org/600593 (cloned from the above against different pkg)
https://bugs.launchpad.net/qemu/+bug/584139

Signed-Off-By: Brad Jorsch <anomie@users.sourceforge.net>
Signed-Off-By: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-16 19:52:48 +01:00
Aurelien Jarno
b2d9eda5d4 target-sh4: implement negc using TCG
Using setcond it's now possible to generate a relatively short negc
instruction in TCG.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-16 13:19:20 +01:00
Aurelien Jarno
2411fde9a4 target-sh4: use rotl/rotr when possible
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-16 13:19:20 +01:00
Blue Swirl
4cd31ad264 tcg/sparc64: fix segfault
With current OpenBSD, code_gen_buffer was mapped 8GB away from
text segment. Then any helpers were beyond the 2GB range of call
instruction genereated by TCG and so the calls would go nowhere,
leading to a segfault.

Fix by specifying an address for the code_gen_buffer,
hopefully free and nearby the helpers.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-16 08:32:27 +00:00
Aurelien Jarno
0c16e71e6a target-sh4: correct use of ! and &
Fix wrong usage of ! and & in MMU related functions. Thanks to Blue
Swirl for reporting the issue.

Reported-by: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-15 13:50:38 +01:00
Blue Swirl
2d5b50749a monitor: fix a typo
Fix usage of wrong variable, spotted by clang:
/src/qemu/monitor.c:2278:36: warning: The left operand of '&' is a garbage value
                        prot = pde & (PG_USER_MASK | PG_RW_MASK |

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-01-15 08:31:00 +00:00
Stefan Weil
0601740a5d make_device_config: Fix non-fatal error message with dash and other shells
ORS=" " adds a blank to the name of the include file.
Some shells (e.g. dash) don't accept input redirection
(tr -d '\r' < $f) when $f ends with a blank, so they
print an error message instead of reading pci.mak.
This is a non-fatal error because pci.mak does not
contain an include line. It was introduced by commit
5d6b423c5c.

Using printf avoids adding a blank and is also supported
by older awk versions (this solution was suggested by
Paolo Bonzini, thank you).

Cc: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Tested-by: Andreas Färber <andreas.faerber@web.de>
2011-01-14 22:00:07 +00:00
Aurelien Jarno
42f5a7e936 MAINTAINERS: add entries for TCG
The MAINTAINERS file was lacking entries concerning the TCG code, add
them based on the git history.

For the common TCG code, is probably better to keep qemu-devel@non-gnu.org
as this code can break easily, so it's better to get it reviewed by a few
persons.

Acked-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:19 +01:00
Aurelien Jarno
ddb13561ac MAINTAINERS: Change MIPS and SH4 maintainers
Since nobody else seems interested in maintaining MIPS and SH4 targets,
and as I have done most of the recent code changes, let officialize
that.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:19 +01:00
Aurelien Jarno
afcacd536e MAINTAINERS: fix typos
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:19 +01:00
Peter Maydell
e12ce78d4a target-arm: Restore IT bits when resuming after an exception
We were not correctly restoring the IT bits when resuming execution
after taking an unexpected exception in the middle of an IT block.
Fix this by tracking them along with PC changes and restoring in
gen_pc_load().

This fixes bug https://bugs.launchpad.net/qemu/+bug/581335

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:19 +01:00
Peter Maydell
964413d9d9 linux-user: ARM: clear the IT bits when invoking a signal handler
When invoking a signal handler for an ARM target, make sure the IT
bits in the CPSR are cleared. (This would otherwise cause incorrect
execution if the IT state was non-zero when an exception occured.
This bug has been masked previously because we weren't getting the
IT state bits at exception entry right anyway.)

Also use the proper cpsr_read()/cpsr_write() interface to update
the CPSR rather than manipulating CPUState fields directly.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:19 +01:00
Peter Maydell
bc4a0de0a2 target-arm: Refactor translation of exception generating instructions
Create a new function which does the common sequence of gen_set_condexec,
gen_set_pc_im, gen_exception, set is_jmp to DISAS_JUMP.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:19 +01:00
Peter Maydell
5de3a9d3b7 target-arm: Remove redundant setting of IT bits before Thumb SWI
Remove a redundant call to gen_set_condexec() in the translation of Thumb
mode SWI. (SWI and WFI generate "exceptions" which happen after the
execution of the instruction, ie when PC and IT bits have updated.
So the condexec bits at this point are not correct. However, the code
that handles finishing the translation of the TB will write the correct
value of the condexec bits later, so the only effect was that a conditional
Thumb SWI would generate slightly worse code than necessary.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:19 +01:00
Peter Maydell
61f74d6a29 target-arm: Translate with user-state from TB flags, not CPUState
When translating, get the user/priv state from the TB flags, not
the CPUState.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:19 +01:00
Peter Maydell
05ed9a9919 target-arm: Set privileged bit in TB flags correctly for M profile
M profile ARM cores don't have a CPSR mode field. Set the bit in the
TB flags that indicates non-user mode correctly for these cores.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:19 +01:00
Peter Maydell
98eac7cab4 target-arm: Translate with condexec bits from TB flags, not CPUState
When translating, the condexec bits for the TB are in the TB flags;
the CPUState condexec bits may be different.

This patch fixes https://bugs.launchpad.net/bugs/604872 where we might
segfault if we took an exception in the middle of a TB with an IT
block, because when we came to retranslate in cpu_restore_state()
the CPUState condexec bits would have advanced compared to the start
of the TB and we would generate different (wrong) code.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:19 +01:00
Peter Maydell
7204ab889f target-arm: Translate with Thumb state from TB flags, not CPUState
The Thumb/ARM state for the TB being translated should come from
the TB flags, not the CPUState.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:19 +01:00
Peter Maydell
69d1fc221a target-arm: Translate with VFP len/stride from TB flags, not CPUState
When translating, the VFP vector length and stride for this TB are encoded
in the TB flags; the CPUState copies may be different and must not be used.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:19 +01:00
Peter Maydell
5df8bac1d3 target-arm: Translate with VFP-enabled from TB flags, not CPUState
When translating code, whether the VFP unit is enabled for this TB
is stored in a bit in the TB flags. Use this rather than incorrectly
reading the FPEXC from the CPUState passed to translation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:19 +01:00
Peter Maydell
a170576856 target-arm: Add symbolic constants for bitfields in TB flags
Add symbolic constants for the bitfields we use in the TB flags.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-01-14 20:39:18 +01:00