qemu-e2k/target
Max Filippov 583e6a5f55 target/xtensa: clean up unaligned access
Xtensa cores may or may not have hardware support for unaligned memory
access. Remove TARGET_ALIGNED_ONLY=y from all xtensa configurations and
pass MO_ALIGN in memory access flags for all operations that would raise
an exception.
Simplify use of gen_load_store_alignment by passing access size and
alignment requirements in single parameter.
Drop condition from xtensa_cpu_do_unaligned_access and replace it with
assertion.
Add a test.

Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2021-05-20 13:02:58 -07:00
..
alpha
arm target/arm: Make sure that commpage's tb->size != 0 2021-05-20 14:19:30 +02:00
avr target/avr: Ignore unimplemented WDR opcode 2021-05-13 19:18:42 +02:00
cris
hexagon Trivial patches pull request 20210503 2021-05-05 13:52:00 +01:00
hppa
i386 s390x fixes and cleanups; also related fixes in xtensa, 2021-05-20 18:42:00 +01:00
m68k
microblaze
mips target/mips: Set set_default_nan_mode with set_snan_bit_is_one 2021-05-16 07:13:51 -05:00
nios2
openrisc
ppc target/ppc: Remove type argument for mmubooke206_get_physical_address 2021-05-19 12:52:07 +10:00
riscv target/riscv: Fix the RV64H decode comment 2021-05-11 20:02:07 +10:00
rx
s390x target/s390x: Fix translation exception on illegal instruction 2021-05-20 14:19:30 +02:00
sh4 target/sh4: Return error if CPUClass::get_phys_page_debug() fails 2021-05-13 19:00:50 +02:00
sparc hw/sparc*: Move cpu_check_irqs() to target/sparc/ 2021-05-04 22:45:53 +01:00
tricore
xtensa target/xtensa: clean up unaligned access 2021-05-20 13:02:58 -07:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00