qemu-e2k/target-mips
Edgar E. Iglesias 5580722456 mips: Break TBs after mfc0_count
Break the TB after reading the count register. This makes it
possible to take timer interrupts immediately after a read of
a possibly expired timer.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-01-18 12:32:46 +01:00
..
TODO target-mips: add copyright notice for mips16 work 2009-12-13 20:20:20 +01:00
cpu.h target-mips: fix host CPU consumption when guest is idle 2010-12-27 00:58:06 +01:00
exec.h target-mips: fix host CPU consumption when guest is idle 2010-12-27 00:58:06 +01:00
helper.c mips: Add support for VInt and VEIC irq modes 2010-08-06 12:21:16 +02:00
helper.h target-mips: fix translation of MT instructions 2010-12-22 11:14:10 +01:00
machine.c target-mips: rename CP0_LLAddr into lladdr 2009-11-22 14:12:13 +01:00
mips-defs.h MIPS: Initial support of fulong mini pc (CPU definition) 2010-06-29 23:07:52 +02:00
op_helper.c softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan() 2011-01-02 11:15:25 +01:00
translate.c mips: Break TBs after mfc0_count 2011-01-18 12:32:46 +01:00
translate_init.c target-xxx: Use fprintf_function (format checking) 2010-10-30 08:01:59 +00:00