e28b77a6b4
We assign the instruction destination register to hex_new_value[num] instead of a TCG temp that gets copied back to hex_new_value[num]. We introduce new functions get_result_gpr[_pair] to facilitate getting the proper destination register. Since we preload hex_new_value for predicated instructions, we don't need the check for slot_cancelled. So, we call gen_log_reg_write instead. We update the helper function generation and gen_tcg.h to maintain the disable-hexagon-idef-parser configuration. Here is a simple example of the differences in the TCG code generated: IN: 0x00400094: 0xf900c102 { if (P0) R2 = and(R0,R1) } BEFORE ---- 00400094 mov_i32 slot_cancelled,$0x0 mov_i32 new_r2,r2 mov_i32 loc2,$0x0 and_i32 tmp0,p0,$0x1 brcond_i32 tmp0,$0x0,eq,$L1 and_i32 tmp0,r0,r1 mov_i32 loc2,tmp0 br $L2 set_label $L1 or_i32 slot_cancelled,slot_cancelled,$0x8 set_label $L2 and_i32 tmp0,slot_cancelled,$0x8 movcond_i32 new_r2,tmp0,$0x0,loc2,new_r2,eq mov_i32 r2,new_r2 AFTER ---- 00400094 mov_i32 slot_cancelled,$0x0 mov_i32 new_r2,r2 and_i32 tmp0,p0,$0x1 brcond_i32 tmp0,$0x0,eq,$L1 and_i32 tmp0,r0,r1 mov_i32 new_r2,tmp0 br $L2 set_label $L1 or_i32 slot_cancelled,slot_cancelled,$0x8 set_label $L2 mov_i32 r2,new_r2 We'll remove the unnecessary manipulation of slot_cancelled in a subsequent patch. Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Anton Johansson <anjo@rev.ng> Message-Id: <20230307025828.1612809-13-tsimpson@quicinc.com> |
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alpha | ||
arm | ||
avr | ||
cris | ||
hexagon | ||
hppa | ||
i386 | ||
loongarch | ||
m68k | ||
microblaze | ||
mips | ||
nios2 | ||
openrisc | ||
ppc | ||
riscv | ||
rx | ||
s390x | ||
sh4 | ||
sparc | ||
tricore | ||
xtensa | ||
Kconfig | ||
meson.build |