qemu-e2k/target/ppc
Richard Henderson 7319d83a73 tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode
We will shortly be interested in distinguishing pointers
from integers in the helper's declaration, as well as a
true void return.  We currently have two parallel 1 bit
fields; merge them and expand to a 3 bit field.

Our current maximum is 7 helper arguments, plus the return
makes 8 * 3 = 24 bits used within the uint32_t typemask.

Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-06-19 08:51:11 -07:00
..
translate target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetree 2021-06-03 18:10:31 +10:00
arch_dump.c target/ppc: created ppc_{store,get}_vscr for generic vscr usage 2021-05-19 10:30:28 +10:00
compat.c
cpu_init.c target/ppc: removed all mentions to PPC_DUMP_CPU 2021-06-03 18:10:31 +10:00
cpu-models.c
cpu-models.h
cpu-param.h
cpu-qom.h target/ppc: Add POWER10 exception model 2021-05-04 13:12:46 +10:00
cpu.c target/ppc: overhauled and moved logic of storing fpscr 2021-06-03 18:10:31 +10:00
cpu.h target/ppc: Add infrastructure for prefixed insns 2021-06-03 18:10:31 +10:00
dfp_helper.c
excp_helper.c target/ppc: powerpc_excp: Consolidade TLB miss code 2021-06-03 18:10:31 +10:00
fpu_helper.c target/ppc: overhauled and moved logic of storing fpscr 2021-06-03 18:10:31 +10:00
gdbstub.c target/ppc: overhauled and moved logic of storing fpscr 2021-06-03 18:10:31 +10:00
helper_regs.c target/ppc: Validate hflags with CONFIG_DEBUG_TCG 2021-05-04 11:41:25 +10:00
helper_regs.h target/ppc: Remove env->immu_idx and env->dmmu_idx 2021-05-04 11:41:25 +10:00
helper.h tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode 2021-06-19 08:51:11 -07:00
insn32.decode target/ppc: Move cmp/cmpi/cmpl/cmpli to decodetree 2021-06-03 18:10:31 +10:00
insn64.decode target/ppc: Implement prefixed integer store instructions 2021-06-03 18:10:31 +10:00
int_helper.c target/ppc: Implement cfuged instruction 2021-06-03 18:10:31 +10:00
internal.h target/ppc: removed all mentions to PPC_DUMP_CPU 2021-06-03 18:10:31 +10:00
kvm_ppc.h
kvm-stub.c
kvm.c
machine.c target/ppc: updated vscr manipulation in machine.c 2021-05-19 10:30:28 +10:00
mem_helper.c target/ppc: Remove env->immu_idx and env->dmmu_idx 2021-05-04 11:41:25 +10:00
meson.build target/ppc: Add infrastructure for prefixed insns 2021-06-03 18:10:31 +10:00
mfrom_table_gen.c
mfrom_table.c.inc
misc_helper.c target/ppc: fold ppc_store_ptcr into it's only caller 2021-06-03 13:22:06 +10:00
mmu_helper.c target/ppc: added ifdefs around TCG-only code 2021-06-03 13:22:06 +10:00
mmu-book3s-v3.c
mmu-book3s-v3.h
mmu-hash32.c target/ppc: removed unnecessary inclusion of helper-proto.h 2021-06-03 13:22:06 +10:00
mmu-hash32.h
mmu-hash64.c target/ppc: added ifdefs around TCG-only code 2021-06-03 13:22:06 +10:00
mmu-hash64.h target/ppc: moved ppc_store_lpcr to misc_helper.c 2021-05-19 10:30:28 +10:00
mmu-radix64.c target/ppc: removed unnecessary inclusion of helper-proto.h 2021-06-03 13:22:06 +10:00
mmu-radix64.h
monitor.c
spr_tcg.h target/ppc: isolated cpu init from translation logic 2021-05-19 10:30:28 +10:00
tcg-stub.c target/ppc: created tcg-stub.c file 2021-06-03 13:22:06 +10:00
timebase_helper.c
trace-events docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
trace.h
translate.c target/ppc: fix single-step exception regression 2021-06-03 18:10:31 +10:00
user_only_helper.c