dc7a88d081
The ARMv8.1-VMID16 extension extends the VMID from 8 bits to 16 bits: * the ID_AA64MMFR1_EL1.VMIDBits field specifies whether the VMID is 8 or 16 bits * the VMID field in VTTBR_EL2 is extended to 16 bits * VTCR_EL2.VS lets the guest specify whether to use the full 16 bits, or use the backwards-compatible 8 bits For QEMU implementing this is trivial: * we do not track VMIDs in TLB entries, so we never use the VMID field * we treat any write to VTTBR_EL2, not just a change to the VMID field bits, as a "possible VMID change" that causes us to throw away TLB entries, so that code doesn't need changing * we allow the guest to read/write the VTCR_EL2.VS bit already So all that's missing is the ID register part: report that we support VMID16 in our 'max' CPU. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200210120146.17631-1-peter.maydell@linaro.org |
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a32-uncond.decode | ||
a32.decode | ||
arch_dump.c | ||
arm_ldst.h | ||
arm-powerctl.c | ||
arm-powerctl.h | ||
arm-semi.c | ||
cpu64.c | ||
cpu-param.h | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
crypto_helper.c | ||
debug_helper.c | ||
gdbstub64.c | ||
gdbstub.c | ||
helper-a64.c | ||
helper-a64.h | ||
helper-sve.h | ||
helper.c | ||
helper.h | ||
idau.h | ||
internals.h | ||
iwmmxt_helper.c | ||
kvm32.c | ||
kvm64.c | ||
kvm_arm.h | ||
kvm-consts.h | ||
kvm-stub.c | ||
kvm.c | ||
m_helper.c | ||
machine.c | ||
Makefile.objs | ||
monitor.c | ||
neon_helper.c | ||
op_addsub.h | ||
op_helper.c | ||
pauth_helper.c | ||
psci.c | ||
sve_helper.c | ||
sve.decode | ||
t16.decode | ||
t32.decode | ||
tlb_helper.c | ||
trace-events | ||
translate-a64.c | ||
translate-a64.h | ||
translate-sve.c | ||
translate-vfp.inc.c | ||
translate.c | ||
translate.h | ||
vec_helper.c | ||
vfp_helper.c | ||
vfp-uncond.decode | ||
vfp.decode |