2013-02-04 13:48:37 +01:00
|
|
|
|
/* Common target dependent code for GDB on AArch64 systems.
|
|
|
|
|
|
2020-01-01 07:20:01 +01:00
|
|
|
|
Copyright (C) 2009-2020 Free Software Foundation, Inc.
|
2013-02-04 13:48:37 +01:00
|
|
|
|
Contributed by ARM Ltd.
|
|
|
|
|
|
|
|
|
|
This file is part of GDB.
|
|
|
|
|
|
|
|
|
|
This program is free software; you can redistribute it and/or modify
|
|
|
|
|
it under the terms of the GNU General Public License as published by
|
|
|
|
|
the Free Software Foundation; either version 3 of the License, or
|
|
|
|
|
(at your option) any later version.
|
|
|
|
|
|
|
|
|
|
This program is distributed in the hope that it will be useful,
|
|
|
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
|
|
|
GNU General Public License for more details.
|
|
|
|
|
|
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
|
|
|
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
|
|
|
|
|
|
|
|
|
#include "defs.h"
|
|
|
|
|
|
|
|
|
|
#include "frame.h"
|
|
|
|
|
#include "gdbcmd.h"
|
|
|
|
|
#include "gdbcore.h"
|
2019-04-06 21:38:10 +02:00
|
|
|
|
#include "dis-asm.h"
|
2019-04-03 04:04:24 +02:00
|
|
|
|
#include "regcache.h"
|
|
|
|
|
#include "reggroups.h"
|
2019-04-06 21:38:10 +02:00
|
|
|
|
#include "value.h"
|
|
|
|
|
#include "arch-utils.h"
|
|
|
|
|
#include "osabi.h"
|
|
|
|
|
#include "frame-unwind.h"
|
|
|
|
|
#include "frame-base.h"
|
2019-04-03 04:04:24 +02:00
|
|
|
|
#include "trad-frame.h"
|
2019-04-06 21:38:10 +02:00
|
|
|
|
#include "objfiles.h"
|
|
|
|
|
#include "dwarf2.h"
|
|
|
|
|
#include "dwarf2-frame.h"
|
|
|
|
|
#include "gdbtypes.h"
|
|
|
|
|
#include "prologue-value.h"
|
|
|
|
|
#include "target-descriptions.h"
|
2013-02-04 13:48:37 +01:00
|
|
|
|
#include "user-regs.h"
|
2019-04-06 21:38:10 +02:00
|
|
|
|
#include "ax-gdb.h"
|
Rename common to gdbsupport
This is the next patch in the ongoing series to move gdbsever to the
top level.
This patch just renames the "common" directory. The idea is to do
this move in two parts: first rename the directory (this patch), then
move the directory to the top. This approach makes the patches a bit
more tractable.
I chose the name "gdbsupport" for the directory. However, as this
patch was largely written by sed, we could pick a new name without too
much difficulty.
Tested by the buildbot.
gdb/ChangeLog
2019-07-09 Tom Tromey <tom@tromey.com>
* contrib/ari/gdb_ari.sh: Change common to gdbsupport.
* configure: Rebuild.
* configure.ac: Change common to gdbsupport.
* gdbsupport: Rename from common.
* acinclude.m4: Change common to gdbsupport.
* Makefile.in (CONFIG_SRC_SUBDIR, COMMON_SFILES)
(HFILES_NO_SRCDIR, stamp-version, ALLDEPFILES): Change common to
gdbsupport.
* aarch64-tdep.c, ada-lang.c, ada-lang.h, agent.c, alloc.c,
amd64-darwin-tdep.c, amd64-dicos-tdep.c, amd64-fbsd-nat.c,
amd64-fbsd-tdep.c, amd64-linux-nat.c, amd64-linux-tdep.c,
amd64-nbsd-tdep.c, amd64-obsd-tdep.c, amd64-sol2-tdep.c,
amd64-tdep.c, amd64-windows-tdep.c, arch-utils.c,
arch/aarch64-insn.c, arch/aarch64.c, arch/aarch64.h, arch/amd64.c,
arch/amd64.h, arch/arm-get-next-pcs.c, arch/arm-linux.c,
arch/arm.c, arch/i386.c, arch/i386.h, arch/ppc-linux-common.c,
arch/riscv.c, arch/riscv.h, arch/tic6x.c, arm-tdep.c, auto-load.c,
auxv.c, ax-gdb.c, ax-general.c, ax.h, breakpoint.c, breakpoint.h,
btrace.c, btrace.h, build-id.c, build-id.h, c-lang.h, charset.c,
charset.h, cli/cli-cmds.c, cli/cli-cmds.h, cli/cli-decode.c,
cli/cli-dump.c, cli/cli-option.h, cli/cli-script.c,
coff-pe-read.c, command.h, compile/compile-c-support.c,
compile/compile-c.h, compile/compile-cplus-symbols.c,
compile/compile-cplus-types.c, compile/compile-cplus.h,
compile/compile-loc2c.c, compile/compile.c, completer.c,
completer.h, contrib/ari/gdb_ari.sh, corefile.c, corelow.c,
cp-support.c, cp-support.h, cp-valprint.c, csky-tdep.c, ctf.c,
darwin-nat.c, debug.c, defs.h, disasm-selftests.c, disasm.c,
disasm.h, dtrace-probe.c, dwarf-index-cache.c,
dwarf-index-cache.h, dwarf-index-write.c, dwarf2-frame.c,
dwarf2expr.c, dwarf2loc.c, dwarf2read.c, event-loop.c,
event-top.c, exceptions.c, exec.c, extension.h, fbsd-nat.c,
features/aarch64-core.c, features/aarch64-fpu.c,
features/aarch64-pauth.c, features/aarch64-sve.c,
features/i386/32bit-avx.c, features/i386/32bit-avx512.c,
features/i386/32bit-core.c, features/i386/32bit-linux.c,
features/i386/32bit-mpx.c, features/i386/32bit-pkeys.c,
features/i386/32bit-segments.c, features/i386/32bit-sse.c,
features/i386/64bit-avx.c, features/i386/64bit-avx512.c,
features/i386/64bit-core.c, features/i386/64bit-linux.c,
features/i386/64bit-mpx.c, features/i386/64bit-pkeys.c,
features/i386/64bit-segments.c, features/i386/64bit-sse.c,
features/i386/x32-core.c, features/riscv/32bit-cpu.c,
features/riscv/32bit-csr.c, features/riscv/32bit-fpu.c,
features/riscv/64bit-cpu.c, features/riscv/64bit-csr.c,
features/riscv/64bit-fpu.c, features/tic6x-c6xp.c,
features/tic6x-core.c, features/tic6x-gp.c, filename-seen-cache.h,
findcmd.c, findvar.c, fork-child.c, gcore.c, gdb_bfd.c, gdb_bfd.h,
gdb_proc_service.h, gdb_regex.c, gdb_select.h, gdb_usleep.c,
gdbarch-selftests.c, gdbthread.h, gdbtypes.h, gnu-nat.c,
go32-nat.c, guile/guile.c, guile/scm-ports.c,
guile/scm-safe-call.c, guile/scm-type.c, i386-fbsd-nat.c,
i386-fbsd-tdep.c, i386-go32-tdep.c, i386-linux-nat.c,
i386-linux-tdep.c, i386-tdep.c, i387-tdep.c,
ia64-libunwind-tdep.c, ia64-linux-nat.c, inf-child.c,
inf-ptrace.c, infcall.c, infcall.h, infcmd.c, inferior-iter.h,
inferior.c, inferior.h, inflow.c, inflow.h, infrun.c, infrun.h,
inline-frame.c, language.h, linespec.c, linux-fork.c, linux-nat.c,
linux-tdep.c, linux-thread-db.c, location.c, machoread.c,
macrotab.h, main.c, maint.c, maint.h, memattr.c, memrange.h,
mi/mi-cmd-break.h, mi/mi-cmd-env.c, mi/mi-cmd-stack.c,
mi/mi-cmd-var.c, mi/mi-interp.c, mi/mi-main.c, mi/mi-parse.h,
minsyms.c, mips-linux-tdep.c, namespace.h,
nat/aarch64-linux-hw-point.c, nat/aarch64-linux-hw-point.h,
nat/aarch64-linux.c, nat/aarch64-sve-linux-ptrace.c,
nat/amd64-linux-siginfo.c, nat/fork-inferior.c,
nat/linux-btrace.c, nat/linux-btrace.h, nat/linux-namespaces.c,
nat/linux-nat.h, nat/linux-osdata.c, nat/linux-personality.c,
nat/linux-procfs.c, nat/linux-ptrace.c, nat/linux-ptrace.h,
nat/linux-waitpid.c, nat/mips-linux-watch.c,
nat/mips-linux-watch.h, nat/ppc-linux.c, nat/x86-dregs.c,
nat/x86-dregs.h, nat/x86-linux-dregs.c, nat/x86-linux.c,
nto-procfs.c, nto-tdep.c, objfile-flags.h, objfiles.c, objfiles.h,
obsd-nat.c, observable.h, osdata.c, p-valprint.c, parse.c,
parser-defs.h, ppc-linux-nat.c, printcmd.c, probe.c, proc-api.c,
procfs.c, producer.c, progspace.h, psymtab.h,
python/py-framefilter.c, python/py-inferior.c, python/py-ref.h,
python/py-type.c, python/python.c, record-btrace.c, record-full.c,
record.c, record.h, regcache-dump.c, regcache.c, regcache.h,
remote-fileio.c, remote-fileio.h, remote-sim.c, remote.c,
riscv-tdep.c, rs6000-aix-tdep.c, rust-exp.y, s12z-tdep.c,
selftest-arch.c, ser-base.c, ser-event.c, ser-pipe.c, ser-tcp.c,
ser-unix.c, skip.c, solib-aix.c, solib-target.c, solib.c,
source-cache.c, source.c, source.h, sparc-nat.c, spu-linux-nat.c,
stack.c, stap-probe.c, symfile-add-flags.h, symfile.c, symfile.h,
symtab.c, symtab.h, target-descriptions.c, target-descriptions.h,
target-memory.c, target.c, target.h, target/waitstatus.c,
target/waitstatus.h, thread-iter.h, thread.c, tilegx-tdep.c,
top.c, top.h, tracefile-tfile.c, tracefile.c, tracepoint.c,
tracepoint.h, tui/tui-io.c, ui-file.c, ui-out.h,
unittests/array-view-selftests.c,
unittests/child-path-selftests.c, unittests/cli-utils-selftests.c,
unittests/common-utils-selftests.c,
unittests/copy_bitwise-selftests.c, unittests/environ-selftests.c,
unittests/format_pieces-selftests.c,
unittests/function-view-selftests.c,
unittests/lookup_name_info-selftests.c,
unittests/memory-map-selftests.c, unittests/memrange-selftests.c,
unittests/mkdir-recursive-selftests.c,
unittests/observable-selftests.c,
unittests/offset-type-selftests.c, unittests/optional-selftests.c,
unittests/parse-connection-spec-selftests.c,
unittests/ptid-selftests.c, unittests/rsp-low-selftests.c,
unittests/scoped_fd-selftests.c,
unittests/scoped_mmap-selftests.c,
unittests/scoped_restore-selftests.c,
unittests/string_view-selftests.c, unittests/style-selftests.c,
unittests/tracepoint-selftests.c, unittests/unpack-selftests.c,
unittests/utils-selftests.c, unittests/xml-utils-selftests.c,
utils.c, utils.h, valarith.c, valops.c, valprint.c, value.c,
value.h, varobj.c, varobj.h, windows-nat.c, x86-linux-nat.c,
xml-support.c, xml-support.h, xml-tdesc.h, xstormy16-tdep.c,
xtensa-linux-nat.c, dwarf2read.h: Change common to gdbsupport.
gdb/gdbserver/ChangeLog
2019-07-09 Tom Tromey <tom@tromey.com>
* configure: Rebuild.
* configure.ac: Change common to gdbsupport.
* acinclude.m4: Change common to gdbsupport.
* Makefile.in (SFILES, OBS, GDBREPLAY_OBS, IPA_OBJS)
(version-generated.c, gdbsupport/%-ipa.o, gdbsupport/%.o): Change
common to gdbsupport.
* ax.c, event-loop.c, fork-child.c, gdb_proc_service.h,
gdbreplay.c, gdbthread.h, hostio-errno.c, hostio.c, i387-fp.c,
inferiors.c, inferiors.h, linux-aarch64-tdesc-selftest.c,
linux-amd64-ipa.c, linux-i386-ipa.c, linux-low.c,
linux-tic6x-low.c, linux-x86-low.c, linux-x86-tdesc-selftest.c,
linux-x86-tdesc.c, lynx-i386-low.c, lynx-low.c, mem-break.h,
nto-x86-low.c, regcache.c, regcache.h, remote-utils.c, server.c,
server.h, spu-low.c, symbol.c, target.h, tdesc.c, tdesc.h,
thread-db.c, tracepoint.c, win32-i386-low.c, win32-low.c: Change
common to gdbsupport.
2019-05-06 04:29:24 +02:00
|
|
|
|
#include "gdbsupport/selftest.h"
|
2019-04-06 21:38:10 +02:00
|
|
|
|
|
|
|
|
|
#include "aarch64-tdep.h"
|
|
|
|
|
#include "aarch64-ravenscar-thread.h"
|
|
|
|
|
|
|
|
|
|
#include "record.h"
|
|
|
|
|
#include "record-full.h"
|
|
|
|
|
#include "arch/aarch64-insn.h"
|
Don't include gdbarch.h from defs.h
I touched symtab.h and was surprised to see how many files were
rebuilt. I looked into it a bit, and found that defs.h includes
gdbarch.h, which in turn includes many things.
gdbarch.h is only needed by a minority ofthe files in gdb, so this
patch removes the include from defs.h and updates the fallout.
I did "wc -l" on the files in build/gdb/.deps; this patch reduces the
line count from 139935 to 137030; so there are definitely future
build-time savings here.
Note that while I configured with --enable-targets=all, it's possible
that some *-nat.c file needs an update. I could not test all of
these. The buildbot caught a few problems along these lines.
gdb/ChangeLog
2019-07-10 Tom Tromey <tom@tromey.com>
* defs.h: Don't include gdbarch.h.
* aarch64-ravenscar-thread.c, aarch64-tdep.c, alpha-bsd-tdep.h,
alpha-linux-tdep.c, alpha-mdebug-tdep.c, arch-utils.h, arm-tdep.h,
ax-general.c, btrace.c, buildsym-legacy.c, buildsym.h, c-lang.c,
cli/cli-decode.h, cli/cli-dump.c, cli/cli-script.h,
cli/cli-style.h, coff-pe-read.h, compile/compile-c-support.c,
compile/compile-cplus.h, compile/compile-loc2c.c, corefile.c,
cp-valprint.c, cris-linux-tdep.c, ctf.c, d-lang.c, d-namespace.c,
dcache.c, dicos-tdep.c, dictionary.c, disasm-selftests.c,
dummy-frame.c, dummy-frame.h, dwarf2-frame-tailcall.c,
dwarf2expr.c, expression.h, f-lang.c, frame-base.c,
frame-unwind.c, frv-linux-tdep.c, gdbarch-selftests.c, gdbtypes.h,
go-lang.c, hppa-nbsd-tdep.c, hppa-obsd-tdep.c, i386-dicos-tdep.c,
i386-tdep.h, ia64-vms-tdep.c, interps.h, language.c,
linux-record.c, location.h, m2-lang.c, m32r-linux-tdep.c,
mem-break.c, memattr.c, mn10300-linux-tdep.c, nios2-linux-tdep.c,
objfiles.h, opencl-lang.c, or1k-linux-tdep.c, p-lang.c,
parser-defs.h, ppc-tdep.h, probe.h, python/py-record-btrace.c,
record-btrace.c, record.h, regcache-dump.c, regcache.h,
riscv-fbsd-tdep.c, riscv-linux-tdep.c, rust-exp.y,
sh-linux-tdep.c, sh-nbsd-tdep.c, source-cache.c,
sparc-nbsd-tdep.c, sparc-obsd-tdep.c, sparc-ravenscar-thread.c,
sparc64-fbsd-tdep.c, std-regs.c, target-descriptions.h,
target-float.c, tic6x-linux-tdep.c, tilegx-linux-tdep.c, top.c,
tracefile.c, trad-frame.c, type-stack.h, ui-style.c, utils.c,
utils.h, valarith.c, valprint.c, varobj.c, x86-tdep.c,
xml-support.h, xtensa-linux-tdep.c, cli/cli-cmds.h: Update.
* s390-linux-nat.c, procfs.c, inf-ptrace.c: Likewise.
2019-06-09 23:21:02 +02:00
|
|
|
|
#include "gdbarch.h"
|
2019-04-06 21:38:10 +02:00
|
|
|
|
|
|
|
|
|
#include "opcode/aarch64.h"
|
|
|
|
|
#include <algorithm>
|
2015-10-07 10:52:46 +02:00
|
|
|
|
|
|
|
|
|
#define submask(x) ((1L << ((x) + 1)) - 1)
|
|
|
|
|
#define bit(obj,st) (((obj) >> (st)) & 1)
|
|
|
|
|
#define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
|
|
|
|
|
|
2018-08-29 12:28:10 +02:00
|
|
|
|
/* A Homogeneous Floating-Point or Short-Vector Aggregate may have at most
|
|
|
|
|
four members. */
|
|
|
|
|
#define HA_MAX_NUM_FLDS 4
|
|
|
|
|
|
2018-05-31 14:33:04 +02:00
|
|
|
|
/* All possible aarch64 target descriptors. */
|
2019-03-22 10:58:42 +01:00
|
|
|
|
struct target_desc *tdesc_aarch64_list[AARCH64_MAX_SVE_VQ + 1][2/*pauth*/];
|
2018-05-31 14:33:04 +02:00
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* The standard register names, and all the valid aliases for them. */
|
|
|
|
|
static const struct
|
|
|
|
|
{
|
|
|
|
|
const char *const name;
|
|
|
|
|
int regnum;
|
|
|
|
|
} aarch64_register_aliases[] =
|
|
|
|
|
{
|
|
|
|
|
/* 64-bit register names. */
|
|
|
|
|
{"fp", AARCH64_FP_REGNUM},
|
|
|
|
|
{"lr", AARCH64_LR_REGNUM},
|
|
|
|
|
{"sp", AARCH64_SP_REGNUM},
|
|
|
|
|
|
|
|
|
|
/* 32-bit register names. */
|
|
|
|
|
{"w0", AARCH64_X0_REGNUM + 0},
|
|
|
|
|
{"w1", AARCH64_X0_REGNUM + 1},
|
|
|
|
|
{"w2", AARCH64_X0_REGNUM + 2},
|
|
|
|
|
{"w3", AARCH64_X0_REGNUM + 3},
|
|
|
|
|
{"w4", AARCH64_X0_REGNUM + 4},
|
|
|
|
|
{"w5", AARCH64_X0_REGNUM + 5},
|
|
|
|
|
{"w6", AARCH64_X0_REGNUM + 6},
|
|
|
|
|
{"w7", AARCH64_X0_REGNUM + 7},
|
|
|
|
|
{"w8", AARCH64_X0_REGNUM + 8},
|
|
|
|
|
{"w9", AARCH64_X0_REGNUM + 9},
|
|
|
|
|
{"w10", AARCH64_X0_REGNUM + 10},
|
|
|
|
|
{"w11", AARCH64_X0_REGNUM + 11},
|
|
|
|
|
{"w12", AARCH64_X0_REGNUM + 12},
|
|
|
|
|
{"w13", AARCH64_X0_REGNUM + 13},
|
|
|
|
|
{"w14", AARCH64_X0_REGNUM + 14},
|
|
|
|
|
{"w15", AARCH64_X0_REGNUM + 15},
|
|
|
|
|
{"w16", AARCH64_X0_REGNUM + 16},
|
|
|
|
|
{"w17", AARCH64_X0_REGNUM + 17},
|
|
|
|
|
{"w18", AARCH64_X0_REGNUM + 18},
|
|
|
|
|
{"w19", AARCH64_X0_REGNUM + 19},
|
|
|
|
|
{"w20", AARCH64_X0_REGNUM + 20},
|
|
|
|
|
{"w21", AARCH64_X0_REGNUM + 21},
|
|
|
|
|
{"w22", AARCH64_X0_REGNUM + 22},
|
|
|
|
|
{"w23", AARCH64_X0_REGNUM + 23},
|
|
|
|
|
{"w24", AARCH64_X0_REGNUM + 24},
|
|
|
|
|
{"w25", AARCH64_X0_REGNUM + 25},
|
|
|
|
|
{"w26", AARCH64_X0_REGNUM + 26},
|
|
|
|
|
{"w27", AARCH64_X0_REGNUM + 27},
|
|
|
|
|
{"w28", AARCH64_X0_REGNUM + 28},
|
|
|
|
|
{"w29", AARCH64_X0_REGNUM + 29},
|
|
|
|
|
{"w30", AARCH64_X0_REGNUM + 30},
|
|
|
|
|
|
|
|
|
|
/* specials */
|
|
|
|
|
{"ip0", AARCH64_X0_REGNUM + 16},
|
|
|
|
|
{"ip1", AARCH64_X0_REGNUM + 17}
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* The required core 'R' registers. */
|
|
|
|
|
static const char *const aarch64_r_register_names[] =
|
|
|
|
|
{
|
|
|
|
|
/* These registers must appear in consecutive RAW register number
|
|
|
|
|
order and they must begin with AARCH64_X0_REGNUM! */
|
|
|
|
|
"x0", "x1", "x2", "x3",
|
|
|
|
|
"x4", "x5", "x6", "x7",
|
|
|
|
|
"x8", "x9", "x10", "x11",
|
|
|
|
|
"x12", "x13", "x14", "x15",
|
|
|
|
|
"x16", "x17", "x18", "x19",
|
|
|
|
|
"x20", "x21", "x22", "x23",
|
|
|
|
|
"x24", "x25", "x26", "x27",
|
|
|
|
|
"x28", "x29", "x30", "sp",
|
|
|
|
|
"pc", "cpsr"
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* The FP/SIMD 'V' registers. */
|
|
|
|
|
static const char *const aarch64_v_register_names[] =
|
|
|
|
|
{
|
|
|
|
|
/* These registers must appear in consecutive RAW register number
|
|
|
|
|
order and they must begin with AARCH64_V0_REGNUM! */
|
|
|
|
|
"v0", "v1", "v2", "v3",
|
|
|
|
|
"v4", "v5", "v6", "v7",
|
|
|
|
|
"v8", "v9", "v10", "v11",
|
|
|
|
|
"v12", "v13", "v14", "v15",
|
|
|
|
|
"v16", "v17", "v18", "v19",
|
|
|
|
|
"v20", "v21", "v22", "v23",
|
|
|
|
|
"v24", "v25", "v26", "v27",
|
|
|
|
|
"v28", "v29", "v30", "v31",
|
|
|
|
|
"fpsr",
|
|
|
|
|
"fpcr"
|
|
|
|
|
};
|
|
|
|
|
|
2018-06-01 17:02:37 +02:00
|
|
|
|
/* The SVE 'Z' and 'P' registers. */
|
|
|
|
|
static const char *const aarch64_sve_register_names[] =
|
|
|
|
|
{
|
|
|
|
|
/* These registers must appear in consecutive RAW register number
|
|
|
|
|
order and they must begin with AARCH64_SVE_Z0_REGNUM! */
|
|
|
|
|
"z0", "z1", "z2", "z3",
|
|
|
|
|
"z4", "z5", "z6", "z7",
|
|
|
|
|
"z8", "z9", "z10", "z11",
|
|
|
|
|
"z12", "z13", "z14", "z15",
|
|
|
|
|
"z16", "z17", "z18", "z19",
|
|
|
|
|
"z20", "z21", "z22", "z23",
|
|
|
|
|
"z24", "z25", "z26", "z27",
|
|
|
|
|
"z28", "z29", "z30", "z31",
|
|
|
|
|
"fpsr", "fpcr",
|
|
|
|
|
"p0", "p1", "p2", "p3",
|
|
|
|
|
"p4", "p5", "p6", "p7",
|
|
|
|
|
"p8", "p9", "p10", "p11",
|
|
|
|
|
"p12", "p13", "p14", "p15",
|
|
|
|
|
"ffr", "vg"
|
|
|
|
|
};
|
|
|
|
|
|
2019-03-22 11:31:02 +01:00
|
|
|
|
static const char *const aarch64_pauth_register_names[] =
|
|
|
|
|
{
|
|
|
|
|
/* Authentication mask for data pointer. */
|
|
|
|
|
"pauth_dmask",
|
|
|
|
|
/* Authentication mask for code pointer. */
|
|
|
|
|
"pauth_cmask"
|
|
|
|
|
};
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* AArch64 prologue cache structure. */
|
|
|
|
|
struct aarch64_prologue_cache
|
|
|
|
|
{
|
2015-07-09 17:35:11 +02:00
|
|
|
|
/* The program counter at the start of the function. It is used to
|
|
|
|
|
identify this frame as a prologue frame. */
|
|
|
|
|
CORE_ADDR func;
|
|
|
|
|
|
|
|
|
|
/* The program counter at the time this frame was created; i.e. where
|
|
|
|
|
this function was called from. It is used to identify this frame as a
|
|
|
|
|
stub frame. */
|
|
|
|
|
CORE_ADDR prev_pc;
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* The stack pointer at the time this frame was created; i.e. the
|
|
|
|
|
caller's stack pointer when this function was called. It is used
|
|
|
|
|
to identify this frame. */
|
|
|
|
|
CORE_ADDR prev_sp;
|
|
|
|
|
|
2015-07-09 17:35:11 +02:00
|
|
|
|
/* Is the target available to read from? */
|
|
|
|
|
int available_p;
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* The frame base for this frame is just prev_sp - frame size.
|
|
|
|
|
FRAMESIZE is the distance from the frame pointer to the
|
|
|
|
|
initial stack pointer. */
|
|
|
|
|
int framesize;
|
|
|
|
|
|
|
|
|
|
/* The register used to hold the frame pointer for this frame. */
|
|
|
|
|
int framereg;
|
|
|
|
|
|
|
|
|
|
/* Saved register offsets. */
|
|
|
|
|
struct trad_frame_saved_reg *saved_regs;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
show_aarch64_debug (struct ui_file *file, int from_tty,
|
|
|
|
|
struct cmd_list_element *c, const char *value)
|
|
|
|
|
{
|
|
|
|
|
fprintf_filtered (file, _("AArch64 debugging is %s.\n"), value);
|
|
|
|
|
}
|
|
|
|
|
|
2017-03-22 13:35:31 +01:00
|
|
|
|
namespace {
|
|
|
|
|
|
2016-12-02 10:37:30 +01:00
|
|
|
|
/* Abstract instruction reader. */
|
|
|
|
|
|
|
|
|
|
class abstract_instruction_reader
|
|
|
|
|
{
|
|
|
|
|
public:
|
|
|
|
|
/* Read in one instruction. */
|
|
|
|
|
virtual ULONGEST read (CORE_ADDR memaddr, int len,
|
|
|
|
|
enum bfd_endian byte_order) = 0;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* Instruction reader from real target. */
|
|
|
|
|
|
|
|
|
|
class instruction_reader : public abstract_instruction_reader
|
|
|
|
|
{
|
|
|
|
|
public:
|
|
|
|
|
ULONGEST read (CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
|
2018-04-27 06:46:54 +02:00
|
|
|
|
override
|
2016-12-02 10:37:30 +01:00
|
|
|
|
{
|
2016-12-09 10:51:20 +01:00
|
|
|
|
return read_code_unsigned_integer (memaddr, len, byte_order);
|
2016-12-02 10:37:30 +01:00
|
|
|
|
}
|
|
|
|
|
};
|
|
|
|
|
|
2017-03-22 13:35:31 +01:00
|
|
|
|
} // namespace
|
|
|
|
|
|
2019-08-07 10:47:57 +02:00
|
|
|
|
/* If address signing is enabled, mask off the signature bits from the link
|
|
|
|
|
register, which is passed by value in ADDR, using the register values in
|
|
|
|
|
THIS_FRAME. */
|
2019-03-22 11:39:11 +01:00
|
|
|
|
|
|
|
|
|
static CORE_ADDR
|
2019-08-07 10:47:57 +02:00
|
|
|
|
aarch64_frame_unmask_lr (struct gdbarch_tdep *tdep,
|
|
|
|
|
struct frame_info *this_frame, CORE_ADDR addr)
|
2019-03-22 11:39:11 +01:00
|
|
|
|
{
|
|
|
|
|
if (tdep->has_pauth ()
|
|
|
|
|
&& frame_unwind_register_unsigned (this_frame,
|
|
|
|
|
tdep->pauth_ra_state_regnum))
|
|
|
|
|
{
|
|
|
|
|
int cmask_num = AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base);
|
|
|
|
|
CORE_ADDR cmask = frame_unwind_register_unsigned (this_frame, cmask_num);
|
|
|
|
|
addr = addr & ~cmask;
|
2019-08-07 10:47:57 +02:00
|
|
|
|
|
|
|
|
|
/* Record in the frame that the link register required unmasking. */
|
|
|
|
|
set_frame_previous_pc_masked (this_frame);
|
2019-03-22 11:39:11 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return addr;
|
|
|
|
|
}
|
|
|
|
|
|
2019-08-16 11:19:18 +02:00
|
|
|
|
/* Implement the "get_pc_address_flags" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static std::string
|
|
|
|
|
aarch64_get_pc_address_flags (frame_info *frame, CORE_ADDR pc)
|
|
|
|
|
{
|
|
|
|
|
if (pc != 0 && get_frame_pc_masked (frame))
|
|
|
|
|
return "PAC";
|
|
|
|
|
|
|
|
|
|
return "";
|
|
|
|
|
}
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* Analyze a prologue, looking for a recognizable stack frame
|
|
|
|
|
and frame pointer. Scan until we encounter a store that could
|
|
|
|
|
clobber the stack frame unexpectedly, or an unknown instruction. */
|
|
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
|
aarch64_analyze_prologue (struct gdbarch *gdbarch,
|
|
|
|
|
CORE_ADDR start, CORE_ADDR limit,
|
2016-12-02 10:37:30 +01:00
|
|
|
|
struct aarch64_prologue_cache *cache,
|
|
|
|
|
abstract_instruction_reader& reader)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
|
|
|
|
|
int i;
|
2016-10-11 13:12:46 +02:00
|
|
|
|
/* Track X registers and D registers in prologue. */
|
|
|
|
|
pv_t regs[AARCH64_X_REGISTER_COUNT + AARCH64_D_REGISTER_COUNT];
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2016-10-11 13:12:46 +02:00
|
|
|
|
for (i = 0; i < AARCH64_X_REGISTER_COUNT + AARCH64_D_REGISTER_COUNT; i++)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
regs[i] = pv_register (i, 0);
|
C++-ify prologue-value's pv_area
This patch is an initial C++-ification of pv_area, from
prologue-value. It turns pv_area into a class with a constructor and
destructor; renames the data members; and changes various functions to
be member functions. This allows the removal of
make_cleanup_free_pv_area.
gdb/ChangeLog
2017-10-12 Tom Tromey <tom@tromey.com>
* s390-linux-tdep.c (s390_store, s390_load)
(s390_check_for_saved, s390_analyze_prologue): Update.
* rx-tdep.c (check_for_saved, rx_analyze_prologue): Update.
* rl78-tdep.c (rl78_analyze_prologue, check_for_saved): Update.
* prologue-value.h (class pv_area): Move from prologue-value.c.
Change names of members. Add constructor, destructor, member
functions.
(make_pv_area, free_pv_area, make_cleanup_free_pv_area)
(pv_area_store, pv_area_fetch, pv_area_store_would_trash)
(pv_area_fetch, pv_area_scan): Don't declare.
* prologue-value.c (struct pv_area::area_entry): Now member of
pv_area.
(struct pv_area): Move to prologue-value.h.
(pv_area::pv_area): Rename from make_pv_area.
(pv_area::~pv_area): Rename from free_pv_area.
(do_free_pv_area_cleanup, make_cleanup_free_pv_area): Remove.
(clear_entries, find_entry, overlaps, store_would_trash, store)
(fetch, find_reg, scan): Now member of pv_area.
Remove "area" argument. Update.
* msp430-tdep.c (check_for_saved, msp430_analyze_prologue):
Update.
* mn10300-tdep.c (push_reg, check_for_saved)
(mn10300_analyze_prologue): Update.
* mep-tdep.c (is_arg_spill, check_for_saved)
(mep_analyze_prologue): Update.
* m32c-tdep.c (m32c_pv_push, m32c_srcdest_fetch)
(m32c_srcdest_store, m32c_pv_enter, m32c_is_arg_spill)
(m32c_is_struct_return, m32c_analyze_prologue): Update.
* arm-tdep.c (thumb_analyze_prologue, arm_analyze_prologue):
Update.
* arc-tdep.c (arc_is_in_prologue, arc_analyze_prologue): Update.
* aarch64-tdep.c (aarch64_analyze_prologue): Update.
2017-10-08 02:23:36 +02:00
|
|
|
|
pv_area stack (AARCH64_SP_REGNUM, gdbarch_addr_bit (gdbarch));
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
for (; start < limit; start += 4)
|
|
|
|
|
{
|
|
|
|
|
uint32_t insn;
|
2015-11-05 10:44:32 +01:00
|
|
|
|
aarch64_inst inst;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2016-12-02 10:37:30 +01:00
|
|
|
|
insn = reader.read (start, 4, byte_order_for_code);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
Modify AArch64 Assembly and disassembly functions to be able to fail and report why.
This patch if the first patch in a series to add the ability to add constraints
to system registers that an instruction must adhere to in order for the register
to be usable with that instruction.
These constraints can also be used to disambiguate between registers with the
same encoding during disassembly.
This patch adds a new flags entry in the sysreg structures and ensures it is
filled in and read out during assembly/disassembly. It also adds the ability for
the assemble and disassemble functions to be able to gracefully fail and re-use
the existing error reporting infrastructure.
The return type of these functions are changed to a boolean to denote success or
failure and the error structure is passed around to them. This requires
aarch64-gen changes so a lot of the changes here are just mechanical.
gas/
PR binutils/21446
* config/tc-aarch64.c (parse_sys_reg): Return register flags.
(parse_operands): Fill in register flags.
gdb/
PR binutils/21446
* aarch64-tdep.c (aarch64_analyze_prologue,
aarch64_software_single_step, aarch64_displaced_step_copy_insn):
Indicate not interested in errors.
include/
PR binutils/21446
* opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
(aarch64_decode_insn): Accept error struct.
opcodes/
PR binutils/21446
* aarch64-asm.h (aarch64_insert_operand, aarch64_##x): Return boolean
and take error struct.
* aarch64-asm.c (aarch64_ext_regno, aarch64_ins_reglane,
aarch64_ins_reglist, aarch64_ins_ldst_reglist,
aarch64_ins_ldst_reglist_r, aarch64_ins_ldst_elemlist,
aarch64_ins_advsimd_imm_shift, aarch64_ins_imm, aarch64_ins_imm_half,
aarch64_ins_advsimd_imm_modified, aarch64_ins_fpimm,
aarch64_ins_imm_rotate1, aarch64_ins_imm_rotate2, aarch64_ins_fbits,
aarch64_ins_aimm, aarch64_ins_limm_1, aarch64_ins_limm,
aarch64_ins_inv_limm, aarch64_ins_ft, aarch64_ins_addr_simple,
aarch64_ins_addr_regoff, aarch64_ins_addr_offset, aarch64_ins_addr_simm,
aarch64_ins_addr_simm10, aarch64_ins_addr_uimm12,
aarch64_ins_simd_addr_post, aarch64_ins_cond, aarch64_ins_sysreg,
aarch64_ins_pstatefield, aarch64_ins_sysins_op, aarch64_ins_barrier,
aarch64_ins_prfop, aarch64_ins_hint, aarch64_ins_reg_extended,
aarch64_ins_reg_shifted, aarch64_ins_sve_addr_ri_s4xvl,
aarch64_ins_sve_addr_ri_s6xvl, aarch64_ins_sve_addr_ri_s9xvl,
aarch64_ins_sve_addr_ri_s4, aarch64_ins_sve_addr_ri_u6,
aarch64_ins_sve_addr_rr_lsl, aarch64_ins_sve_addr_rz_xtw,
aarch64_ins_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
aarch64_ins_sve_addr_zz_lsl, aarch64_ins_sve_addr_zz_sxtw,
aarch64_ins_sve_addr_zz_uxtw, aarch64_ins_sve_aimm,
aarch64_ins_sve_asimm, aarch64_ins_sve_index, aarch64_ins_sve_limm_mov,
aarch64_ins_sve_quad_index, aarch64_ins_sve_reglist,
aarch64_ins_sve_scale, aarch64_ins_sve_shlimm, aarch64_ins_sve_shrimm,
aarch64_ins_sve_float_half_one, aarch64_ins_sve_float_half_two,
aarch64_ins_sve_float_zero_one, aarch64_opcode_encode): Likewise.
* aarch64-dis.h (aarch64_extract_operand, aarch64_##x): Likewise.
* aarch64-dis.c (aarch64_ext_regno, aarch64_ext_reglane,
aarch64_ext_reglist, aarch64_ext_ldst_reglist,
aarch64_ext_ldst_reglist_r, aarch64_ext_ldst_elemlist,
aarch64_ext_advsimd_imm_shift, aarch64_ext_imm, aarch64_ext_imm_half,
aarch64_ext_advsimd_imm_modified, aarch64_ext_fpimm,
aarch64_ext_imm_rotate1, aarch64_ext_imm_rotate2, aarch64_ext_fbits,
aarch64_ext_aimm, aarch64_ext_limm_1, aarch64_ext_limm, decode_limm,
aarch64_ext_inv_limm, aarch64_ext_ft, aarch64_ext_addr_simple,
aarch64_ext_addr_regoff, aarch64_ext_addr_offset, aarch64_ext_addr_simm,
aarch64_ext_addr_simm10, aarch64_ext_addr_uimm12,
aarch64_ext_simd_addr_post, aarch64_ext_cond, aarch64_ext_sysreg,
aarch64_ext_pstatefield, aarch64_ext_sysins_op, aarch64_ext_barrier,
aarch64_ext_prfop, aarch64_ext_hint, aarch64_ext_reg_extended,
aarch64_ext_reg_shifted, aarch64_ext_sve_addr_ri_s4xvl,
aarch64_ext_sve_addr_ri_s6xvl, aarch64_ext_sve_addr_ri_s9xvl,
aarch64_ext_sve_addr_ri_s4, aarch64_ext_sve_addr_ri_u6,
aarch64_ext_sve_addr_rr_lsl, aarch64_ext_sve_addr_rz_xtw,
aarch64_ext_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
aarch64_ext_sve_addr_zz_lsl, aarch64_ext_sve_addr_zz_sxtw,
aarch64_ext_sve_addr_zz_uxtw, aarch64_ext_sve_aimm,
aarch64_ext_sve_asimm, aarch64_ext_sve_index, aarch64_ext_sve_limm_mov,
aarch64_ext_sve_quad_index, aarch64_ext_sve_reglist,
aarch64_ext_sve_scale, aarch64_ext_sve_shlimm, aarch64_ext_sve_shrimm,
aarch64_ext_sve_float_half_one, aarch64_ext_sve_float_half_two,
aarch64_ext_sve_float_zero_one, aarch64_opcode_decode): Likewise.
(determine_disassembling_preference, aarch64_decode_insn,
print_insn_aarch64_word, print_insn_data): Take errors struct.
(print_insn_aarch64): Use errors.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-gen.c (print_operand_inserter): Use errors and change type to
boolean in aarch64_insert_operan.
(print_operand_extractor): Likewise.
* aarch64-opc.c (aarch64_print_operand): Use sysreg struct.
2018-05-15 17:11:42 +02:00
|
|
|
|
if (aarch64_decode_insn (insn, &inst, 1, NULL) != 0)
|
2015-11-05 10:44:32 +01:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
if (inst.opcode->iclass == addsub_imm
|
|
|
|
|
&& (inst.opcode->op == OP_ADD
|
|
|
|
|
|| strcmp ("sub", inst.opcode->name) == 0))
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
2015-11-05 10:44:32 +01:00
|
|
|
|
unsigned rd = inst.operands[0].reg.regno;
|
|
|
|
|
unsigned rn = inst.operands[1].reg.regno;
|
|
|
|
|
|
|
|
|
|
gdb_assert (aarch64_num_of_operands (inst.opcode) == 3);
|
|
|
|
|
gdb_assert (inst.operands[0].type == AARCH64_OPND_Rd_SP);
|
|
|
|
|
gdb_assert (inst.operands[1].type == AARCH64_OPND_Rn_SP);
|
|
|
|
|
gdb_assert (inst.operands[2].type == AARCH64_OPND_AIMM);
|
|
|
|
|
|
|
|
|
|
if (inst.opcode->op == OP_ADD)
|
|
|
|
|
{
|
|
|
|
|
regs[rd] = pv_add_constant (regs[rn],
|
|
|
|
|
inst.operands[2].imm.value);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
regs[rd] = pv_add_constant (regs[rn],
|
|
|
|
|
-inst.operands[2].imm.value);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else if (inst.opcode->iclass == pcreladdr
|
|
|
|
|
&& inst.operands[1].type == AARCH64_OPND_ADDR_ADRP)
|
|
|
|
|
{
|
|
|
|
|
gdb_assert (aarch64_num_of_operands (inst.opcode) == 2);
|
|
|
|
|
gdb_assert (inst.operands[0].type == AARCH64_OPND_Rd);
|
|
|
|
|
|
|
|
|
|
regs[inst.operands[0].reg.regno] = pv_unknown ();
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
2015-11-05 10:44:32 +01:00
|
|
|
|
else if (inst.opcode->iclass == branch_imm)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
/* Stop analysis on branch. */
|
|
|
|
|
break;
|
|
|
|
|
}
|
2015-11-05 10:44:32 +01:00
|
|
|
|
else if (inst.opcode->iclass == condbranch)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
/* Stop analysis on branch. */
|
|
|
|
|
break;
|
|
|
|
|
}
|
2015-11-05 10:44:32 +01:00
|
|
|
|
else if (inst.opcode->iclass == branch_reg)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
/* Stop analysis on branch. */
|
|
|
|
|
break;
|
|
|
|
|
}
|
2015-11-05 10:44:32 +01:00
|
|
|
|
else if (inst.opcode->iclass == compbranch)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
/* Stop analysis on branch. */
|
|
|
|
|
break;
|
|
|
|
|
}
|
2015-11-05 10:44:32 +01:00
|
|
|
|
else if (inst.opcode->op == OP_MOVZ)
|
|
|
|
|
{
|
|
|
|
|
gdb_assert (inst.operands[0].type == AARCH64_OPND_Rd);
|
|
|
|
|
regs[inst.operands[0].reg.regno] = pv_unknown ();
|
|
|
|
|
}
|
|
|
|
|
else if (inst.opcode->iclass == log_shift
|
|
|
|
|
&& strcmp (inst.opcode->name, "orr") == 0)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
2015-11-05 10:44:32 +01:00
|
|
|
|
unsigned rd = inst.operands[0].reg.regno;
|
|
|
|
|
unsigned rn = inst.operands[1].reg.regno;
|
|
|
|
|
unsigned rm = inst.operands[2].reg.regno;
|
|
|
|
|
|
|
|
|
|
gdb_assert (inst.operands[0].type == AARCH64_OPND_Rd);
|
|
|
|
|
gdb_assert (inst.operands[1].type == AARCH64_OPND_Rn);
|
|
|
|
|
gdb_assert (inst.operands[2].type == AARCH64_OPND_Rm_SFT);
|
|
|
|
|
|
|
|
|
|
if (inst.operands[2].shifter.amount == 0
|
|
|
|
|
&& rn == AARCH64_SP_REGNUM)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
regs[rd] = regs[rm];
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (aarch64_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
{
|
|
|
|
|
debug_printf ("aarch64: prologue analysis gave up "
|
2016-02-15 11:05:56 +01:00
|
|
|
|
"addr=%s opcode=0x%x (orr x register)\n",
|
2015-09-15 19:38:57 +02:00
|
|
|
|
core_addr_to_string_nz (start), insn);
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
2015-11-05 10:44:32 +01:00
|
|
|
|
else if (inst.opcode->op == OP_STUR)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
2015-11-05 10:44:32 +01:00
|
|
|
|
unsigned rt = inst.operands[0].reg.regno;
|
|
|
|
|
unsigned rn = inst.operands[1].addr.base_regno;
|
2019-08-14 16:47:05 +02:00
|
|
|
|
int size = aarch64_get_qualifier_esize (inst.operands[0].qualifier);
|
2015-11-05 10:44:32 +01:00
|
|
|
|
|
|
|
|
|
gdb_assert (aarch64_num_of_operands (inst.opcode) == 2);
|
|
|
|
|
gdb_assert (inst.operands[0].type == AARCH64_OPND_Rt);
|
|
|
|
|
gdb_assert (inst.operands[1].type == AARCH64_OPND_ADDR_SIMM9);
|
|
|
|
|
gdb_assert (!inst.operands[1].addr.offset.is_reg);
|
|
|
|
|
|
2019-08-14 16:47:05 +02:00
|
|
|
|
stack.store
|
|
|
|
|
(pv_add_constant (regs[rn], inst.operands[1].addr.offset.imm),
|
|
|
|
|
size, regs[rt]);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
2015-11-05 10:44:32 +01:00
|
|
|
|
else if ((inst.opcode->iclass == ldstpair_off
|
[AArch64] Match instruction "STP with base register" in prologue
Nowadays, we only match pre-indexed STP in prologue. Due to the change
in gcc, https://gcc.gnu.org/ml/gcc-patches/2016-07/msg01933.html, it
may generate "STP with base register" in prologue, which GDB doesn't
handle. That is to say, previously GCC generates prologue like this,
sub sp, sp, #490
stp x29, x30, [sp, #-96]!
mov x29, sp
with the gcc patch above, GCC generates prologue like like this,
sub sp, sp, #4f0
stp x29, x30, [sp]
mov x29, sp
This patch is to teach GDB to recognize this instruction in prologue
analysis.
gdb:
2016-08-19 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_analyze_prologue): Handle register
based STP instruction.
2016-08-19 15:49:31 +02:00
|
|
|
|
|| (inst.opcode->iclass == ldstpair_indexed
|
|
|
|
|
&& inst.operands[2].addr.preind))
|
2015-11-05 10:44:32 +01:00
|
|
|
|
&& strcmp ("stp", inst.opcode->name) == 0)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
[AArch64] Match instruction "STP with base register" in prologue
Nowadays, we only match pre-indexed STP in prologue. Due to the change
in gcc, https://gcc.gnu.org/ml/gcc-patches/2016-07/msg01933.html, it
may generate "STP with base register" in prologue, which GDB doesn't
handle. That is to say, previously GCC generates prologue like this,
sub sp, sp, #490
stp x29, x30, [sp, #-96]!
mov x29, sp
with the gcc patch above, GCC generates prologue like like this,
sub sp, sp, #4f0
stp x29, x30, [sp]
mov x29, sp
This patch is to teach GDB to recognize this instruction in prologue
analysis.
gdb:
2016-08-19 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_analyze_prologue): Handle register
based STP instruction.
2016-08-19 15:49:31 +02:00
|
|
|
|
/* STP with addressing mode Pre-indexed and Base register. */
|
2016-10-11 13:12:46 +02:00
|
|
|
|
unsigned rt1;
|
|
|
|
|
unsigned rt2;
|
2015-11-05 10:44:32 +01:00
|
|
|
|
unsigned rn = inst.operands[2].addr.base_regno;
|
|
|
|
|
int32_t imm = inst.operands[2].addr.offset.imm;
|
2019-08-14 16:47:05 +02:00
|
|
|
|
int size = aarch64_get_qualifier_esize (inst.operands[0].qualifier);
|
2015-11-05 10:44:32 +01:00
|
|
|
|
|
2016-10-11 13:12:46 +02:00
|
|
|
|
gdb_assert (inst.operands[0].type == AARCH64_OPND_Rt
|
|
|
|
|
|| inst.operands[0].type == AARCH64_OPND_Ft);
|
|
|
|
|
gdb_assert (inst.operands[1].type == AARCH64_OPND_Rt2
|
|
|
|
|
|| inst.operands[1].type == AARCH64_OPND_Ft2);
|
2015-11-05 10:44:32 +01:00
|
|
|
|
gdb_assert (inst.operands[2].type == AARCH64_OPND_ADDR_SIMM7);
|
|
|
|
|
gdb_assert (!inst.operands[2].addr.offset.is_reg);
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* If recording this store would invalidate the store area
|
|
|
|
|
(perhaps because rn is not known) then we should abandon
|
|
|
|
|
further prologue analysis. */
|
C++-ify prologue-value's pv_area
This patch is an initial C++-ification of pv_area, from
prologue-value. It turns pv_area into a class with a constructor and
destructor; renames the data members; and changes various functions to
be member functions. This allows the removal of
make_cleanup_free_pv_area.
gdb/ChangeLog
2017-10-12 Tom Tromey <tom@tromey.com>
* s390-linux-tdep.c (s390_store, s390_load)
(s390_check_for_saved, s390_analyze_prologue): Update.
* rx-tdep.c (check_for_saved, rx_analyze_prologue): Update.
* rl78-tdep.c (rl78_analyze_prologue, check_for_saved): Update.
* prologue-value.h (class pv_area): Move from prologue-value.c.
Change names of members. Add constructor, destructor, member
functions.
(make_pv_area, free_pv_area, make_cleanup_free_pv_area)
(pv_area_store, pv_area_fetch, pv_area_store_would_trash)
(pv_area_fetch, pv_area_scan): Don't declare.
* prologue-value.c (struct pv_area::area_entry): Now member of
pv_area.
(struct pv_area): Move to prologue-value.h.
(pv_area::pv_area): Rename from make_pv_area.
(pv_area::~pv_area): Rename from free_pv_area.
(do_free_pv_area_cleanup, make_cleanup_free_pv_area): Remove.
(clear_entries, find_entry, overlaps, store_would_trash, store)
(fetch, find_reg, scan): Now member of pv_area.
Remove "area" argument. Update.
* msp430-tdep.c (check_for_saved, msp430_analyze_prologue):
Update.
* mn10300-tdep.c (push_reg, check_for_saved)
(mn10300_analyze_prologue): Update.
* mep-tdep.c (is_arg_spill, check_for_saved)
(mep_analyze_prologue): Update.
* m32c-tdep.c (m32c_pv_push, m32c_srcdest_fetch)
(m32c_srcdest_store, m32c_pv_enter, m32c_is_arg_spill)
(m32c_is_struct_return, m32c_analyze_prologue): Update.
* arm-tdep.c (thumb_analyze_prologue, arm_analyze_prologue):
Update.
* arc-tdep.c (arc_is_in_prologue, arc_analyze_prologue): Update.
* aarch64-tdep.c (aarch64_analyze_prologue): Update.
2017-10-08 02:23:36 +02:00
|
|
|
|
if (stack.store_would_trash (pv_add_constant (regs[rn], imm)))
|
2013-02-04 13:48:37 +01:00
|
|
|
|
break;
|
|
|
|
|
|
C++-ify prologue-value's pv_area
This patch is an initial C++-ification of pv_area, from
prologue-value. It turns pv_area into a class with a constructor and
destructor; renames the data members; and changes various functions to
be member functions. This allows the removal of
make_cleanup_free_pv_area.
gdb/ChangeLog
2017-10-12 Tom Tromey <tom@tromey.com>
* s390-linux-tdep.c (s390_store, s390_load)
(s390_check_for_saved, s390_analyze_prologue): Update.
* rx-tdep.c (check_for_saved, rx_analyze_prologue): Update.
* rl78-tdep.c (rl78_analyze_prologue, check_for_saved): Update.
* prologue-value.h (class pv_area): Move from prologue-value.c.
Change names of members. Add constructor, destructor, member
functions.
(make_pv_area, free_pv_area, make_cleanup_free_pv_area)
(pv_area_store, pv_area_fetch, pv_area_store_would_trash)
(pv_area_fetch, pv_area_scan): Don't declare.
* prologue-value.c (struct pv_area::area_entry): Now member of
pv_area.
(struct pv_area): Move to prologue-value.h.
(pv_area::pv_area): Rename from make_pv_area.
(pv_area::~pv_area): Rename from free_pv_area.
(do_free_pv_area_cleanup, make_cleanup_free_pv_area): Remove.
(clear_entries, find_entry, overlaps, store_would_trash, store)
(fetch, find_reg, scan): Now member of pv_area.
Remove "area" argument. Update.
* msp430-tdep.c (check_for_saved, msp430_analyze_prologue):
Update.
* mn10300-tdep.c (push_reg, check_for_saved)
(mn10300_analyze_prologue): Update.
* mep-tdep.c (is_arg_spill, check_for_saved)
(mep_analyze_prologue): Update.
* m32c-tdep.c (m32c_pv_push, m32c_srcdest_fetch)
(m32c_srcdest_store, m32c_pv_enter, m32c_is_arg_spill)
(m32c_is_struct_return, m32c_analyze_prologue): Update.
* arm-tdep.c (thumb_analyze_prologue, arm_analyze_prologue):
Update.
* arc-tdep.c (arc_is_in_prologue, arc_analyze_prologue): Update.
* aarch64-tdep.c (aarch64_analyze_prologue): Update.
2017-10-08 02:23:36 +02:00
|
|
|
|
if (stack.store_would_trash (pv_add_constant (regs[rn], imm + 8)))
|
2013-02-04 13:48:37 +01:00
|
|
|
|
break;
|
|
|
|
|
|
2016-10-11 13:12:46 +02:00
|
|
|
|
rt1 = inst.operands[0].reg.regno;
|
|
|
|
|
rt2 = inst.operands[1].reg.regno;
|
|
|
|
|
if (inst.operands[0].type == AARCH64_OPND_Ft)
|
|
|
|
|
{
|
|
|
|
|
rt1 += AARCH64_X_REGISTER_COUNT;
|
|
|
|
|
rt2 += AARCH64_X_REGISTER_COUNT;
|
|
|
|
|
}
|
|
|
|
|
|
2019-08-14 16:47:05 +02:00
|
|
|
|
stack.store (pv_add_constant (regs[rn], imm), size, regs[rt1]);
|
|
|
|
|
stack.store (pv_add_constant (regs[rn], imm + size), size, regs[rt2]);
|
2013-02-05 14:54:38 +01:00
|
|
|
|
|
2015-11-05 10:44:32 +01:00
|
|
|
|
if (inst.operands[2].addr.writeback)
|
2015-11-05 10:44:32 +01:00
|
|
|
|
regs[rn] = pv_add_constant (regs[rn], imm);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
}
|
2016-12-02 10:37:30 +01:00
|
|
|
|
else if ((inst.opcode->iclass == ldst_imm9 /* Signed immediate. */
|
|
|
|
|
|| (inst.opcode->iclass == ldst_pos /* Unsigned immediate. */
|
|
|
|
|
&& (inst.opcode->op == OP_STR_POS
|
|
|
|
|
|| inst.opcode->op == OP_STRF_POS)))
|
|
|
|
|
&& inst.operands[1].addr.base_regno == AARCH64_SP_REGNUM
|
|
|
|
|
&& strcmp ("str", inst.opcode->name) == 0)
|
|
|
|
|
{
|
|
|
|
|
/* STR (immediate) */
|
|
|
|
|
unsigned int rt = inst.operands[0].reg.regno;
|
|
|
|
|
int32_t imm = inst.operands[1].addr.offset.imm;
|
|
|
|
|
unsigned int rn = inst.operands[1].addr.base_regno;
|
2019-08-14 16:47:05 +02:00
|
|
|
|
int size = aarch64_get_qualifier_esize (inst.operands[0].qualifier);
|
2016-12-02 10:37:30 +01:00
|
|
|
|
gdb_assert (inst.operands[0].type == AARCH64_OPND_Rt
|
|
|
|
|
|| inst.operands[0].type == AARCH64_OPND_Ft);
|
|
|
|
|
|
|
|
|
|
if (inst.operands[0].type == AARCH64_OPND_Ft)
|
2019-08-14 16:47:05 +02:00
|
|
|
|
rt += AARCH64_X_REGISTER_COUNT;
|
2016-12-02 10:37:30 +01:00
|
|
|
|
|
2019-08-14 16:47:05 +02:00
|
|
|
|
stack.store (pv_add_constant (regs[rn], imm), size, regs[rt]);
|
2016-12-02 10:37:30 +01:00
|
|
|
|
if (inst.operands[1].addr.writeback)
|
|
|
|
|
regs[rn] = pv_add_constant (regs[rn], imm);
|
|
|
|
|
}
|
2015-11-05 10:44:32 +01:00
|
|
|
|
else if (inst.opcode->iclass == testbranch)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
/* Stop analysis on branch. */
|
|
|
|
|
break;
|
|
|
|
|
}
|
2019-03-22 11:41:15 +01:00
|
|
|
|
else if (inst.opcode->iclass == ic_system)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
int ra_state_val = 0;
|
|
|
|
|
|
|
|
|
|
if (insn == 0xd503233f /* paciasp. */
|
|
|
|
|
|| insn == 0xd503237f /* pacibsp. */)
|
|
|
|
|
{
|
|
|
|
|
/* Return addresses are mangled. */
|
|
|
|
|
ra_state_val = 1;
|
|
|
|
|
}
|
|
|
|
|
else if (insn == 0xd50323bf /* autiasp. */
|
|
|
|
|
|| insn == 0xd50323ff /* autibsp. */)
|
|
|
|
|
{
|
|
|
|
|
/* Return addresses are not mangled. */
|
|
|
|
|
ra_state_val = 0;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (aarch64_debug)
|
|
|
|
|
debug_printf ("aarch64: prologue analysis gave up addr=%s"
|
|
|
|
|
" opcode=0x%x (iclass)\n",
|
|
|
|
|
core_addr_to_string_nz (start), insn);
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (tdep->has_pauth () && cache != nullptr)
|
|
|
|
|
trad_frame_set_value (cache->saved_regs,
|
|
|
|
|
tdep->pauth_ra_state_regnum,
|
|
|
|
|
ra_state_val);
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (aarch64_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
{
|
2016-02-15 11:05:56 +01:00
|
|
|
|
debug_printf ("aarch64: prologue analysis gave up addr=%s"
|
2015-09-15 19:38:57 +02:00
|
|
|
|
" opcode=0x%x\n",
|
|
|
|
|
core_addr_to_string_nz (start), insn);
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (cache == NULL)
|
C++-ify prologue-value's pv_area
This patch is an initial C++-ification of pv_area, from
prologue-value. It turns pv_area into a class with a constructor and
destructor; renames the data members; and changes various functions to
be member functions. This allows the removal of
make_cleanup_free_pv_area.
gdb/ChangeLog
2017-10-12 Tom Tromey <tom@tromey.com>
* s390-linux-tdep.c (s390_store, s390_load)
(s390_check_for_saved, s390_analyze_prologue): Update.
* rx-tdep.c (check_for_saved, rx_analyze_prologue): Update.
* rl78-tdep.c (rl78_analyze_prologue, check_for_saved): Update.
* prologue-value.h (class pv_area): Move from prologue-value.c.
Change names of members. Add constructor, destructor, member
functions.
(make_pv_area, free_pv_area, make_cleanup_free_pv_area)
(pv_area_store, pv_area_fetch, pv_area_store_would_trash)
(pv_area_fetch, pv_area_scan): Don't declare.
* prologue-value.c (struct pv_area::area_entry): Now member of
pv_area.
(struct pv_area): Move to prologue-value.h.
(pv_area::pv_area): Rename from make_pv_area.
(pv_area::~pv_area): Rename from free_pv_area.
(do_free_pv_area_cleanup, make_cleanup_free_pv_area): Remove.
(clear_entries, find_entry, overlaps, store_would_trash, store)
(fetch, find_reg, scan): Now member of pv_area.
Remove "area" argument. Update.
* msp430-tdep.c (check_for_saved, msp430_analyze_prologue):
Update.
* mn10300-tdep.c (push_reg, check_for_saved)
(mn10300_analyze_prologue): Update.
* mep-tdep.c (is_arg_spill, check_for_saved)
(mep_analyze_prologue): Update.
* m32c-tdep.c (m32c_pv_push, m32c_srcdest_fetch)
(m32c_srcdest_store, m32c_pv_enter, m32c_is_arg_spill)
(m32c_is_struct_return, m32c_analyze_prologue): Update.
* arm-tdep.c (thumb_analyze_prologue, arm_analyze_prologue):
Update.
* arc-tdep.c (arc_is_in_prologue, arc_analyze_prologue): Update.
* aarch64-tdep.c (aarch64_analyze_prologue): Update.
2017-10-08 02:23:36 +02:00
|
|
|
|
return start;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
if (pv_is_register (regs[AARCH64_FP_REGNUM], AARCH64_SP_REGNUM))
|
|
|
|
|
{
|
|
|
|
|
/* Frame pointer is fp. Frame size is constant. */
|
|
|
|
|
cache->framereg = AARCH64_FP_REGNUM;
|
|
|
|
|
cache->framesize = -regs[AARCH64_FP_REGNUM].k;
|
|
|
|
|
}
|
|
|
|
|
else if (pv_is_register (regs[AARCH64_SP_REGNUM], AARCH64_SP_REGNUM))
|
|
|
|
|
{
|
|
|
|
|
/* Try the stack pointer. */
|
|
|
|
|
cache->framesize = -regs[AARCH64_SP_REGNUM].k;
|
|
|
|
|
cache->framereg = AARCH64_SP_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* We're just out of luck. We don't know where the frame is. */
|
|
|
|
|
cache->framereg = -1;
|
|
|
|
|
cache->framesize = 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (i = 0; i < AARCH64_X_REGISTER_COUNT; i++)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR offset;
|
|
|
|
|
|
C++-ify prologue-value's pv_area
This patch is an initial C++-ification of pv_area, from
prologue-value. It turns pv_area into a class with a constructor and
destructor; renames the data members; and changes various functions to
be member functions. This allows the removal of
make_cleanup_free_pv_area.
gdb/ChangeLog
2017-10-12 Tom Tromey <tom@tromey.com>
* s390-linux-tdep.c (s390_store, s390_load)
(s390_check_for_saved, s390_analyze_prologue): Update.
* rx-tdep.c (check_for_saved, rx_analyze_prologue): Update.
* rl78-tdep.c (rl78_analyze_prologue, check_for_saved): Update.
* prologue-value.h (class pv_area): Move from prologue-value.c.
Change names of members. Add constructor, destructor, member
functions.
(make_pv_area, free_pv_area, make_cleanup_free_pv_area)
(pv_area_store, pv_area_fetch, pv_area_store_would_trash)
(pv_area_fetch, pv_area_scan): Don't declare.
* prologue-value.c (struct pv_area::area_entry): Now member of
pv_area.
(struct pv_area): Move to prologue-value.h.
(pv_area::pv_area): Rename from make_pv_area.
(pv_area::~pv_area): Rename from free_pv_area.
(do_free_pv_area_cleanup, make_cleanup_free_pv_area): Remove.
(clear_entries, find_entry, overlaps, store_would_trash, store)
(fetch, find_reg, scan): Now member of pv_area.
Remove "area" argument. Update.
* msp430-tdep.c (check_for_saved, msp430_analyze_prologue):
Update.
* mn10300-tdep.c (push_reg, check_for_saved)
(mn10300_analyze_prologue): Update.
* mep-tdep.c (is_arg_spill, check_for_saved)
(mep_analyze_prologue): Update.
* m32c-tdep.c (m32c_pv_push, m32c_srcdest_fetch)
(m32c_srcdest_store, m32c_pv_enter, m32c_is_arg_spill)
(m32c_is_struct_return, m32c_analyze_prologue): Update.
* arm-tdep.c (thumb_analyze_prologue, arm_analyze_prologue):
Update.
* arc-tdep.c (arc_is_in_prologue, arc_analyze_prologue): Update.
* aarch64-tdep.c (aarch64_analyze_prologue): Update.
2017-10-08 02:23:36 +02:00
|
|
|
|
if (stack.find_reg (gdbarch, i, &offset))
|
2013-02-04 13:48:37 +01:00
|
|
|
|
cache->saved_regs[i].addr = offset;
|
|
|
|
|
}
|
|
|
|
|
|
2016-10-11 13:12:46 +02:00
|
|
|
|
for (i = 0; i < AARCH64_D_REGISTER_COUNT; i++)
|
|
|
|
|
{
|
|
|
|
|
int regnum = gdbarch_num_regs (gdbarch);
|
|
|
|
|
CORE_ADDR offset;
|
|
|
|
|
|
C++-ify prologue-value's pv_area
This patch is an initial C++-ification of pv_area, from
prologue-value. It turns pv_area into a class with a constructor and
destructor; renames the data members; and changes various functions to
be member functions. This allows the removal of
make_cleanup_free_pv_area.
gdb/ChangeLog
2017-10-12 Tom Tromey <tom@tromey.com>
* s390-linux-tdep.c (s390_store, s390_load)
(s390_check_for_saved, s390_analyze_prologue): Update.
* rx-tdep.c (check_for_saved, rx_analyze_prologue): Update.
* rl78-tdep.c (rl78_analyze_prologue, check_for_saved): Update.
* prologue-value.h (class pv_area): Move from prologue-value.c.
Change names of members. Add constructor, destructor, member
functions.
(make_pv_area, free_pv_area, make_cleanup_free_pv_area)
(pv_area_store, pv_area_fetch, pv_area_store_would_trash)
(pv_area_fetch, pv_area_scan): Don't declare.
* prologue-value.c (struct pv_area::area_entry): Now member of
pv_area.
(struct pv_area): Move to prologue-value.h.
(pv_area::pv_area): Rename from make_pv_area.
(pv_area::~pv_area): Rename from free_pv_area.
(do_free_pv_area_cleanup, make_cleanup_free_pv_area): Remove.
(clear_entries, find_entry, overlaps, store_would_trash, store)
(fetch, find_reg, scan): Now member of pv_area.
Remove "area" argument. Update.
* msp430-tdep.c (check_for_saved, msp430_analyze_prologue):
Update.
* mn10300-tdep.c (push_reg, check_for_saved)
(mn10300_analyze_prologue): Update.
* mep-tdep.c (is_arg_spill, check_for_saved)
(mep_analyze_prologue): Update.
* m32c-tdep.c (m32c_pv_push, m32c_srcdest_fetch)
(m32c_srcdest_store, m32c_pv_enter, m32c_is_arg_spill)
(m32c_is_struct_return, m32c_analyze_prologue): Update.
* arm-tdep.c (thumb_analyze_prologue, arm_analyze_prologue):
Update.
* arc-tdep.c (arc_is_in_prologue, arc_analyze_prologue): Update.
* aarch64-tdep.c (aarch64_analyze_prologue): Update.
2017-10-08 02:23:36 +02:00
|
|
|
|
if (stack.find_reg (gdbarch, i + AARCH64_X_REGISTER_COUNT,
|
|
|
|
|
&offset))
|
2016-10-11 13:12:46 +02:00
|
|
|
|
cache->saved_regs[i + regnum + AARCH64_D0_REGNUM].addr = offset;
|
|
|
|
|
}
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return start;
|
|
|
|
|
}
|
|
|
|
|
|
2016-12-02 10:37:30 +01:00
|
|
|
|
static CORE_ADDR
|
|
|
|
|
aarch64_analyze_prologue (struct gdbarch *gdbarch,
|
|
|
|
|
CORE_ADDR start, CORE_ADDR limit,
|
|
|
|
|
struct aarch64_prologue_cache *cache)
|
|
|
|
|
{
|
|
|
|
|
instruction_reader reader;
|
|
|
|
|
|
|
|
|
|
return aarch64_analyze_prologue (gdbarch, start, limit, cache,
|
|
|
|
|
reader);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#if GDB_SELF_TEST
|
|
|
|
|
|
|
|
|
|
namespace selftests {
|
|
|
|
|
|
|
|
|
|
/* Instruction reader from manually cooked instruction sequences. */
|
|
|
|
|
|
|
|
|
|
class instruction_reader_test : public abstract_instruction_reader
|
|
|
|
|
{
|
|
|
|
|
public:
|
|
|
|
|
template<size_t SIZE>
|
|
|
|
|
explicit instruction_reader_test (const uint32_t (&insns)[SIZE])
|
|
|
|
|
: m_insns (insns), m_insns_size (SIZE)
|
|
|
|
|
{}
|
|
|
|
|
|
|
|
|
|
ULONGEST read (CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
|
2018-04-27 06:46:54 +02:00
|
|
|
|
override
|
2016-12-02 10:37:30 +01:00
|
|
|
|
{
|
|
|
|
|
SELF_CHECK (len == 4);
|
|
|
|
|
SELF_CHECK (memaddr % 4 == 0);
|
|
|
|
|
SELF_CHECK (memaddr / 4 < m_insns_size);
|
|
|
|
|
|
|
|
|
|
return m_insns[memaddr / 4];
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
private:
|
|
|
|
|
const uint32_t *m_insns;
|
|
|
|
|
size_t m_insns_size;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_analyze_prologue_test (void)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_info info;
|
|
|
|
|
|
|
|
|
|
gdbarch_info_init (&info);
|
|
|
|
|
info.bfd_arch_info = bfd_scan_arch ("aarch64");
|
|
|
|
|
|
|
|
|
|
struct gdbarch *gdbarch = gdbarch_find_by_info (info);
|
|
|
|
|
SELF_CHECK (gdbarch != NULL);
|
|
|
|
|
|
2019-03-22 11:41:15 +01:00
|
|
|
|
struct aarch64_prologue_cache cache;
|
|
|
|
|
cache.saved_regs = trad_frame_alloc_saved_regs (gdbarch);
|
|
|
|
|
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
2016-12-02 10:37:30 +01:00
|
|
|
|
/* Test the simple prologue in which frame pointer is used. */
|
|
|
|
|
{
|
|
|
|
|
static const uint32_t insns[] = {
|
|
|
|
|
0xa9af7bfd, /* stp x29, x30, [sp,#-272]! */
|
|
|
|
|
0x910003fd, /* mov x29, sp */
|
|
|
|
|
0x97ffffe6, /* bl 0x400580 */
|
|
|
|
|
};
|
|
|
|
|
instruction_reader_test reader (insns);
|
|
|
|
|
|
|
|
|
|
CORE_ADDR end = aarch64_analyze_prologue (gdbarch, 0, 128, &cache, reader);
|
|
|
|
|
SELF_CHECK (end == 4 * 2);
|
|
|
|
|
|
|
|
|
|
SELF_CHECK (cache.framereg == AARCH64_FP_REGNUM);
|
|
|
|
|
SELF_CHECK (cache.framesize == 272);
|
|
|
|
|
|
|
|
|
|
for (int i = 0; i < AARCH64_X_REGISTER_COUNT; i++)
|
|
|
|
|
{
|
|
|
|
|
if (i == AARCH64_FP_REGNUM)
|
|
|
|
|
SELF_CHECK (cache.saved_regs[i].addr == -272);
|
|
|
|
|
else if (i == AARCH64_LR_REGNUM)
|
|
|
|
|
SELF_CHECK (cache.saved_regs[i].addr == -264);
|
|
|
|
|
else
|
|
|
|
|
SELF_CHECK (cache.saved_regs[i].addr == -1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (int i = 0; i < AARCH64_D_REGISTER_COUNT; i++)
|
|
|
|
|
{
|
|
|
|
|
int regnum = gdbarch_num_regs (gdbarch);
|
|
|
|
|
|
|
|
|
|
SELF_CHECK (cache.saved_regs[i + regnum + AARCH64_D0_REGNUM].addr
|
|
|
|
|
== -1);
|
|
|
|
|
}
|
|
|
|
|
}
|
2016-12-02 10:37:30 +01:00
|
|
|
|
|
|
|
|
|
/* Test a prologue in which STR is used and frame pointer is not
|
|
|
|
|
used. */
|
|
|
|
|
{
|
|
|
|
|
static const uint32_t insns[] = {
|
|
|
|
|
0xf81d0ff3, /* str x19, [sp, #-48]! */
|
|
|
|
|
0xb9002fe0, /* str w0, [sp, #44] */
|
|
|
|
|
0xf90013e1, /* str x1, [sp, #32]*/
|
|
|
|
|
0xfd000fe0, /* str d0, [sp, #24] */
|
|
|
|
|
0xaa0203f3, /* mov x19, x2 */
|
|
|
|
|
0xf94013e0, /* ldr x0, [sp, #32] */
|
|
|
|
|
};
|
|
|
|
|
instruction_reader_test reader (insns);
|
|
|
|
|
|
2019-04-10 16:58:27 +02:00
|
|
|
|
trad_frame_reset_saved_regs (gdbarch, cache.saved_regs);
|
2016-12-02 10:37:30 +01:00
|
|
|
|
CORE_ADDR end = aarch64_analyze_prologue (gdbarch, 0, 128, &cache, reader);
|
|
|
|
|
|
|
|
|
|
SELF_CHECK (end == 4 * 5);
|
|
|
|
|
|
|
|
|
|
SELF_CHECK (cache.framereg == AARCH64_SP_REGNUM);
|
|
|
|
|
SELF_CHECK (cache.framesize == 48);
|
|
|
|
|
|
|
|
|
|
for (int i = 0; i < AARCH64_X_REGISTER_COUNT; i++)
|
|
|
|
|
{
|
|
|
|
|
if (i == 1)
|
|
|
|
|
SELF_CHECK (cache.saved_regs[i].addr == -16);
|
|
|
|
|
else if (i == 19)
|
|
|
|
|
SELF_CHECK (cache.saved_regs[i].addr == -48);
|
|
|
|
|
else
|
|
|
|
|
SELF_CHECK (cache.saved_regs[i].addr == -1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (int i = 0; i < AARCH64_D_REGISTER_COUNT; i++)
|
|
|
|
|
{
|
|
|
|
|
int regnum = gdbarch_num_regs (gdbarch);
|
|
|
|
|
|
|
|
|
|
if (i == 0)
|
|
|
|
|
SELF_CHECK (cache.saved_regs[i + regnum + AARCH64_D0_REGNUM].addr
|
|
|
|
|
== -24);
|
|
|
|
|
else
|
|
|
|
|
SELF_CHECK (cache.saved_regs[i + regnum + AARCH64_D0_REGNUM].addr
|
|
|
|
|
== -1);
|
|
|
|
|
}
|
|
|
|
|
}
|
2019-03-22 11:41:15 +01:00
|
|
|
|
|
|
|
|
|
/* Test a prologue in which there is a return address signing instruction. */
|
|
|
|
|
if (tdep->has_pauth ())
|
|
|
|
|
{
|
|
|
|
|
static const uint32_t insns[] = {
|
|
|
|
|
0xd503233f, /* paciasp */
|
|
|
|
|
0xa9bd7bfd, /* stp x29, x30, [sp, #-48]! */
|
|
|
|
|
0x910003fd, /* mov x29, sp */
|
|
|
|
|
0xf801c3f3, /* str x19, [sp, #28] */
|
|
|
|
|
0xb9401fa0, /* ldr x19, [x29, #28] */
|
|
|
|
|
};
|
|
|
|
|
instruction_reader_test reader (insns);
|
|
|
|
|
|
2019-04-10 16:58:27 +02:00
|
|
|
|
trad_frame_reset_saved_regs (gdbarch, cache.saved_regs);
|
2019-03-22 11:41:15 +01:00
|
|
|
|
CORE_ADDR end = aarch64_analyze_prologue (gdbarch, 0, 128, &cache,
|
|
|
|
|
reader);
|
|
|
|
|
|
|
|
|
|
SELF_CHECK (end == 4 * 4);
|
|
|
|
|
SELF_CHECK (cache.framereg == AARCH64_FP_REGNUM);
|
|
|
|
|
SELF_CHECK (cache.framesize == 48);
|
|
|
|
|
|
|
|
|
|
for (int i = 0; i < AARCH64_X_REGISTER_COUNT; i++)
|
|
|
|
|
{
|
|
|
|
|
if (i == 19)
|
|
|
|
|
SELF_CHECK (cache.saved_regs[i].addr == -20);
|
|
|
|
|
else if (i == AARCH64_FP_REGNUM)
|
|
|
|
|
SELF_CHECK (cache.saved_regs[i].addr == -48);
|
|
|
|
|
else if (i == AARCH64_LR_REGNUM)
|
|
|
|
|
SELF_CHECK (cache.saved_regs[i].addr == -40);
|
|
|
|
|
else
|
|
|
|
|
SELF_CHECK (cache.saved_regs[i].addr == -1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (tdep->has_pauth ())
|
|
|
|
|
{
|
|
|
|
|
SELF_CHECK (trad_frame_value_p (cache.saved_regs,
|
|
|
|
|
tdep->pauth_ra_state_regnum));
|
|
|
|
|
SELF_CHECK (cache.saved_regs[tdep->pauth_ra_state_regnum].addr == 1);
|
|
|
|
|
}
|
|
|
|
|
}
|
2016-12-02 10:37:30 +01:00
|
|
|
|
}
|
|
|
|
|
} // namespace selftests
|
|
|
|
|
#endif /* GDB_SELF_TEST */
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* Implement the "skip_prologue" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
|
aarch64_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR func_addr, limit_pc;
|
|
|
|
|
|
|
|
|
|
/* See if we can determine the end of the prologue via the symbol
|
|
|
|
|
table. If so, then return either PC, or the PC after the
|
|
|
|
|
prologue, whichever is greater. */
|
|
|
|
|
if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR post_prologue_pc
|
|
|
|
|
= skip_prologue_using_sal (gdbarch, func_addr);
|
|
|
|
|
|
|
|
|
|
if (post_prologue_pc != 0)
|
gdb: Use std::min and std::max throughout
Otherwise including <string> or some other C++ header is broken.
E.g.:
In file included from /opt/gcc/include/c++/7.0.0/bits/char_traits.h:39:0,
from /opt/gcc/include/c++/7.0.0/string:40,
from /home/pedro/gdb/mygit/cxx-convertion/src/gdb/infrun.c:68:
/opt/gcc/include/c++/7.0.0/bits/stl_algobase.h:243:56: error: macro "min" passed 3 arguments, but takes just 2
min(const _Tp& __a, const _Tp& __b, _Compare __comp)
^
/opt/gcc/include/c++/7.0.0/bits/stl_algobase.h:265:56: error: macro "max" passed 3 arguments, but takes just 2
max(const _Tp& __a, const _Tp& __b, _Compare __comp)
^
In file included from .../src/gdb/infrun.c:21:0:
To the best of my grepping abilities, I believe I adjusted all min/max
calls.
gdb/ChangeLog:
2016-09-16 Pedro Alves <palves@redhat.com>
* defs.h (min, max): Delete.
* aarch64-tdep.c: Include <algorithm> and use std::min and
std::max throughout.
* aarch64-tdep.c: Likewise.
* alpha-tdep.c: Likewise.
* amd64-tdep.c: Likewise.
* amd64-windows-tdep.c: Likewise.
* arm-tdep.c: Likewise.
* avr-tdep.c: Likewise.
* breakpoint.c: Likewise.
* btrace.c: Likewise.
* ctf.c: Likewise.
* disasm.c: Likewise.
* doublest.c: Likewise.
* dwarf2loc.c: Likewise.
* dwarf2read.c: Likewise.
* environ.c: Likewise.
* exec.c: Likewise.
* f-exp.y: Likewise.
* findcmd.c: Likewise.
* ft32-tdep.c: Likewise.
* gcore.c: Likewise.
* hppa-tdep.c: Likewise.
* i386-darwin-tdep.c: Likewise.
* i386-tdep.c: Likewise.
* linux-thread-db.c: Likewise.
* lm32-tdep.c: Likewise.
* m32r-tdep.c: Likewise.
* m88k-tdep.c: Likewise.
* memrange.c: Likewise.
* minidebug.c: Likewise.
* mips-tdep.c: Likewise.
* moxie-tdep.c: Likewise.
* nds32-tdep.c: Likewise.
* nios2-tdep.c: Likewise.
* nto-procfs.c: Likewise.
* parse.c: Likewise.
* ppc-sysv-tdep.c: Likewise.
* probe.c: Likewise.
* record-btrace.c: Likewise.
* remote.c: Likewise.
* rs6000-tdep.c: Likewise.
* rx-tdep.c: Likewise.
* s390-linux-nat.c: Likewise.
* s390-linux-tdep.c: Likewise.
* ser-tcp.c: Likewise.
* sh-tdep.c: Likewise.
* sh64-tdep.c: Likewise.
* source.c: Likewise.
* sparc-tdep.c: Likewise.
* symfile.c: Likewise.
* target-memory.c: Likewise.
* target.c: Likewise.
* tic6x-tdep.c: Likewise.
* tilegx-tdep.c: Likewise.
* tracefile-tfile.c: Likewise.
* tracepoint.c: Likewise.
* valprint.c: Likewise.
* value.c: Likewise.
* xtensa-tdep.c: Likewise.
* cli/cli-cmds.c: Likewise.
* compile/compile-object-load.c: Likewise.
2016-09-16 20:55:17 +02:00
|
|
|
|
return std::max (pc, post_prologue_pc);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Can't determine prologue from the symbol table, need to examine
|
|
|
|
|
instructions. */
|
|
|
|
|
|
|
|
|
|
/* Find an upper limit on the function prologue using the debug
|
|
|
|
|
information. If the debug information could not be used to
|
|
|
|
|
provide that bound, then use an arbitrary large number as the
|
|
|
|
|
upper bound. */
|
|
|
|
|
limit_pc = skip_prologue_using_sal (gdbarch, pc);
|
|
|
|
|
if (limit_pc == 0)
|
|
|
|
|
limit_pc = pc + 128; /* Magic. */
|
|
|
|
|
|
|
|
|
|
/* Try disassembling prologue. */
|
|
|
|
|
return aarch64_analyze_prologue (gdbarch, pc, limit_pc, NULL);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Scan the function prologue for THIS_FRAME and populate the prologue
|
|
|
|
|
cache CACHE. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_scan_prologue (struct frame_info *this_frame,
|
|
|
|
|
struct aarch64_prologue_cache *cache)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR block_addr = get_frame_address_in_block (this_frame);
|
|
|
|
|
CORE_ADDR prologue_start;
|
|
|
|
|
CORE_ADDR prologue_end;
|
|
|
|
|
CORE_ADDR prev_pc = get_frame_pc (this_frame);
|
|
|
|
|
struct gdbarch *gdbarch = get_frame_arch (this_frame);
|
|
|
|
|
|
2015-07-09 17:35:11 +02:00
|
|
|
|
cache->prev_pc = prev_pc;
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* Assume we do not find a frame. */
|
|
|
|
|
cache->framereg = -1;
|
|
|
|
|
cache->framesize = 0;
|
|
|
|
|
|
|
|
|
|
if (find_pc_partial_function (block_addr, NULL, &prologue_start,
|
|
|
|
|
&prologue_end))
|
|
|
|
|
{
|
|
|
|
|
struct symtab_and_line sal = find_pc_line (prologue_start, 0);
|
|
|
|
|
|
|
|
|
|
if (sal.line == 0)
|
|
|
|
|
{
|
|
|
|
|
/* No line info so use the current PC. */
|
|
|
|
|
prologue_end = prev_pc;
|
|
|
|
|
}
|
|
|
|
|
else if (sal.end < prologue_end)
|
|
|
|
|
{
|
|
|
|
|
/* The next line begins after the function end. */
|
|
|
|
|
prologue_end = sal.end;
|
|
|
|
|
}
|
|
|
|
|
|
gdb: Use std::min and std::max throughout
Otherwise including <string> or some other C++ header is broken.
E.g.:
In file included from /opt/gcc/include/c++/7.0.0/bits/char_traits.h:39:0,
from /opt/gcc/include/c++/7.0.0/string:40,
from /home/pedro/gdb/mygit/cxx-convertion/src/gdb/infrun.c:68:
/opt/gcc/include/c++/7.0.0/bits/stl_algobase.h:243:56: error: macro "min" passed 3 arguments, but takes just 2
min(const _Tp& __a, const _Tp& __b, _Compare __comp)
^
/opt/gcc/include/c++/7.0.0/bits/stl_algobase.h:265:56: error: macro "max" passed 3 arguments, but takes just 2
max(const _Tp& __a, const _Tp& __b, _Compare __comp)
^
In file included from .../src/gdb/infrun.c:21:0:
To the best of my grepping abilities, I believe I adjusted all min/max
calls.
gdb/ChangeLog:
2016-09-16 Pedro Alves <palves@redhat.com>
* defs.h (min, max): Delete.
* aarch64-tdep.c: Include <algorithm> and use std::min and
std::max throughout.
* aarch64-tdep.c: Likewise.
* alpha-tdep.c: Likewise.
* amd64-tdep.c: Likewise.
* amd64-windows-tdep.c: Likewise.
* arm-tdep.c: Likewise.
* avr-tdep.c: Likewise.
* breakpoint.c: Likewise.
* btrace.c: Likewise.
* ctf.c: Likewise.
* disasm.c: Likewise.
* doublest.c: Likewise.
* dwarf2loc.c: Likewise.
* dwarf2read.c: Likewise.
* environ.c: Likewise.
* exec.c: Likewise.
* f-exp.y: Likewise.
* findcmd.c: Likewise.
* ft32-tdep.c: Likewise.
* gcore.c: Likewise.
* hppa-tdep.c: Likewise.
* i386-darwin-tdep.c: Likewise.
* i386-tdep.c: Likewise.
* linux-thread-db.c: Likewise.
* lm32-tdep.c: Likewise.
* m32r-tdep.c: Likewise.
* m88k-tdep.c: Likewise.
* memrange.c: Likewise.
* minidebug.c: Likewise.
* mips-tdep.c: Likewise.
* moxie-tdep.c: Likewise.
* nds32-tdep.c: Likewise.
* nios2-tdep.c: Likewise.
* nto-procfs.c: Likewise.
* parse.c: Likewise.
* ppc-sysv-tdep.c: Likewise.
* probe.c: Likewise.
* record-btrace.c: Likewise.
* remote.c: Likewise.
* rs6000-tdep.c: Likewise.
* rx-tdep.c: Likewise.
* s390-linux-nat.c: Likewise.
* s390-linux-tdep.c: Likewise.
* ser-tcp.c: Likewise.
* sh-tdep.c: Likewise.
* sh64-tdep.c: Likewise.
* source.c: Likewise.
* sparc-tdep.c: Likewise.
* symfile.c: Likewise.
* target-memory.c: Likewise.
* target.c: Likewise.
* tic6x-tdep.c: Likewise.
* tilegx-tdep.c: Likewise.
* tracefile-tfile.c: Likewise.
* tracepoint.c: Likewise.
* valprint.c: Likewise.
* value.c: Likewise.
* xtensa-tdep.c: Likewise.
* cli/cli-cmds.c: Likewise.
* compile/compile-object-load.c: Likewise.
2016-09-16 20:55:17 +02:00
|
|
|
|
prologue_end = std::min (prologue_end, prev_pc);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
aarch64_analyze_prologue (gdbarch, prologue_start, prologue_end, cache);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR frame_loc;
|
|
|
|
|
|
|
|
|
|
frame_loc = get_frame_register_unsigned (this_frame, AARCH64_FP_REGNUM);
|
|
|
|
|
if (frame_loc == 0)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
cache->framereg = AARCH64_FP_REGNUM;
|
|
|
|
|
cache->framesize = 16;
|
|
|
|
|
cache->saved_regs[29].addr = 0;
|
|
|
|
|
cache->saved_regs[30].addr = 8;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2015-07-09 17:35:11 +02:00
|
|
|
|
/* Fill in *CACHE with information about the prologue of *THIS_FRAME. This
|
|
|
|
|
function may throw an exception if the inferior's registers or memory is
|
|
|
|
|
not available. */
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2015-07-09 17:35:11 +02:00
|
|
|
|
static void
|
|
|
|
|
aarch64_make_prologue_cache_1 (struct frame_info *this_frame,
|
|
|
|
|
struct aarch64_prologue_cache *cache)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
CORE_ADDR unwound_fp;
|
|
|
|
|
int reg;
|
|
|
|
|
|
|
|
|
|
aarch64_scan_prologue (this_frame, cache);
|
|
|
|
|
|
|
|
|
|
if (cache->framereg == -1)
|
2015-07-09 17:35:11 +02:00
|
|
|
|
return;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
unwound_fp = get_frame_register_unsigned (this_frame, cache->framereg);
|
|
|
|
|
if (unwound_fp == 0)
|
2015-07-09 17:35:11 +02:00
|
|
|
|
return;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
cache->prev_sp = unwound_fp + cache->framesize;
|
|
|
|
|
|
|
|
|
|
/* Calculate actual addresses of saved registers using offsets
|
|
|
|
|
determined by aarch64_analyze_prologue. */
|
|
|
|
|
for (reg = 0; reg < gdbarch_num_regs (get_frame_arch (this_frame)); reg++)
|
|
|
|
|
if (trad_frame_addr_p (cache->saved_regs, reg))
|
|
|
|
|
cache->saved_regs[reg].addr += cache->prev_sp;
|
|
|
|
|
|
2015-07-09 17:35:11 +02:00
|
|
|
|
cache->func = get_frame_func (this_frame);
|
|
|
|
|
|
2015-07-09 17:35:11 +02:00
|
|
|
|
cache->available_p = 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Allocate and fill in *THIS_CACHE with information about the prologue of
|
|
|
|
|
*THIS_FRAME. Do not do this is if *THIS_CACHE was already allocated.
|
|
|
|
|
Return a pointer to the current aarch64_prologue_cache in
|
|
|
|
|
*THIS_CACHE. */
|
|
|
|
|
|
|
|
|
|
static struct aarch64_prologue_cache *
|
|
|
|
|
aarch64_make_prologue_cache (struct frame_info *this_frame, void **this_cache)
|
|
|
|
|
{
|
|
|
|
|
struct aarch64_prologue_cache *cache;
|
|
|
|
|
|
|
|
|
|
if (*this_cache != NULL)
|
Add some more casts (1/2)
Note: I needed to split this patch in two, otherwise it's too big for
the mailing list.
This patch adds explicit casts to situations where a void pointer is
assigned to a pointer to the "real" type. Building in C++ mode requires
those assignments to use an explicit cast. This includes, for example:
- callback arguments (cleanups, comparison functions, ...)
- data attached to some object (objfile, program space, etc) in the form
of a void pointer
- "user data" passed to some function
This patch comes from the commit "(mostly) auto-generated patch to insert
casts needed for C++", taken from Pedro's C++ branch.
Only files built on x86 with --enable-targets=all are modified, so the
native files for other arches will need to be dealt with separately.
I built-tested this with --enable-targets=all and reg-tested. To my
surprise, a test case (selftest.exp) had to be adjusted.
Here's the ChangeLog entry. Again, this was relatively quick to make
despite the length, thanks to David Malcom's script, although I don't
believe it's very useful information in that particular case...
gdb/ChangeLog:
* aarch64-tdep.c (aarch64_make_prologue_cache): Add cast(s).
(aarch64_make_stub_cache): Likewise.
(value_of_aarch64_user_reg): Likewise.
* ada-lang.c (ada_inferior_data_cleanup): Likewise.
(get_ada_inferior_data): Likewise.
(get_ada_pspace_data): Likewise.
(ada_pspace_data_cleanup): Likewise.
(ada_complete_symbol_matcher): Likewise.
(ada_exc_search_name_matches): Likewise.
* ada-tasks.c (get_ada_tasks_pspace_data): Likewise.
(get_ada_tasks_inferior_data): Likewise.
* addrmap.c (addrmap_mutable_foreach_worker): Likewise.
(splay_obstack_alloc): Likewise.
(splay_obstack_free): Likewise.
* alpha-linux-tdep.c (alpha_linux_supply_gregset): Likewise.
(alpha_linux_collect_gregset): Likewise.
(alpha_linux_supply_fpregset): Likewise.
(alpha_linux_collect_fpregset): Likewise.
* alpha-mdebug-tdep.c (alpha_mdebug_frame_unwind_cache): Likewise.
* alpha-tdep.c (alpha_lds): Likewise.
(alpha_sts): Likewise.
(alpha_sigtramp_frame_unwind_cache): Likewise.
(alpha_heuristic_frame_unwind_cache): Likewise.
(alpha_supply_int_regs): Likewise.
(alpha_fill_int_regs): Likewise.
(alpha_supply_fp_regs): Likewise.
(alpha_fill_fp_regs): Likewise.
* alphanbsd-tdep.c (alphanbsd_supply_fpregset): Likewise.
(alphanbsd_aout_supply_gregset): Likewise.
(alphanbsd_supply_gregset): Likewise.
* amd64-linux-tdep.c (amd64_linux_init_abi): Likewise.
(amd64_x32_linux_init_abi): Likewise.
* amd64-nat.c (amd64_supply_native_gregset): Likewise.
(amd64_collect_native_gregset): Likewise.
* amd64-tdep.c (amd64_frame_cache): Likewise.
(amd64_sigtramp_frame_cache): Likewise.
(amd64_epilogue_frame_cache): Likewise.
(amd64_supply_fxsave): Likewise.
(amd64_supply_xsave): Likewise.
(amd64_collect_fxsave): Likewise.
(amd64_collect_xsave): Likewise.
* amd64-windows-tdep.c (amd64_windows_frame_cache): Likewise.
* amd64obsd-tdep.c (amd64obsd_trapframe_cache): Likewise.
* arm-linux-tdep.c (arm_linux_supply_gregset): Likewise.
(arm_linux_collect_gregset): Likewise.
(arm_linux_supply_nwfpe): Likewise.
(arm_linux_collect_nwfpe): Likewise.
(arm_linux_supply_vfp): Likewise.
(arm_linux_collect_vfp): Likewise.
* arm-tdep.c (arm_find_mapping_symbol): Likewise.
(arm_prologue_unwind_stop_reason): Likewise.
(arm_prologue_this_id): Likewise.
(arm_prologue_prev_register): Likewise.
(arm_exidx_data_free): Likewise.
(arm_find_exidx_entry): Likewise.
(arm_stub_this_id): Likewise.
(arm_m_exception_this_id): Likewise.
(arm_m_exception_prev_register): Likewise.
(arm_normal_frame_base): Likewise.
(gdb_print_insn_arm): Likewise.
(arm_objfile_data_free): Likewise.
(arm_record_special_symbol): Likewise.
(value_of_arm_user_reg): Likewise.
* armbsd-tdep.c (armbsd_supply_fpregset): Likewise.
(armbsd_supply_gregset): Likewise.
* auto-load.c (auto_load_pspace_data_cleanup): Likewise.
(get_auto_load_pspace_data): Likewise.
(hash_loaded_script_entry): Likewise.
(eq_loaded_script_entry): Likewise.
(clear_section_scripts): Likewise.
(collect_matching_scripts): Likewise.
* auxv.c (auxv_inferior_data_cleanup): Likewise.
(get_auxv_inferior_data): Likewise.
* avr-tdep.c (avr_frame_unwind_cache): Likewise.
* ax-general.c (do_free_agent_expr_cleanup): Likewise.
* bfd-target.c (target_bfd_xfer_partial): Likewise.
(target_bfd_xclose): Likewise.
(target_bfd_get_section_table): Likewise.
* bfin-tdep.c (bfin_frame_cache): Likewise.
* block.c (find_block_in_blockvector): Likewise.
(call_site_for_pc): Likewise.
(block_find_non_opaque_type_preferred): Likewise.
* break-catch-sig.c (signal_catchpoint_insert_location): Likewise.
(signal_catchpoint_remove_location): Likewise.
(signal_catchpoint_breakpoint_hit): Likewise.
(signal_catchpoint_print_one): Likewise.
(signal_catchpoint_print_mention): Likewise.
(signal_catchpoint_print_recreate): Likewise.
* break-catch-syscall.c (get_catch_syscall_inferior_data): Likewise.
* breakpoint.c (do_cleanup_counted_command_line): Likewise.
(bp_location_compare_addrs): Likewise.
(get_first_locp_gte_addr): Likewise.
(check_tracepoint_command): Likewise.
(do_map_commands_command): Likewise.
(get_breakpoint_objfile_data): Likewise.
(free_breakpoint_probes): Likewise.
(do_captured_breakpoint_query): Likewise.
(compare_breakpoints): Likewise.
(bp_location_compare): Likewise.
(bpstat_remove_breakpoint_callback): Likewise.
(do_delete_breakpoint_cleanup): Likewise.
* bsd-uthread.c (bsd_uthread_set_supply_uthread): Likewise.
(bsd_uthread_set_collect_uthread): Likewise.
(bsd_uthread_activate): Likewise.
(bsd_uthread_fetch_registers): Likewise.
(bsd_uthread_store_registers): Likewise.
* btrace.c (check_xml_btrace_version): Likewise.
(parse_xml_btrace_block): Likewise.
(parse_xml_btrace_pt_config_cpu): Likewise.
(parse_xml_btrace_pt_raw): Likewise.
(parse_xml_btrace_pt): Likewise.
(parse_xml_btrace_conf_bts): Likewise.
(parse_xml_btrace_conf_pt): Likewise.
(do_btrace_data_cleanup): Likewise.
* c-typeprint.c (find_typedef_for_canonicalize): Likewise.
* charset.c (cleanup_iconv): Likewise.
(do_cleanup_iterator): Likewise.
* cli-out.c (cli_uiout_dtor): Likewise.
(cli_table_begin): Likewise.
(cli_table_body): Likewise.
(cli_table_end): Likewise.
(cli_table_header): Likewise.
(cli_begin): Likewise.
(cli_end): Likewise.
(cli_field_int): Likewise.
(cli_field_skip): Likewise.
(cli_field_string): Likewise.
(cli_field_fmt): Likewise.
(cli_spaces): Likewise.
(cli_text): Likewise.
(cli_message): Likewise.
(cli_wrap_hint): Likewise.
(cli_flush): Likewise.
(cli_redirect): Likewise.
(out_field_fmt): Likewise.
(field_separator): Likewise.
(cli_out_set_stream): Likewise.
* cli/cli-cmds.c (compare_symtabs): Likewise.
* cli/cli-dump.c (call_dump_func): Likewise.
(restore_section_callback): Likewise.
* cli/cli-script.c (clear_hook_in_cleanup): Likewise.
(do_restore_user_call_depth): Likewise.
(do_free_command_lines_cleanup): Likewise.
* coff-pe-read.c (get_section_vmas): Likewise.
(pe_as16): Likewise.
(pe_as32): Likewise.
* coffread.c (coff_symfile_read): Likewise.
* common/agent.c (agent_look_up_symbols): Likewise.
* common/filestuff.c (do_close_cleanup): Likewise.
* common/format.c (free_format_pieces_cleanup): Likewise.
* common/vec.c (vec_o_reserve): Likewise.
* compile/compile-c-support.c (print_one_macro): Likewise.
* compile/compile-c-symbols.c (hash_symbol_error): Likewise.
(eq_symbol_error): Likewise.
(del_symbol_error): Likewise.
(error_symbol_once): Likewise.
(gcc_convert_symbol): Likewise.
(gcc_symbol_address): Likewise.
(hash_symname): Likewise.
(eq_symname): Likewise.
* compile/compile-c-types.c (hash_type_map_instance): Likewise.
(eq_type_map_instance): Likewise.
(insert_type): Likewise.
(convert_type): Likewise.
* compile/compile-object-load.c (munmap_listp_free_cleanup): Likewise.
(setup_sections): Likewise.
(link_hash_table_free): Likewise.
(copy_sections): Likewise.
* compile/compile-object-run.c (do_module_cleanup): Likewise.
* compile/compile.c (compile_print_value): Likewise.
(do_rmdir): Likewise.
(cleanup_compile_instance): Likewise.
(cleanup_unlink_file): Likewise.
* completer.c (free_completion_tracker): Likewise.
* corelow.c (add_to_spuid_list): Likewise.
* cp-namespace.c (reset_directive_searched): Likewise.
* cp-support.c (reset_directive_searched): Likewise.
* cris-tdep.c (cris_sigtramp_frame_unwind_cache): Likewise.
(cris_frame_unwind_cache): Likewise.
* d-lang.c (builtin_d_type): Likewise.
* d-namespace.c (reset_directive_searched): Likewise.
* dbxread.c (dbx_free_symfile_info): Likewise.
(do_free_bincl_list_cleanup): Likewise.
* disasm.c (hash_dis_line_entry): Likewise.
(eq_dis_line_entry): Likewise.
(dis_asm_print_address): Likewise.
(fprintf_disasm): Likewise.
(do_ui_file_delete): Likewise.
* doublest.c (convert_floatformat_to_doublest): Likewise.
* dummy-frame.c (pop_dummy_frame_bpt): Likewise.
(dummy_frame_prev_register): Likewise.
(dummy_frame_this_id): Likewise.
* dwarf2-frame-tailcall.c (cache_hash): Likewise.
(cache_eq): Likewise.
(cache_find): Likewise.
(tailcall_frame_this_id): Likewise.
(dwarf2_tailcall_prev_register_first): Likewise.
(tailcall_frame_prev_register): Likewise.
(tailcall_frame_dealloc_cache): Likewise.
(tailcall_frame_prev_arch): Likewise.
* dwarf2-frame.c (dwarf2_frame_state_free): Likewise.
(dwarf2_frame_set_init_reg): Likewise.
(dwarf2_frame_init_reg): Likewise.
(dwarf2_frame_set_signal_frame_p): Likewise.
(dwarf2_frame_signal_frame_p): Likewise.
(dwarf2_frame_set_adjust_regnum): Likewise.
(dwarf2_frame_adjust_regnum): Likewise.
(clear_pointer_cleanup): Likewise.
(dwarf2_frame_cache): Likewise.
(find_cie): Likewise.
(dwarf2_frame_find_fde): Likewise.
* dwarf2expr.c (dwarf_expr_address_type): Likewise.
(free_dwarf_expr_context_cleanup): Likewise.
* dwarf2loc.c (locexpr_find_frame_base_location): Likewise.
(locexpr_get_frame_base): Likewise.
(loclist_find_frame_base_location): Likewise.
(loclist_get_frame_base): Likewise.
(dwarf_expr_dwarf_call): Likewise.
(dwarf_expr_get_base_type): Likewise.
(dwarf_expr_push_dwarf_reg_entry_value): Likewise.
(dwarf_expr_get_obj_addr): Likewise.
(entry_data_value_coerce_ref): Likewise.
(entry_data_value_copy_closure): Likewise.
(entry_data_value_free_closure): Likewise.
(get_frame_address_in_block_wrapper): Likewise.
(dwarf2_evaluate_property): Likewise.
(dwarf2_compile_property_to_c): Likewise.
(needs_frame_read_addr_from_reg): Likewise.
(needs_frame_get_reg_value): Likewise.
(needs_frame_frame_base): Likewise.
(needs_frame_frame_cfa): Likewise.
(needs_frame_tls_address): Likewise.
(needs_frame_dwarf_call): Likewise.
(needs_dwarf_reg_entry_value): Likewise.
(get_ax_pc): Likewise.
(locexpr_read_variable): Likewise.
(locexpr_read_variable_at_entry): Likewise.
(locexpr_read_needs_frame): Likewise.
(locexpr_describe_location): Likewise.
(locexpr_tracepoint_var_ref): Likewise.
(locexpr_generate_c_location): Likewise.
(loclist_read_variable): Likewise.
(loclist_read_variable_at_entry): Likewise.
(loclist_describe_location): Likewise.
(loclist_tracepoint_var_ref): Likewise.
(loclist_generate_c_location): Likewise.
* dwarf2read.c (line_header_hash_voidp): Likewise.
(line_header_eq_voidp): Likewise.
(dwarf2_has_info): Likewise.
(dwarf2_get_section_info): Likewise.
(locate_dwz_sections): Likewise.
(hash_file_name_entry): Likewise.
(eq_file_name_entry): Likewise.
(delete_file_name_entry): Likewise.
(dw2_setup): Likewise.
(dw2_get_file_names_reader): Likewise.
(dw2_find_pc_sect_compunit_symtab): Likewise.
(hash_signatured_type): Likewise.
(eq_signatured_type): Likewise.
(add_signatured_type_cu_to_table): Likewise.
(create_debug_types_hash_table): Likewise.
(lookup_dwo_signatured_type): Likewise.
(lookup_dwp_signatured_type): Likewise.
(lookup_signatured_type): Likewise.
(hash_type_unit_group): Likewise.
(eq_type_unit_group): Likewise.
(get_type_unit_group): Likewise.
(process_psymtab_comp_unit_reader): Likewise.
(sort_tu_by_abbrev_offset): Likewise.
(process_skeletonless_type_unit): Likewise.
(psymtabs_addrmap_cleanup): Likewise.
(dwarf2_read_symtab): Likewise.
(psymtab_to_symtab_1): Likewise.
(die_hash): Likewise.
(die_eq): Likewise.
(load_full_comp_unit_reader): Likewise.
(reset_die_in_process): Likewise.
(free_cu_line_header): Likewise.
(handle_DW_AT_stmt_list): Likewise.
(hash_dwo_file): Likewise.
(eq_dwo_file): Likewise.
(hash_dwo_unit): Likewise.
(eq_dwo_unit): Likewise.
(create_dwo_cu_reader): Likewise.
(create_dwo_unit_in_dwp_v1): Likewise.
(create_dwo_unit_in_dwp_v2): Likewise.
(lookup_dwo_unit_in_dwp): Likewise.
(dwarf2_locate_dwo_sections): Likewise.
(dwarf2_locate_common_dwp_sections): Likewise.
(dwarf2_locate_v2_dwp_sections): Likewise.
(hash_dwp_loaded_cutus): Likewise.
(eq_dwp_loaded_cutus): Likewise.
(lookup_dwo_cutu): Likewise.
(abbrev_table_free_cleanup): Likewise.
(dwarf2_free_abbrev_table): Likewise.
(find_partial_die_in_comp_unit): Likewise.
(free_line_header_voidp): Likewise.
(follow_die_offset): Likewise.
(follow_die_sig_1): Likewise.
(free_heap_comp_unit): Likewise.
(free_stack_comp_unit): Likewise.
(dwarf2_free_objfile): Likewise.
(per_cu_offset_and_type_hash): Likewise.
(per_cu_offset_and_type_eq): Likewise.
(get_die_type_at_offset): Likewise.
(partial_die_hash): Likewise.
(partial_die_eq): Likewise.
(dwarf2_per_objfile_free): Likewise.
(hash_strtab_entry): Likewise.
(eq_strtab_entry): Likewise.
(add_string): Likewise.
(hash_symtab_entry): Likewise.
(eq_symtab_entry): Likewise.
(delete_symtab_entry): Likewise.
(cleanup_mapped_symtab): Likewise.
(add_indices_to_cpool): Likewise.
(hash_psymtab_cu_index): Likewise.
(eq_psymtab_cu_index): Likewise.
(add_address_entry_worker): Likewise.
(unlink_if_set): Likewise.
(write_one_signatured_type): Likewise.
(save_gdb_index_command): Likewise.
* elfread.c (elf_symtab_read): Likewise.
(elf_gnu_ifunc_cache_hash): Likewise.
(elf_gnu_ifunc_cache_eq): Likewise.
(elf_gnu_ifunc_record_cache): Likewise.
(elf_gnu_ifunc_resolve_by_cache): Likewise.
(elf_get_probes): Likewise.
(probe_key_free): Likewise.
* f-lang.c (builtin_f_type): Likewise.
* frame-base.c (frame_base_append_sniffer): Likewise.
(frame_base_set_default): Likewise.
(frame_base_find_by_frame): Likewise.
* frame-unwind.c (frame_unwind_prepend_unwinder): Likewise.
(frame_unwind_append_unwinder): Likewise.
(frame_unwind_find_by_frame): Likewise.
* frame.c (frame_addr_hash): Likewise.
(frame_addr_hash_eq): Likewise.
(frame_stash_find): Likewise.
(do_frame_register_read): Likewise.
(unwind_to_current_frame): Likewise.
(frame_cleanup_after_sniffer): Likewise.
* frv-linux-tdep.c (frv_linux_sigtramp_frame_cache): Likewise.
* frv-tdep.c (frv_frame_unwind_cache): Likewise.
* ft32-tdep.c (ft32_frame_cache): Likewise.
* gcore.c (do_bfd_delete_cleanup): Likewise.
(gcore_create_callback): Likewise.
* gdb_bfd.c (hash_bfd): Likewise.
(eq_bfd): Likewise.
(gdb_bfd_open): Likewise.
(free_one_bfd_section): Likewise.
(gdb_bfd_ref): Likewise.
(gdb_bfd_unref): Likewise.
(get_section_descriptor): Likewise.
(gdb_bfd_map_section): Likewise.
(gdb_bfd_crc): Likewise.
(gdb_bfd_mark_parent): Likewise.
(gdb_bfd_record_inclusion): Likewise.
(gdb_bfd_requires_relocations): Likewise.
(print_one_bfd): Likewise.
* gdbtypes.c (type_pair_hash): Likewise.
(type_pair_eq): Likewise.
(builtin_type): Likewise.
(objfile_type): Likewise.
* gnu-v3-abi.c (vtable_ptrdiff_type): Likewise.
(vtable_address_point_offset): Likewise.
(gnuv3_get_vtable): Likewise.
(hash_value_and_voffset): Likewise.
(eq_value_and_voffset): Likewise.
(compare_value_and_voffset): Likewise.
(compute_vtable_size): Likewise.
(gnuv3_get_typeid_type): Likewise.
* go-lang.c (builtin_go_type): Likewise.
* guile/scm-block.c (bkscm_hash_block_smob): Likewise.
(bkscm_eq_block_smob): Likewise.
(bkscm_objfile_block_map): Likewise.
(bkscm_del_objfile_blocks): Likewise.
* guile/scm-breakpoint.c (bpscm_build_bp_list): Likewise.
* guile/scm-disasm.c (gdbscm_disasm_read_memory_worker): Likewise.
(gdbscm_disasm_print_address): Likewise.
* guile/scm-frame.c (frscm_hash_frame_smob): Likewise.
(frscm_eq_frame_smob): Likewise.
(frscm_inferior_frame_map): Likewise.
(frscm_del_inferior_frames): Likewise.
* guile/scm-gsmob.c (gdbscm_add_objfile_ref): Likewise.
* guile/scm-objfile.c (ofscm_handle_objfile_deleted): Likewise.
(ofscm_objfile_smob_from_objfile): Likewise.
* guile/scm-ports.c (ioscm_write): Likewise.
(ioscm_file_port_delete): Likewise.
(ioscm_file_port_rewind): Likewise.
(ioscm_file_port_put): Likewise.
(ioscm_file_port_write): Likewise.
* guile/scm-progspace.c (psscm_handle_pspace_deleted): Likewise.
(psscm_pspace_smob_from_pspace): Likewise.
* guile/scm-safe-call.c (scscm_recording_pre_unwind_handler): Likewise.
(scscm_recording_unwind_handler): Likewise.
(gdbscm_with_catch): Likewise.
(scscm_call_0_body): Likewise.
(scscm_call_1_body): Likewise.
(scscm_call_2_body): Likewise.
(scscm_call_3_body): Likewise.
(scscm_call_4_body): Likewise.
(scscm_apply_1_body): Likewise.
(scscm_eval_scheme_string): Likewise.
(gdbscm_safe_eval_string): Likewise.
(scscm_source_scheme_script): Likewise.
(gdbscm_safe_source_script): Likewise.
* guile/scm-string.c (gdbscm_call_scm_to_stringn): Likewise.
(gdbscm_call_scm_from_stringn): Likewise.
* guile/scm-symbol.c (syscm_hash_symbol_smob): Likewise.
(syscm_eq_symbol_smob): Likewise.
(syscm_get_symbol_map): Likewise.
(syscm_del_objfile_symbols): Likewise.
* guile/scm-symtab.c (stscm_hash_symtab_smob): Likewise.
(stscm_eq_symtab_smob): Likewise.
(stscm_objfile_symtab_map): Likewise.
(stscm_del_objfile_symtabs): Likewise.
* guile/scm-type.c (tyscm_hash_type_smob): Likewise.
(tyscm_eq_type_smob): Likewise.
(tyscm_type_map): Likewise.
(tyscm_copy_type_recursive): Likewise.
(save_objfile_types): Likewise.
* guile/scm-utils.c (extract_arg): Likewise.
* h8300-tdep.c (h8300_frame_cache): Likewise.
* hppa-linux-tdep.c (hppa_linux_sigtramp_frame_unwind_cache): Likewise.
* hppa-tdep.c (compare_unwind_entries): Likewise.
(find_unwind_entry): Likewise.
(hppa_frame_cache): Likewise.
(hppa_stub_frame_unwind_cache): Likewise.
* hppanbsd-tdep.c (hppanbsd_supply_gregset): Likewise.
* hppaobsd-tdep.c (hppaobsd_supply_gregset): Likewise.
(hppaobsd_supply_fpregset): Likewise.
* i386-cygwin-tdep.c (core_process_module_section): Likewise.
* i386-linux-tdep.c (i386_linux_init_abi): Likewise.
* i386-tdep.c (i386_frame_cache): Likewise.
(i386_epilogue_frame_cache): Likewise.
(i386_sigtramp_frame_cache): Likewise.
(i386_supply_gregset): Likewise.
(i386_collect_gregset): Likewise.
(i386_gdbarch_init): Likewise.
* i386obsd-tdep.c (i386obsd_aout_supply_regset): Likewise.
(i386obsd_trapframe_cache): Likewise.
* i387-tdep.c (i387_supply_fsave): Likewise.
(i387_collect_fsave): Likewise.
(i387_supply_fxsave): Likewise.
(i387_collect_fxsave): Likewise.
(i387_supply_xsave): Likewise.
(i387_collect_xsave): Likewise.
* ia64-tdep.c (ia64_frame_cache): Likewise.
(ia64_sigtramp_frame_cache): Likewise.
* infcmd.c (attach_command_continuation): Likewise.
(attach_command_continuation_free_args): Likewise.
* inferior.c (restore_inferior): Likewise.
(delete_thread_of_inferior): Likewise.
* inflow.c (inflow_inferior_data_cleanup): Likewise.
(get_inflow_inferior_data): Likewise.
(inflow_inferior_exit): Likewise.
* infrun.c (displaced_step_clear_cleanup): Likewise.
(restore_current_uiout_cleanup): Likewise.
(release_stop_context_cleanup): Likewise.
(do_restore_infcall_suspend_state_cleanup): Likewise.
(do_restore_infcall_control_state_cleanup): Likewise.
(restore_inferior_ptid): Likewise.
* inline-frame.c (block_starting_point_at): Likewise.
* iq2000-tdep.c (iq2000_frame_cache): Likewise.
* jit.c (get_jit_objfile_data): Likewise.
(get_jit_program_space_data): Likewise.
(jit_object_close_impl): Likewise.
(jit_find_objf_with_entry_addr): Likewise.
(jit_breakpoint_deleted): Likewise.
(jit_unwind_reg_set_impl): Likewise.
(jit_unwind_reg_get_impl): Likewise.
(jit_dealloc_cache): Likewise.
(jit_frame_sniffer): Likewise.
(jit_frame_prev_register): Likewise.
(jit_prepend_unwinder): Likewise.
(jit_inferior_exit_hook): Likewise.
(free_objfile_data): Likewise.
* jv-lang.c (jv_per_objfile_free): Likewise.
(get_dynamics_objfile): Likewise.
(get_java_class_symtab): Likewise.
(builtin_java_type): Likewise.
* language.c (language_string_char_type): Likewise.
(language_bool_type): Likewise.
(language_lookup_primitive_type): Likewise.
(language_lookup_primitive_type_as_symbol): Likewise.
* linespec.c (hash_address_entry): Likewise.
(eq_address_entry): Likewise.
(iterate_inline_only): Likewise.
(iterate_name_matcher): Likewise.
(decode_line_2_compare_items): Likewise.
(collect_one_symbol): Likewise.
(compare_symbols): Likewise.
(compare_msymbols): Likewise.
(add_symtabs_to_list): Likewise.
(collect_symbols): Likewise.
(compare_msyms): Likewise.
(add_minsym): Likewise.
(cleanup_linespec_result): Likewise.
* linux-fork.c (inferior_call_waitpid_cleanup): Likewise.
* linux-nat.c (delete_lwp_cleanup): Likewise.
(count_events_callback): Likewise.
(select_event_lwp_callback): Likewise.
(resume_stopped_resumed_lwps): Likewise.
* linux-tdep.c (get_linux_gdbarch_data): Likewise.
(invalidate_linux_cache_inf): Likewise.
(get_linux_inferior_data): Likewise.
(linux_find_memory_regions_thunk): Likewise.
(linux_make_mappings_callback): Likewise.
(linux_corefile_thread_callback): Likewise.
(find_mapping_size): Likewise.
* linux-thread-db.c (find_new_threads_callback): Likewise.
* lm32-tdep.c (lm32_frame_cache): Likewise.
* m2-lang.c (builtin_m2_type): Likewise.
* m32c-tdep.c (m32c_analyze_frame_prologue): Likewise.
* m32r-linux-tdep.c (m32r_linux_sigtramp_frame_cache): Likewise.
(m32r_linux_supply_gregset): Likewise.
(m32r_linux_collect_gregset): Likewise.
* m32r-tdep.c (m32r_frame_unwind_cache): Likewise.
* m68hc11-tdep.c (m68hc11_frame_unwind_cache): Likewise.
* m68k-tdep.c (m68k_frame_cache): Likewise.
* m68kbsd-tdep.c (m68kbsd_supply_fpregset): Likewise.
(m68kbsd_supply_gregset): Likewise.
* m68klinux-tdep.c (m68k_linux_sigtramp_frame_cache): Likewise.
* m88k-tdep.c (m88k_frame_cache): Likewise.
(m88k_supply_gregset): Likewise.
gdb/gdbserver/ChangeLog:
* dll.c (match_dll): Add cast(s).
(unloaded_dll): Likewise.
* linux-low.c (second_thread_of_pid_p): Likewise.
(delete_lwp_callback): Likewise.
(count_events_callback): Likewise.
(select_event_lwp_callback): Likewise.
(linux_set_resume_request): Likewise.
* server.c (accumulate_file_name_length): Likewise.
(emit_dll_description): Likewise.
(handle_qxfer_threads_worker): Likewise.
(visit_actioned_threads): Likewise.
* thread-db.c (any_thread_of): Likewise.
* tracepoint.c (same_process_p): Likewise.
(match_blocktype): Likewise.
(build_traceframe_info_xml): Likewise.
gdb/testsuite/ChangeLog:
* gdb.gdb/selftest.exp (do_steps_and_nexts): Adjust expected
source line.
2015-09-25 20:08:07 +02:00
|
|
|
|
return (struct aarch64_prologue_cache *) *this_cache;
|
2015-07-09 17:35:11 +02:00
|
|
|
|
|
|
|
|
|
cache = FRAME_OBSTACK_ZALLOC (struct aarch64_prologue_cache);
|
|
|
|
|
cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
|
|
|
|
|
*this_cache = cache;
|
|
|
|
|
|
2019-04-04 00:02:42 +02:00
|
|
|
|
try
|
2015-07-09 17:35:11 +02:00
|
|
|
|
{
|
|
|
|
|
aarch64_make_prologue_cache_1 (this_frame, cache);
|
|
|
|
|
}
|
2019-04-03 23:59:07 +02:00
|
|
|
|
catch (const gdb_exception_error &ex)
|
2015-07-09 17:35:11 +02:00
|
|
|
|
{
|
|
|
|
|
if (ex.error != NOT_AVAILABLE_ERROR)
|
Replace throw_exception with throw in some cases
This replaces throw_exception with "throw;" when possible. This was
written by script. The rule that is followed is that uses of the
form:
catch (... &name)
{
...
throw_exception (name);
}
... can be rewritten. This should always be safe, because exceptions
are caught by const reference, and therefore can't be modified in the
body of the catch.
gdb/ChangeLog
2019-04-08 Tom Tromey <tom@tromey.com>
* valops.c (value_rtti_indirect_type): Replace throw_exception
with throw.
* tracefile-tfile.c (tfile_target_open): Replace throw_exception
with throw.
* thread.c (thr_try_catch_cmd): Replace throw_exception with
throw.
* target.c (target_translate_tls_address): Replace throw_exception
with throw.
* stack.c (frame_apply_command_count): Replace throw_exception
with throw.
* solib-spu.c (append_ocl_sos): Replace throw_exception with
throw.
* s390-tdep.c (s390_frame_unwind_cache): Replace throw_exception
with throw.
* rs6000-tdep.c (rs6000_frame_cache)
(rs6000_epilogue_frame_cache): Replace throw_exception with throw.
* remote.c: Replace throw_exception with throw.
* record-full.c (record_full_message, record_full_wait_1)
(record_full_restore): Replace throw_exception with throw.
* record-btrace.c:
(get_thread_current_frame_id, record_btrace_start_replaying)
(cmd_record_btrace_bts_start, cmd_record_btrace_pt_start)
(cmd_record_btrace_start): Replace throw_exception with throw.
* parse.c (parse_exp_in_context_1): Replace throw_exception with
throw.
* linux-nat.c (detach_one_lwp, linux_resume_one_lwp)
(resume_stopped_resumed_lwps): Replace throw_exception with throw.
* linespec.c:
(find_linespec_symbols): Replace throw_exception with throw.
* infrun.c (displaced_step_prepare, resume): Replace
throw_exception with throw.
* infcmd.c (post_create_inferior): Replace throw_exception with
throw.
* inf-loop.c (inferior_event_handler): Replace throw_exception
with throw.
* i386-tdep.c (i386_frame_cache, i386_epilogue_frame_cache)
(i386_sigtramp_frame_cache): Replace throw_exception with throw.
* frame.c (frame_unwind_pc, get_prev_frame_if_no_cycle)
(get_prev_frame_always, get_frame_pc_if_available)
(get_frame_address_in_block_if_available, get_frame_language):
Replace throw_exception with throw.
* frame-unwind.c (frame_unwind_try_unwinder): Replace
throw_exception with throw.
* eval.c (fetch_subexp_value, evaluate_var_value)
(evaluate_funcall, evaluate_subexp_standard): Replace
throw_exception with throw.
* dwarf2loc.c (call_site_find_chain)
(dwarf2_evaluate_loc_desc_full, dwarf2_locexpr_baton_eval):
Replace throw_exception with throw.
* dwarf2-frame.c (dwarf2_frame_cache): Replace throw_exception
with throw.
* darwin-nat.c (darwin_attach_pid): Replace throw_exception with
throw.
* cp-abi.c (baseclass_offset): Replace throw_exception with throw.
* completer.c (complete_line_internal): Replace throw_exception
with throw.
* compile/compile-object-run.c (compile_object_run): Replace
throw_exception with throw.
* cli/cli-script.c (process_next_line): Replace throw_exception
with throw.
* btrace.c (btrace_compute_ftrace_pt, btrace_compute_ftrace)
(btrace_enable, btrace_maint_update_pt_packets): Replace
throw_exception with throw.
* breakpoint.c (create_breakpoint, save_breakpoints): Replace
throw_exception with throw.
* break-catch-throw.c (re_set_exception_catchpoint): Replace
throw_exception with throw.
* amd64-tdep.c (amd64_frame_cache, amd64_sigtramp_frame_cache)
(amd64_epilogue_frame_cache): Replace throw_exception with throw.
* aarch64-tdep.c (aarch64_make_prologue_cache)
(aarch64_make_stub_cache): Replace throw_exception with throw.
gdb/gdbserver/ChangeLog
2019-04-08 Tom Tromey <tom@tromey.com>
* linux-low.c (linux_detach_one_lwp): Replace throw_exception with
throw.
(linux_resume_one_lwp): Likewise.
2019-01-28 18:45:45 +01:00
|
|
|
|
throw;
|
2015-07-09 17:35:11 +02:00
|
|
|
|
}
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return cache;
|
|
|
|
|
}
|
|
|
|
|
|
2015-07-09 17:35:11 +02:00
|
|
|
|
/* Implement the "stop_reason" frame_unwind method. */
|
|
|
|
|
|
|
|
|
|
static enum unwind_stop_reason
|
|
|
|
|
aarch64_prologue_frame_unwind_stop_reason (struct frame_info *this_frame,
|
|
|
|
|
void **this_cache)
|
|
|
|
|
{
|
|
|
|
|
struct aarch64_prologue_cache *cache
|
|
|
|
|
= aarch64_make_prologue_cache (this_frame, this_cache);
|
|
|
|
|
|
|
|
|
|
if (!cache->available_p)
|
|
|
|
|
return UNWIND_UNAVAILABLE;
|
|
|
|
|
|
|
|
|
|
/* Halt the backtrace at "_start". */
|
|
|
|
|
if (cache->prev_pc <= gdbarch_tdep (get_frame_arch (this_frame))->lowest_pc)
|
|
|
|
|
return UNWIND_OUTERMOST;
|
|
|
|
|
|
|
|
|
|
/* We've hit a wall, stop. */
|
|
|
|
|
if (cache->prev_sp == 0)
|
|
|
|
|
return UNWIND_OUTERMOST;
|
|
|
|
|
|
|
|
|
|
return UNWIND_NO_REASON;
|
|
|
|
|
}
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* Our frame ID for a normal frame is the current function's starting
|
|
|
|
|
PC and the caller's SP when we were called. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_prologue_this_id (struct frame_info *this_frame,
|
|
|
|
|
void **this_cache, struct frame_id *this_id)
|
|
|
|
|
{
|
2015-07-09 17:35:10 +02:00
|
|
|
|
struct aarch64_prologue_cache *cache
|
|
|
|
|
= aarch64_make_prologue_cache (this_frame, this_cache);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2015-07-09 17:35:11 +02:00
|
|
|
|
if (!cache->available_p)
|
|
|
|
|
*this_id = frame_id_build_unavailable_stack (cache->func);
|
|
|
|
|
else
|
|
|
|
|
*this_id = frame_id_build (cache->prev_sp, cache->func);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "prev_register" frame_unwind method. */
|
|
|
|
|
|
|
|
|
|
static struct value *
|
|
|
|
|
aarch64_prologue_prev_register (struct frame_info *this_frame,
|
|
|
|
|
void **this_cache, int prev_regnum)
|
|
|
|
|
{
|
2015-07-09 17:35:10 +02:00
|
|
|
|
struct aarch64_prologue_cache *cache
|
|
|
|
|
= aarch64_make_prologue_cache (this_frame, this_cache);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* If we are asked to unwind the PC, then we need to return the LR
|
|
|
|
|
instead. The prologue may save PC, but it will point into this
|
|
|
|
|
frame's prologue, not the next frame's resume location. */
|
|
|
|
|
if (prev_regnum == AARCH64_PC_REGNUM)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR lr;
|
2019-03-22 11:41:15 +01:00
|
|
|
|
struct gdbarch *gdbarch = get_frame_arch (this_frame);
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
lr = frame_unwind_register_unsigned (this_frame, AARCH64_LR_REGNUM);
|
2019-03-22 11:41:15 +01:00
|
|
|
|
|
|
|
|
|
if (tdep->has_pauth ()
|
|
|
|
|
&& trad_frame_value_p (cache->saved_regs,
|
|
|
|
|
tdep->pauth_ra_state_regnum))
|
2019-08-07 10:47:57 +02:00
|
|
|
|
lr = aarch64_frame_unmask_lr (tdep, this_frame, lr);
|
2019-03-22 11:41:15 +01:00
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return frame_unwind_got_constant (this_frame, prev_regnum, lr);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* SP is generally not saved to the stack, but this frame is
|
|
|
|
|
identified by the next frame's stack pointer at the time of the
|
|
|
|
|
call. The value was already reconstructed into PREV_SP. */
|
|
|
|
|
/*
|
|
|
|
|
+----------+ ^
|
|
|
|
|
| saved lr | |
|
|
|
|
|
+->| saved fp |--+
|
|
|
|
|
| | |
|
|
|
|
|
| | | <- Previous SP
|
|
|
|
|
| +----------+
|
|
|
|
|
| | saved lr |
|
|
|
|
|
+--| saved fp |<- FP
|
|
|
|
|
| |
|
|
|
|
|
| |<- SP
|
|
|
|
|
+----------+ */
|
|
|
|
|
if (prev_regnum == AARCH64_SP_REGNUM)
|
|
|
|
|
return frame_unwind_got_constant (this_frame, prev_regnum,
|
|
|
|
|
cache->prev_sp);
|
|
|
|
|
|
|
|
|
|
return trad_frame_get_prev_register (this_frame, cache->saved_regs,
|
|
|
|
|
prev_regnum);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* AArch64 prologue unwinder. */
|
|
|
|
|
struct frame_unwind aarch64_prologue_unwind =
|
|
|
|
|
{
|
|
|
|
|
NORMAL_FRAME,
|
2015-07-09 17:35:11 +02:00
|
|
|
|
aarch64_prologue_frame_unwind_stop_reason,
|
2013-02-04 13:48:37 +01:00
|
|
|
|
aarch64_prologue_this_id,
|
|
|
|
|
aarch64_prologue_prev_register,
|
|
|
|
|
NULL,
|
|
|
|
|
default_frame_sniffer
|
|
|
|
|
};
|
|
|
|
|
|
2015-07-09 17:35:10 +02:00
|
|
|
|
/* Allocate and fill in *THIS_CACHE with information about the prologue of
|
|
|
|
|
*THIS_FRAME. Do not do this is if *THIS_CACHE was already allocated.
|
|
|
|
|
Return a pointer to the current aarch64_prologue_cache in
|
|
|
|
|
*THIS_CACHE. */
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
static struct aarch64_prologue_cache *
|
2015-07-09 17:35:10 +02:00
|
|
|
|
aarch64_make_stub_cache (struct frame_info *this_frame, void **this_cache)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
struct aarch64_prologue_cache *cache;
|
2015-07-09 17:35:10 +02:00
|
|
|
|
|
|
|
|
|
if (*this_cache != NULL)
|
Add some more casts (1/2)
Note: I needed to split this patch in two, otherwise it's too big for
the mailing list.
This patch adds explicit casts to situations where a void pointer is
assigned to a pointer to the "real" type. Building in C++ mode requires
those assignments to use an explicit cast. This includes, for example:
- callback arguments (cleanups, comparison functions, ...)
- data attached to some object (objfile, program space, etc) in the form
of a void pointer
- "user data" passed to some function
This patch comes from the commit "(mostly) auto-generated patch to insert
casts needed for C++", taken from Pedro's C++ branch.
Only files built on x86 with --enable-targets=all are modified, so the
native files for other arches will need to be dealt with separately.
I built-tested this with --enable-targets=all and reg-tested. To my
surprise, a test case (selftest.exp) had to be adjusted.
Here's the ChangeLog entry. Again, this was relatively quick to make
despite the length, thanks to David Malcom's script, although I don't
believe it's very useful information in that particular case...
gdb/ChangeLog:
* aarch64-tdep.c (aarch64_make_prologue_cache): Add cast(s).
(aarch64_make_stub_cache): Likewise.
(value_of_aarch64_user_reg): Likewise.
* ada-lang.c (ada_inferior_data_cleanup): Likewise.
(get_ada_inferior_data): Likewise.
(get_ada_pspace_data): Likewise.
(ada_pspace_data_cleanup): Likewise.
(ada_complete_symbol_matcher): Likewise.
(ada_exc_search_name_matches): Likewise.
* ada-tasks.c (get_ada_tasks_pspace_data): Likewise.
(get_ada_tasks_inferior_data): Likewise.
* addrmap.c (addrmap_mutable_foreach_worker): Likewise.
(splay_obstack_alloc): Likewise.
(splay_obstack_free): Likewise.
* alpha-linux-tdep.c (alpha_linux_supply_gregset): Likewise.
(alpha_linux_collect_gregset): Likewise.
(alpha_linux_supply_fpregset): Likewise.
(alpha_linux_collect_fpregset): Likewise.
* alpha-mdebug-tdep.c (alpha_mdebug_frame_unwind_cache): Likewise.
* alpha-tdep.c (alpha_lds): Likewise.
(alpha_sts): Likewise.
(alpha_sigtramp_frame_unwind_cache): Likewise.
(alpha_heuristic_frame_unwind_cache): Likewise.
(alpha_supply_int_regs): Likewise.
(alpha_fill_int_regs): Likewise.
(alpha_supply_fp_regs): Likewise.
(alpha_fill_fp_regs): Likewise.
* alphanbsd-tdep.c (alphanbsd_supply_fpregset): Likewise.
(alphanbsd_aout_supply_gregset): Likewise.
(alphanbsd_supply_gregset): Likewise.
* amd64-linux-tdep.c (amd64_linux_init_abi): Likewise.
(amd64_x32_linux_init_abi): Likewise.
* amd64-nat.c (amd64_supply_native_gregset): Likewise.
(amd64_collect_native_gregset): Likewise.
* amd64-tdep.c (amd64_frame_cache): Likewise.
(amd64_sigtramp_frame_cache): Likewise.
(amd64_epilogue_frame_cache): Likewise.
(amd64_supply_fxsave): Likewise.
(amd64_supply_xsave): Likewise.
(amd64_collect_fxsave): Likewise.
(amd64_collect_xsave): Likewise.
* amd64-windows-tdep.c (amd64_windows_frame_cache): Likewise.
* amd64obsd-tdep.c (amd64obsd_trapframe_cache): Likewise.
* arm-linux-tdep.c (arm_linux_supply_gregset): Likewise.
(arm_linux_collect_gregset): Likewise.
(arm_linux_supply_nwfpe): Likewise.
(arm_linux_collect_nwfpe): Likewise.
(arm_linux_supply_vfp): Likewise.
(arm_linux_collect_vfp): Likewise.
* arm-tdep.c (arm_find_mapping_symbol): Likewise.
(arm_prologue_unwind_stop_reason): Likewise.
(arm_prologue_this_id): Likewise.
(arm_prologue_prev_register): Likewise.
(arm_exidx_data_free): Likewise.
(arm_find_exidx_entry): Likewise.
(arm_stub_this_id): Likewise.
(arm_m_exception_this_id): Likewise.
(arm_m_exception_prev_register): Likewise.
(arm_normal_frame_base): Likewise.
(gdb_print_insn_arm): Likewise.
(arm_objfile_data_free): Likewise.
(arm_record_special_symbol): Likewise.
(value_of_arm_user_reg): Likewise.
* armbsd-tdep.c (armbsd_supply_fpregset): Likewise.
(armbsd_supply_gregset): Likewise.
* auto-load.c (auto_load_pspace_data_cleanup): Likewise.
(get_auto_load_pspace_data): Likewise.
(hash_loaded_script_entry): Likewise.
(eq_loaded_script_entry): Likewise.
(clear_section_scripts): Likewise.
(collect_matching_scripts): Likewise.
* auxv.c (auxv_inferior_data_cleanup): Likewise.
(get_auxv_inferior_data): Likewise.
* avr-tdep.c (avr_frame_unwind_cache): Likewise.
* ax-general.c (do_free_agent_expr_cleanup): Likewise.
* bfd-target.c (target_bfd_xfer_partial): Likewise.
(target_bfd_xclose): Likewise.
(target_bfd_get_section_table): Likewise.
* bfin-tdep.c (bfin_frame_cache): Likewise.
* block.c (find_block_in_blockvector): Likewise.
(call_site_for_pc): Likewise.
(block_find_non_opaque_type_preferred): Likewise.
* break-catch-sig.c (signal_catchpoint_insert_location): Likewise.
(signal_catchpoint_remove_location): Likewise.
(signal_catchpoint_breakpoint_hit): Likewise.
(signal_catchpoint_print_one): Likewise.
(signal_catchpoint_print_mention): Likewise.
(signal_catchpoint_print_recreate): Likewise.
* break-catch-syscall.c (get_catch_syscall_inferior_data): Likewise.
* breakpoint.c (do_cleanup_counted_command_line): Likewise.
(bp_location_compare_addrs): Likewise.
(get_first_locp_gte_addr): Likewise.
(check_tracepoint_command): Likewise.
(do_map_commands_command): Likewise.
(get_breakpoint_objfile_data): Likewise.
(free_breakpoint_probes): Likewise.
(do_captured_breakpoint_query): Likewise.
(compare_breakpoints): Likewise.
(bp_location_compare): Likewise.
(bpstat_remove_breakpoint_callback): Likewise.
(do_delete_breakpoint_cleanup): Likewise.
* bsd-uthread.c (bsd_uthread_set_supply_uthread): Likewise.
(bsd_uthread_set_collect_uthread): Likewise.
(bsd_uthread_activate): Likewise.
(bsd_uthread_fetch_registers): Likewise.
(bsd_uthread_store_registers): Likewise.
* btrace.c (check_xml_btrace_version): Likewise.
(parse_xml_btrace_block): Likewise.
(parse_xml_btrace_pt_config_cpu): Likewise.
(parse_xml_btrace_pt_raw): Likewise.
(parse_xml_btrace_pt): Likewise.
(parse_xml_btrace_conf_bts): Likewise.
(parse_xml_btrace_conf_pt): Likewise.
(do_btrace_data_cleanup): Likewise.
* c-typeprint.c (find_typedef_for_canonicalize): Likewise.
* charset.c (cleanup_iconv): Likewise.
(do_cleanup_iterator): Likewise.
* cli-out.c (cli_uiout_dtor): Likewise.
(cli_table_begin): Likewise.
(cli_table_body): Likewise.
(cli_table_end): Likewise.
(cli_table_header): Likewise.
(cli_begin): Likewise.
(cli_end): Likewise.
(cli_field_int): Likewise.
(cli_field_skip): Likewise.
(cli_field_string): Likewise.
(cli_field_fmt): Likewise.
(cli_spaces): Likewise.
(cli_text): Likewise.
(cli_message): Likewise.
(cli_wrap_hint): Likewise.
(cli_flush): Likewise.
(cli_redirect): Likewise.
(out_field_fmt): Likewise.
(field_separator): Likewise.
(cli_out_set_stream): Likewise.
* cli/cli-cmds.c (compare_symtabs): Likewise.
* cli/cli-dump.c (call_dump_func): Likewise.
(restore_section_callback): Likewise.
* cli/cli-script.c (clear_hook_in_cleanup): Likewise.
(do_restore_user_call_depth): Likewise.
(do_free_command_lines_cleanup): Likewise.
* coff-pe-read.c (get_section_vmas): Likewise.
(pe_as16): Likewise.
(pe_as32): Likewise.
* coffread.c (coff_symfile_read): Likewise.
* common/agent.c (agent_look_up_symbols): Likewise.
* common/filestuff.c (do_close_cleanup): Likewise.
* common/format.c (free_format_pieces_cleanup): Likewise.
* common/vec.c (vec_o_reserve): Likewise.
* compile/compile-c-support.c (print_one_macro): Likewise.
* compile/compile-c-symbols.c (hash_symbol_error): Likewise.
(eq_symbol_error): Likewise.
(del_symbol_error): Likewise.
(error_symbol_once): Likewise.
(gcc_convert_symbol): Likewise.
(gcc_symbol_address): Likewise.
(hash_symname): Likewise.
(eq_symname): Likewise.
* compile/compile-c-types.c (hash_type_map_instance): Likewise.
(eq_type_map_instance): Likewise.
(insert_type): Likewise.
(convert_type): Likewise.
* compile/compile-object-load.c (munmap_listp_free_cleanup): Likewise.
(setup_sections): Likewise.
(link_hash_table_free): Likewise.
(copy_sections): Likewise.
* compile/compile-object-run.c (do_module_cleanup): Likewise.
* compile/compile.c (compile_print_value): Likewise.
(do_rmdir): Likewise.
(cleanup_compile_instance): Likewise.
(cleanup_unlink_file): Likewise.
* completer.c (free_completion_tracker): Likewise.
* corelow.c (add_to_spuid_list): Likewise.
* cp-namespace.c (reset_directive_searched): Likewise.
* cp-support.c (reset_directive_searched): Likewise.
* cris-tdep.c (cris_sigtramp_frame_unwind_cache): Likewise.
(cris_frame_unwind_cache): Likewise.
* d-lang.c (builtin_d_type): Likewise.
* d-namespace.c (reset_directive_searched): Likewise.
* dbxread.c (dbx_free_symfile_info): Likewise.
(do_free_bincl_list_cleanup): Likewise.
* disasm.c (hash_dis_line_entry): Likewise.
(eq_dis_line_entry): Likewise.
(dis_asm_print_address): Likewise.
(fprintf_disasm): Likewise.
(do_ui_file_delete): Likewise.
* doublest.c (convert_floatformat_to_doublest): Likewise.
* dummy-frame.c (pop_dummy_frame_bpt): Likewise.
(dummy_frame_prev_register): Likewise.
(dummy_frame_this_id): Likewise.
* dwarf2-frame-tailcall.c (cache_hash): Likewise.
(cache_eq): Likewise.
(cache_find): Likewise.
(tailcall_frame_this_id): Likewise.
(dwarf2_tailcall_prev_register_first): Likewise.
(tailcall_frame_prev_register): Likewise.
(tailcall_frame_dealloc_cache): Likewise.
(tailcall_frame_prev_arch): Likewise.
* dwarf2-frame.c (dwarf2_frame_state_free): Likewise.
(dwarf2_frame_set_init_reg): Likewise.
(dwarf2_frame_init_reg): Likewise.
(dwarf2_frame_set_signal_frame_p): Likewise.
(dwarf2_frame_signal_frame_p): Likewise.
(dwarf2_frame_set_adjust_regnum): Likewise.
(dwarf2_frame_adjust_regnum): Likewise.
(clear_pointer_cleanup): Likewise.
(dwarf2_frame_cache): Likewise.
(find_cie): Likewise.
(dwarf2_frame_find_fde): Likewise.
* dwarf2expr.c (dwarf_expr_address_type): Likewise.
(free_dwarf_expr_context_cleanup): Likewise.
* dwarf2loc.c (locexpr_find_frame_base_location): Likewise.
(locexpr_get_frame_base): Likewise.
(loclist_find_frame_base_location): Likewise.
(loclist_get_frame_base): Likewise.
(dwarf_expr_dwarf_call): Likewise.
(dwarf_expr_get_base_type): Likewise.
(dwarf_expr_push_dwarf_reg_entry_value): Likewise.
(dwarf_expr_get_obj_addr): Likewise.
(entry_data_value_coerce_ref): Likewise.
(entry_data_value_copy_closure): Likewise.
(entry_data_value_free_closure): Likewise.
(get_frame_address_in_block_wrapper): Likewise.
(dwarf2_evaluate_property): Likewise.
(dwarf2_compile_property_to_c): Likewise.
(needs_frame_read_addr_from_reg): Likewise.
(needs_frame_get_reg_value): Likewise.
(needs_frame_frame_base): Likewise.
(needs_frame_frame_cfa): Likewise.
(needs_frame_tls_address): Likewise.
(needs_frame_dwarf_call): Likewise.
(needs_dwarf_reg_entry_value): Likewise.
(get_ax_pc): Likewise.
(locexpr_read_variable): Likewise.
(locexpr_read_variable_at_entry): Likewise.
(locexpr_read_needs_frame): Likewise.
(locexpr_describe_location): Likewise.
(locexpr_tracepoint_var_ref): Likewise.
(locexpr_generate_c_location): Likewise.
(loclist_read_variable): Likewise.
(loclist_read_variable_at_entry): Likewise.
(loclist_describe_location): Likewise.
(loclist_tracepoint_var_ref): Likewise.
(loclist_generate_c_location): Likewise.
* dwarf2read.c (line_header_hash_voidp): Likewise.
(line_header_eq_voidp): Likewise.
(dwarf2_has_info): Likewise.
(dwarf2_get_section_info): Likewise.
(locate_dwz_sections): Likewise.
(hash_file_name_entry): Likewise.
(eq_file_name_entry): Likewise.
(delete_file_name_entry): Likewise.
(dw2_setup): Likewise.
(dw2_get_file_names_reader): Likewise.
(dw2_find_pc_sect_compunit_symtab): Likewise.
(hash_signatured_type): Likewise.
(eq_signatured_type): Likewise.
(add_signatured_type_cu_to_table): Likewise.
(create_debug_types_hash_table): Likewise.
(lookup_dwo_signatured_type): Likewise.
(lookup_dwp_signatured_type): Likewise.
(lookup_signatured_type): Likewise.
(hash_type_unit_group): Likewise.
(eq_type_unit_group): Likewise.
(get_type_unit_group): Likewise.
(process_psymtab_comp_unit_reader): Likewise.
(sort_tu_by_abbrev_offset): Likewise.
(process_skeletonless_type_unit): Likewise.
(psymtabs_addrmap_cleanup): Likewise.
(dwarf2_read_symtab): Likewise.
(psymtab_to_symtab_1): Likewise.
(die_hash): Likewise.
(die_eq): Likewise.
(load_full_comp_unit_reader): Likewise.
(reset_die_in_process): Likewise.
(free_cu_line_header): Likewise.
(handle_DW_AT_stmt_list): Likewise.
(hash_dwo_file): Likewise.
(eq_dwo_file): Likewise.
(hash_dwo_unit): Likewise.
(eq_dwo_unit): Likewise.
(create_dwo_cu_reader): Likewise.
(create_dwo_unit_in_dwp_v1): Likewise.
(create_dwo_unit_in_dwp_v2): Likewise.
(lookup_dwo_unit_in_dwp): Likewise.
(dwarf2_locate_dwo_sections): Likewise.
(dwarf2_locate_common_dwp_sections): Likewise.
(dwarf2_locate_v2_dwp_sections): Likewise.
(hash_dwp_loaded_cutus): Likewise.
(eq_dwp_loaded_cutus): Likewise.
(lookup_dwo_cutu): Likewise.
(abbrev_table_free_cleanup): Likewise.
(dwarf2_free_abbrev_table): Likewise.
(find_partial_die_in_comp_unit): Likewise.
(free_line_header_voidp): Likewise.
(follow_die_offset): Likewise.
(follow_die_sig_1): Likewise.
(free_heap_comp_unit): Likewise.
(free_stack_comp_unit): Likewise.
(dwarf2_free_objfile): Likewise.
(per_cu_offset_and_type_hash): Likewise.
(per_cu_offset_and_type_eq): Likewise.
(get_die_type_at_offset): Likewise.
(partial_die_hash): Likewise.
(partial_die_eq): Likewise.
(dwarf2_per_objfile_free): Likewise.
(hash_strtab_entry): Likewise.
(eq_strtab_entry): Likewise.
(add_string): Likewise.
(hash_symtab_entry): Likewise.
(eq_symtab_entry): Likewise.
(delete_symtab_entry): Likewise.
(cleanup_mapped_symtab): Likewise.
(add_indices_to_cpool): Likewise.
(hash_psymtab_cu_index): Likewise.
(eq_psymtab_cu_index): Likewise.
(add_address_entry_worker): Likewise.
(unlink_if_set): Likewise.
(write_one_signatured_type): Likewise.
(save_gdb_index_command): Likewise.
* elfread.c (elf_symtab_read): Likewise.
(elf_gnu_ifunc_cache_hash): Likewise.
(elf_gnu_ifunc_cache_eq): Likewise.
(elf_gnu_ifunc_record_cache): Likewise.
(elf_gnu_ifunc_resolve_by_cache): Likewise.
(elf_get_probes): Likewise.
(probe_key_free): Likewise.
* f-lang.c (builtin_f_type): Likewise.
* frame-base.c (frame_base_append_sniffer): Likewise.
(frame_base_set_default): Likewise.
(frame_base_find_by_frame): Likewise.
* frame-unwind.c (frame_unwind_prepend_unwinder): Likewise.
(frame_unwind_append_unwinder): Likewise.
(frame_unwind_find_by_frame): Likewise.
* frame.c (frame_addr_hash): Likewise.
(frame_addr_hash_eq): Likewise.
(frame_stash_find): Likewise.
(do_frame_register_read): Likewise.
(unwind_to_current_frame): Likewise.
(frame_cleanup_after_sniffer): Likewise.
* frv-linux-tdep.c (frv_linux_sigtramp_frame_cache): Likewise.
* frv-tdep.c (frv_frame_unwind_cache): Likewise.
* ft32-tdep.c (ft32_frame_cache): Likewise.
* gcore.c (do_bfd_delete_cleanup): Likewise.
(gcore_create_callback): Likewise.
* gdb_bfd.c (hash_bfd): Likewise.
(eq_bfd): Likewise.
(gdb_bfd_open): Likewise.
(free_one_bfd_section): Likewise.
(gdb_bfd_ref): Likewise.
(gdb_bfd_unref): Likewise.
(get_section_descriptor): Likewise.
(gdb_bfd_map_section): Likewise.
(gdb_bfd_crc): Likewise.
(gdb_bfd_mark_parent): Likewise.
(gdb_bfd_record_inclusion): Likewise.
(gdb_bfd_requires_relocations): Likewise.
(print_one_bfd): Likewise.
* gdbtypes.c (type_pair_hash): Likewise.
(type_pair_eq): Likewise.
(builtin_type): Likewise.
(objfile_type): Likewise.
* gnu-v3-abi.c (vtable_ptrdiff_type): Likewise.
(vtable_address_point_offset): Likewise.
(gnuv3_get_vtable): Likewise.
(hash_value_and_voffset): Likewise.
(eq_value_and_voffset): Likewise.
(compare_value_and_voffset): Likewise.
(compute_vtable_size): Likewise.
(gnuv3_get_typeid_type): Likewise.
* go-lang.c (builtin_go_type): Likewise.
* guile/scm-block.c (bkscm_hash_block_smob): Likewise.
(bkscm_eq_block_smob): Likewise.
(bkscm_objfile_block_map): Likewise.
(bkscm_del_objfile_blocks): Likewise.
* guile/scm-breakpoint.c (bpscm_build_bp_list): Likewise.
* guile/scm-disasm.c (gdbscm_disasm_read_memory_worker): Likewise.
(gdbscm_disasm_print_address): Likewise.
* guile/scm-frame.c (frscm_hash_frame_smob): Likewise.
(frscm_eq_frame_smob): Likewise.
(frscm_inferior_frame_map): Likewise.
(frscm_del_inferior_frames): Likewise.
* guile/scm-gsmob.c (gdbscm_add_objfile_ref): Likewise.
* guile/scm-objfile.c (ofscm_handle_objfile_deleted): Likewise.
(ofscm_objfile_smob_from_objfile): Likewise.
* guile/scm-ports.c (ioscm_write): Likewise.
(ioscm_file_port_delete): Likewise.
(ioscm_file_port_rewind): Likewise.
(ioscm_file_port_put): Likewise.
(ioscm_file_port_write): Likewise.
* guile/scm-progspace.c (psscm_handle_pspace_deleted): Likewise.
(psscm_pspace_smob_from_pspace): Likewise.
* guile/scm-safe-call.c (scscm_recording_pre_unwind_handler): Likewise.
(scscm_recording_unwind_handler): Likewise.
(gdbscm_with_catch): Likewise.
(scscm_call_0_body): Likewise.
(scscm_call_1_body): Likewise.
(scscm_call_2_body): Likewise.
(scscm_call_3_body): Likewise.
(scscm_call_4_body): Likewise.
(scscm_apply_1_body): Likewise.
(scscm_eval_scheme_string): Likewise.
(gdbscm_safe_eval_string): Likewise.
(scscm_source_scheme_script): Likewise.
(gdbscm_safe_source_script): Likewise.
* guile/scm-string.c (gdbscm_call_scm_to_stringn): Likewise.
(gdbscm_call_scm_from_stringn): Likewise.
* guile/scm-symbol.c (syscm_hash_symbol_smob): Likewise.
(syscm_eq_symbol_smob): Likewise.
(syscm_get_symbol_map): Likewise.
(syscm_del_objfile_symbols): Likewise.
* guile/scm-symtab.c (stscm_hash_symtab_smob): Likewise.
(stscm_eq_symtab_smob): Likewise.
(stscm_objfile_symtab_map): Likewise.
(stscm_del_objfile_symtabs): Likewise.
* guile/scm-type.c (tyscm_hash_type_smob): Likewise.
(tyscm_eq_type_smob): Likewise.
(tyscm_type_map): Likewise.
(tyscm_copy_type_recursive): Likewise.
(save_objfile_types): Likewise.
* guile/scm-utils.c (extract_arg): Likewise.
* h8300-tdep.c (h8300_frame_cache): Likewise.
* hppa-linux-tdep.c (hppa_linux_sigtramp_frame_unwind_cache): Likewise.
* hppa-tdep.c (compare_unwind_entries): Likewise.
(find_unwind_entry): Likewise.
(hppa_frame_cache): Likewise.
(hppa_stub_frame_unwind_cache): Likewise.
* hppanbsd-tdep.c (hppanbsd_supply_gregset): Likewise.
* hppaobsd-tdep.c (hppaobsd_supply_gregset): Likewise.
(hppaobsd_supply_fpregset): Likewise.
* i386-cygwin-tdep.c (core_process_module_section): Likewise.
* i386-linux-tdep.c (i386_linux_init_abi): Likewise.
* i386-tdep.c (i386_frame_cache): Likewise.
(i386_epilogue_frame_cache): Likewise.
(i386_sigtramp_frame_cache): Likewise.
(i386_supply_gregset): Likewise.
(i386_collect_gregset): Likewise.
(i386_gdbarch_init): Likewise.
* i386obsd-tdep.c (i386obsd_aout_supply_regset): Likewise.
(i386obsd_trapframe_cache): Likewise.
* i387-tdep.c (i387_supply_fsave): Likewise.
(i387_collect_fsave): Likewise.
(i387_supply_fxsave): Likewise.
(i387_collect_fxsave): Likewise.
(i387_supply_xsave): Likewise.
(i387_collect_xsave): Likewise.
* ia64-tdep.c (ia64_frame_cache): Likewise.
(ia64_sigtramp_frame_cache): Likewise.
* infcmd.c (attach_command_continuation): Likewise.
(attach_command_continuation_free_args): Likewise.
* inferior.c (restore_inferior): Likewise.
(delete_thread_of_inferior): Likewise.
* inflow.c (inflow_inferior_data_cleanup): Likewise.
(get_inflow_inferior_data): Likewise.
(inflow_inferior_exit): Likewise.
* infrun.c (displaced_step_clear_cleanup): Likewise.
(restore_current_uiout_cleanup): Likewise.
(release_stop_context_cleanup): Likewise.
(do_restore_infcall_suspend_state_cleanup): Likewise.
(do_restore_infcall_control_state_cleanup): Likewise.
(restore_inferior_ptid): Likewise.
* inline-frame.c (block_starting_point_at): Likewise.
* iq2000-tdep.c (iq2000_frame_cache): Likewise.
* jit.c (get_jit_objfile_data): Likewise.
(get_jit_program_space_data): Likewise.
(jit_object_close_impl): Likewise.
(jit_find_objf_with_entry_addr): Likewise.
(jit_breakpoint_deleted): Likewise.
(jit_unwind_reg_set_impl): Likewise.
(jit_unwind_reg_get_impl): Likewise.
(jit_dealloc_cache): Likewise.
(jit_frame_sniffer): Likewise.
(jit_frame_prev_register): Likewise.
(jit_prepend_unwinder): Likewise.
(jit_inferior_exit_hook): Likewise.
(free_objfile_data): Likewise.
* jv-lang.c (jv_per_objfile_free): Likewise.
(get_dynamics_objfile): Likewise.
(get_java_class_symtab): Likewise.
(builtin_java_type): Likewise.
* language.c (language_string_char_type): Likewise.
(language_bool_type): Likewise.
(language_lookup_primitive_type): Likewise.
(language_lookup_primitive_type_as_symbol): Likewise.
* linespec.c (hash_address_entry): Likewise.
(eq_address_entry): Likewise.
(iterate_inline_only): Likewise.
(iterate_name_matcher): Likewise.
(decode_line_2_compare_items): Likewise.
(collect_one_symbol): Likewise.
(compare_symbols): Likewise.
(compare_msymbols): Likewise.
(add_symtabs_to_list): Likewise.
(collect_symbols): Likewise.
(compare_msyms): Likewise.
(add_minsym): Likewise.
(cleanup_linespec_result): Likewise.
* linux-fork.c (inferior_call_waitpid_cleanup): Likewise.
* linux-nat.c (delete_lwp_cleanup): Likewise.
(count_events_callback): Likewise.
(select_event_lwp_callback): Likewise.
(resume_stopped_resumed_lwps): Likewise.
* linux-tdep.c (get_linux_gdbarch_data): Likewise.
(invalidate_linux_cache_inf): Likewise.
(get_linux_inferior_data): Likewise.
(linux_find_memory_regions_thunk): Likewise.
(linux_make_mappings_callback): Likewise.
(linux_corefile_thread_callback): Likewise.
(find_mapping_size): Likewise.
* linux-thread-db.c (find_new_threads_callback): Likewise.
* lm32-tdep.c (lm32_frame_cache): Likewise.
* m2-lang.c (builtin_m2_type): Likewise.
* m32c-tdep.c (m32c_analyze_frame_prologue): Likewise.
* m32r-linux-tdep.c (m32r_linux_sigtramp_frame_cache): Likewise.
(m32r_linux_supply_gregset): Likewise.
(m32r_linux_collect_gregset): Likewise.
* m32r-tdep.c (m32r_frame_unwind_cache): Likewise.
* m68hc11-tdep.c (m68hc11_frame_unwind_cache): Likewise.
* m68k-tdep.c (m68k_frame_cache): Likewise.
* m68kbsd-tdep.c (m68kbsd_supply_fpregset): Likewise.
(m68kbsd_supply_gregset): Likewise.
* m68klinux-tdep.c (m68k_linux_sigtramp_frame_cache): Likewise.
* m88k-tdep.c (m88k_frame_cache): Likewise.
(m88k_supply_gregset): Likewise.
gdb/gdbserver/ChangeLog:
* dll.c (match_dll): Add cast(s).
(unloaded_dll): Likewise.
* linux-low.c (second_thread_of_pid_p): Likewise.
(delete_lwp_callback): Likewise.
(count_events_callback): Likewise.
(select_event_lwp_callback): Likewise.
(linux_set_resume_request): Likewise.
* server.c (accumulate_file_name_length): Likewise.
(emit_dll_description): Likewise.
(handle_qxfer_threads_worker): Likewise.
(visit_actioned_threads): Likewise.
* thread-db.c (any_thread_of): Likewise.
* tracepoint.c (same_process_p): Likewise.
(match_blocktype): Likewise.
(build_traceframe_info_xml): Likewise.
gdb/testsuite/ChangeLog:
* gdb.gdb/selftest.exp (do_steps_and_nexts): Adjust expected
source line.
2015-09-25 20:08:07 +02:00
|
|
|
|
return (struct aarch64_prologue_cache *) *this_cache;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
cache = FRAME_OBSTACK_ZALLOC (struct aarch64_prologue_cache);
|
|
|
|
|
cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
|
2015-07-09 17:35:10 +02:00
|
|
|
|
*this_cache = cache;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2019-04-04 00:02:42 +02:00
|
|
|
|
try
|
2015-07-09 17:35:11 +02:00
|
|
|
|
{
|
|
|
|
|
cache->prev_sp = get_frame_register_unsigned (this_frame,
|
|
|
|
|
AARCH64_SP_REGNUM);
|
|
|
|
|
cache->prev_pc = get_frame_pc (this_frame);
|
|
|
|
|
cache->available_p = 1;
|
|
|
|
|
}
|
2019-04-03 23:59:07 +02:00
|
|
|
|
catch (const gdb_exception_error &ex)
|
2015-07-09 17:35:11 +02:00
|
|
|
|
{
|
|
|
|
|
if (ex.error != NOT_AVAILABLE_ERROR)
|
Replace throw_exception with throw in some cases
This replaces throw_exception with "throw;" when possible. This was
written by script. The rule that is followed is that uses of the
form:
catch (... &name)
{
...
throw_exception (name);
}
... can be rewritten. This should always be safe, because exceptions
are caught by const reference, and therefore can't be modified in the
body of the catch.
gdb/ChangeLog
2019-04-08 Tom Tromey <tom@tromey.com>
* valops.c (value_rtti_indirect_type): Replace throw_exception
with throw.
* tracefile-tfile.c (tfile_target_open): Replace throw_exception
with throw.
* thread.c (thr_try_catch_cmd): Replace throw_exception with
throw.
* target.c (target_translate_tls_address): Replace throw_exception
with throw.
* stack.c (frame_apply_command_count): Replace throw_exception
with throw.
* solib-spu.c (append_ocl_sos): Replace throw_exception with
throw.
* s390-tdep.c (s390_frame_unwind_cache): Replace throw_exception
with throw.
* rs6000-tdep.c (rs6000_frame_cache)
(rs6000_epilogue_frame_cache): Replace throw_exception with throw.
* remote.c: Replace throw_exception with throw.
* record-full.c (record_full_message, record_full_wait_1)
(record_full_restore): Replace throw_exception with throw.
* record-btrace.c:
(get_thread_current_frame_id, record_btrace_start_replaying)
(cmd_record_btrace_bts_start, cmd_record_btrace_pt_start)
(cmd_record_btrace_start): Replace throw_exception with throw.
* parse.c (parse_exp_in_context_1): Replace throw_exception with
throw.
* linux-nat.c (detach_one_lwp, linux_resume_one_lwp)
(resume_stopped_resumed_lwps): Replace throw_exception with throw.
* linespec.c:
(find_linespec_symbols): Replace throw_exception with throw.
* infrun.c (displaced_step_prepare, resume): Replace
throw_exception with throw.
* infcmd.c (post_create_inferior): Replace throw_exception with
throw.
* inf-loop.c (inferior_event_handler): Replace throw_exception
with throw.
* i386-tdep.c (i386_frame_cache, i386_epilogue_frame_cache)
(i386_sigtramp_frame_cache): Replace throw_exception with throw.
* frame.c (frame_unwind_pc, get_prev_frame_if_no_cycle)
(get_prev_frame_always, get_frame_pc_if_available)
(get_frame_address_in_block_if_available, get_frame_language):
Replace throw_exception with throw.
* frame-unwind.c (frame_unwind_try_unwinder): Replace
throw_exception with throw.
* eval.c (fetch_subexp_value, evaluate_var_value)
(evaluate_funcall, evaluate_subexp_standard): Replace
throw_exception with throw.
* dwarf2loc.c (call_site_find_chain)
(dwarf2_evaluate_loc_desc_full, dwarf2_locexpr_baton_eval):
Replace throw_exception with throw.
* dwarf2-frame.c (dwarf2_frame_cache): Replace throw_exception
with throw.
* darwin-nat.c (darwin_attach_pid): Replace throw_exception with
throw.
* cp-abi.c (baseclass_offset): Replace throw_exception with throw.
* completer.c (complete_line_internal): Replace throw_exception
with throw.
* compile/compile-object-run.c (compile_object_run): Replace
throw_exception with throw.
* cli/cli-script.c (process_next_line): Replace throw_exception
with throw.
* btrace.c (btrace_compute_ftrace_pt, btrace_compute_ftrace)
(btrace_enable, btrace_maint_update_pt_packets): Replace
throw_exception with throw.
* breakpoint.c (create_breakpoint, save_breakpoints): Replace
throw_exception with throw.
* break-catch-throw.c (re_set_exception_catchpoint): Replace
throw_exception with throw.
* amd64-tdep.c (amd64_frame_cache, amd64_sigtramp_frame_cache)
(amd64_epilogue_frame_cache): Replace throw_exception with throw.
* aarch64-tdep.c (aarch64_make_prologue_cache)
(aarch64_make_stub_cache): Replace throw_exception with throw.
gdb/gdbserver/ChangeLog
2019-04-08 Tom Tromey <tom@tromey.com>
* linux-low.c (linux_detach_one_lwp): Replace throw_exception with
throw.
(linux_resume_one_lwp): Likewise.
2019-01-28 18:45:45 +01:00
|
|
|
|
throw;
|
2015-07-09 17:35:11 +02:00
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
return cache;
|
|
|
|
|
}
|
|
|
|
|
|
2015-07-09 17:35:11 +02:00
|
|
|
|
/* Implement the "stop_reason" frame_unwind method. */
|
|
|
|
|
|
|
|
|
|
static enum unwind_stop_reason
|
|
|
|
|
aarch64_stub_frame_unwind_stop_reason (struct frame_info *this_frame,
|
|
|
|
|
void **this_cache)
|
|
|
|
|
{
|
|
|
|
|
struct aarch64_prologue_cache *cache
|
|
|
|
|
= aarch64_make_stub_cache (this_frame, this_cache);
|
|
|
|
|
|
|
|
|
|
if (!cache->available_p)
|
|
|
|
|
return UNWIND_UNAVAILABLE;
|
|
|
|
|
|
|
|
|
|
return UNWIND_NO_REASON;
|
|
|
|
|
}
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* Our frame ID for a stub frame is the current SP and LR. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_stub_this_id (struct frame_info *this_frame,
|
|
|
|
|
void **this_cache, struct frame_id *this_id)
|
|
|
|
|
{
|
2015-07-09 17:35:10 +02:00
|
|
|
|
struct aarch64_prologue_cache *cache
|
|
|
|
|
= aarch64_make_stub_cache (this_frame, this_cache);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2015-07-09 17:35:11 +02:00
|
|
|
|
if (cache->available_p)
|
|
|
|
|
*this_id = frame_id_build (cache->prev_sp, cache->prev_pc);
|
|
|
|
|
else
|
|
|
|
|
*this_id = frame_id_build_unavailable_stack (cache->prev_pc);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "sniffer" frame_unwind method. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
aarch64_stub_unwind_sniffer (const struct frame_unwind *self,
|
|
|
|
|
struct frame_info *this_frame,
|
|
|
|
|
void **this_prologue_cache)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR addr_in_block;
|
|
|
|
|
gdb_byte dummy[4];
|
|
|
|
|
|
|
|
|
|
addr_in_block = get_frame_address_in_block (this_frame);
|
2013-06-25 00:18:32 +02:00
|
|
|
|
if (in_plt_section (addr_in_block)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* We also use the stub winder if the target memory is unreadable
|
|
|
|
|
to avoid having the prologue unwinder trying to read it. */
|
|
|
|
|
|| target_read_memory (get_frame_pc (this_frame), dummy, 4) != 0)
|
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* AArch64 stub unwinder. */
|
|
|
|
|
struct frame_unwind aarch64_stub_unwind =
|
|
|
|
|
{
|
|
|
|
|
NORMAL_FRAME,
|
2015-07-09 17:35:11 +02:00
|
|
|
|
aarch64_stub_frame_unwind_stop_reason,
|
2013-02-04 13:48:37 +01:00
|
|
|
|
aarch64_stub_this_id,
|
|
|
|
|
aarch64_prologue_prev_register,
|
|
|
|
|
NULL,
|
|
|
|
|
aarch64_stub_unwind_sniffer
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* Return the frame base address of *THIS_FRAME. */
|
|
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
|
aarch64_normal_frame_base (struct frame_info *this_frame, void **this_cache)
|
|
|
|
|
{
|
2015-07-09 17:35:10 +02:00
|
|
|
|
struct aarch64_prologue_cache *cache
|
|
|
|
|
= aarch64_make_prologue_cache (this_frame, this_cache);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
return cache->prev_sp - cache->framesize;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* AArch64 default frame base information. */
|
|
|
|
|
struct frame_base aarch64_normal_base =
|
|
|
|
|
{
|
|
|
|
|
&aarch64_prologue_unwind,
|
|
|
|
|
aarch64_normal_frame_base,
|
|
|
|
|
aarch64_normal_frame_base,
|
|
|
|
|
aarch64_normal_frame_base
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* Return the value of the REGNUM register in the previous frame of
|
|
|
|
|
*THIS_FRAME. */
|
|
|
|
|
|
|
|
|
|
static struct value *
|
|
|
|
|
aarch64_dwarf2_prev_register (struct frame_info *this_frame,
|
|
|
|
|
void **this_cache, int regnum)
|
|
|
|
|
{
|
2019-03-22 11:39:11 +01:00
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame));
|
2013-02-04 13:48:37 +01:00
|
|
|
|
CORE_ADDR lr;
|
|
|
|
|
|
|
|
|
|
switch (regnum)
|
|
|
|
|
{
|
|
|
|
|
case AARCH64_PC_REGNUM:
|
|
|
|
|
lr = frame_unwind_register_unsigned (this_frame, AARCH64_LR_REGNUM);
|
2019-08-07 10:47:57 +02:00
|
|
|
|
lr = aarch64_frame_unmask_lr (tdep, this_frame, lr);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return frame_unwind_got_constant (this_frame, regnum, lr);
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
internal_error (__FILE__, __LINE__,
|
|
|
|
|
_("Unexpected register %d"), regnum);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2019-03-22 11:39:11 +01:00
|
|
|
|
static const unsigned char op_lit0 = DW_OP_lit0;
|
|
|
|
|
static const unsigned char op_lit1 = DW_OP_lit1;
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* Implement the "init_reg" dwarf2_frame_ops method. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
|
|
|
|
|
struct dwarf2_frame_state_reg *reg,
|
|
|
|
|
struct frame_info *this_frame)
|
|
|
|
|
{
|
2019-03-22 11:39:11 +01:00
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
switch (regnum)
|
|
|
|
|
{
|
|
|
|
|
case AARCH64_PC_REGNUM:
|
|
|
|
|
reg->how = DWARF2_FRAME_REG_FN;
|
|
|
|
|
reg->loc.fn = aarch64_dwarf2_prev_register;
|
2019-03-22 11:39:11 +01:00
|
|
|
|
return;
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
case AARCH64_SP_REGNUM:
|
|
|
|
|
reg->how = DWARF2_FRAME_REG_CFA;
|
2019-03-22 11:39:11 +01:00
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Init pauth registers. */
|
|
|
|
|
if (tdep->has_pauth ())
|
|
|
|
|
{
|
|
|
|
|
if (regnum == tdep->pauth_ra_state_regnum)
|
|
|
|
|
{
|
|
|
|
|
/* Initialize RA_STATE to zero. */
|
|
|
|
|
reg->how = DWARF2_FRAME_REG_SAVED_VAL_EXP;
|
|
|
|
|
reg->loc.exp.start = &op_lit0;
|
|
|
|
|
reg->loc.exp.len = 1;
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
else if (regnum == AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base)
|
|
|
|
|
|| regnum == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base))
|
|
|
|
|
{
|
|
|
|
|
reg->how = DWARF2_FRAME_REG_SAME_VALUE;
|
|
|
|
|
return;
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2019-03-22 11:39:11 +01:00
|
|
|
|
/* Implement the execute_dwarf_cfa_vendor_op method. */
|
|
|
|
|
|
|
|
|
|
static bool
|
|
|
|
|
aarch64_execute_dwarf_cfa_vendor_op (struct gdbarch *gdbarch, gdb_byte op,
|
|
|
|
|
struct dwarf2_frame_state *fs)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
struct dwarf2_frame_state_reg *ra_state;
|
|
|
|
|
|
2019-05-22 15:02:17 +02:00
|
|
|
|
if (op == DW_CFA_AARCH64_negate_ra_state)
|
2019-03-22 11:39:11 +01:00
|
|
|
|
{
|
2019-05-22 15:02:17 +02:00
|
|
|
|
/* On systems without pauth, treat as a nop. */
|
|
|
|
|
if (!tdep->has_pauth ())
|
|
|
|
|
return true;
|
|
|
|
|
|
2019-03-22 11:39:11 +01:00
|
|
|
|
/* Allocate RA_STATE column if it's not allocated yet. */
|
|
|
|
|
fs->regs.alloc_regs (AARCH64_DWARF_PAUTH_RA_STATE + 1);
|
|
|
|
|
|
|
|
|
|
/* Toggle the status of RA_STATE between 0 and 1. */
|
|
|
|
|
ra_state = &(fs->regs.reg[AARCH64_DWARF_PAUTH_RA_STATE]);
|
|
|
|
|
ra_state->how = DWARF2_FRAME_REG_SAVED_VAL_EXP;
|
|
|
|
|
|
|
|
|
|
if (ra_state->loc.exp.start == nullptr
|
|
|
|
|
|| ra_state->loc.exp.start == &op_lit0)
|
|
|
|
|
ra_state->loc.exp.start = &op_lit1;
|
|
|
|
|
else
|
|
|
|
|
ra_state->loc.exp.start = &op_lit0;
|
|
|
|
|
|
|
|
|
|
ra_state->loc.exp.len = 1;
|
|
|
|
|
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* When arguments must be pushed onto the stack, they go on in reverse
|
|
|
|
|
order. The code below implements a FILO (stack) to do this. */
|
|
|
|
|
|
2018-07-24 03:51:58 +02:00
|
|
|
|
struct stack_item_t
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
Fix one heap buffer overflow in aarch64_push_dummy_call
Hi,
AddressSanitizer reports an error like this,
(gdb) PASS: gdb.base/call-ar-st.exp: continue to tbreak9
print print_long_arg_list(a, b, c, d, e, f, *struct1, *struct2, *struct3, *struct4, *flags, *flags_combo, *three_char, *five_char, *int_char_combo, *d1, *d2, *d3, *f1, *f2, *f3)
=================================================================
==6236==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x60200008eb50 at pc 0x89e432 bp 0x7fffa3df9080 sp 0x7fffa3df9078
READ of size 5 at 0x60200008eb50 thread T0
#0 0x89e431 in memory_xfer_partial gdb/target.c:1264
#1 0x89e6c7 in target_xfer_partial gdb/target.c:1320
#2 0x89f267 in target_write_partial gdb/target.c:1595^M
#3 0x8a014b in target_write_with_progress gdb/target.c:1889^M
#4 0x8a0262 in target_write gdb/target.c:1914^M
#5 0x89ee59 in target_write_memory gdb/target.c:1492^M
#6 0x9a1c74 in write_memory gdb/corefile.c:393^M
#7 0x467ea5 in aarch64_push_dummy_call gdb/aarch64-tdep.c:1388
The problem is that an instance of stack_item_t is created to adjust
stack for alignment, the item.len is correct, but item.data is buf,
which is wrong, because item.len can be greater than the length of
buf. This patch sets item.data to NULL, and only update sp (no
inferior memory writes on stack for this item).
gdb:
2015-12-17 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (struct stack_item_t): Update comments.
(pass_on_stack): Set item.data to NULL.
(aarch64_push_dummy_call): Call write_memory if si->data
isn't NULL.
2015-12-17 14:07:54 +01:00
|
|
|
|
/* Value to pass on stack. It can be NULL if this item is for stack
|
|
|
|
|
padding. */
|
2015-10-09 16:08:23 +02:00
|
|
|
|
const gdb_byte *data;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* Size in bytes of value to pass on stack. */
|
|
|
|
|
int len;
|
2018-07-24 03:51:58 +02:00
|
|
|
|
};
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2019-04-07 23:48:00 +02:00
|
|
|
|
/* Implement the gdbarch type alignment method, overrides the generic
|
|
|
|
|
alignment algorithm for anything that is aarch64 specific. */
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2019-04-07 23:48:00 +02:00
|
|
|
|
static ULONGEST
|
|
|
|
|
aarch64_type_align (gdbarch *gdbarch, struct type *t)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
t = check_typedef (t);
|
2019-04-07 23:48:00 +02:00
|
|
|
|
if (TYPE_CODE (t) == TYPE_CODE_ARRAY && TYPE_VECTOR (t))
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
2019-04-07 23:48:00 +02:00
|
|
|
|
/* Use the natural alignment for vector types (the same for
|
|
|
|
|
scalar type), but the maximum alignment is 128-bit. */
|
|
|
|
|
if (TYPE_LENGTH (t) > 16)
|
|
|
|
|
return 16;
|
2015-11-27 15:50:30 +01:00
|
|
|
|
else
|
2019-04-07 23:48:00 +02:00
|
|
|
|
return TYPE_LENGTH (t);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
2019-04-07 23:48:00 +02:00
|
|
|
|
|
|
|
|
|
/* Allow the common code to calculate the alignment. */
|
|
|
|
|
return 0;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
|
2018-08-29 12:28:10 +02:00
|
|
|
|
/* Worker function for aapcs_is_vfp_call_or_return_candidate.
|
|
|
|
|
|
|
|
|
|
Return the number of register required, or -1 on failure.
|
|
|
|
|
|
|
|
|
|
When encountering a base element, if FUNDAMENTAL_TYPE is not set then set it
|
|
|
|
|
to the element, else fail if the type of this element does not match the
|
|
|
|
|
existing value. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
aapcs_is_vfp_call_or_return_candidate_1 (struct type *type,
|
|
|
|
|
struct type **fundamental_type)
|
|
|
|
|
{
|
|
|
|
|
if (type == nullptr)
|
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
|
|
switch (TYPE_CODE (type))
|
|
|
|
|
{
|
|
|
|
|
case TYPE_CODE_FLT:
|
|
|
|
|
if (TYPE_LENGTH (type) > 16)
|
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
|
|
if (*fundamental_type == nullptr)
|
|
|
|
|
*fundamental_type = type;
|
|
|
|
|
else if (TYPE_LENGTH (type) != TYPE_LENGTH (*fundamental_type)
|
|
|
|
|
|| TYPE_CODE (type) != TYPE_CODE (*fundamental_type))
|
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
|
|
case TYPE_CODE_COMPLEX:
|
|
|
|
|
{
|
|
|
|
|
struct type *target_type = check_typedef (TYPE_TARGET_TYPE (type));
|
|
|
|
|
if (TYPE_LENGTH (target_type) > 16)
|
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
|
|
if (*fundamental_type == nullptr)
|
|
|
|
|
*fundamental_type = target_type;
|
|
|
|
|
else if (TYPE_LENGTH (target_type) != TYPE_LENGTH (*fundamental_type)
|
|
|
|
|
|| TYPE_CODE (target_type) != TYPE_CODE (*fundamental_type))
|
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
|
|
return 2;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_CODE_ARRAY:
|
|
|
|
|
{
|
|
|
|
|
if (TYPE_VECTOR (type))
|
|
|
|
|
{
|
|
|
|
|
if (TYPE_LENGTH (type) != 8 && TYPE_LENGTH (type) != 16)
|
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
|
|
if (*fundamental_type == nullptr)
|
|
|
|
|
*fundamental_type = type;
|
|
|
|
|
else if (TYPE_LENGTH (type) != TYPE_LENGTH (*fundamental_type)
|
|
|
|
|
|| TYPE_CODE (type) != TYPE_CODE (*fundamental_type))
|
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
struct type *target_type = TYPE_TARGET_TYPE (type);
|
|
|
|
|
int count = aapcs_is_vfp_call_or_return_candidate_1
|
|
|
|
|
(target_type, fundamental_type);
|
|
|
|
|
|
|
|
|
|
if (count == -1)
|
|
|
|
|
return count;
|
|
|
|
|
|
(AArch64) wrong value returned by "finish" for HFA
Consider the gdb.ada/array_return.exp testcase, and in particular,
consider the following code...
type Small_Float_Vector is array (1 .. 2) of Float;
function Create_Small_Float_Vector return Small_Float_Vector is
begin
return (others => 4.25);
end Create_Small_Float_Vector;
... which declares a type which is an array with 2 floats in it
(floats are 4 bytes on AArch64), trying to get GDB to print
the return value from that function does not work:
(gdb) fin
Run till exit from #0 pck.create_small_float_vector () at /[...]/pck.adb:15
0x000000000000062c in p () at /[...]/p.adb:11
11 Vector := Create_Small_Float_Vector;
Value returned is $1 = (4.25, 0.0)
^^^
|||
We expected the value shown to be:
(gdb) fin
Run till exit from #0 pck.create_small_float_vector () at /[...]/pck.adb:15
0x000000000000062c in p () at /[...]/p.adb:11
11 Vector := Create_Small_Float_Vector;
Value returned is $1 = (4.25, 4.25)
Because the return type is an HFA, it is returned via the first two
SIMD registers. However, what happens is that the current implementation
fails to realize that this is an HFA, and therefore fetches the return
value from the wrong location. And the reason why it fails to realize
this is because it thinks that our array has 8 elements (HFAs have
a maximum of 4). Looking at aapcs_is_vfp_call_or_return_candidate_1,
where this is determined, we can easily see why (looks like a thinko):
| case TYPE_CODE_ARRAY:
| [...]
| struct type *target_type = TYPE_TARGET_TYPE (type);
| int count = aapcs_is_vfp_call_or_return_candidate_1
| (target_type, fundamental_type);
|
| if (count == -1)
| return count;
|
!! -> | count *= TYPE_LENGTH (type);
| return count;
Here, we first determine the count for one element of our array,
and so we should then be multiplying that count by the number
of elements in our array (2 in our case). But instead, we multiply it
by the total size (8). As a result, we do not classify the return
type as an HFA, and thus pick the wrong location for fetching
the return value.
gdb/ChangeLog:
* aarch64-tdep.c (aapcs_is_vfp_call_or_return_candidate_1):
return the correct count for potential HFAs.
Tested on aarch64-linux, fixes:
array_return.exp: value printed by finish of Create_Small_Float_Vector
2018-11-08 16:27:31 +01:00
|
|
|
|
count *= (TYPE_LENGTH (type) / TYPE_LENGTH (target_type));
|
2018-08-29 12:28:10 +02:00
|
|
|
|
return count;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_CODE_STRUCT:
|
|
|
|
|
case TYPE_CODE_UNION:
|
|
|
|
|
{
|
|
|
|
|
int count = 0;
|
|
|
|
|
|
|
|
|
|
for (int i = 0; i < TYPE_NFIELDS (type); i++)
|
|
|
|
|
{
|
2019-01-24 09:17:39 +01:00
|
|
|
|
/* Ignore any static fields. */
|
|
|
|
|
if (field_is_static (&TYPE_FIELD (type, i)))
|
|
|
|
|
continue;
|
|
|
|
|
|
2018-08-29 12:28:10 +02:00
|
|
|
|
struct type *member = check_typedef (TYPE_FIELD_TYPE (type, i));
|
|
|
|
|
|
|
|
|
|
int sub_count = aapcs_is_vfp_call_or_return_candidate_1
|
|
|
|
|
(member, fundamental_type);
|
|
|
|
|
if (sub_count == -1)
|
|
|
|
|
return -1;
|
|
|
|
|
count += sub_count;
|
|
|
|
|
}
|
2019-01-21 16:51:49 +01:00
|
|
|
|
|
|
|
|
|
/* Ensure there is no padding between the fields (allowing for empty
|
|
|
|
|
zero length structs) */
|
|
|
|
|
int ftype_length = (*fundamental_type == nullptr)
|
|
|
|
|
? 0 : TYPE_LENGTH (*fundamental_type);
|
|
|
|
|
if (count * ftype_length != TYPE_LENGTH (type))
|
|
|
|
|
return -1;
|
|
|
|
|
|
2018-08-29 12:28:10 +02:00
|
|
|
|
return count;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return -1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return true if an argument, whose type is described by TYPE, can be passed or
|
|
|
|
|
returned in simd/fp registers, providing enough parameter passing registers
|
|
|
|
|
are available. This is as described in the AAPCS64.
|
|
|
|
|
|
|
|
|
|
Upon successful return, *COUNT returns the number of needed registers,
|
|
|
|
|
*FUNDAMENTAL_TYPE contains the type of those registers.
|
|
|
|
|
|
|
|
|
|
Candidate as per the AAPCS64 5.4.2.C is either a:
|
|
|
|
|
- float.
|
|
|
|
|
- short-vector.
|
|
|
|
|
- HFA (Homogeneous Floating-point Aggregate, 4.3.5.1). A Composite type where
|
|
|
|
|
all the members are floats and has at most 4 members.
|
|
|
|
|
- HVA (Homogeneous Short-vector Aggregate, 4.3.5.2). A Composite type where
|
|
|
|
|
all the members are short vectors and has at most 4 members.
|
|
|
|
|
- Complex (7.1.1)
|
|
|
|
|
|
|
|
|
|
Note that HFAs and HVAs can include nested structures and arrays. */
|
|
|
|
|
|
2018-08-29 12:40:05 +02:00
|
|
|
|
static bool
|
2018-08-29 12:28:10 +02:00
|
|
|
|
aapcs_is_vfp_call_or_return_candidate (struct type *type, int *count,
|
|
|
|
|
struct type **fundamental_type)
|
|
|
|
|
{
|
|
|
|
|
if (type == nullptr)
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
*fundamental_type = nullptr;
|
|
|
|
|
|
|
|
|
|
int ag_count = aapcs_is_vfp_call_or_return_candidate_1 (type,
|
|
|
|
|
fundamental_type);
|
|
|
|
|
|
|
|
|
|
if (ag_count > 0 && ag_count <= HA_MAX_NUM_FLDS)
|
|
|
|
|
{
|
|
|
|
|
*count = ag_count;
|
|
|
|
|
return true;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* AArch64 function call information structure. */
|
|
|
|
|
struct aarch64_call_info
|
|
|
|
|
{
|
|
|
|
|
/* the current argument number. */
|
2018-07-24 03:51:58 +02:00
|
|
|
|
unsigned argnum = 0;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* The next general purpose register number, equivalent to NGRN as
|
|
|
|
|
described in the AArch64 Procedure Call Standard. */
|
2018-07-24 03:51:58 +02:00
|
|
|
|
unsigned ngrn = 0;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* The next SIMD and floating point register number, equivalent to
|
|
|
|
|
NSRN as described in the AArch64 Procedure Call Standard. */
|
2018-07-24 03:51:58 +02:00
|
|
|
|
unsigned nsrn = 0;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* The next stacked argument address, equivalent to NSAA as
|
|
|
|
|
described in the AArch64 Procedure Call Standard. */
|
2018-07-24 03:51:58 +02:00
|
|
|
|
unsigned nsaa = 0;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* Stack item vector. */
|
2018-07-24 03:51:58 +02:00
|
|
|
|
std::vector<stack_item_t> si;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* Pass a value in a sequence of consecutive X registers. The caller
|
2019-10-26 09:55:32 +02:00
|
|
|
|
is responsible for ensuring sufficient registers are available. */
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
pass_in_x (struct gdbarch *gdbarch, struct regcache *regcache,
|
|
|
|
|
struct aarch64_call_info *info, struct type *type,
|
2015-11-16 15:50:29 +01:00
|
|
|
|
struct value *arg)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
|
|
|
int len = TYPE_LENGTH (type);
|
|
|
|
|
enum type_code typecode = TYPE_CODE (type);
|
|
|
|
|
int regnum = AARCH64_X0_REGNUM + info->ngrn;
|
2015-11-16 15:50:29 +01:00
|
|
|
|
const bfd_byte *buf = value_contents (arg);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
info->argnum++;
|
|
|
|
|
|
|
|
|
|
while (len > 0)
|
|
|
|
|
{
|
|
|
|
|
int partial_len = len < X_REGISTER_SIZE ? len : X_REGISTER_SIZE;
|
|
|
|
|
CORE_ADDR regval = extract_unsigned_integer (buf, partial_len,
|
|
|
|
|
byte_order);
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Adjust sub-word struct/union args when big-endian. */
|
|
|
|
|
if (byte_order == BFD_ENDIAN_BIG
|
|
|
|
|
&& partial_len < X_REGISTER_SIZE
|
|
|
|
|
&& (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION))
|
|
|
|
|
regval <<= ((X_REGISTER_SIZE - partial_len) * TARGET_CHAR_BIT);
|
|
|
|
|
|
|
|
|
|
if (aarch64_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
{
|
|
|
|
|
debug_printf ("arg %d in %s = 0x%s\n", info->argnum,
|
|
|
|
|
gdbarch_register_name (gdbarch, regnum),
|
|
|
|
|
phex (regval, X_REGISTER_SIZE));
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
regcache_cooked_write_unsigned (regcache, regnum, regval);
|
|
|
|
|
len -= partial_len;
|
|
|
|
|
buf += partial_len;
|
|
|
|
|
regnum++;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Attempt to marshall a value in a V register. Return 1 if
|
|
|
|
|
successful, or 0 if insufficient registers are available. This
|
|
|
|
|
function, unlike the equivalent pass_in_x() function does not
|
|
|
|
|
handle arguments spread across multiple registers. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
pass_in_v (struct gdbarch *gdbarch,
|
|
|
|
|
struct regcache *regcache,
|
|
|
|
|
struct aarch64_call_info *info,
|
Fix out of boundary access in pass_in_v
Hi,
I build GDB with -fsanitize=address, and run testsuite. In
gdb.base/callfuncs.exp, I see the following error,
p t_float_values(0.0,0.0)
=================================================================
==8088==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x6020000cb650 at pc 0x6e195c bp 0x7fff164f9770 sp 0x7fff164f9768
READ of size 16 at 0x6020000cb650 thread T0^
#0 0x6e195b in regcache_raw_write /home/yao/SourceCode/gnu/gdb/git/gdb/regcache.c:912
#1 0x6e1e52 in regcache_cooked_write /home/yao/SourceCode/gnu/gdb/git/gdb/regcache.c:945
#2 0x466d69 in pass_in_v /home/yao/SourceCode/gnu/gdb/git/gdb/aarch64-tdep.c:1101
#3 0x467512 in pass_in_v_or_stack /home/yao/SourceCode/gnu/gdb/git/gdb/aarch64-tdep.c:1196
#4 0x467d7d in aarch64_push_dummy_call /home/yao/SourceCode/gnu/gdb/git/gdb/aarch64-tdep.c:1335
The code in pass_in_v read contents from V registers (128 bit), but the
data passed through V registers can be less than 128 bit. In this case,
float is passed. So writing V registers contents into contents buff
will cause overflow. In this patch, we add an array reg[V_REGISTER_SIZE],
which is to hold the contents from V registers, and then copy useful
bits to buf.
gdb:
2015-11-18 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (pass_in_v): Add argument len. Add local array
reg. Callers updated.
2015-11-18 12:49:32 +01:00
|
|
|
|
int len, const bfd_byte *buf)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
if (info->nsrn < 8)
|
|
|
|
|
{
|
|
|
|
|
int regnum = AARCH64_V0_REGNUM + info->nsrn;
|
2018-09-17 16:28:53 +02:00
|
|
|
|
/* Enough space for a full vector register. */
|
|
|
|
|
gdb_byte reg[register_size (gdbarch, regnum)];
|
|
|
|
|
gdb_assert (len <= sizeof (reg));
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
info->argnum++;
|
|
|
|
|
info->nsrn++;
|
|
|
|
|
|
Fix out of boundary access in pass_in_v
Hi,
I build GDB with -fsanitize=address, and run testsuite. In
gdb.base/callfuncs.exp, I see the following error,
p t_float_values(0.0,0.0)
=================================================================
==8088==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x6020000cb650 at pc 0x6e195c bp 0x7fff164f9770 sp 0x7fff164f9768
READ of size 16 at 0x6020000cb650 thread T0^
#0 0x6e195b in regcache_raw_write /home/yao/SourceCode/gnu/gdb/git/gdb/regcache.c:912
#1 0x6e1e52 in regcache_cooked_write /home/yao/SourceCode/gnu/gdb/git/gdb/regcache.c:945
#2 0x466d69 in pass_in_v /home/yao/SourceCode/gnu/gdb/git/gdb/aarch64-tdep.c:1101
#3 0x467512 in pass_in_v_or_stack /home/yao/SourceCode/gnu/gdb/git/gdb/aarch64-tdep.c:1196
#4 0x467d7d in aarch64_push_dummy_call /home/yao/SourceCode/gnu/gdb/git/gdb/aarch64-tdep.c:1335
The code in pass_in_v read contents from V registers (128 bit), but the
data passed through V registers can be less than 128 bit. In this case,
float is passed. So writing V registers contents into contents buff
will cause overflow. In this patch, we add an array reg[V_REGISTER_SIZE],
which is to hold the contents from V registers, and then copy useful
bits to buf.
gdb:
2015-11-18 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (pass_in_v): Add argument len. Add local array
reg. Callers updated.
2015-11-18 12:49:32 +01:00
|
|
|
|
memset (reg, 0, sizeof (reg));
|
|
|
|
|
/* PCS C.1, the argument is allocated to the least significant
|
|
|
|
|
bits of V register. */
|
|
|
|
|
memcpy (reg, buf, len);
|
2018-05-30 20:54:42 +02:00
|
|
|
|
regcache->cooked_write (regnum, reg);
|
Fix out of boundary access in pass_in_v
Hi,
I build GDB with -fsanitize=address, and run testsuite. In
gdb.base/callfuncs.exp, I see the following error,
p t_float_values(0.0,0.0)
=================================================================
==8088==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x6020000cb650 at pc 0x6e195c bp 0x7fff164f9770 sp 0x7fff164f9768
READ of size 16 at 0x6020000cb650 thread T0^
#0 0x6e195b in regcache_raw_write /home/yao/SourceCode/gnu/gdb/git/gdb/regcache.c:912
#1 0x6e1e52 in regcache_cooked_write /home/yao/SourceCode/gnu/gdb/git/gdb/regcache.c:945
#2 0x466d69 in pass_in_v /home/yao/SourceCode/gnu/gdb/git/gdb/aarch64-tdep.c:1101
#3 0x467512 in pass_in_v_or_stack /home/yao/SourceCode/gnu/gdb/git/gdb/aarch64-tdep.c:1196
#4 0x467d7d in aarch64_push_dummy_call /home/yao/SourceCode/gnu/gdb/git/gdb/aarch64-tdep.c:1335
The code in pass_in_v read contents from V registers (128 bit), but the
data passed through V registers can be less than 128 bit. In this case,
float is passed. So writing V registers contents into contents buff
will cause overflow. In this patch, we add an array reg[V_REGISTER_SIZE],
which is to hold the contents from V registers, and then copy useful
bits to buf.
gdb:
2015-11-18 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (pass_in_v): Add argument len. Add local array
reg. Callers updated.
2015-11-18 12:49:32 +01:00
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
if (aarch64_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
{
|
|
|
|
|
debug_printf ("arg %d in %s\n", info->argnum,
|
|
|
|
|
gdbarch_register_name (gdbarch, regnum));
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
info->nsrn = 8;
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Marshall an argument onto the stack. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
pass_on_stack (struct aarch64_call_info *info, struct type *type,
|
2015-11-16 15:50:29 +01:00
|
|
|
|
struct value *arg)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
2015-11-16 15:50:29 +01:00
|
|
|
|
const bfd_byte *buf = value_contents (arg);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
int len = TYPE_LENGTH (type);
|
|
|
|
|
int align;
|
|
|
|
|
stack_item_t item;
|
|
|
|
|
|
|
|
|
|
info->argnum++;
|
|
|
|
|
|
2019-04-07 23:48:00 +02:00
|
|
|
|
align = type_align (type);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* PCS C.17 Stack should be aligned to the larger of 8 bytes or the
|
|
|
|
|
Natural alignment of the argument's type. */
|
|
|
|
|
align = align_up (align, 8);
|
|
|
|
|
|
|
|
|
|
/* The AArch64 PCS requires at most doubleword alignment. */
|
|
|
|
|
if (align > 16)
|
|
|
|
|
align = 16;
|
|
|
|
|
|
|
|
|
|
if (aarch64_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
{
|
|
|
|
|
debug_printf ("arg %d len=%d @ sp + %d\n", info->argnum, len,
|
|
|
|
|
info->nsaa);
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
item.len = len;
|
|
|
|
|
item.data = buf;
|
2018-07-24 03:51:58 +02:00
|
|
|
|
info->si.push_back (item);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
info->nsaa += len;
|
|
|
|
|
if (info->nsaa & (align - 1))
|
|
|
|
|
{
|
|
|
|
|
/* Push stack alignment padding. */
|
|
|
|
|
int pad = align - (info->nsaa & (align - 1));
|
|
|
|
|
|
|
|
|
|
item.len = pad;
|
Fix one heap buffer overflow in aarch64_push_dummy_call
Hi,
AddressSanitizer reports an error like this,
(gdb) PASS: gdb.base/call-ar-st.exp: continue to tbreak9
print print_long_arg_list(a, b, c, d, e, f, *struct1, *struct2, *struct3, *struct4, *flags, *flags_combo, *three_char, *five_char, *int_char_combo, *d1, *d2, *d3, *f1, *f2, *f3)
=================================================================
==6236==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x60200008eb50 at pc 0x89e432 bp 0x7fffa3df9080 sp 0x7fffa3df9078
READ of size 5 at 0x60200008eb50 thread T0
#0 0x89e431 in memory_xfer_partial gdb/target.c:1264
#1 0x89e6c7 in target_xfer_partial gdb/target.c:1320
#2 0x89f267 in target_write_partial gdb/target.c:1595^M
#3 0x8a014b in target_write_with_progress gdb/target.c:1889^M
#4 0x8a0262 in target_write gdb/target.c:1914^M
#5 0x89ee59 in target_write_memory gdb/target.c:1492^M
#6 0x9a1c74 in write_memory gdb/corefile.c:393^M
#7 0x467ea5 in aarch64_push_dummy_call gdb/aarch64-tdep.c:1388
The problem is that an instance of stack_item_t is created to adjust
stack for alignment, the item.len is correct, but item.data is buf,
which is wrong, because item.len can be greater than the length of
buf. This patch sets item.data to NULL, and only update sp (no
inferior memory writes on stack for this item).
gdb:
2015-12-17 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (struct stack_item_t): Update comments.
(pass_on_stack): Set item.data to NULL.
(aarch64_push_dummy_call): Call write_memory if si->data
isn't NULL.
2015-12-17 14:07:54 +01:00
|
|
|
|
item.data = NULL;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2018-07-24 03:51:58 +02:00
|
|
|
|
info->si.push_back (item);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
info->nsaa += pad;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Marshall an argument into a sequence of one or more consecutive X
|
|
|
|
|
registers or, if insufficient X registers are available then onto
|
|
|
|
|
the stack. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
pass_in_x_or_stack (struct gdbarch *gdbarch, struct regcache *regcache,
|
|
|
|
|
struct aarch64_call_info *info, struct type *type,
|
2015-11-16 15:50:29 +01:00
|
|
|
|
struct value *arg)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
int len = TYPE_LENGTH (type);
|
|
|
|
|
int nregs = (len + X_REGISTER_SIZE - 1) / X_REGISTER_SIZE;
|
|
|
|
|
|
|
|
|
|
/* PCS C.13 - Pass in registers if we have enough spare */
|
|
|
|
|
if (info->ngrn + nregs <= 8)
|
|
|
|
|
{
|
2015-11-16 15:50:29 +01:00
|
|
|
|
pass_in_x (gdbarch, regcache, info, type, arg);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
info->ngrn += nregs;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
info->ngrn = 8;
|
2015-11-16 15:50:29 +01:00
|
|
|
|
pass_on_stack (info, type, arg);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2018-08-29 12:40:05 +02:00
|
|
|
|
/* Pass a value, which is of type arg_type, in a V register. Assumes value is a
|
|
|
|
|
aapcs_is_vfp_call_or_return_candidate and there are enough spare V
|
|
|
|
|
registers. A return value of false is an error state as the value will have
|
|
|
|
|
been partially passed to the stack. */
|
|
|
|
|
static bool
|
|
|
|
|
pass_in_v_vfp_candidate (struct gdbarch *gdbarch, struct regcache *regcache,
|
|
|
|
|
struct aarch64_call_info *info, struct type *arg_type,
|
|
|
|
|
struct value *arg)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
2018-08-29 12:40:05 +02:00
|
|
|
|
switch (TYPE_CODE (arg_type))
|
|
|
|
|
{
|
|
|
|
|
case TYPE_CODE_FLT:
|
|
|
|
|
return pass_in_v (gdbarch, regcache, info, TYPE_LENGTH (arg_type),
|
|
|
|
|
value_contents (arg));
|
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case TYPE_CODE_COMPLEX:
|
|
|
|
|
{
|
|
|
|
|
const bfd_byte *buf = value_contents (arg);
|
|
|
|
|
struct type *target_type = check_typedef (TYPE_TARGET_TYPE (arg_type));
|
|
|
|
|
|
|
|
|
|
if (!pass_in_v (gdbarch, regcache, info, TYPE_LENGTH (target_type),
|
|
|
|
|
buf))
|
|
|
|
|
return false;
|
|
|
|
|
|
|
|
|
|
return pass_in_v (gdbarch, regcache, info, TYPE_LENGTH (target_type),
|
|
|
|
|
buf + TYPE_LENGTH (target_type));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case TYPE_CODE_ARRAY:
|
|
|
|
|
if (TYPE_VECTOR (arg_type))
|
|
|
|
|
return pass_in_v (gdbarch, regcache, info, TYPE_LENGTH (arg_type),
|
|
|
|
|
value_contents (arg));
|
|
|
|
|
/* fall through. */
|
|
|
|
|
|
|
|
|
|
case TYPE_CODE_STRUCT:
|
|
|
|
|
case TYPE_CODE_UNION:
|
|
|
|
|
for (int i = 0; i < TYPE_NFIELDS (arg_type); i++)
|
|
|
|
|
{
|
2019-01-24 09:17:39 +01:00
|
|
|
|
/* Don't include static fields. */
|
|
|
|
|
if (field_is_static (&TYPE_FIELD (arg_type, i)))
|
|
|
|
|
continue;
|
|
|
|
|
|
2018-08-29 12:40:05 +02:00
|
|
|
|
struct value *field = value_primitive_field (arg, 0, i, arg_type);
|
|
|
|
|
struct type *field_type = check_typedef (value_type (field));
|
|
|
|
|
|
|
|
|
|
if (!pass_in_v_vfp_candidate (gdbarch, regcache, info, field_type,
|
|
|
|
|
field))
|
|
|
|
|
return false;
|
|
|
|
|
}
|
|
|
|
|
return true;
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
return false;
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "push_dummy_call" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
|
aarch64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|
|
|
|
struct regcache *regcache, CORE_ADDR bp_addr,
|
|
|
|
|
int nargs,
|
2018-11-16 12:21:04 +01:00
|
|
|
|
struct value **args, CORE_ADDR sp,
|
|
|
|
|
function_call_return_method return_method,
|
2013-02-04 13:48:37 +01:00
|
|
|
|
CORE_ADDR struct_addr)
|
|
|
|
|
{
|
|
|
|
|
int argnum;
|
|
|
|
|
struct aarch64_call_info info;
|
|
|
|
|
|
|
|
|
|
/* We need to know what the type of the called function is in order
|
|
|
|
|
to determine the number of named/anonymous arguments for the
|
|
|
|
|
actual argument placement, and the return type in order to handle
|
|
|
|
|
return value correctly.
|
|
|
|
|
|
|
|
|
|
The generic code above us views the decision of return in memory
|
|
|
|
|
or return in registers as a two stage processes. The language
|
|
|
|
|
handler is consulted first and may decide to return in memory (eg
|
|
|
|
|
class with copy constructor returned by value), this will cause
|
|
|
|
|
the generic code to allocate space AND insert an initial leading
|
|
|
|
|
argument.
|
|
|
|
|
|
|
|
|
|
If the language code does not decide to pass in memory then the
|
|
|
|
|
target code is consulted.
|
|
|
|
|
|
|
|
|
|
If the language code decides to pass in memory we want to move
|
|
|
|
|
the pointer inserted as the initial argument from the argument
|
|
|
|
|
list and into X8, the conventional AArch64 struct return pointer
|
2018-10-11 15:47:30 +02:00
|
|
|
|
register. */
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* Set the return address. For the AArch64, the return breakpoint
|
|
|
|
|
is always at BP_ADDR. */
|
|
|
|
|
regcache_cooked_write_unsigned (regcache, AARCH64_LR_REGNUM, bp_addr);
|
|
|
|
|
|
2018-10-11 15:47:30 +02:00
|
|
|
|
/* If we were given an initial argument for the return slot, lose it. */
|
|
|
|
|
if (return_method == return_method_hidden_param)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
args++;
|
|
|
|
|
nargs--;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The struct_return pointer occupies X8. */
|
2018-10-11 15:47:30 +02:00
|
|
|
|
if (return_method != return_method_normal)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
if (aarch64_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
{
|
|
|
|
|
debug_printf ("struct return in %s = 0x%s\n",
|
|
|
|
|
gdbarch_register_name (gdbarch,
|
|
|
|
|
AARCH64_STRUCT_RETURN_REGNUM),
|
|
|
|
|
paddress (gdbarch, struct_addr));
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
regcache_cooked_write_unsigned (regcache, AARCH64_STRUCT_RETURN_REGNUM,
|
|
|
|
|
struct_addr);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
for (argnum = 0; argnum < nargs; argnum++)
|
|
|
|
|
{
|
|
|
|
|
struct value *arg = args[argnum];
|
2018-08-29 12:40:05 +02:00
|
|
|
|
struct type *arg_type, *fundamental_type;
|
|
|
|
|
int len, elements;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
arg_type = check_typedef (value_type (arg));
|
|
|
|
|
len = TYPE_LENGTH (arg_type);
|
|
|
|
|
|
2018-08-29 12:40:05 +02:00
|
|
|
|
/* If arg can be passed in v registers as per the AAPCS64, then do so if
|
|
|
|
|
if there are enough spare registers. */
|
|
|
|
|
if (aapcs_is_vfp_call_or_return_candidate (arg_type, &elements,
|
|
|
|
|
&fundamental_type))
|
|
|
|
|
{
|
|
|
|
|
if (info.nsrn + elements <= 8)
|
|
|
|
|
{
|
|
|
|
|
/* We know that we have sufficient registers available therefore
|
|
|
|
|
this will never need to fallback to the stack. */
|
|
|
|
|
if (!pass_in_v_vfp_candidate (gdbarch, regcache, &info, arg_type,
|
|
|
|
|
arg))
|
|
|
|
|
gdb_assert_not_reached ("Failed to push args");
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
info.nsrn = 8;
|
|
|
|
|
pass_on_stack (&info, arg_type, arg);
|
|
|
|
|
}
|
|
|
|
|
continue;
|
|
|
|
|
}
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
switch (TYPE_CODE (arg_type))
|
|
|
|
|
{
|
|
|
|
|
case TYPE_CODE_INT:
|
|
|
|
|
case TYPE_CODE_BOOL:
|
|
|
|
|
case TYPE_CODE_CHAR:
|
|
|
|
|
case TYPE_CODE_RANGE:
|
|
|
|
|
case TYPE_CODE_ENUM:
|
|
|
|
|
if (len < 4)
|
|
|
|
|
{
|
|
|
|
|
/* Promote to 32 bit integer. */
|
|
|
|
|
if (TYPE_UNSIGNED (arg_type))
|
|
|
|
|
arg_type = builtin_type (gdbarch)->builtin_uint32;
|
|
|
|
|
else
|
|
|
|
|
arg_type = builtin_type (gdbarch)->builtin_int32;
|
|
|
|
|
arg = value_cast (arg_type, arg);
|
|
|
|
|
}
|
2015-11-16 15:50:29 +01:00
|
|
|
|
pass_in_x_or_stack (gdbarch, regcache, &info, arg_type, arg);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
case TYPE_CODE_STRUCT:
|
|
|
|
|
case TYPE_CODE_ARRAY:
|
|
|
|
|
case TYPE_CODE_UNION:
|
2018-08-29 12:40:05 +02:00
|
|
|
|
if (len > 16)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
/* PCS B.7 Aggregates larger than 16 bytes are passed by
|
|
|
|
|
invisible reference. */
|
|
|
|
|
|
|
|
|
|
/* Allocate aligned storage. */
|
|
|
|
|
sp = align_down (sp - len, 16);
|
|
|
|
|
|
|
|
|
|
/* Write the real data into the stack. */
|
|
|
|
|
write_memory (sp, value_contents (arg), len);
|
|
|
|
|
|
|
|
|
|
/* Construct the indirection. */
|
|
|
|
|
arg_type = lookup_pointer_type (arg_type);
|
|
|
|
|
arg = value_from_pointer (arg_type, sp);
|
2015-11-16 15:50:29 +01:00
|
|
|
|
pass_in_x_or_stack (gdbarch, regcache, &info, arg_type, arg);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
/* PCS C.15 / C.18 multiple values pass. */
|
2015-11-16 15:50:29 +01:00
|
|
|
|
pass_in_x_or_stack (gdbarch, regcache, &info, arg_type, arg);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
default:
|
2015-11-16 15:50:29 +01:00
|
|
|
|
pass_in_x_or_stack (gdbarch, regcache, &info, arg_type, arg);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Make sure stack retains 16 byte alignment. */
|
|
|
|
|
if (info.nsaa & 15)
|
|
|
|
|
sp -= 16 - (info.nsaa & 15);
|
|
|
|
|
|
2018-07-24 03:51:58 +02:00
|
|
|
|
while (!info.si.empty ())
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
2018-07-24 03:51:58 +02:00
|
|
|
|
const stack_item_t &si = info.si.back ();
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2018-07-24 03:51:58 +02:00
|
|
|
|
sp -= si.len;
|
|
|
|
|
if (si.data != NULL)
|
|
|
|
|
write_memory (sp, si.data, si.len);
|
|
|
|
|
info.si.pop_back ();
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Finally, update the SP register. */
|
|
|
|
|
regcache_cooked_write_unsigned (regcache, AARCH64_SP_REGNUM, sp);
|
|
|
|
|
|
|
|
|
|
return sp;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "frame_align" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static CORE_ADDR
|
|
|
|
|
aarch64_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
|
|
|
|
|
{
|
|
|
|
|
/* Align the stack to sixteen bytes. */
|
|
|
|
|
return sp & ~(CORE_ADDR) 15;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return the type for an AdvSISD Q register. */
|
|
|
|
|
|
|
|
|
|
static struct type *
|
|
|
|
|
aarch64_vnq_type (struct gdbarch *gdbarch)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
|
|
|
|
if (tdep->vnq_type == NULL)
|
|
|
|
|
{
|
|
|
|
|
struct type *t;
|
|
|
|
|
struct type *elem;
|
|
|
|
|
|
|
|
|
|
t = arch_composite_type (gdbarch, "__gdb_builtin_type_vnq",
|
|
|
|
|
TYPE_CODE_UNION);
|
|
|
|
|
|
|
|
|
|
elem = builtin_type (gdbarch)->builtin_uint128;
|
|
|
|
|
append_composite_type_field (t, "u", elem);
|
|
|
|
|
|
|
|
|
|
elem = builtin_type (gdbarch)->builtin_int128;
|
|
|
|
|
append_composite_type_field (t, "s", elem);
|
|
|
|
|
|
|
|
|
|
tdep->vnq_type = t;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return tdep->vnq_type;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return the type for an AdvSISD D register. */
|
|
|
|
|
|
|
|
|
|
static struct type *
|
|
|
|
|
aarch64_vnd_type (struct gdbarch *gdbarch)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
|
|
|
|
if (tdep->vnd_type == NULL)
|
|
|
|
|
{
|
|
|
|
|
struct type *t;
|
|
|
|
|
struct type *elem;
|
|
|
|
|
|
|
|
|
|
t = arch_composite_type (gdbarch, "__gdb_builtin_type_vnd",
|
|
|
|
|
TYPE_CODE_UNION);
|
|
|
|
|
|
|
|
|
|
elem = builtin_type (gdbarch)->builtin_double;
|
|
|
|
|
append_composite_type_field (t, "f", elem);
|
|
|
|
|
|
|
|
|
|
elem = builtin_type (gdbarch)->builtin_uint64;
|
|
|
|
|
append_composite_type_field (t, "u", elem);
|
|
|
|
|
|
|
|
|
|
elem = builtin_type (gdbarch)->builtin_int64;
|
|
|
|
|
append_composite_type_field (t, "s", elem);
|
|
|
|
|
|
|
|
|
|
tdep->vnd_type = t;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return tdep->vnd_type;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return the type for an AdvSISD S register. */
|
|
|
|
|
|
|
|
|
|
static struct type *
|
|
|
|
|
aarch64_vns_type (struct gdbarch *gdbarch)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
|
|
|
|
if (tdep->vns_type == NULL)
|
|
|
|
|
{
|
|
|
|
|
struct type *t;
|
|
|
|
|
struct type *elem;
|
|
|
|
|
|
|
|
|
|
t = arch_composite_type (gdbarch, "__gdb_builtin_type_vns",
|
|
|
|
|
TYPE_CODE_UNION);
|
|
|
|
|
|
|
|
|
|
elem = builtin_type (gdbarch)->builtin_float;
|
|
|
|
|
append_composite_type_field (t, "f", elem);
|
|
|
|
|
|
|
|
|
|
elem = builtin_type (gdbarch)->builtin_uint32;
|
|
|
|
|
append_composite_type_field (t, "u", elem);
|
|
|
|
|
|
|
|
|
|
elem = builtin_type (gdbarch)->builtin_int32;
|
|
|
|
|
append_composite_type_field (t, "s", elem);
|
|
|
|
|
|
|
|
|
|
tdep->vns_type = t;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return tdep->vns_type;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return the type for an AdvSISD H register. */
|
|
|
|
|
|
|
|
|
|
static struct type *
|
|
|
|
|
aarch64_vnh_type (struct gdbarch *gdbarch)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
|
|
|
|
if (tdep->vnh_type == NULL)
|
|
|
|
|
{
|
|
|
|
|
struct type *t;
|
|
|
|
|
struct type *elem;
|
|
|
|
|
|
|
|
|
|
t = arch_composite_type (gdbarch, "__gdb_builtin_type_vnh",
|
|
|
|
|
TYPE_CODE_UNION);
|
|
|
|
|
|
2019-05-14 11:09:05 +02:00
|
|
|
|
elem = builtin_type (gdbarch)->builtin_half;
|
|
|
|
|
append_composite_type_field (t, "f", elem);
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
elem = builtin_type (gdbarch)->builtin_uint16;
|
|
|
|
|
append_composite_type_field (t, "u", elem);
|
|
|
|
|
|
|
|
|
|
elem = builtin_type (gdbarch)->builtin_int16;
|
|
|
|
|
append_composite_type_field (t, "s", elem);
|
|
|
|
|
|
|
|
|
|
tdep->vnh_type = t;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return tdep->vnh_type;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return the type for an AdvSISD B register. */
|
|
|
|
|
|
|
|
|
|
static struct type *
|
|
|
|
|
aarch64_vnb_type (struct gdbarch *gdbarch)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
|
|
|
|
if (tdep->vnb_type == NULL)
|
|
|
|
|
{
|
|
|
|
|
struct type *t;
|
|
|
|
|
struct type *elem;
|
|
|
|
|
|
|
|
|
|
t = arch_composite_type (gdbarch, "__gdb_builtin_type_vnb",
|
|
|
|
|
TYPE_CODE_UNION);
|
|
|
|
|
|
|
|
|
|
elem = builtin_type (gdbarch)->builtin_uint8;
|
|
|
|
|
append_composite_type_field (t, "u", elem);
|
|
|
|
|
|
|
|
|
|
elem = builtin_type (gdbarch)->builtin_int8;
|
|
|
|
|
append_composite_type_field (t, "s", elem);
|
|
|
|
|
|
|
|
|
|
tdep->vnb_type = t;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return tdep->vnb_type;
|
|
|
|
|
}
|
|
|
|
|
|
2017-10-19 17:35:35 +02:00
|
|
|
|
/* Return the type for an AdvSISD V register. */
|
|
|
|
|
|
|
|
|
|
static struct type *
|
|
|
|
|
aarch64_vnv_type (struct gdbarch *gdbarch)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
|
|
|
|
if (tdep->vnv_type == NULL)
|
|
|
|
|
{
|
2019-03-28 13:27:30 +01:00
|
|
|
|
/* The other AArch64 psuedo registers (Q,D,H,S,B) refer to a single value
|
|
|
|
|
slice from the non-pseudo vector registers. However NEON V registers
|
|
|
|
|
are always vector registers, and need constructing as such. */
|
|
|
|
|
const struct builtin_type *bt = builtin_type (gdbarch);
|
|
|
|
|
|
2017-10-19 17:35:35 +02:00
|
|
|
|
struct type *t = arch_composite_type (gdbarch, "__gdb_builtin_type_vnv",
|
|
|
|
|
TYPE_CODE_UNION);
|
|
|
|
|
|
2019-03-28 13:27:30 +01:00
|
|
|
|
struct type *sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vnd",
|
|
|
|
|
TYPE_CODE_UNION);
|
|
|
|
|
append_composite_type_field (sub, "f",
|
|
|
|
|
init_vector_type (bt->builtin_double, 2));
|
|
|
|
|
append_composite_type_field (sub, "u",
|
|
|
|
|
init_vector_type (bt->builtin_uint64, 2));
|
|
|
|
|
append_composite_type_field (sub, "s",
|
|
|
|
|
init_vector_type (bt->builtin_int64, 2));
|
|
|
|
|
append_composite_type_field (t, "d", sub);
|
|
|
|
|
|
|
|
|
|
sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vns",
|
|
|
|
|
TYPE_CODE_UNION);
|
|
|
|
|
append_composite_type_field (sub, "f",
|
|
|
|
|
init_vector_type (bt->builtin_float, 4));
|
|
|
|
|
append_composite_type_field (sub, "u",
|
|
|
|
|
init_vector_type (bt->builtin_uint32, 4));
|
|
|
|
|
append_composite_type_field (sub, "s",
|
|
|
|
|
init_vector_type (bt->builtin_int32, 4));
|
|
|
|
|
append_composite_type_field (t, "s", sub);
|
|
|
|
|
|
|
|
|
|
sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vnh",
|
|
|
|
|
TYPE_CODE_UNION);
|
2019-05-14 11:09:05 +02:00
|
|
|
|
append_composite_type_field (sub, "f",
|
|
|
|
|
init_vector_type (bt->builtin_half, 8));
|
2019-03-28 13:27:30 +01:00
|
|
|
|
append_composite_type_field (sub, "u",
|
|
|
|
|
init_vector_type (bt->builtin_uint16, 8));
|
|
|
|
|
append_composite_type_field (sub, "s",
|
|
|
|
|
init_vector_type (bt->builtin_int16, 8));
|
|
|
|
|
append_composite_type_field (t, "h", sub);
|
|
|
|
|
|
|
|
|
|
sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vnb",
|
|
|
|
|
TYPE_CODE_UNION);
|
|
|
|
|
append_composite_type_field (sub, "u",
|
|
|
|
|
init_vector_type (bt->builtin_uint8, 16));
|
|
|
|
|
append_composite_type_field (sub, "s",
|
|
|
|
|
init_vector_type (bt->builtin_int8, 16));
|
|
|
|
|
append_composite_type_field (t, "b", sub);
|
|
|
|
|
|
|
|
|
|
sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vnq",
|
|
|
|
|
TYPE_CODE_UNION);
|
|
|
|
|
append_composite_type_field (sub, "u",
|
|
|
|
|
init_vector_type (bt->builtin_uint128, 1));
|
|
|
|
|
append_composite_type_field (sub, "s",
|
|
|
|
|
init_vector_type (bt->builtin_int128, 1));
|
|
|
|
|
append_composite_type_field (t, "q", sub);
|
2017-10-19 17:35:35 +02:00
|
|
|
|
|
|
|
|
|
tdep->vnv_type = t;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return tdep->vnv_type;
|
|
|
|
|
}
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* Implement the "dwarf2_reg_to_regnum" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
aarch64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
|
|
|
|
|
{
|
2019-03-22 11:37:46 +01:00
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
if (reg >= AARCH64_DWARF_X0 && reg <= AARCH64_DWARF_X0 + 30)
|
|
|
|
|
return AARCH64_X0_REGNUM + reg - AARCH64_DWARF_X0;
|
|
|
|
|
|
|
|
|
|
if (reg == AARCH64_DWARF_SP)
|
|
|
|
|
return AARCH64_SP_REGNUM;
|
|
|
|
|
|
|
|
|
|
if (reg >= AARCH64_DWARF_V0 && reg <= AARCH64_DWARF_V0 + 31)
|
|
|
|
|
return AARCH64_V0_REGNUM + reg - AARCH64_DWARF_V0;
|
|
|
|
|
|
2018-06-11 11:24:20 +02:00
|
|
|
|
if (reg == AARCH64_DWARF_SVE_VG)
|
|
|
|
|
return AARCH64_SVE_VG_REGNUM;
|
|
|
|
|
|
|
|
|
|
if (reg == AARCH64_DWARF_SVE_FFR)
|
|
|
|
|
return AARCH64_SVE_FFR_REGNUM;
|
|
|
|
|
|
|
|
|
|
if (reg >= AARCH64_DWARF_SVE_P0 && reg <= AARCH64_DWARF_SVE_P0 + 15)
|
|
|
|
|
return AARCH64_SVE_P0_REGNUM + reg - AARCH64_DWARF_SVE_P0;
|
|
|
|
|
|
|
|
|
|
if (reg >= AARCH64_DWARF_SVE_Z0 && reg <= AARCH64_DWARF_SVE_Z0 + 15)
|
|
|
|
|
return AARCH64_SVE_Z0_REGNUM + reg - AARCH64_DWARF_SVE_Z0;
|
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (tdep->has_pauth ())
|
|
|
|
|
{
|
|
|
|
|
if (reg >= AARCH64_DWARF_PAUTH_DMASK && reg <= AARCH64_DWARF_PAUTH_CMASK)
|
|
|
|
|
return tdep->pauth_reg_base + reg - AARCH64_DWARF_PAUTH_DMASK;
|
|
|
|
|
|
|
|
|
|
if (reg == AARCH64_DWARF_PAUTH_RA_STATE)
|
|
|
|
|
return tdep->pauth_ra_state_regnum;
|
|
|
|
|
}
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return -1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "print_insn" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
aarch64_gdb_print_insn (bfd_vma memaddr, disassemble_info *info)
|
|
|
|
|
{
|
|
|
|
|
info->symbols = NULL;
|
Don't use print_insn_XXX in GDB
This is a follow-up to
[PATCH 0/6] Unify the disassembler selection in gdb and objdump
https://sourceware.org/ml/binutils/2017-05/msg00192.html
that is, opcodes is able to select the right disassembler, so gdb
doesn't have to select them. Instead, gdb can just use
default_print_insn. As a result, these print_insn_XXX are not used
out of opcodes, so this patch also moves their declarations from
include/dis-asm.h to opcodes/disassemble.h. With this change,
GDB doesn't use any print_insn_XXX directly any more.
gdb:
2017-06-14 Yao Qi <yao.qi@linaro.org>
* aarch64-tdep.c (aarch64_gdb_print_insn): Call
default_print_insn instead of print_insn_aarch64.
* arm-tdep.c (gdb_print_insn_arm): Call
default_print_insn instead of print_insn_big_arm
and print_insn_little_arm.
* i386-tdep.c (i386_print_insn): Call default_print_insn
instead of print_insn_i386.
* ia64-tdep.c (ia64_print_insn): Call
default_print_insn instead of print_insn_ia64.
* mips-tdep.c (gdb_print_insn_mips): Call
default_print_insn instead of print_insn_big_mips
and print_insn_little_mips.
* spu-tdep.c (gdb_print_insn_spu): Call default_print_insn
instead of print_insn_spu.
include:
2017-06-14 Yao Qi <yao.qi@linaro.org>
* dis-asm.h (print_insn_aarch64): Move it to opcodes/disassemble.h.
(print_insn_big_arm, print_insn_big_mips): Likewise.
(print_insn_i386, print_insn_ia64): Likewise.
(print_insn_little_arm, print_insn_little_mips): Likewise.
(print_insn_spu): Likewise.
opcodes:
2017-06-14 Yao Qi <yao.qi@linaro.org>
* aarch64-dis.c: Include disassemble.h instead of dis-asm.h.
* arm-dis.c: Likewise.
* ia64-dis.c: Likewise.
* mips-dis.c: Likewise.
* spu-dis.c: Likewise.
* disassemble.h (print_insn_aarch64): New declaration, moved from
include/dis-asm.h.
(print_insn_big_arm, print_insn_big_mips): Likewise.
(print_insn_i386, print_insn_ia64): Likewise.
(print_insn_little_arm, print_insn_little_mips): Likewise.
2017-06-14 17:28:30 +02:00
|
|
|
|
return default_print_insn (memaddr, info);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* AArch64 BRK software debug mode instruction.
|
|
|
|
|
Note that AArch64 code is always little-endian.
|
|
|
|
|
1101.0100.0010.0000.0000.0000.0000.0000 = 0xd4200000. */
|
2016-11-03 15:35:14 +01:00
|
|
|
|
constexpr gdb_byte aarch64_default_breakpoint[] = {0x00, 0x00, 0x20, 0xd4};
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2016-11-03 15:35:14 +01:00
|
|
|
|
typedef BP_MANIPULATION (aarch64_default_breakpoint) aarch64_breakpoint;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* Extract from an array REGS containing the (raw) register state a
|
|
|
|
|
function return value of type TYPE, and copy that, in virtual
|
|
|
|
|
format, into VALBUF. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_extract_return_value (struct type *type, struct regcache *regs,
|
|
|
|
|
gdb_byte *valbuf)
|
|
|
|
|
{
|
2017-10-25 17:37:03 +02:00
|
|
|
|
struct gdbarch *gdbarch = regs->arch ();
|
2013-02-04 13:48:37 +01:00
|
|
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
2018-08-29 12:41:45 +02:00
|
|
|
|
int elements;
|
|
|
|
|
struct type *fundamental_type;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2018-08-29 12:41:45 +02:00
|
|
|
|
if (aapcs_is_vfp_call_or_return_candidate (type, &elements,
|
|
|
|
|
&fundamental_type))
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
2018-08-29 12:41:45 +02:00
|
|
|
|
int len = TYPE_LENGTH (fundamental_type);
|
|
|
|
|
|
|
|
|
|
for (int i = 0; i < elements; i++)
|
|
|
|
|
{
|
|
|
|
|
int regno = AARCH64_V0_REGNUM + i;
|
2018-09-17 16:28:53 +02:00
|
|
|
|
/* Enough space for a full vector register. */
|
|
|
|
|
gdb_byte buf[register_size (gdbarch, regno)];
|
|
|
|
|
gdb_assert (len <= sizeof (buf));
|
2018-08-29 12:41:45 +02:00
|
|
|
|
|
|
|
|
|
if (aarch64_debug)
|
|
|
|
|
{
|
|
|
|
|
debug_printf ("read HFA or HVA return value element %d from %s\n",
|
|
|
|
|
i + 1,
|
|
|
|
|
gdbarch_register_name (gdbarch, regno));
|
|
|
|
|
}
|
|
|
|
|
regs->cooked_read (regno, buf);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2018-08-29 12:41:45 +02:00
|
|
|
|
memcpy (valbuf, buf, len);
|
|
|
|
|
valbuf += len;
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
else if (TYPE_CODE (type) == TYPE_CODE_INT
|
|
|
|
|
|| TYPE_CODE (type) == TYPE_CODE_CHAR
|
|
|
|
|
|| TYPE_CODE (type) == TYPE_CODE_BOOL
|
|
|
|
|
|| TYPE_CODE (type) == TYPE_CODE_PTR
|
Convert lvalue reference type check to general reference type check
In almost all contexts (except for overload resolution rules and expression
semantics), lvalue and rvalue references are equivalent. That means that in all
but these cases we can replace a TYPE_CODE_REF check to a TYPE_IS_REFERENCE
check and, for switch statements, add a case label for a rvalue reference type
next to a case label for an lvalue reference type. This patch does exactly
that.
gdb/ChangeLog
PR gdb/14441
* aarch64-tdep.c (aarch64_type_align)
(aarch64_extract_return_value, aarch64_store_return_value): Change
lvalue reference type checks to general reference type checks.
* amd64-tdep.c (amd64_classify): Likewise.
* amd64-windows-tdep.c (amd64_windows_passed_by_integer_register):
Likewise.
* arm-tdep.c (arm_type_align, arm_extract_return_value)
(arm_store_return_value): Likewise.
* ax-gdb.c (gen_fetch, gen_cast): Likewise.
* c-typeprint.c (c_print_type): Likewise.
* c-varobj.c (adjust_value_for_child_access, c_value_of_variable)
(cplus_number_of_children, cplus_describe_child): Likewise.
* compile/compile-c-symbols.c (generate_vla_size): Likewise.
* completer.c (expression_completer): Likewise.
* cp-support.c (make_symbol_overload_list_adl_namespace):
Likewise.
* darwin-nat-info.c (info_mach_region_command): Likewise.
* dwarf2loc.c (entry_data_value_coerce_ref)
(value_of_dwarf_reg_entry): Likewise.
* eval.c (ptrmath_type_p, evaluate_subexp_standard)
(evaluate_subexp_for_address, evaluate_subexp_for_sizeof):
Likewise.
* findvar.c (extract_typed_address, store_typed_address):
Likewise.
* gdbtypes.c (rank_one_type): Likewise.
* hppa-tdep.c (hppa64_integral_or_pointer_p): Likewise.
* infcall.c (value_arg_coerce): Likewise.
* language.c (pointer_type): Likewise.
* m32c-tdep.c (m32c_reg_arg_type, m32c_m16c_address_to_pointer):
Likewise.
* m88k-tdep.c (m88k_integral_or_pointer_p): Likewise.
* mn10300-tdep.c (mn10300_type_align): Likewise.
* msp430-tdep.c (msp430_push_dummy_call): Likewise.
* ppc-sysv-tdep.c (do_ppc_sysv_return_value)
(ppc64_sysv_abi_push_param, ppc64_sysv_abi_return_value):
Likewise.
* printcmd.c (print_formatted, x_command): Likewise.
* python/py-type.c (typy_get_composite, typy_template_argument):
Likewise.
* python/py-value.c (valpy_referenced_value)
(valpy_get_dynamic_type, value_has_field): Likewise.
* s390-linux-tdep.c (s390_function_arg_integer): Likewise.
* sparc-tdep.c (sparc_integral_or_pointer_p): Likewise.
* sparc64-tdep.c (sparc64_integral_or_pointer_p): Likewise.
* spu-tdep.c (spu_scalar_value_p): Likewise.
* symtab.c (lookup_symbol_aux): Likewise.
* typeprint.c (whatis_exp, print_type_scalar): Likewise.
* valarith.c (binop_types_user_defined_p, unop_user_defined_p):
Likewise.
* valops.c (value_cast_pointers, value_cast)
(value_reinterpret_cast, value_dynamic_cast, value_addr, typecmp)
(value_struct_elt, value_struct_elt_bitpos)
(value_find_oload_method_list, find_overload_match)
(value_rtti_indirect_type): Likewise.
* valprint.c (val_print_scalar_type_p, generic_val_print):
Likewise.
* value.c (value_actual_type, value_as_address, unpack_long)
(pack_long, pack_unsigned_long, coerce_ref_if_computed)
(coerce_ref): Likewise.
* varobj.c (varobj_get_value_type): Likewise.
2017-03-20 21:47:54 +01:00
|
|
|
|
|| TYPE_IS_REFERENCE (type)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|| TYPE_CODE (type) == TYPE_CODE_ENUM)
|
|
|
|
|
{
|
2019-01-17 18:19:44 +01:00
|
|
|
|
/* If the type is a plain integer, then the access is
|
2013-02-04 13:48:37 +01:00
|
|
|
|
straight-forward. Otherwise we have to play around a bit
|
|
|
|
|
more. */
|
|
|
|
|
int len = TYPE_LENGTH (type);
|
|
|
|
|
int regno = AARCH64_X0_REGNUM;
|
|
|
|
|
ULONGEST tmp;
|
|
|
|
|
|
|
|
|
|
while (len > 0)
|
|
|
|
|
{
|
|
|
|
|
/* By using store_unsigned_integer we avoid having to do
|
|
|
|
|
anything special for small big-endian values. */
|
|
|
|
|
regcache_cooked_read_unsigned (regs, regno++, &tmp);
|
|
|
|
|
store_unsigned_integer (valbuf,
|
|
|
|
|
(len > X_REGISTER_SIZE
|
|
|
|
|
? X_REGISTER_SIZE : len), byte_order, tmp);
|
|
|
|
|
len -= X_REGISTER_SIZE;
|
|
|
|
|
valbuf += X_REGISTER_SIZE;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* For a structure or union the behaviour is as if the value had
|
|
|
|
|
been stored to word-aligned memory and then loaded into
|
|
|
|
|
registers with 64-bit load instruction(s). */
|
|
|
|
|
int len = TYPE_LENGTH (type);
|
|
|
|
|
int regno = AARCH64_X0_REGNUM;
|
|
|
|
|
bfd_byte buf[X_REGISTER_SIZE];
|
|
|
|
|
|
|
|
|
|
while (len > 0)
|
|
|
|
|
{
|
2018-05-30 20:54:38 +02:00
|
|
|
|
regs->cooked_read (regno++, buf);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
memcpy (valbuf, buf, len > X_REGISTER_SIZE ? X_REGISTER_SIZE : len);
|
|
|
|
|
len -= X_REGISTER_SIZE;
|
|
|
|
|
valbuf += X_REGISTER_SIZE;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Will a function return an aggregate type in memory or in a
|
|
|
|
|
register? Return 0 if an aggregate type can be returned in a
|
|
|
|
|
register, 1 if it must be returned in memory. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
aarch64_return_in_memory (struct gdbarch *gdbarch, struct type *type)
|
|
|
|
|
{
|
2015-07-06 22:05:06 +02:00
|
|
|
|
type = check_typedef (type);
|
2018-08-29 12:41:45 +02:00
|
|
|
|
int elements;
|
|
|
|
|
struct type *fundamental_type;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2018-08-29 12:41:45 +02:00
|
|
|
|
if (aapcs_is_vfp_call_or_return_candidate (type, &elements,
|
|
|
|
|
&fundamental_type))
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
2015-11-27 15:50:30 +01:00
|
|
|
|
/* v0-v7 are used to return values and one register is allocated
|
|
|
|
|
for one member. However, HFA or HVA has at most four members. */
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (TYPE_LENGTH (type) > 16)
|
|
|
|
|
{
|
|
|
|
|
/* PCS B.6 Aggregates larger than 16 bytes are passed by
|
|
|
|
|
invisible reference. */
|
|
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Write into appropriate registers a function return value of type
|
|
|
|
|
TYPE, given in virtual format. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_store_return_value (struct type *type, struct regcache *regs,
|
|
|
|
|
const gdb_byte *valbuf)
|
|
|
|
|
{
|
2017-10-25 17:37:03 +02:00
|
|
|
|
struct gdbarch *gdbarch = regs->arch ();
|
2013-02-04 13:48:37 +01:00
|
|
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
2018-08-29 12:41:45 +02:00
|
|
|
|
int elements;
|
|
|
|
|
struct type *fundamental_type;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2018-08-29 12:41:45 +02:00
|
|
|
|
if (aapcs_is_vfp_call_or_return_candidate (type, &elements,
|
|
|
|
|
&fundamental_type))
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
2018-08-29 12:41:45 +02:00
|
|
|
|
int len = TYPE_LENGTH (fundamental_type);
|
|
|
|
|
|
|
|
|
|
for (int i = 0; i < elements; i++)
|
|
|
|
|
{
|
|
|
|
|
int regno = AARCH64_V0_REGNUM + i;
|
2018-09-17 16:28:53 +02:00
|
|
|
|
/* Enough space for a full vector register. */
|
|
|
|
|
gdb_byte tmpbuf[register_size (gdbarch, regno)];
|
|
|
|
|
gdb_assert (len <= sizeof (tmpbuf));
|
2018-08-29 12:41:45 +02:00
|
|
|
|
|
|
|
|
|
if (aarch64_debug)
|
|
|
|
|
{
|
|
|
|
|
debug_printf ("write HFA or HVA return value element %d to %s\n",
|
|
|
|
|
i + 1,
|
|
|
|
|
gdbarch_register_name (gdbarch, regno));
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2018-08-29 12:41:45 +02:00
|
|
|
|
memcpy (tmpbuf, valbuf,
|
|
|
|
|
len > V_REGISTER_SIZE ? V_REGISTER_SIZE : len);
|
|
|
|
|
regs->cooked_write (regno, tmpbuf);
|
|
|
|
|
valbuf += len;
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
else if (TYPE_CODE (type) == TYPE_CODE_INT
|
|
|
|
|
|| TYPE_CODE (type) == TYPE_CODE_CHAR
|
|
|
|
|
|| TYPE_CODE (type) == TYPE_CODE_BOOL
|
|
|
|
|
|| TYPE_CODE (type) == TYPE_CODE_PTR
|
Convert lvalue reference type check to general reference type check
In almost all contexts (except for overload resolution rules and expression
semantics), lvalue and rvalue references are equivalent. That means that in all
but these cases we can replace a TYPE_CODE_REF check to a TYPE_IS_REFERENCE
check and, for switch statements, add a case label for a rvalue reference type
next to a case label for an lvalue reference type. This patch does exactly
that.
gdb/ChangeLog
PR gdb/14441
* aarch64-tdep.c (aarch64_type_align)
(aarch64_extract_return_value, aarch64_store_return_value): Change
lvalue reference type checks to general reference type checks.
* amd64-tdep.c (amd64_classify): Likewise.
* amd64-windows-tdep.c (amd64_windows_passed_by_integer_register):
Likewise.
* arm-tdep.c (arm_type_align, arm_extract_return_value)
(arm_store_return_value): Likewise.
* ax-gdb.c (gen_fetch, gen_cast): Likewise.
* c-typeprint.c (c_print_type): Likewise.
* c-varobj.c (adjust_value_for_child_access, c_value_of_variable)
(cplus_number_of_children, cplus_describe_child): Likewise.
* compile/compile-c-symbols.c (generate_vla_size): Likewise.
* completer.c (expression_completer): Likewise.
* cp-support.c (make_symbol_overload_list_adl_namespace):
Likewise.
* darwin-nat-info.c (info_mach_region_command): Likewise.
* dwarf2loc.c (entry_data_value_coerce_ref)
(value_of_dwarf_reg_entry): Likewise.
* eval.c (ptrmath_type_p, evaluate_subexp_standard)
(evaluate_subexp_for_address, evaluate_subexp_for_sizeof):
Likewise.
* findvar.c (extract_typed_address, store_typed_address):
Likewise.
* gdbtypes.c (rank_one_type): Likewise.
* hppa-tdep.c (hppa64_integral_or_pointer_p): Likewise.
* infcall.c (value_arg_coerce): Likewise.
* language.c (pointer_type): Likewise.
* m32c-tdep.c (m32c_reg_arg_type, m32c_m16c_address_to_pointer):
Likewise.
* m88k-tdep.c (m88k_integral_or_pointer_p): Likewise.
* mn10300-tdep.c (mn10300_type_align): Likewise.
* msp430-tdep.c (msp430_push_dummy_call): Likewise.
* ppc-sysv-tdep.c (do_ppc_sysv_return_value)
(ppc64_sysv_abi_push_param, ppc64_sysv_abi_return_value):
Likewise.
* printcmd.c (print_formatted, x_command): Likewise.
* python/py-type.c (typy_get_composite, typy_template_argument):
Likewise.
* python/py-value.c (valpy_referenced_value)
(valpy_get_dynamic_type, value_has_field): Likewise.
* s390-linux-tdep.c (s390_function_arg_integer): Likewise.
* sparc-tdep.c (sparc_integral_or_pointer_p): Likewise.
* sparc64-tdep.c (sparc64_integral_or_pointer_p): Likewise.
* spu-tdep.c (spu_scalar_value_p): Likewise.
* symtab.c (lookup_symbol_aux): Likewise.
* typeprint.c (whatis_exp, print_type_scalar): Likewise.
* valarith.c (binop_types_user_defined_p, unop_user_defined_p):
Likewise.
* valops.c (value_cast_pointers, value_cast)
(value_reinterpret_cast, value_dynamic_cast, value_addr, typecmp)
(value_struct_elt, value_struct_elt_bitpos)
(value_find_oload_method_list, find_overload_match)
(value_rtti_indirect_type): Likewise.
* valprint.c (val_print_scalar_type_p, generic_val_print):
Likewise.
* value.c (value_actual_type, value_as_address, unpack_long)
(pack_long, pack_unsigned_long, coerce_ref_if_computed)
(coerce_ref): Likewise.
* varobj.c (varobj_get_value_type): Likewise.
2017-03-20 21:47:54 +01:00
|
|
|
|
|| TYPE_IS_REFERENCE (type)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|| TYPE_CODE (type) == TYPE_CODE_ENUM)
|
|
|
|
|
{
|
|
|
|
|
if (TYPE_LENGTH (type) <= X_REGISTER_SIZE)
|
|
|
|
|
{
|
|
|
|
|
/* Values of one word or less are zero/sign-extended and
|
|
|
|
|
returned in r0. */
|
|
|
|
|
bfd_byte tmpbuf[X_REGISTER_SIZE];
|
|
|
|
|
LONGEST val = unpack_long (type, valbuf);
|
|
|
|
|
|
|
|
|
|
store_signed_integer (tmpbuf, X_REGISTER_SIZE, byte_order, val);
|
2018-05-30 20:54:42 +02:00
|
|
|
|
regs->cooked_write (AARCH64_X0_REGNUM, tmpbuf);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Integral values greater than one word are stored in
|
|
|
|
|
consecutive registers starting with r0. This will always
|
|
|
|
|
be a multiple of the regiser size. */
|
|
|
|
|
int len = TYPE_LENGTH (type);
|
|
|
|
|
int regno = AARCH64_X0_REGNUM;
|
|
|
|
|
|
|
|
|
|
while (len > 0)
|
|
|
|
|
{
|
2018-05-30 20:54:42 +02:00
|
|
|
|
regs->cooked_write (regno++, valbuf);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
len -= X_REGISTER_SIZE;
|
|
|
|
|
valbuf += X_REGISTER_SIZE;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* For a structure or union the behaviour is as if the value had
|
|
|
|
|
been stored to word-aligned memory and then loaded into
|
|
|
|
|
registers with 64-bit load instruction(s). */
|
|
|
|
|
int len = TYPE_LENGTH (type);
|
|
|
|
|
int regno = AARCH64_X0_REGNUM;
|
|
|
|
|
bfd_byte tmpbuf[X_REGISTER_SIZE];
|
|
|
|
|
|
|
|
|
|
while (len > 0)
|
|
|
|
|
{
|
|
|
|
|
memcpy (tmpbuf, valbuf,
|
|
|
|
|
len > X_REGISTER_SIZE ? X_REGISTER_SIZE : len);
|
2018-05-30 20:54:42 +02:00
|
|
|
|
regs->cooked_write (regno++, tmpbuf);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
len -= X_REGISTER_SIZE;
|
|
|
|
|
valbuf += X_REGISTER_SIZE;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "return_value" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static enum return_value_convention
|
|
|
|
|
aarch64_return_value (struct gdbarch *gdbarch, struct value *func_value,
|
|
|
|
|
struct type *valtype, struct regcache *regcache,
|
|
|
|
|
gdb_byte *readbuf, const gdb_byte *writebuf)
|
|
|
|
|
{
|
|
|
|
|
|
|
|
|
|
if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
|
|
|
|
|
|| TYPE_CODE (valtype) == TYPE_CODE_UNION
|
|
|
|
|
|| TYPE_CODE (valtype) == TYPE_CODE_ARRAY)
|
|
|
|
|
{
|
|
|
|
|
if (aarch64_return_in_memory (gdbarch, valtype))
|
|
|
|
|
{
|
|
|
|
|
if (aarch64_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("return value in memory\n");
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return RETURN_VALUE_STRUCT_CONVENTION;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (writebuf)
|
|
|
|
|
aarch64_store_return_value (valtype, regcache, writebuf);
|
|
|
|
|
|
|
|
|
|
if (readbuf)
|
|
|
|
|
aarch64_extract_return_value (valtype, regcache, readbuf);
|
|
|
|
|
|
|
|
|
|
if (aarch64_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("return value in registers\n");
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
return RETURN_VALUE_REGISTER_CONVENTION;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "get_longjmp_target" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
aarch64_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR jb_addr;
|
|
|
|
|
gdb_byte buf[X_REGISTER_SIZE];
|
|
|
|
|
struct gdbarch *gdbarch = get_frame_arch (frame);
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
|
|
|
|
|
|
|
|
|
|
jb_addr = get_frame_register_unsigned (frame, AARCH64_X0_REGNUM);
|
|
|
|
|
|
|
|
|
|
if (target_read_memory (jb_addr + tdep->jb_pc * tdep->jb_elt_size, buf,
|
|
|
|
|
X_REGISTER_SIZE))
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
*pc = extract_unsigned_integer (buf, X_REGISTER_SIZE, byte_order);
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
2015-07-09 17:35:11 +02:00
|
|
|
|
|
|
|
|
|
/* Implement the "gen_return_address" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_gen_return_address (struct gdbarch *gdbarch,
|
|
|
|
|
struct agent_expr *ax, struct axs_value *value,
|
|
|
|
|
CORE_ADDR scope)
|
|
|
|
|
{
|
|
|
|
|
value->type = register_type (gdbarch, AARCH64_LR_REGNUM);
|
|
|
|
|
value->kind = axs_lvalue_register;
|
|
|
|
|
value->u.reg = AARCH64_LR_REGNUM;
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Return the pseudo register name corresponding to register regnum. */
|
|
|
|
|
|
|
|
|
|
static const char *
|
|
|
|
|
aarch64_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
|
|
|
|
|
{
|
2017-10-19 17:35:35 +02:00
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
static const char *const q_name[] =
|
|
|
|
|
{
|
|
|
|
|
"q0", "q1", "q2", "q3",
|
|
|
|
|
"q4", "q5", "q6", "q7",
|
|
|
|
|
"q8", "q9", "q10", "q11",
|
|
|
|
|
"q12", "q13", "q14", "q15",
|
|
|
|
|
"q16", "q17", "q18", "q19",
|
|
|
|
|
"q20", "q21", "q22", "q23",
|
|
|
|
|
"q24", "q25", "q26", "q27",
|
|
|
|
|
"q28", "q29", "q30", "q31",
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const char *const d_name[] =
|
|
|
|
|
{
|
|
|
|
|
"d0", "d1", "d2", "d3",
|
|
|
|
|
"d4", "d5", "d6", "d7",
|
|
|
|
|
"d8", "d9", "d10", "d11",
|
|
|
|
|
"d12", "d13", "d14", "d15",
|
|
|
|
|
"d16", "d17", "d18", "d19",
|
|
|
|
|
"d20", "d21", "d22", "d23",
|
|
|
|
|
"d24", "d25", "d26", "d27",
|
|
|
|
|
"d28", "d29", "d30", "d31",
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const char *const s_name[] =
|
|
|
|
|
{
|
|
|
|
|
"s0", "s1", "s2", "s3",
|
|
|
|
|
"s4", "s5", "s6", "s7",
|
|
|
|
|
"s8", "s9", "s10", "s11",
|
|
|
|
|
"s12", "s13", "s14", "s15",
|
|
|
|
|
"s16", "s17", "s18", "s19",
|
|
|
|
|
"s20", "s21", "s22", "s23",
|
|
|
|
|
"s24", "s25", "s26", "s27",
|
|
|
|
|
"s28", "s29", "s30", "s31",
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const char *const h_name[] =
|
|
|
|
|
{
|
|
|
|
|
"h0", "h1", "h2", "h3",
|
|
|
|
|
"h4", "h5", "h6", "h7",
|
|
|
|
|
"h8", "h9", "h10", "h11",
|
|
|
|
|
"h12", "h13", "h14", "h15",
|
|
|
|
|
"h16", "h17", "h18", "h19",
|
|
|
|
|
"h20", "h21", "h22", "h23",
|
|
|
|
|
"h24", "h25", "h26", "h27",
|
|
|
|
|
"h28", "h29", "h30", "h31",
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static const char *const b_name[] =
|
|
|
|
|
{
|
|
|
|
|
"b0", "b1", "b2", "b3",
|
|
|
|
|
"b4", "b5", "b6", "b7",
|
|
|
|
|
"b8", "b9", "b10", "b11",
|
|
|
|
|
"b12", "b13", "b14", "b15",
|
|
|
|
|
"b16", "b17", "b18", "b19",
|
|
|
|
|
"b20", "b21", "b22", "b23",
|
|
|
|
|
"b24", "b25", "b26", "b27",
|
|
|
|
|
"b28", "b29", "b30", "b31",
|
|
|
|
|
};
|
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
int p_regnum = regnum - gdbarch_num_regs (gdbarch);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (p_regnum >= AARCH64_Q0_REGNUM && p_regnum < AARCH64_Q0_REGNUM + 32)
|
|
|
|
|
return q_name[p_regnum - AARCH64_Q0_REGNUM];
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (p_regnum >= AARCH64_D0_REGNUM && p_regnum < AARCH64_D0_REGNUM + 32)
|
|
|
|
|
return d_name[p_regnum - AARCH64_D0_REGNUM];
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (p_regnum >= AARCH64_S0_REGNUM && p_regnum < AARCH64_S0_REGNUM + 32)
|
|
|
|
|
return s_name[p_regnum - AARCH64_S0_REGNUM];
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (p_regnum >= AARCH64_H0_REGNUM && p_regnum < AARCH64_H0_REGNUM + 32)
|
|
|
|
|
return h_name[p_regnum - AARCH64_H0_REGNUM];
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (p_regnum >= AARCH64_B0_REGNUM && p_regnum < AARCH64_B0_REGNUM + 32)
|
|
|
|
|
return b_name[p_regnum - AARCH64_B0_REGNUM];
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2017-10-19 17:35:35 +02:00
|
|
|
|
if (tdep->has_sve ())
|
|
|
|
|
{
|
|
|
|
|
static const char *const sve_v_name[] =
|
|
|
|
|
{
|
|
|
|
|
"v0", "v1", "v2", "v3",
|
|
|
|
|
"v4", "v5", "v6", "v7",
|
|
|
|
|
"v8", "v9", "v10", "v11",
|
|
|
|
|
"v12", "v13", "v14", "v15",
|
|
|
|
|
"v16", "v17", "v18", "v19",
|
|
|
|
|
"v20", "v21", "v22", "v23",
|
|
|
|
|
"v24", "v25", "v26", "v27",
|
|
|
|
|
"v28", "v29", "v30", "v31",
|
|
|
|
|
};
|
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (p_regnum >= AARCH64_SVE_V0_REGNUM
|
|
|
|
|
&& p_regnum < AARCH64_SVE_V0_REGNUM + AARCH64_V_REGS_NUM)
|
|
|
|
|
return sve_v_name[p_regnum - AARCH64_SVE_V0_REGNUM];
|
2017-10-19 17:35:35 +02:00
|
|
|
|
}
|
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
/* RA_STATE is used for unwinding only. Do not assign it a name - this
|
|
|
|
|
prevents it from being read by methods such as
|
|
|
|
|
mi_cmd_trace_frame_collected. */
|
|
|
|
|
if (tdep->has_pauth () && regnum == tdep->pauth_ra_state_regnum)
|
|
|
|
|
return "";
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
internal_error (__FILE__, __LINE__,
|
|
|
|
|
_("aarch64_pseudo_register_name: bad register number %d"),
|
2019-03-22 11:37:46 +01:00
|
|
|
|
p_regnum);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "pseudo_register_type" tdesc_arch_data method. */
|
|
|
|
|
|
|
|
|
|
static struct type *
|
|
|
|
|
aarch64_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
|
|
|
|
|
{
|
2017-10-19 17:35:35 +02:00
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
int p_regnum = regnum - gdbarch_num_regs (gdbarch);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (p_regnum >= AARCH64_Q0_REGNUM && p_regnum < AARCH64_Q0_REGNUM + 32)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return aarch64_vnq_type (gdbarch);
|
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (p_regnum >= AARCH64_D0_REGNUM && p_regnum < AARCH64_D0_REGNUM + 32)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return aarch64_vnd_type (gdbarch);
|
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (p_regnum >= AARCH64_S0_REGNUM && p_regnum < AARCH64_S0_REGNUM + 32)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return aarch64_vns_type (gdbarch);
|
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (p_regnum >= AARCH64_H0_REGNUM && p_regnum < AARCH64_H0_REGNUM + 32)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return aarch64_vnh_type (gdbarch);
|
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (p_regnum >= AARCH64_B0_REGNUM && p_regnum < AARCH64_B0_REGNUM + 32)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return aarch64_vnb_type (gdbarch);
|
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (tdep->has_sve () && p_regnum >= AARCH64_SVE_V0_REGNUM
|
|
|
|
|
&& p_regnum < AARCH64_SVE_V0_REGNUM + AARCH64_V_REGS_NUM)
|
2017-10-19 17:35:35 +02:00
|
|
|
|
return aarch64_vnv_type (gdbarch);
|
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (tdep->has_pauth () && regnum == tdep->pauth_ra_state_regnum)
|
|
|
|
|
return builtin_type (gdbarch)->builtin_uint64;
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
internal_error (__FILE__, __LINE__,
|
|
|
|
|
_("aarch64_pseudo_register_type: bad register number %d"),
|
2019-03-22 11:37:46 +01:00
|
|
|
|
p_regnum);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "pseudo_register_reggroup_p" tdesc_arch_data method. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
aarch64_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
|
|
|
|
|
struct reggroup *group)
|
|
|
|
|
{
|
2017-10-19 17:35:35 +02:00
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
int p_regnum = regnum - gdbarch_num_regs (gdbarch);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2019-03-22 11:37:46 +01:00
|
|
|
|
if (p_regnum >= AARCH64_Q0_REGNUM && p_regnum < AARCH64_Q0_REGNUM + 32)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return group == all_reggroup || group == vector_reggroup;
|
2019-03-22 11:37:46 +01:00
|
|
|
|
else if (p_regnum >= AARCH64_D0_REGNUM && p_regnum < AARCH64_D0_REGNUM + 32)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return (group == all_reggroup || group == vector_reggroup
|
|
|
|
|
|| group == float_reggroup);
|
2019-03-22 11:37:46 +01:00
|
|
|
|
else if (p_regnum >= AARCH64_S0_REGNUM && p_regnum < AARCH64_S0_REGNUM + 32)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return (group == all_reggroup || group == vector_reggroup
|
|
|
|
|
|| group == float_reggroup);
|
2019-03-22 11:37:46 +01:00
|
|
|
|
else if (p_regnum >= AARCH64_H0_REGNUM && p_regnum < AARCH64_H0_REGNUM + 32)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return group == all_reggroup || group == vector_reggroup;
|
2019-03-22 11:37:46 +01:00
|
|
|
|
else if (p_regnum >= AARCH64_B0_REGNUM && p_regnum < AARCH64_B0_REGNUM + 32)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return group == all_reggroup || group == vector_reggroup;
|
2019-03-22 11:37:46 +01:00
|
|
|
|
else if (tdep->has_sve () && p_regnum >= AARCH64_SVE_V0_REGNUM
|
|
|
|
|
&& p_regnum < AARCH64_SVE_V0_REGNUM + AARCH64_V_REGS_NUM)
|
2017-10-19 17:35:35 +02:00
|
|
|
|
return group == all_reggroup || group == vector_reggroup;
|
2019-03-22 11:37:46 +01:00
|
|
|
|
/* RA_STATE is used for unwinding only. Do not assign it to any groups. */
|
|
|
|
|
if (tdep->has_pauth () && regnum == tdep->pauth_ra_state_regnum)
|
|
|
|
|
return 0;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
return group == all_reggroup;
|
|
|
|
|
}
|
|
|
|
|
|
2018-04-26 15:58:40 +02:00
|
|
|
|
/* Helper for aarch64_pseudo_read_value. */
|
|
|
|
|
|
|
|
|
|
static struct value *
|
2017-10-19 17:35:35 +02:00
|
|
|
|
aarch64_pseudo_read_value_1 (struct gdbarch *gdbarch,
|
|
|
|
|
readable_regcache *regcache, int regnum_offset,
|
2018-04-26 15:58:40 +02:00
|
|
|
|
int regsize, struct value *result_value)
|
|
|
|
|
{
|
|
|
|
|
unsigned v_regnum = AARCH64_V0_REGNUM + regnum_offset;
|
|
|
|
|
|
2017-10-19 17:35:35 +02:00
|
|
|
|
/* Enough space for a full vector register. */
|
|
|
|
|
gdb_byte reg_buf[register_size (gdbarch, AARCH64_V0_REGNUM)];
|
|
|
|
|
gdb_static_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM);
|
|
|
|
|
|
2018-04-26 15:58:40 +02:00
|
|
|
|
if (regcache->raw_read (v_regnum, reg_buf) != REG_VALID)
|
|
|
|
|
mark_value_bytes_unavailable (result_value, 0,
|
|
|
|
|
TYPE_LENGTH (value_type (result_value)));
|
|
|
|
|
else
|
|
|
|
|
memcpy (value_contents_raw (result_value), reg_buf, regsize);
|
2017-10-19 17:35:35 +02:00
|
|
|
|
|
2018-04-26 15:58:40 +02:00
|
|
|
|
return result_value;
|
|
|
|
|
}
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* Implement the "pseudo_register_read_value" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static struct value *
|
2018-04-26 15:58:40 +02:00
|
|
|
|
aarch64_pseudo_read_value (struct gdbarch *gdbarch, readable_regcache *regcache,
|
2013-02-04 13:48:37 +01:00
|
|
|
|
int regnum)
|
|
|
|
|
{
|
2017-10-19 17:35:35 +02:00
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
2018-04-26 15:58:40 +02:00
|
|
|
|
struct value *result_value = allocate_value (register_type (gdbarch, regnum));
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
VALUE_LVAL (result_value) = lval_register;
|
|
|
|
|
VALUE_REGNUM (result_value) = regnum;
|
|
|
|
|
|
|
|
|
|
regnum -= gdbarch_num_regs (gdbarch);
|
|
|
|
|
|
|
|
|
|
if (regnum >= AARCH64_Q0_REGNUM && regnum < AARCH64_Q0_REGNUM + 32)
|
2017-10-19 17:35:35 +02:00
|
|
|
|
return aarch64_pseudo_read_value_1 (gdbarch, regcache,
|
|
|
|
|
regnum - AARCH64_Q0_REGNUM,
|
2018-04-26 15:58:40 +02:00
|
|
|
|
Q_REGISTER_SIZE, result_value);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
if (regnum >= AARCH64_D0_REGNUM && regnum < AARCH64_D0_REGNUM + 32)
|
2017-10-19 17:35:35 +02:00
|
|
|
|
return aarch64_pseudo_read_value_1 (gdbarch, regcache,
|
|
|
|
|
regnum - AARCH64_D0_REGNUM,
|
2018-04-26 15:58:40 +02:00
|
|
|
|
D_REGISTER_SIZE, result_value);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
if (regnum >= AARCH64_S0_REGNUM && regnum < AARCH64_S0_REGNUM + 32)
|
2017-10-19 17:35:35 +02:00
|
|
|
|
return aarch64_pseudo_read_value_1 (gdbarch, regcache,
|
|
|
|
|
regnum - AARCH64_S0_REGNUM,
|
2018-04-26 15:58:40 +02:00
|
|
|
|
S_REGISTER_SIZE, result_value);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
if (regnum >= AARCH64_H0_REGNUM && regnum < AARCH64_H0_REGNUM + 32)
|
2017-10-19 17:35:35 +02:00
|
|
|
|
return aarch64_pseudo_read_value_1 (gdbarch, regcache,
|
|
|
|
|
regnum - AARCH64_H0_REGNUM,
|
2018-04-26 15:58:40 +02:00
|
|
|
|
H_REGISTER_SIZE, result_value);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
if (regnum >= AARCH64_B0_REGNUM && regnum < AARCH64_B0_REGNUM + 32)
|
2017-10-19 17:35:35 +02:00
|
|
|
|
return aarch64_pseudo_read_value_1 (gdbarch, regcache,
|
|
|
|
|
regnum - AARCH64_B0_REGNUM,
|
2018-04-26 15:58:40 +02:00
|
|
|
|
B_REGISTER_SIZE, result_value);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2017-10-19 17:35:35 +02:00
|
|
|
|
if (tdep->has_sve () && regnum >= AARCH64_SVE_V0_REGNUM
|
|
|
|
|
&& regnum < AARCH64_SVE_V0_REGNUM + 32)
|
|
|
|
|
return aarch64_pseudo_read_value_1 (gdbarch, regcache,
|
|
|
|
|
regnum - AARCH64_SVE_V0_REGNUM,
|
|
|
|
|
V_REGISTER_SIZE, result_value);
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
gdb_assert_not_reached ("regnum out of bound");
|
|
|
|
|
}
|
|
|
|
|
|
2018-04-26 15:58:40 +02:00
|
|
|
|
/* Helper for aarch64_pseudo_write. */
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
static void
|
2017-10-19 17:35:35 +02:00
|
|
|
|
aarch64_pseudo_write_1 (struct gdbarch *gdbarch, struct regcache *regcache,
|
|
|
|
|
int regnum_offset, int regsize, const gdb_byte *buf)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
2018-04-26 15:58:40 +02:00
|
|
|
|
unsigned v_regnum = AARCH64_V0_REGNUM + regnum_offset;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2017-10-19 17:35:35 +02:00
|
|
|
|
/* Enough space for a full vector register. */
|
|
|
|
|
gdb_byte reg_buf[register_size (gdbarch, AARCH64_V0_REGNUM)];
|
|
|
|
|
gdb_static_assert (AARCH64_V0_REGNUM == AARCH64_SVE_Z0_REGNUM);
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* Ensure the register buffer is zero, we want gdb writes of the
|
|
|
|
|
various 'scalar' pseudo registers to behavior like architectural
|
|
|
|
|
writes, register width bytes are written the remainder are set to
|
|
|
|
|
zero. */
|
2017-10-19 17:35:35 +02:00
|
|
|
|
memset (reg_buf, 0, register_size (gdbarch, AARCH64_V0_REGNUM));
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2018-04-26 15:58:40 +02:00
|
|
|
|
memcpy (reg_buf, buf, regsize);
|
|
|
|
|
regcache->raw_write (v_regnum, reg_buf);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "pseudo_register_write" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_pseudo_write (struct gdbarch *gdbarch, struct regcache *regcache,
|
|
|
|
|
int regnum, const gdb_byte *buf)
|
|
|
|
|
{
|
2017-10-19 17:35:35 +02:00
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
regnum -= gdbarch_num_regs (gdbarch);
|
|
|
|
|
|
|
|
|
|
if (regnum >= AARCH64_Q0_REGNUM && regnum < AARCH64_Q0_REGNUM + 32)
|
2017-10-19 17:35:35 +02:00
|
|
|
|
return aarch64_pseudo_write_1 (gdbarch, regcache,
|
|
|
|
|
regnum - AARCH64_Q0_REGNUM, Q_REGISTER_SIZE,
|
|
|
|
|
buf);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
if (regnum >= AARCH64_D0_REGNUM && regnum < AARCH64_D0_REGNUM + 32)
|
2017-10-19 17:35:35 +02:00
|
|
|
|
return aarch64_pseudo_write_1 (gdbarch, regcache,
|
|
|
|
|
regnum - AARCH64_D0_REGNUM, D_REGISTER_SIZE,
|
|
|
|
|
buf);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
if (regnum >= AARCH64_S0_REGNUM && regnum < AARCH64_S0_REGNUM + 32)
|
2017-10-19 17:35:35 +02:00
|
|
|
|
return aarch64_pseudo_write_1 (gdbarch, regcache,
|
|
|
|
|
regnum - AARCH64_S0_REGNUM, S_REGISTER_SIZE,
|
|
|
|
|
buf);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
if (regnum >= AARCH64_H0_REGNUM && regnum < AARCH64_H0_REGNUM + 32)
|
2017-10-19 17:35:35 +02:00
|
|
|
|
return aarch64_pseudo_write_1 (gdbarch, regcache,
|
|
|
|
|
regnum - AARCH64_H0_REGNUM, H_REGISTER_SIZE,
|
|
|
|
|
buf);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
if (regnum >= AARCH64_B0_REGNUM && regnum < AARCH64_B0_REGNUM + 32)
|
2017-10-19 17:35:35 +02:00
|
|
|
|
return aarch64_pseudo_write_1 (gdbarch, regcache,
|
|
|
|
|
regnum - AARCH64_B0_REGNUM, B_REGISTER_SIZE,
|
|
|
|
|
buf);
|
|
|
|
|
|
|
|
|
|
if (tdep->has_sve () && regnum >= AARCH64_SVE_V0_REGNUM
|
|
|
|
|
&& regnum < AARCH64_SVE_V0_REGNUM + 32)
|
|
|
|
|
return aarch64_pseudo_write_1 (gdbarch, regcache,
|
|
|
|
|
regnum - AARCH64_SVE_V0_REGNUM,
|
|
|
|
|
V_REGISTER_SIZE, buf);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
gdb_assert_not_reached ("regnum out of bound");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Callback function for user_reg_add. */
|
|
|
|
|
|
|
|
|
|
static struct value *
|
|
|
|
|
value_of_aarch64_user_reg (struct frame_info *frame, const void *baton)
|
|
|
|
|
{
|
Add some more casts (1/2)
Note: I needed to split this patch in two, otherwise it's too big for
the mailing list.
This patch adds explicit casts to situations where a void pointer is
assigned to a pointer to the "real" type. Building in C++ mode requires
those assignments to use an explicit cast. This includes, for example:
- callback arguments (cleanups, comparison functions, ...)
- data attached to some object (objfile, program space, etc) in the form
of a void pointer
- "user data" passed to some function
This patch comes from the commit "(mostly) auto-generated patch to insert
casts needed for C++", taken from Pedro's C++ branch.
Only files built on x86 with --enable-targets=all are modified, so the
native files for other arches will need to be dealt with separately.
I built-tested this with --enable-targets=all and reg-tested. To my
surprise, a test case (selftest.exp) had to be adjusted.
Here's the ChangeLog entry. Again, this was relatively quick to make
despite the length, thanks to David Malcom's script, although I don't
believe it's very useful information in that particular case...
gdb/ChangeLog:
* aarch64-tdep.c (aarch64_make_prologue_cache): Add cast(s).
(aarch64_make_stub_cache): Likewise.
(value_of_aarch64_user_reg): Likewise.
* ada-lang.c (ada_inferior_data_cleanup): Likewise.
(get_ada_inferior_data): Likewise.
(get_ada_pspace_data): Likewise.
(ada_pspace_data_cleanup): Likewise.
(ada_complete_symbol_matcher): Likewise.
(ada_exc_search_name_matches): Likewise.
* ada-tasks.c (get_ada_tasks_pspace_data): Likewise.
(get_ada_tasks_inferior_data): Likewise.
* addrmap.c (addrmap_mutable_foreach_worker): Likewise.
(splay_obstack_alloc): Likewise.
(splay_obstack_free): Likewise.
* alpha-linux-tdep.c (alpha_linux_supply_gregset): Likewise.
(alpha_linux_collect_gregset): Likewise.
(alpha_linux_supply_fpregset): Likewise.
(alpha_linux_collect_fpregset): Likewise.
* alpha-mdebug-tdep.c (alpha_mdebug_frame_unwind_cache): Likewise.
* alpha-tdep.c (alpha_lds): Likewise.
(alpha_sts): Likewise.
(alpha_sigtramp_frame_unwind_cache): Likewise.
(alpha_heuristic_frame_unwind_cache): Likewise.
(alpha_supply_int_regs): Likewise.
(alpha_fill_int_regs): Likewise.
(alpha_supply_fp_regs): Likewise.
(alpha_fill_fp_regs): Likewise.
* alphanbsd-tdep.c (alphanbsd_supply_fpregset): Likewise.
(alphanbsd_aout_supply_gregset): Likewise.
(alphanbsd_supply_gregset): Likewise.
* amd64-linux-tdep.c (amd64_linux_init_abi): Likewise.
(amd64_x32_linux_init_abi): Likewise.
* amd64-nat.c (amd64_supply_native_gregset): Likewise.
(amd64_collect_native_gregset): Likewise.
* amd64-tdep.c (amd64_frame_cache): Likewise.
(amd64_sigtramp_frame_cache): Likewise.
(amd64_epilogue_frame_cache): Likewise.
(amd64_supply_fxsave): Likewise.
(amd64_supply_xsave): Likewise.
(amd64_collect_fxsave): Likewise.
(amd64_collect_xsave): Likewise.
* amd64-windows-tdep.c (amd64_windows_frame_cache): Likewise.
* amd64obsd-tdep.c (amd64obsd_trapframe_cache): Likewise.
* arm-linux-tdep.c (arm_linux_supply_gregset): Likewise.
(arm_linux_collect_gregset): Likewise.
(arm_linux_supply_nwfpe): Likewise.
(arm_linux_collect_nwfpe): Likewise.
(arm_linux_supply_vfp): Likewise.
(arm_linux_collect_vfp): Likewise.
* arm-tdep.c (arm_find_mapping_symbol): Likewise.
(arm_prologue_unwind_stop_reason): Likewise.
(arm_prologue_this_id): Likewise.
(arm_prologue_prev_register): Likewise.
(arm_exidx_data_free): Likewise.
(arm_find_exidx_entry): Likewise.
(arm_stub_this_id): Likewise.
(arm_m_exception_this_id): Likewise.
(arm_m_exception_prev_register): Likewise.
(arm_normal_frame_base): Likewise.
(gdb_print_insn_arm): Likewise.
(arm_objfile_data_free): Likewise.
(arm_record_special_symbol): Likewise.
(value_of_arm_user_reg): Likewise.
* armbsd-tdep.c (armbsd_supply_fpregset): Likewise.
(armbsd_supply_gregset): Likewise.
* auto-load.c (auto_load_pspace_data_cleanup): Likewise.
(get_auto_load_pspace_data): Likewise.
(hash_loaded_script_entry): Likewise.
(eq_loaded_script_entry): Likewise.
(clear_section_scripts): Likewise.
(collect_matching_scripts): Likewise.
* auxv.c (auxv_inferior_data_cleanup): Likewise.
(get_auxv_inferior_data): Likewise.
* avr-tdep.c (avr_frame_unwind_cache): Likewise.
* ax-general.c (do_free_agent_expr_cleanup): Likewise.
* bfd-target.c (target_bfd_xfer_partial): Likewise.
(target_bfd_xclose): Likewise.
(target_bfd_get_section_table): Likewise.
* bfin-tdep.c (bfin_frame_cache): Likewise.
* block.c (find_block_in_blockvector): Likewise.
(call_site_for_pc): Likewise.
(block_find_non_opaque_type_preferred): Likewise.
* break-catch-sig.c (signal_catchpoint_insert_location): Likewise.
(signal_catchpoint_remove_location): Likewise.
(signal_catchpoint_breakpoint_hit): Likewise.
(signal_catchpoint_print_one): Likewise.
(signal_catchpoint_print_mention): Likewise.
(signal_catchpoint_print_recreate): Likewise.
* break-catch-syscall.c (get_catch_syscall_inferior_data): Likewise.
* breakpoint.c (do_cleanup_counted_command_line): Likewise.
(bp_location_compare_addrs): Likewise.
(get_first_locp_gte_addr): Likewise.
(check_tracepoint_command): Likewise.
(do_map_commands_command): Likewise.
(get_breakpoint_objfile_data): Likewise.
(free_breakpoint_probes): Likewise.
(do_captured_breakpoint_query): Likewise.
(compare_breakpoints): Likewise.
(bp_location_compare): Likewise.
(bpstat_remove_breakpoint_callback): Likewise.
(do_delete_breakpoint_cleanup): Likewise.
* bsd-uthread.c (bsd_uthread_set_supply_uthread): Likewise.
(bsd_uthread_set_collect_uthread): Likewise.
(bsd_uthread_activate): Likewise.
(bsd_uthread_fetch_registers): Likewise.
(bsd_uthread_store_registers): Likewise.
* btrace.c (check_xml_btrace_version): Likewise.
(parse_xml_btrace_block): Likewise.
(parse_xml_btrace_pt_config_cpu): Likewise.
(parse_xml_btrace_pt_raw): Likewise.
(parse_xml_btrace_pt): Likewise.
(parse_xml_btrace_conf_bts): Likewise.
(parse_xml_btrace_conf_pt): Likewise.
(do_btrace_data_cleanup): Likewise.
* c-typeprint.c (find_typedef_for_canonicalize): Likewise.
* charset.c (cleanup_iconv): Likewise.
(do_cleanup_iterator): Likewise.
* cli-out.c (cli_uiout_dtor): Likewise.
(cli_table_begin): Likewise.
(cli_table_body): Likewise.
(cli_table_end): Likewise.
(cli_table_header): Likewise.
(cli_begin): Likewise.
(cli_end): Likewise.
(cli_field_int): Likewise.
(cli_field_skip): Likewise.
(cli_field_string): Likewise.
(cli_field_fmt): Likewise.
(cli_spaces): Likewise.
(cli_text): Likewise.
(cli_message): Likewise.
(cli_wrap_hint): Likewise.
(cli_flush): Likewise.
(cli_redirect): Likewise.
(out_field_fmt): Likewise.
(field_separator): Likewise.
(cli_out_set_stream): Likewise.
* cli/cli-cmds.c (compare_symtabs): Likewise.
* cli/cli-dump.c (call_dump_func): Likewise.
(restore_section_callback): Likewise.
* cli/cli-script.c (clear_hook_in_cleanup): Likewise.
(do_restore_user_call_depth): Likewise.
(do_free_command_lines_cleanup): Likewise.
* coff-pe-read.c (get_section_vmas): Likewise.
(pe_as16): Likewise.
(pe_as32): Likewise.
* coffread.c (coff_symfile_read): Likewise.
* common/agent.c (agent_look_up_symbols): Likewise.
* common/filestuff.c (do_close_cleanup): Likewise.
* common/format.c (free_format_pieces_cleanup): Likewise.
* common/vec.c (vec_o_reserve): Likewise.
* compile/compile-c-support.c (print_one_macro): Likewise.
* compile/compile-c-symbols.c (hash_symbol_error): Likewise.
(eq_symbol_error): Likewise.
(del_symbol_error): Likewise.
(error_symbol_once): Likewise.
(gcc_convert_symbol): Likewise.
(gcc_symbol_address): Likewise.
(hash_symname): Likewise.
(eq_symname): Likewise.
* compile/compile-c-types.c (hash_type_map_instance): Likewise.
(eq_type_map_instance): Likewise.
(insert_type): Likewise.
(convert_type): Likewise.
* compile/compile-object-load.c (munmap_listp_free_cleanup): Likewise.
(setup_sections): Likewise.
(link_hash_table_free): Likewise.
(copy_sections): Likewise.
* compile/compile-object-run.c (do_module_cleanup): Likewise.
* compile/compile.c (compile_print_value): Likewise.
(do_rmdir): Likewise.
(cleanup_compile_instance): Likewise.
(cleanup_unlink_file): Likewise.
* completer.c (free_completion_tracker): Likewise.
* corelow.c (add_to_spuid_list): Likewise.
* cp-namespace.c (reset_directive_searched): Likewise.
* cp-support.c (reset_directive_searched): Likewise.
* cris-tdep.c (cris_sigtramp_frame_unwind_cache): Likewise.
(cris_frame_unwind_cache): Likewise.
* d-lang.c (builtin_d_type): Likewise.
* d-namespace.c (reset_directive_searched): Likewise.
* dbxread.c (dbx_free_symfile_info): Likewise.
(do_free_bincl_list_cleanup): Likewise.
* disasm.c (hash_dis_line_entry): Likewise.
(eq_dis_line_entry): Likewise.
(dis_asm_print_address): Likewise.
(fprintf_disasm): Likewise.
(do_ui_file_delete): Likewise.
* doublest.c (convert_floatformat_to_doublest): Likewise.
* dummy-frame.c (pop_dummy_frame_bpt): Likewise.
(dummy_frame_prev_register): Likewise.
(dummy_frame_this_id): Likewise.
* dwarf2-frame-tailcall.c (cache_hash): Likewise.
(cache_eq): Likewise.
(cache_find): Likewise.
(tailcall_frame_this_id): Likewise.
(dwarf2_tailcall_prev_register_first): Likewise.
(tailcall_frame_prev_register): Likewise.
(tailcall_frame_dealloc_cache): Likewise.
(tailcall_frame_prev_arch): Likewise.
* dwarf2-frame.c (dwarf2_frame_state_free): Likewise.
(dwarf2_frame_set_init_reg): Likewise.
(dwarf2_frame_init_reg): Likewise.
(dwarf2_frame_set_signal_frame_p): Likewise.
(dwarf2_frame_signal_frame_p): Likewise.
(dwarf2_frame_set_adjust_regnum): Likewise.
(dwarf2_frame_adjust_regnum): Likewise.
(clear_pointer_cleanup): Likewise.
(dwarf2_frame_cache): Likewise.
(find_cie): Likewise.
(dwarf2_frame_find_fde): Likewise.
* dwarf2expr.c (dwarf_expr_address_type): Likewise.
(free_dwarf_expr_context_cleanup): Likewise.
* dwarf2loc.c (locexpr_find_frame_base_location): Likewise.
(locexpr_get_frame_base): Likewise.
(loclist_find_frame_base_location): Likewise.
(loclist_get_frame_base): Likewise.
(dwarf_expr_dwarf_call): Likewise.
(dwarf_expr_get_base_type): Likewise.
(dwarf_expr_push_dwarf_reg_entry_value): Likewise.
(dwarf_expr_get_obj_addr): Likewise.
(entry_data_value_coerce_ref): Likewise.
(entry_data_value_copy_closure): Likewise.
(entry_data_value_free_closure): Likewise.
(get_frame_address_in_block_wrapper): Likewise.
(dwarf2_evaluate_property): Likewise.
(dwarf2_compile_property_to_c): Likewise.
(needs_frame_read_addr_from_reg): Likewise.
(needs_frame_get_reg_value): Likewise.
(needs_frame_frame_base): Likewise.
(needs_frame_frame_cfa): Likewise.
(needs_frame_tls_address): Likewise.
(needs_frame_dwarf_call): Likewise.
(needs_dwarf_reg_entry_value): Likewise.
(get_ax_pc): Likewise.
(locexpr_read_variable): Likewise.
(locexpr_read_variable_at_entry): Likewise.
(locexpr_read_needs_frame): Likewise.
(locexpr_describe_location): Likewise.
(locexpr_tracepoint_var_ref): Likewise.
(locexpr_generate_c_location): Likewise.
(loclist_read_variable): Likewise.
(loclist_read_variable_at_entry): Likewise.
(loclist_describe_location): Likewise.
(loclist_tracepoint_var_ref): Likewise.
(loclist_generate_c_location): Likewise.
* dwarf2read.c (line_header_hash_voidp): Likewise.
(line_header_eq_voidp): Likewise.
(dwarf2_has_info): Likewise.
(dwarf2_get_section_info): Likewise.
(locate_dwz_sections): Likewise.
(hash_file_name_entry): Likewise.
(eq_file_name_entry): Likewise.
(delete_file_name_entry): Likewise.
(dw2_setup): Likewise.
(dw2_get_file_names_reader): Likewise.
(dw2_find_pc_sect_compunit_symtab): Likewise.
(hash_signatured_type): Likewise.
(eq_signatured_type): Likewise.
(add_signatured_type_cu_to_table): Likewise.
(create_debug_types_hash_table): Likewise.
(lookup_dwo_signatured_type): Likewise.
(lookup_dwp_signatured_type): Likewise.
(lookup_signatured_type): Likewise.
(hash_type_unit_group): Likewise.
(eq_type_unit_group): Likewise.
(get_type_unit_group): Likewise.
(process_psymtab_comp_unit_reader): Likewise.
(sort_tu_by_abbrev_offset): Likewise.
(process_skeletonless_type_unit): Likewise.
(psymtabs_addrmap_cleanup): Likewise.
(dwarf2_read_symtab): Likewise.
(psymtab_to_symtab_1): Likewise.
(die_hash): Likewise.
(die_eq): Likewise.
(load_full_comp_unit_reader): Likewise.
(reset_die_in_process): Likewise.
(free_cu_line_header): Likewise.
(handle_DW_AT_stmt_list): Likewise.
(hash_dwo_file): Likewise.
(eq_dwo_file): Likewise.
(hash_dwo_unit): Likewise.
(eq_dwo_unit): Likewise.
(create_dwo_cu_reader): Likewise.
(create_dwo_unit_in_dwp_v1): Likewise.
(create_dwo_unit_in_dwp_v2): Likewise.
(lookup_dwo_unit_in_dwp): Likewise.
(dwarf2_locate_dwo_sections): Likewise.
(dwarf2_locate_common_dwp_sections): Likewise.
(dwarf2_locate_v2_dwp_sections): Likewise.
(hash_dwp_loaded_cutus): Likewise.
(eq_dwp_loaded_cutus): Likewise.
(lookup_dwo_cutu): Likewise.
(abbrev_table_free_cleanup): Likewise.
(dwarf2_free_abbrev_table): Likewise.
(find_partial_die_in_comp_unit): Likewise.
(free_line_header_voidp): Likewise.
(follow_die_offset): Likewise.
(follow_die_sig_1): Likewise.
(free_heap_comp_unit): Likewise.
(free_stack_comp_unit): Likewise.
(dwarf2_free_objfile): Likewise.
(per_cu_offset_and_type_hash): Likewise.
(per_cu_offset_and_type_eq): Likewise.
(get_die_type_at_offset): Likewise.
(partial_die_hash): Likewise.
(partial_die_eq): Likewise.
(dwarf2_per_objfile_free): Likewise.
(hash_strtab_entry): Likewise.
(eq_strtab_entry): Likewise.
(add_string): Likewise.
(hash_symtab_entry): Likewise.
(eq_symtab_entry): Likewise.
(delete_symtab_entry): Likewise.
(cleanup_mapped_symtab): Likewise.
(add_indices_to_cpool): Likewise.
(hash_psymtab_cu_index): Likewise.
(eq_psymtab_cu_index): Likewise.
(add_address_entry_worker): Likewise.
(unlink_if_set): Likewise.
(write_one_signatured_type): Likewise.
(save_gdb_index_command): Likewise.
* elfread.c (elf_symtab_read): Likewise.
(elf_gnu_ifunc_cache_hash): Likewise.
(elf_gnu_ifunc_cache_eq): Likewise.
(elf_gnu_ifunc_record_cache): Likewise.
(elf_gnu_ifunc_resolve_by_cache): Likewise.
(elf_get_probes): Likewise.
(probe_key_free): Likewise.
* f-lang.c (builtin_f_type): Likewise.
* frame-base.c (frame_base_append_sniffer): Likewise.
(frame_base_set_default): Likewise.
(frame_base_find_by_frame): Likewise.
* frame-unwind.c (frame_unwind_prepend_unwinder): Likewise.
(frame_unwind_append_unwinder): Likewise.
(frame_unwind_find_by_frame): Likewise.
* frame.c (frame_addr_hash): Likewise.
(frame_addr_hash_eq): Likewise.
(frame_stash_find): Likewise.
(do_frame_register_read): Likewise.
(unwind_to_current_frame): Likewise.
(frame_cleanup_after_sniffer): Likewise.
* frv-linux-tdep.c (frv_linux_sigtramp_frame_cache): Likewise.
* frv-tdep.c (frv_frame_unwind_cache): Likewise.
* ft32-tdep.c (ft32_frame_cache): Likewise.
* gcore.c (do_bfd_delete_cleanup): Likewise.
(gcore_create_callback): Likewise.
* gdb_bfd.c (hash_bfd): Likewise.
(eq_bfd): Likewise.
(gdb_bfd_open): Likewise.
(free_one_bfd_section): Likewise.
(gdb_bfd_ref): Likewise.
(gdb_bfd_unref): Likewise.
(get_section_descriptor): Likewise.
(gdb_bfd_map_section): Likewise.
(gdb_bfd_crc): Likewise.
(gdb_bfd_mark_parent): Likewise.
(gdb_bfd_record_inclusion): Likewise.
(gdb_bfd_requires_relocations): Likewise.
(print_one_bfd): Likewise.
* gdbtypes.c (type_pair_hash): Likewise.
(type_pair_eq): Likewise.
(builtin_type): Likewise.
(objfile_type): Likewise.
* gnu-v3-abi.c (vtable_ptrdiff_type): Likewise.
(vtable_address_point_offset): Likewise.
(gnuv3_get_vtable): Likewise.
(hash_value_and_voffset): Likewise.
(eq_value_and_voffset): Likewise.
(compare_value_and_voffset): Likewise.
(compute_vtable_size): Likewise.
(gnuv3_get_typeid_type): Likewise.
* go-lang.c (builtin_go_type): Likewise.
* guile/scm-block.c (bkscm_hash_block_smob): Likewise.
(bkscm_eq_block_smob): Likewise.
(bkscm_objfile_block_map): Likewise.
(bkscm_del_objfile_blocks): Likewise.
* guile/scm-breakpoint.c (bpscm_build_bp_list): Likewise.
* guile/scm-disasm.c (gdbscm_disasm_read_memory_worker): Likewise.
(gdbscm_disasm_print_address): Likewise.
* guile/scm-frame.c (frscm_hash_frame_smob): Likewise.
(frscm_eq_frame_smob): Likewise.
(frscm_inferior_frame_map): Likewise.
(frscm_del_inferior_frames): Likewise.
* guile/scm-gsmob.c (gdbscm_add_objfile_ref): Likewise.
* guile/scm-objfile.c (ofscm_handle_objfile_deleted): Likewise.
(ofscm_objfile_smob_from_objfile): Likewise.
* guile/scm-ports.c (ioscm_write): Likewise.
(ioscm_file_port_delete): Likewise.
(ioscm_file_port_rewind): Likewise.
(ioscm_file_port_put): Likewise.
(ioscm_file_port_write): Likewise.
* guile/scm-progspace.c (psscm_handle_pspace_deleted): Likewise.
(psscm_pspace_smob_from_pspace): Likewise.
* guile/scm-safe-call.c (scscm_recording_pre_unwind_handler): Likewise.
(scscm_recording_unwind_handler): Likewise.
(gdbscm_with_catch): Likewise.
(scscm_call_0_body): Likewise.
(scscm_call_1_body): Likewise.
(scscm_call_2_body): Likewise.
(scscm_call_3_body): Likewise.
(scscm_call_4_body): Likewise.
(scscm_apply_1_body): Likewise.
(scscm_eval_scheme_string): Likewise.
(gdbscm_safe_eval_string): Likewise.
(scscm_source_scheme_script): Likewise.
(gdbscm_safe_source_script): Likewise.
* guile/scm-string.c (gdbscm_call_scm_to_stringn): Likewise.
(gdbscm_call_scm_from_stringn): Likewise.
* guile/scm-symbol.c (syscm_hash_symbol_smob): Likewise.
(syscm_eq_symbol_smob): Likewise.
(syscm_get_symbol_map): Likewise.
(syscm_del_objfile_symbols): Likewise.
* guile/scm-symtab.c (stscm_hash_symtab_smob): Likewise.
(stscm_eq_symtab_smob): Likewise.
(stscm_objfile_symtab_map): Likewise.
(stscm_del_objfile_symtabs): Likewise.
* guile/scm-type.c (tyscm_hash_type_smob): Likewise.
(tyscm_eq_type_smob): Likewise.
(tyscm_type_map): Likewise.
(tyscm_copy_type_recursive): Likewise.
(save_objfile_types): Likewise.
* guile/scm-utils.c (extract_arg): Likewise.
* h8300-tdep.c (h8300_frame_cache): Likewise.
* hppa-linux-tdep.c (hppa_linux_sigtramp_frame_unwind_cache): Likewise.
* hppa-tdep.c (compare_unwind_entries): Likewise.
(find_unwind_entry): Likewise.
(hppa_frame_cache): Likewise.
(hppa_stub_frame_unwind_cache): Likewise.
* hppanbsd-tdep.c (hppanbsd_supply_gregset): Likewise.
* hppaobsd-tdep.c (hppaobsd_supply_gregset): Likewise.
(hppaobsd_supply_fpregset): Likewise.
* i386-cygwin-tdep.c (core_process_module_section): Likewise.
* i386-linux-tdep.c (i386_linux_init_abi): Likewise.
* i386-tdep.c (i386_frame_cache): Likewise.
(i386_epilogue_frame_cache): Likewise.
(i386_sigtramp_frame_cache): Likewise.
(i386_supply_gregset): Likewise.
(i386_collect_gregset): Likewise.
(i386_gdbarch_init): Likewise.
* i386obsd-tdep.c (i386obsd_aout_supply_regset): Likewise.
(i386obsd_trapframe_cache): Likewise.
* i387-tdep.c (i387_supply_fsave): Likewise.
(i387_collect_fsave): Likewise.
(i387_supply_fxsave): Likewise.
(i387_collect_fxsave): Likewise.
(i387_supply_xsave): Likewise.
(i387_collect_xsave): Likewise.
* ia64-tdep.c (ia64_frame_cache): Likewise.
(ia64_sigtramp_frame_cache): Likewise.
* infcmd.c (attach_command_continuation): Likewise.
(attach_command_continuation_free_args): Likewise.
* inferior.c (restore_inferior): Likewise.
(delete_thread_of_inferior): Likewise.
* inflow.c (inflow_inferior_data_cleanup): Likewise.
(get_inflow_inferior_data): Likewise.
(inflow_inferior_exit): Likewise.
* infrun.c (displaced_step_clear_cleanup): Likewise.
(restore_current_uiout_cleanup): Likewise.
(release_stop_context_cleanup): Likewise.
(do_restore_infcall_suspend_state_cleanup): Likewise.
(do_restore_infcall_control_state_cleanup): Likewise.
(restore_inferior_ptid): Likewise.
* inline-frame.c (block_starting_point_at): Likewise.
* iq2000-tdep.c (iq2000_frame_cache): Likewise.
* jit.c (get_jit_objfile_data): Likewise.
(get_jit_program_space_data): Likewise.
(jit_object_close_impl): Likewise.
(jit_find_objf_with_entry_addr): Likewise.
(jit_breakpoint_deleted): Likewise.
(jit_unwind_reg_set_impl): Likewise.
(jit_unwind_reg_get_impl): Likewise.
(jit_dealloc_cache): Likewise.
(jit_frame_sniffer): Likewise.
(jit_frame_prev_register): Likewise.
(jit_prepend_unwinder): Likewise.
(jit_inferior_exit_hook): Likewise.
(free_objfile_data): Likewise.
* jv-lang.c (jv_per_objfile_free): Likewise.
(get_dynamics_objfile): Likewise.
(get_java_class_symtab): Likewise.
(builtin_java_type): Likewise.
* language.c (language_string_char_type): Likewise.
(language_bool_type): Likewise.
(language_lookup_primitive_type): Likewise.
(language_lookup_primitive_type_as_symbol): Likewise.
* linespec.c (hash_address_entry): Likewise.
(eq_address_entry): Likewise.
(iterate_inline_only): Likewise.
(iterate_name_matcher): Likewise.
(decode_line_2_compare_items): Likewise.
(collect_one_symbol): Likewise.
(compare_symbols): Likewise.
(compare_msymbols): Likewise.
(add_symtabs_to_list): Likewise.
(collect_symbols): Likewise.
(compare_msyms): Likewise.
(add_minsym): Likewise.
(cleanup_linespec_result): Likewise.
* linux-fork.c (inferior_call_waitpid_cleanup): Likewise.
* linux-nat.c (delete_lwp_cleanup): Likewise.
(count_events_callback): Likewise.
(select_event_lwp_callback): Likewise.
(resume_stopped_resumed_lwps): Likewise.
* linux-tdep.c (get_linux_gdbarch_data): Likewise.
(invalidate_linux_cache_inf): Likewise.
(get_linux_inferior_data): Likewise.
(linux_find_memory_regions_thunk): Likewise.
(linux_make_mappings_callback): Likewise.
(linux_corefile_thread_callback): Likewise.
(find_mapping_size): Likewise.
* linux-thread-db.c (find_new_threads_callback): Likewise.
* lm32-tdep.c (lm32_frame_cache): Likewise.
* m2-lang.c (builtin_m2_type): Likewise.
* m32c-tdep.c (m32c_analyze_frame_prologue): Likewise.
* m32r-linux-tdep.c (m32r_linux_sigtramp_frame_cache): Likewise.
(m32r_linux_supply_gregset): Likewise.
(m32r_linux_collect_gregset): Likewise.
* m32r-tdep.c (m32r_frame_unwind_cache): Likewise.
* m68hc11-tdep.c (m68hc11_frame_unwind_cache): Likewise.
* m68k-tdep.c (m68k_frame_cache): Likewise.
* m68kbsd-tdep.c (m68kbsd_supply_fpregset): Likewise.
(m68kbsd_supply_gregset): Likewise.
* m68klinux-tdep.c (m68k_linux_sigtramp_frame_cache): Likewise.
* m88k-tdep.c (m88k_frame_cache): Likewise.
(m88k_supply_gregset): Likewise.
gdb/gdbserver/ChangeLog:
* dll.c (match_dll): Add cast(s).
(unloaded_dll): Likewise.
* linux-low.c (second_thread_of_pid_p): Likewise.
(delete_lwp_callback): Likewise.
(count_events_callback): Likewise.
(select_event_lwp_callback): Likewise.
(linux_set_resume_request): Likewise.
* server.c (accumulate_file_name_length): Likewise.
(emit_dll_description): Likewise.
(handle_qxfer_threads_worker): Likewise.
(visit_actioned_threads): Likewise.
* thread-db.c (any_thread_of): Likewise.
* tracepoint.c (same_process_p): Likewise.
(match_blocktype): Likewise.
(build_traceframe_info_xml): Likewise.
gdb/testsuite/ChangeLog:
* gdb.gdb/selftest.exp (do_steps_and_nexts): Adjust expected
source line.
2015-09-25 20:08:07 +02:00
|
|
|
|
const int *reg_p = (const int *) baton;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
return value_of_register (*reg_p, frame);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2014-04-30 18:04:50 +02:00
|
|
|
|
/* Implement the "software_single_step" gdbarch method, needed to
|
|
|
|
|
single step through atomic sequences on AArch64. */
|
|
|
|
|
|
2017-05-02 19:30:07 +02:00
|
|
|
|
static std::vector<CORE_ADDR>
|
2016-11-22 15:05:06 +01:00
|
|
|
|
aarch64_software_single_step (struct regcache *regcache)
|
2014-04-30 18:04:50 +02:00
|
|
|
|
{
|
2017-10-25 17:37:03 +02:00
|
|
|
|
struct gdbarch *gdbarch = regcache->arch ();
|
2014-04-30 18:04:50 +02:00
|
|
|
|
enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
|
|
|
|
|
const int insn_size = 4;
|
|
|
|
|
const int atomic_sequence_length = 16; /* Instruction sequence length. */
|
2016-11-22 15:05:04 +01:00
|
|
|
|
CORE_ADDR pc = regcache_read_pc (regcache);
|
2018-08-07 20:48:47 +02:00
|
|
|
|
CORE_ADDR breaks[2] = { CORE_ADDR_MAX, CORE_ADDR_MAX };
|
2014-04-30 18:04:50 +02:00
|
|
|
|
CORE_ADDR loc = pc;
|
|
|
|
|
CORE_ADDR closing_insn = 0;
|
|
|
|
|
uint32_t insn = read_memory_unsigned_integer (loc, insn_size,
|
|
|
|
|
byte_order_for_code);
|
|
|
|
|
int index;
|
|
|
|
|
int insn_count;
|
|
|
|
|
int bc_insn_count = 0; /* Conditional branch instruction count. */
|
|
|
|
|
int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */
|
2015-10-07 10:52:46 +02:00
|
|
|
|
aarch64_inst inst;
|
|
|
|
|
|
Modify AArch64 Assembly and disassembly functions to be able to fail and report why.
This patch if the first patch in a series to add the ability to add constraints
to system registers that an instruction must adhere to in order for the register
to be usable with that instruction.
These constraints can also be used to disambiguate between registers with the
same encoding during disassembly.
This patch adds a new flags entry in the sysreg structures and ensures it is
filled in and read out during assembly/disassembly. It also adds the ability for
the assemble and disassemble functions to be able to gracefully fail and re-use
the existing error reporting infrastructure.
The return type of these functions are changed to a boolean to denote success or
failure and the error structure is passed around to them. This requires
aarch64-gen changes so a lot of the changes here are just mechanical.
gas/
PR binutils/21446
* config/tc-aarch64.c (parse_sys_reg): Return register flags.
(parse_operands): Fill in register flags.
gdb/
PR binutils/21446
* aarch64-tdep.c (aarch64_analyze_prologue,
aarch64_software_single_step, aarch64_displaced_step_copy_insn):
Indicate not interested in errors.
include/
PR binutils/21446
* opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
(aarch64_decode_insn): Accept error struct.
opcodes/
PR binutils/21446
* aarch64-asm.h (aarch64_insert_operand, aarch64_##x): Return boolean
and take error struct.
* aarch64-asm.c (aarch64_ext_regno, aarch64_ins_reglane,
aarch64_ins_reglist, aarch64_ins_ldst_reglist,
aarch64_ins_ldst_reglist_r, aarch64_ins_ldst_elemlist,
aarch64_ins_advsimd_imm_shift, aarch64_ins_imm, aarch64_ins_imm_half,
aarch64_ins_advsimd_imm_modified, aarch64_ins_fpimm,
aarch64_ins_imm_rotate1, aarch64_ins_imm_rotate2, aarch64_ins_fbits,
aarch64_ins_aimm, aarch64_ins_limm_1, aarch64_ins_limm,
aarch64_ins_inv_limm, aarch64_ins_ft, aarch64_ins_addr_simple,
aarch64_ins_addr_regoff, aarch64_ins_addr_offset, aarch64_ins_addr_simm,
aarch64_ins_addr_simm10, aarch64_ins_addr_uimm12,
aarch64_ins_simd_addr_post, aarch64_ins_cond, aarch64_ins_sysreg,
aarch64_ins_pstatefield, aarch64_ins_sysins_op, aarch64_ins_barrier,
aarch64_ins_prfop, aarch64_ins_hint, aarch64_ins_reg_extended,
aarch64_ins_reg_shifted, aarch64_ins_sve_addr_ri_s4xvl,
aarch64_ins_sve_addr_ri_s6xvl, aarch64_ins_sve_addr_ri_s9xvl,
aarch64_ins_sve_addr_ri_s4, aarch64_ins_sve_addr_ri_u6,
aarch64_ins_sve_addr_rr_lsl, aarch64_ins_sve_addr_rz_xtw,
aarch64_ins_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
aarch64_ins_sve_addr_zz_lsl, aarch64_ins_sve_addr_zz_sxtw,
aarch64_ins_sve_addr_zz_uxtw, aarch64_ins_sve_aimm,
aarch64_ins_sve_asimm, aarch64_ins_sve_index, aarch64_ins_sve_limm_mov,
aarch64_ins_sve_quad_index, aarch64_ins_sve_reglist,
aarch64_ins_sve_scale, aarch64_ins_sve_shlimm, aarch64_ins_sve_shrimm,
aarch64_ins_sve_float_half_one, aarch64_ins_sve_float_half_two,
aarch64_ins_sve_float_zero_one, aarch64_opcode_encode): Likewise.
* aarch64-dis.h (aarch64_extract_operand, aarch64_##x): Likewise.
* aarch64-dis.c (aarch64_ext_regno, aarch64_ext_reglane,
aarch64_ext_reglist, aarch64_ext_ldst_reglist,
aarch64_ext_ldst_reglist_r, aarch64_ext_ldst_elemlist,
aarch64_ext_advsimd_imm_shift, aarch64_ext_imm, aarch64_ext_imm_half,
aarch64_ext_advsimd_imm_modified, aarch64_ext_fpimm,
aarch64_ext_imm_rotate1, aarch64_ext_imm_rotate2, aarch64_ext_fbits,
aarch64_ext_aimm, aarch64_ext_limm_1, aarch64_ext_limm, decode_limm,
aarch64_ext_inv_limm, aarch64_ext_ft, aarch64_ext_addr_simple,
aarch64_ext_addr_regoff, aarch64_ext_addr_offset, aarch64_ext_addr_simm,
aarch64_ext_addr_simm10, aarch64_ext_addr_uimm12,
aarch64_ext_simd_addr_post, aarch64_ext_cond, aarch64_ext_sysreg,
aarch64_ext_pstatefield, aarch64_ext_sysins_op, aarch64_ext_barrier,
aarch64_ext_prfop, aarch64_ext_hint, aarch64_ext_reg_extended,
aarch64_ext_reg_shifted, aarch64_ext_sve_addr_ri_s4xvl,
aarch64_ext_sve_addr_ri_s6xvl, aarch64_ext_sve_addr_ri_s9xvl,
aarch64_ext_sve_addr_ri_s4, aarch64_ext_sve_addr_ri_u6,
aarch64_ext_sve_addr_rr_lsl, aarch64_ext_sve_addr_rz_xtw,
aarch64_ext_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
aarch64_ext_sve_addr_zz_lsl, aarch64_ext_sve_addr_zz_sxtw,
aarch64_ext_sve_addr_zz_uxtw, aarch64_ext_sve_aimm,
aarch64_ext_sve_asimm, aarch64_ext_sve_index, aarch64_ext_sve_limm_mov,
aarch64_ext_sve_quad_index, aarch64_ext_sve_reglist,
aarch64_ext_sve_scale, aarch64_ext_sve_shlimm, aarch64_ext_sve_shrimm,
aarch64_ext_sve_float_half_one, aarch64_ext_sve_float_half_two,
aarch64_ext_sve_float_zero_one, aarch64_opcode_decode): Likewise.
(determine_disassembling_preference, aarch64_decode_insn,
print_insn_aarch64_word, print_insn_data): Take errors struct.
(print_insn_aarch64): Use errors.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-gen.c (print_operand_inserter): Use errors and change type to
boolean in aarch64_insert_operan.
(print_operand_extractor): Likewise.
* aarch64-opc.c (aarch64_print_operand): Use sysreg struct.
2018-05-15 17:11:42 +02:00
|
|
|
|
if (aarch64_decode_insn (insn, &inst, 1, NULL) != 0)
|
2017-05-02 19:30:07 +02:00
|
|
|
|
return {};
|
2014-04-30 18:04:50 +02:00
|
|
|
|
|
|
|
|
|
/* Look for a Load Exclusive instruction which begins the sequence. */
|
2015-10-07 10:52:46 +02:00
|
|
|
|
if (inst.opcode->iclass != ldstexcl || bit (insn, 22) == 0)
|
2017-05-02 19:30:07 +02:00
|
|
|
|
return {};
|
2014-04-30 18:04:50 +02:00
|
|
|
|
|
|
|
|
|
for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
|
|
|
|
|
{
|
|
|
|
|
loc += insn_size;
|
|
|
|
|
insn = read_memory_unsigned_integer (loc, insn_size,
|
|
|
|
|
byte_order_for_code);
|
|
|
|
|
|
Modify AArch64 Assembly and disassembly functions to be able to fail and report why.
This patch if the first patch in a series to add the ability to add constraints
to system registers that an instruction must adhere to in order for the register
to be usable with that instruction.
These constraints can also be used to disambiguate between registers with the
same encoding during disassembly.
This patch adds a new flags entry in the sysreg structures and ensures it is
filled in and read out during assembly/disassembly. It also adds the ability for
the assemble and disassemble functions to be able to gracefully fail and re-use
the existing error reporting infrastructure.
The return type of these functions are changed to a boolean to denote success or
failure and the error structure is passed around to them. This requires
aarch64-gen changes so a lot of the changes here are just mechanical.
gas/
PR binutils/21446
* config/tc-aarch64.c (parse_sys_reg): Return register flags.
(parse_operands): Fill in register flags.
gdb/
PR binutils/21446
* aarch64-tdep.c (aarch64_analyze_prologue,
aarch64_software_single_step, aarch64_displaced_step_copy_insn):
Indicate not interested in errors.
include/
PR binutils/21446
* opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
(aarch64_decode_insn): Accept error struct.
opcodes/
PR binutils/21446
* aarch64-asm.h (aarch64_insert_operand, aarch64_##x): Return boolean
and take error struct.
* aarch64-asm.c (aarch64_ext_regno, aarch64_ins_reglane,
aarch64_ins_reglist, aarch64_ins_ldst_reglist,
aarch64_ins_ldst_reglist_r, aarch64_ins_ldst_elemlist,
aarch64_ins_advsimd_imm_shift, aarch64_ins_imm, aarch64_ins_imm_half,
aarch64_ins_advsimd_imm_modified, aarch64_ins_fpimm,
aarch64_ins_imm_rotate1, aarch64_ins_imm_rotate2, aarch64_ins_fbits,
aarch64_ins_aimm, aarch64_ins_limm_1, aarch64_ins_limm,
aarch64_ins_inv_limm, aarch64_ins_ft, aarch64_ins_addr_simple,
aarch64_ins_addr_regoff, aarch64_ins_addr_offset, aarch64_ins_addr_simm,
aarch64_ins_addr_simm10, aarch64_ins_addr_uimm12,
aarch64_ins_simd_addr_post, aarch64_ins_cond, aarch64_ins_sysreg,
aarch64_ins_pstatefield, aarch64_ins_sysins_op, aarch64_ins_barrier,
aarch64_ins_prfop, aarch64_ins_hint, aarch64_ins_reg_extended,
aarch64_ins_reg_shifted, aarch64_ins_sve_addr_ri_s4xvl,
aarch64_ins_sve_addr_ri_s6xvl, aarch64_ins_sve_addr_ri_s9xvl,
aarch64_ins_sve_addr_ri_s4, aarch64_ins_sve_addr_ri_u6,
aarch64_ins_sve_addr_rr_lsl, aarch64_ins_sve_addr_rz_xtw,
aarch64_ins_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
aarch64_ins_sve_addr_zz_lsl, aarch64_ins_sve_addr_zz_sxtw,
aarch64_ins_sve_addr_zz_uxtw, aarch64_ins_sve_aimm,
aarch64_ins_sve_asimm, aarch64_ins_sve_index, aarch64_ins_sve_limm_mov,
aarch64_ins_sve_quad_index, aarch64_ins_sve_reglist,
aarch64_ins_sve_scale, aarch64_ins_sve_shlimm, aarch64_ins_sve_shrimm,
aarch64_ins_sve_float_half_one, aarch64_ins_sve_float_half_two,
aarch64_ins_sve_float_zero_one, aarch64_opcode_encode): Likewise.
* aarch64-dis.h (aarch64_extract_operand, aarch64_##x): Likewise.
* aarch64-dis.c (aarch64_ext_regno, aarch64_ext_reglane,
aarch64_ext_reglist, aarch64_ext_ldst_reglist,
aarch64_ext_ldst_reglist_r, aarch64_ext_ldst_elemlist,
aarch64_ext_advsimd_imm_shift, aarch64_ext_imm, aarch64_ext_imm_half,
aarch64_ext_advsimd_imm_modified, aarch64_ext_fpimm,
aarch64_ext_imm_rotate1, aarch64_ext_imm_rotate2, aarch64_ext_fbits,
aarch64_ext_aimm, aarch64_ext_limm_1, aarch64_ext_limm, decode_limm,
aarch64_ext_inv_limm, aarch64_ext_ft, aarch64_ext_addr_simple,
aarch64_ext_addr_regoff, aarch64_ext_addr_offset, aarch64_ext_addr_simm,
aarch64_ext_addr_simm10, aarch64_ext_addr_uimm12,
aarch64_ext_simd_addr_post, aarch64_ext_cond, aarch64_ext_sysreg,
aarch64_ext_pstatefield, aarch64_ext_sysins_op, aarch64_ext_barrier,
aarch64_ext_prfop, aarch64_ext_hint, aarch64_ext_reg_extended,
aarch64_ext_reg_shifted, aarch64_ext_sve_addr_ri_s4xvl,
aarch64_ext_sve_addr_ri_s6xvl, aarch64_ext_sve_addr_ri_s9xvl,
aarch64_ext_sve_addr_ri_s4, aarch64_ext_sve_addr_ri_u6,
aarch64_ext_sve_addr_rr_lsl, aarch64_ext_sve_addr_rz_xtw,
aarch64_ext_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
aarch64_ext_sve_addr_zz_lsl, aarch64_ext_sve_addr_zz_sxtw,
aarch64_ext_sve_addr_zz_uxtw, aarch64_ext_sve_aimm,
aarch64_ext_sve_asimm, aarch64_ext_sve_index, aarch64_ext_sve_limm_mov,
aarch64_ext_sve_quad_index, aarch64_ext_sve_reglist,
aarch64_ext_sve_scale, aarch64_ext_sve_shlimm, aarch64_ext_sve_shrimm,
aarch64_ext_sve_float_half_one, aarch64_ext_sve_float_half_two,
aarch64_ext_sve_float_zero_one, aarch64_opcode_decode): Likewise.
(determine_disassembling_preference, aarch64_decode_insn,
print_insn_aarch64_word, print_insn_data): Take errors struct.
(print_insn_aarch64): Use errors.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-gen.c (print_operand_inserter): Use errors and change type to
boolean in aarch64_insert_operan.
(print_operand_extractor): Likewise.
* aarch64-opc.c (aarch64_print_operand): Use sysreg struct.
2018-05-15 17:11:42 +02:00
|
|
|
|
if (aarch64_decode_insn (insn, &inst, 1, NULL) != 0)
|
2017-05-02 19:30:07 +02:00
|
|
|
|
return {};
|
2014-04-30 18:04:50 +02:00
|
|
|
|
/* Check if the instruction is a conditional branch. */
|
2015-10-07 10:52:46 +02:00
|
|
|
|
if (inst.opcode->iclass == condbranch)
|
2014-04-30 18:04:50 +02:00
|
|
|
|
{
|
2015-10-07 10:52:46 +02:00
|
|
|
|
gdb_assert (inst.operands[0].type == AARCH64_OPND_ADDR_PCREL19);
|
|
|
|
|
|
2014-04-30 18:04:50 +02:00
|
|
|
|
if (bc_insn_count >= 1)
|
2017-05-02 19:30:07 +02:00
|
|
|
|
return {};
|
2014-04-30 18:04:50 +02:00
|
|
|
|
|
|
|
|
|
/* It is, so we'll try to set a breakpoint at the destination. */
|
2015-10-07 10:52:46 +02:00
|
|
|
|
breaks[1] = loc + inst.operands[0].imm.value;
|
2014-04-30 18:04:50 +02:00
|
|
|
|
|
|
|
|
|
bc_insn_count++;
|
|
|
|
|
last_breakpoint++;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Look for the Store Exclusive which closes the atomic sequence. */
|
2015-10-07 10:52:46 +02:00
|
|
|
|
if (inst.opcode->iclass == ldstexcl && bit (insn, 22) == 0)
|
2014-04-30 18:04:50 +02:00
|
|
|
|
{
|
|
|
|
|
closing_insn = loc;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* We didn't find a closing Store Exclusive instruction, fall back. */
|
|
|
|
|
if (!closing_insn)
|
2017-05-02 19:30:07 +02:00
|
|
|
|
return {};
|
2014-04-30 18:04:50 +02:00
|
|
|
|
|
|
|
|
|
/* Insert breakpoint after the end of the atomic sequence. */
|
|
|
|
|
breaks[0] = loc + insn_size;
|
|
|
|
|
|
|
|
|
|
/* Check for duplicated breakpoints, and also check that the second
|
|
|
|
|
breakpoint is not within the atomic sequence. */
|
|
|
|
|
if (last_breakpoint
|
|
|
|
|
&& (breaks[1] == breaks[0]
|
|
|
|
|
|| (breaks[1] >= pc && breaks[1] <= closing_insn)))
|
|
|
|
|
last_breakpoint = 0;
|
|
|
|
|
|
2017-05-02 19:30:07 +02:00
|
|
|
|
std::vector<CORE_ADDR> next_pcs;
|
|
|
|
|
|
2014-04-30 18:04:50 +02:00
|
|
|
|
/* Insert the breakpoint at the end of the sequence, and one at the
|
|
|
|
|
destination of the conditional branch, if it exists. */
|
|
|
|
|
for (index = 0; index <= last_breakpoint; index++)
|
2017-05-02 19:30:07 +02:00
|
|
|
|
next_pcs.push_back (breaks[index]);
|
2014-04-30 18:04:50 +02:00
|
|
|
|
|
2016-11-08 15:28:32 +01:00
|
|
|
|
return next_pcs;
|
2014-04-30 18:04:50 +02:00
|
|
|
|
}
|
|
|
|
|
|
Create a displaced_step_closure class hierarchy
displaced_step_closure is a type defined in multiple -tdep.c files.
Trying to xfree it from the common code (infrun.c) is a problem when we
try to poison xfree for non-POD types. Because there can be multiple of
these types in the same build, this patch makes a hierarchy of classes
with a virtual destructor. When the common code deletes the object
through a displaced_step_closure pointer, it will invoke the right
destructor.
The amd64 used a last-member array with a variable size. That doesn't
work with new, so I changed it for an std::vector. Other architectures
which used a simple byte buffer as a closure now use a shared
buf_displaced_step_closure, a closure type that only contains a
gdb::byte_vector.
Reg-tested on the buildbot.
gdb/ChangeLog:
* infrun.h: Include common/byte-vector.h.
(struct displaced_step_closure): New struct.
(struct buf_displaced_step_closure): New struct.
* infrun.c (displaced_step_closure::~displaced_step_closure):
Provide default implementation.
(displaced_step_clear): Deallocate step closure with delete.
* aarch64-tdep.c (displaced_step_closure): Rename to ...
(aarch64_displaced_step_closure): ... this, extend
displaced_step_closure.
(aarch64_displaced_step_data) <dsc>: Change type to
aarch64_displaced_step_closure.
(aarch64_displaced_step_copy_insn): Adjust to type change, use
unique_ptr.
(aarch64_displaced_step_fixup): Add cast for displaced step
closure.
* amd64-tdep.c (displaced_step_closure): Rename to ...
(amd64_displaced_step_closure): ... this, extend
displaced_step_closure.
<insn_buf>: Change type to std::vector<gdb_byte>.
<max_len>: Remove.
(fixup_riprel): Change type of DSC parameter, adjust to type
change of insn_buf.
(fixup_displaced_copy): Change type of DSC parameter.
(amd64_displaced_step_copy_insn): Instantiate
amd64_displaced_step_closure.
(amd64_displaced_step_fixup): Add cast for closure type, adjust
to type change of insn_buf.
* arm-linux-tdep.c (arm_linux_cleanup_svc): Change type of
parameter DSC.
(arm_linux_copy_svc): Likewise.
(cleanup_kernel_helper_return): Likewise.
(arm_catch_kernel_helper_return): Likewise.
(arm_linux_displaced_step_copy_insn): Instantiate
arm_displaced_step_closure.
* arm-tdep.c (arm_pc_is_thumb): Add cast for closure.
(displaced_read_reg): Change type of parameter DSC.
(branch_write_pc): Likewise.
(load_write_pc): Likewise.
(alu_write_pc): Likewise.
(displaced_write_reg): Likewise.
(arm_copy_unmodified): Likewise.
(thumb_copy_unmodified_32bit): Likewise.
(thumb_copy_unmodified_16bit): Likewise.
(cleanup_preload): Likewise.
(install_preload): Likewise.
(arm_copy_preload): Likewise.
(thumb2_copy_preload): Likewise.
(install_preload_reg): Likewise.
(arm_copy_preload_reg): Likewise.
(cleanup_copro_load_store): Likewise.
(install_copro_load_store): Likewise.
(arm_copy_copro_load_store) Likewise.
(thumb2_copy_copro_load_store): Likewise.
(cleanup_branch): Likewise.
(install_b_bl_blx): Likewise.
(arm_copy_b_bl_blx): Likewise.
(thumb2_copy_b_bl_blx): Likewise.
(thumb_copy_b): Likewise.
(install_bx_blx_reg): Likewise.
(arm_copy_bx_blx_reg): Likewise.
(thumb_copy_bx_blx_reg): Likewise.
(cleanup_alu_imm): Likewise.
(arm_copy_alu_imm): Likewise.
(thumb2_copy_alu_imm): Likewise.
(cleanup_alu_reg): Likewise.
(install_alu_reg): Likewise.
(arm_copy_alu_reg): Likewise.
(thumb_copy_alu_reg): Likewise.
(cleanup_alu_shifted_reg): Likewise.
(install_alu_shifted_reg): Likewise.
(arm_copy_alu_shifted_reg): Likewise.
(cleanup_load): Likewise.
(cleanup_store): Likewise.
(arm_copy_extra_ld_st): Likewise.
(install_load_store): Likewise.
(thumb2_copy_load_literal): Likewise.
(thumb2_copy_load_reg_imm): Likewise.
(arm_copy_ldr_str_ldrb_strb): Likewise.
(cleanup_block_load_all): Likewise.
(cleanup_block_store_pc): Likewise.
(cleanup_block_load_pc): Likewise.
(arm_copy_block_xfer): Likewise.
(thumb2_copy_block_xfer): Likewise.
(cleanup_svc): Likewise.
(install_svc): Likewise.
(arm_copy_svc): Likewise.
(thumb_copy_svc): Likewise.
(arm_copy_undef): Likewise.
(thumb_32bit_copy_undef): Likewise.
(arm_copy_unpred): Likewise.
(arm_decode_misc_memhint_neon): Likewise.
(arm_decode_unconditional): Likewise.
(arm_decode_miscellaneous): Likewise.
(arm_decode_dp_misc): Likewise.
(arm_decode_ld_st_word_ubyte): Likewise.
(arm_decode_media): Likewise.
(arm_decode_b_bl_ldmstm): Likewise.
(arm_decode_ext_reg_ld_st): Likewise.
(thumb2_decode_dp_shift_reg): Likewise.
(thumb2_decode_ext_reg_ld_st): Likewise.
(arm_decode_svc_copro): Likewise.
(thumb2_decode_svc_copro): Likewise.
(install_pc_relative): Likewise.
(thumb_copy_pc_relative_16bit): Likewise.
(thumb_decode_pc_relative_16bit): Likewise.
(thumb_copy_pc_relative_32bit): Likewise.
(thumb_copy_16bit_ldr_literal): Likewise.
(thumb_copy_cbnz_cbz): Likewise.
(thumb2_copy_table_branch): Likewise.
(cleanup_pop_pc_16bit_all): Likewise.
(thumb_copy_pop_pc_16bit): Likewise.
(thumb_process_displaced_16bit_insn): Likewise.
(decode_thumb_32bit_ld_mem_hints): Likewise.
(thumb_process_displaced_32bit_insn): Likewise.
(thumb_process_displaced_insn): Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(arm_displaced_step_fixup): Add cast for closure.
* arm-tdep.h: Include infrun.h.
(displaced_step_closure): Rename to ...
(arm_displaced_step_closure): ... this, extend
displaced_step_closure.
<u::svc::copy_svc_os>: Change type of parameter DSC.
<cleanup>: Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(displaced_read_reg): Likewise.
(displaced_write_reg): Likewise.
* i386-linux-tdep.c (i386_linux_displaced_step_copy_insn):
Adjust.
* i386-tdep.h: Include infrun.h.
(i386_displaced_step_closure): New typedef.
* i386-tdep.c (i386_displaced_step_copy_insn): Use
i386_displaced_step_closure.
(i386_displaced_step_fixup): Adjust.
* rs6000-tdep.c (ppc_displaced_step_closure): New typedef.
(ppc_displaced_step_copy_insn): Use ppc_displaced_step_closure
and unique_ptr.
(ppc_displaced_step_fixup): Adjust.
* s390-linux-tdep.c (s390_displaced_step_closure): New typedef.
(s390_displaced_step_copy_insn): Use s390_displaced_step_closure
and unique_ptr.
(s390_displaced_step_fixup): Adjust.
2017-10-21 17:27:52 +02:00
|
|
|
|
struct aarch64_displaced_step_closure : public displaced_step_closure
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
{
|
|
|
|
|
/* It is true when condition instruction, such as B.CON, TBZ, etc,
|
|
|
|
|
is being displaced stepping. */
|
Create a displaced_step_closure class hierarchy
displaced_step_closure is a type defined in multiple -tdep.c files.
Trying to xfree it from the common code (infrun.c) is a problem when we
try to poison xfree for non-POD types. Because there can be multiple of
these types in the same build, this patch makes a hierarchy of classes
with a virtual destructor. When the common code deletes the object
through a displaced_step_closure pointer, it will invoke the right
destructor.
The amd64 used a last-member array with a variable size. That doesn't
work with new, so I changed it for an std::vector. Other architectures
which used a simple byte buffer as a closure now use a shared
buf_displaced_step_closure, a closure type that only contains a
gdb::byte_vector.
Reg-tested on the buildbot.
gdb/ChangeLog:
* infrun.h: Include common/byte-vector.h.
(struct displaced_step_closure): New struct.
(struct buf_displaced_step_closure): New struct.
* infrun.c (displaced_step_closure::~displaced_step_closure):
Provide default implementation.
(displaced_step_clear): Deallocate step closure with delete.
* aarch64-tdep.c (displaced_step_closure): Rename to ...
(aarch64_displaced_step_closure): ... this, extend
displaced_step_closure.
(aarch64_displaced_step_data) <dsc>: Change type to
aarch64_displaced_step_closure.
(aarch64_displaced_step_copy_insn): Adjust to type change, use
unique_ptr.
(aarch64_displaced_step_fixup): Add cast for displaced step
closure.
* amd64-tdep.c (displaced_step_closure): Rename to ...
(amd64_displaced_step_closure): ... this, extend
displaced_step_closure.
<insn_buf>: Change type to std::vector<gdb_byte>.
<max_len>: Remove.
(fixup_riprel): Change type of DSC parameter, adjust to type
change of insn_buf.
(fixup_displaced_copy): Change type of DSC parameter.
(amd64_displaced_step_copy_insn): Instantiate
amd64_displaced_step_closure.
(amd64_displaced_step_fixup): Add cast for closure type, adjust
to type change of insn_buf.
* arm-linux-tdep.c (arm_linux_cleanup_svc): Change type of
parameter DSC.
(arm_linux_copy_svc): Likewise.
(cleanup_kernel_helper_return): Likewise.
(arm_catch_kernel_helper_return): Likewise.
(arm_linux_displaced_step_copy_insn): Instantiate
arm_displaced_step_closure.
* arm-tdep.c (arm_pc_is_thumb): Add cast for closure.
(displaced_read_reg): Change type of parameter DSC.
(branch_write_pc): Likewise.
(load_write_pc): Likewise.
(alu_write_pc): Likewise.
(displaced_write_reg): Likewise.
(arm_copy_unmodified): Likewise.
(thumb_copy_unmodified_32bit): Likewise.
(thumb_copy_unmodified_16bit): Likewise.
(cleanup_preload): Likewise.
(install_preload): Likewise.
(arm_copy_preload): Likewise.
(thumb2_copy_preload): Likewise.
(install_preload_reg): Likewise.
(arm_copy_preload_reg): Likewise.
(cleanup_copro_load_store): Likewise.
(install_copro_load_store): Likewise.
(arm_copy_copro_load_store) Likewise.
(thumb2_copy_copro_load_store): Likewise.
(cleanup_branch): Likewise.
(install_b_bl_blx): Likewise.
(arm_copy_b_bl_blx): Likewise.
(thumb2_copy_b_bl_blx): Likewise.
(thumb_copy_b): Likewise.
(install_bx_blx_reg): Likewise.
(arm_copy_bx_blx_reg): Likewise.
(thumb_copy_bx_blx_reg): Likewise.
(cleanup_alu_imm): Likewise.
(arm_copy_alu_imm): Likewise.
(thumb2_copy_alu_imm): Likewise.
(cleanup_alu_reg): Likewise.
(install_alu_reg): Likewise.
(arm_copy_alu_reg): Likewise.
(thumb_copy_alu_reg): Likewise.
(cleanup_alu_shifted_reg): Likewise.
(install_alu_shifted_reg): Likewise.
(arm_copy_alu_shifted_reg): Likewise.
(cleanup_load): Likewise.
(cleanup_store): Likewise.
(arm_copy_extra_ld_st): Likewise.
(install_load_store): Likewise.
(thumb2_copy_load_literal): Likewise.
(thumb2_copy_load_reg_imm): Likewise.
(arm_copy_ldr_str_ldrb_strb): Likewise.
(cleanup_block_load_all): Likewise.
(cleanup_block_store_pc): Likewise.
(cleanup_block_load_pc): Likewise.
(arm_copy_block_xfer): Likewise.
(thumb2_copy_block_xfer): Likewise.
(cleanup_svc): Likewise.
(install_svc): Likewise.
(arm_copy_svc): Likewise.
(thumb_copy_svc): Likewise.
(arm_copy_undef): Likewise.
(thumb_32bit_copy_undef): Likewise.
(arm_copy_unpred): Likewise.
(arm_decode_misc_memhint_neon): Likewise.
(arm_decode_unconditional): Likewise.
(arm_decode_miscellaneous): Likewise.
(arm_decode_dp_misc): Likewise.
(arm_decode_ld_st_word_ubyte): Likewise.
(arm_decode_media): Likewise.
(arm_decode_b_bl_ldmstm): Likewise.
(arm_decode_ext_reg_ld_st): Likewise.
(thumb2_decode_dp_shift_reg): Likewise.
(thumb2_decode_ext_reg_ld_st): Likewise.
(arm_decode_svc_copro): Likewise.
(thumb2_decode_svc_copro): Likewise.
(install_pc_relative): Likewise.
(thumb_copy_pc_relative_16bit): Likewise.
(thumb_decode_pc_relative_16bit): Likewise.
(thumb_copy_pc_relative_32bit): Likewise.
(thumb_copy_16bit_ldr_literal): Likewise.
(thumb_copy_cbnz_cbz): Likewise.
(thumb2_copy_table_branch): Likewise.
(cleanup_pop_pc_16bit_all): Likewise.
(thumb_copy_pop_pc_16bit): Likewise.
(thumb_process_displaced_16bit_insn): Likewise.
(decode_thumb_32bit_ld_mem_hints): Likewise.
(thumb_process_displaced_32bit_insn): Likewise.
(thumb_process_displaced_insn): Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(arm_displaced_step_fixup): Add cast for closure.
* arm-tdep.h: Include infrun.h.
(displaced_step_closure): Rename to ...
(arm_displaced_step_closure): ... this, extend
displaced_step_closure.
<u::svc::copy_svc_os>: Change type of parameter DSC.
<cleanup>: Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(displaced_read_reg): Likewise.
(displaced_write_reg): Likewise.
* i386-linux-tdep.c (i386_linux_displaced_step_copy_insn):
Adjust.
* i386-tdep.h: Include infrun.h.
(i386_displaced_step_closure): New typedef.
* i386-tdep.c (i386_displaced_step_copy_insn): Use
i386_displaced_step_closure.
(i386_displaced_step_fixup): Adjust.
* rs6000-tdep.c (ppc_displaced_step_closure): New typedef.
(ppc_displaced_step_copy_insn): Use ppc_displaced_step_closure
and unique_ptr.
(ppc_displaced_step_fixup): Adjust.
* s390-linux-tdep.c (s390_displaced_step_closure): New typedef.
(s390_displaced_step_copy_insn): Use s390_displaced_step_closure
and unique_ptr.
(s390_displaced_step_fixup): Adjust.
2017-10-21 17:27:52 +02:00
|
|
|
|
int cond = 0;
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
|
|
|
|
|
/* PC adjustment offset after displaced stepping. */
|
Create a displaced_step_closure class hierarchy
displaced_step_closure is a type defined in multiple -tdep.c files.
Trying to xfree it from the common code (infrun.c) is a problem when we
try to poison xfree for non-POD types. Because there can be multiple of
these types in the same build, this patch makes a hierarchy of classes
with a virtual destructor. When the common code deletes the object
through a displaced_step_closure pointer, it will invoke the right
destructor.
The amd64 used a last-member array with a variable size. That doesn't
work with new, so I changed it for an std::vector. Other architectures
which used a simple byte buffer as a closure now use a shared
buf_displaced_step_closure, a closure type that only contains a
gdb::byte_vector.
Reg-tested on the buildbot.
gdb/ChangeLog:
* infrun.h: Include common/byte-vector.h.
(struct displaced_step_closure): New struct.
(struct buf_displaced_step_closure): New struct.
* infrun.c (displaced_step_closure::~displaced_step_closure):
Provide default implementation.
(displaced_step_clear): Deallocate step closure with delete.
* aarch64-tdep.c (displaced_step_closure): Rename to ...
(aarch64_displaced_step_closure): ... this, extend
displaced_step_closure.
(aarch64_displaced_step_data) <dsc>: Change type to
aarch64_displaced_step_closure.
(aarch64_displaced_step_copy_insn): Adjust to type change, use
unique_ptr.
(aarch64_displaced_step_fixup): Add cast for displaced step
closure.
* amd64-tdep.c (displaced_step_closure): Rename to ...
(amd64_displaced_step_closure): ... this, extend
displaced_step_closure.
<insn_buf>: Change type to std::vector<gdb_byte>.
<max_len>: Remove.
(fixup_riprel): Change type of DSC parameter, adjust to type
change of insn_buf.
(fixup_displaced_copy): Change type of DSC parameter.
(amd64_displaced_step_copy_insn): Instantiate
amd64_displaced_step_closure.
(amd64_displaced_step_fixup): Add cast for closure type, adjust
to type change of insn_buf.
* arm-linux-tdep.c (arm_linux_cleanup_svc): Change type of
parameter DSC.
(arm_linux_copy_svc): Likewise.
(cleanup_kernel_helper_return): Likewise.
(arm_catch_kernel_helper_return): Likewise.
(arm_linux_displaced_step_copy_insn): Instantiate
arm_displaced_step_closure.
* arm-tdep.c (arm_pc_is_thumb): Add cast for closure.
(displaced_read_reg): Change type of parameter DSC.
(branch_write_pc): Likewise.
(load_write_pc): Likewise.
(alu_write_pc): Likewise.
(displaced_write_reg): Likewise.
(arm_copy_unmodified): Likewise.
(thumb_copy_unmodified_32bit): Likewise.
(thumb_copy_unmodified_16bit): Likewise.
(cleanup_preload): Likewise.
(install_preload): Likewise.
(arm_copy_preload): Likewise.
(thumb2_copy_preload): Likewise.
(install_preload_reg): Likewise.
(arm_copy_preload_reg): Likewise.
(cleanup_copro_load_store): Likewise.
(install_copro_load_store): Likewise.
(arm_copy_copro_load_store) Likewise.
(thumb2_copy_copro_load_store): Likewise.
(cleanup_branch): Likewise.
(install_b_bl_blx): Likewise.
(arm_copy_b_bl_blx): Likewise.
(thumb2_copy_b_bl_blx): Likewise.
(thumb_copy_b): Likewise.
(install_bx_blx_reg): Likewise.
(arm_copy_bx_blx_reg): Likewise.
(thumb_copy_bx_blx_reg): Likewise.
(cleanup_alu_imm): Likewise.
(arm_copy_alu_imm): Likewise.
(thumb2_copy_alu_imm): Likewise.
(cleanup_alu_reg): Likewise.
(install_alu_reg): Likewise.
(arm_copy_alu_reg): Likewise.
(thumb_copy_alu_reg): Likewise.
(cleanup_alu_shifted_reg): Likewise.
(install_alu_shifted_reg): Likewise.
(arm_copy_alu_shifted_reg): Likewise.
(cleanup_load): Likewise.
(cleanup_store): Likewise.
(arm_copy_extra_ld_st): Likewise.
(install_load_store): Likewise.
(thumb2_copy_load_literal): Likewise.
(thumb2_copy_load_reg_imm): Likewise.
(arm_copy_ldr_str_ldrb_strb): Likewise.
(cleanup_block_load_all): Likewise.
(cleanup_block_store_pc): Likewise.
(cleanup_block_load_pc): Likewise.
(arm_copy_block_xfer): Likewise.
(thumb2_copy_block_xfer): Likewise.
(cleanup_svc): Likewise.
(install_svc): Likewise.
(arm_copy_svc): Likewise.
(thumb_copy_svc): Likewise.
(arm_copy_undef): Likewise.
(thumb_32bit_copy_undef): Likewise.
(arm_copy_unpred): Likewise.
(arm_decode_misc_memhint_neon): Likewise.
(arm_decode_unconditional): Likewise.
(arm_decode_miscellaneous): Likewise.
(arm_decode_dp_misc): Likewise.
(arm_decode_ld_st_word_ubyte): Likewise.
(arm_decode_media): Likewise.
(arm_decode_b_bl_ldmstm): Likewise.
(arm_decode_ext_reg_ld_st): Likewise.
(thumb2_decode_dp_shift_reg): Likewise.
(thumb2_decode_ext_reg_ld_st): Likewise.
(arm_decode_svc_copro): Likewise.
(thumb2_decode_svc_copro): Likewise.
(install_pc_relative): Likewise.
(thumb_copy_pc_relative_16bit): Likewise.
(thumb_decode_pc_relative_16bit): Likewise.
(thumb_copy_pc_relative_32bit): Likewise.
(thumb_copy_16bit_ldr_literal): Likewise.
(thumb_copy_cbnz_cbz): Likewise.
(thumb2_copy_table_branch): Likewise.
(cleanup_pop_pc_16bit_all): Likewise.
(thumb_copy_pop_pc_16bit): Likewise.
(thumb_process_displaced_16bit_insn): Likewise.
(decode_thumb_32bit_ld_mem_hints): Likewise.
(thumb_process_displaced_32bit_insn): Likewise.
(thumb_process_displaced_insn): Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(arm_displaced_step_fixup): Add cast for closure.
* arm-tdep.h: Include infrun.h.
(displaced_step_closure): Rename to ...
(arm_displaced_step_closure): ... this, extend
displaced_step_closure.
<u::svc::copy_svc_os>: Change type of parameter DSC.
<cleanup>: Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(displaced_read_reg): Likewise.
(displaced_write_reg): Likewise.
* i386-linux-tdep.c (i386_linux_displaced_step_copy_insn):
Adjust.
* i386-tdep.h: Include infrun.h.
(i386_displaced_step_closure): New typedef.
* i386-tdep.c (i386_displaced_step_copy_insn): Use
i386_displaced_step_closure.
(i386_displaced_step_fixup): Adjust.
* rs6000-tdep.c (ppc_displaced_step_closure): New typedef.
(ppc_displaced_step_copy_insn): Use ppc_displaced_step_closure
and unique_ptr.
(ppc_displaced_step_fixup): Adjust.
* s390-linux-tdep.c (s390_displaced_step_closure): New typedef.
(s390_displaced_step_copy_insn): Use s390_displaced_step_closure
and unique_ptr.
(s390_displaced_step_fixup): Adjust.
2017-10-21 17:27:52 +02:00
|
|
|
|
int32_t pc_adjust = 0;
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* Data when visiting instructions for displaced stepping. */
|
|
|
|
|
|
|
|
|
|
struct aarch64_displaced_step_data
|
|
|
|
|
{
|
|
|
|
|
struct aarch64_insn_data base;
|
|
|
|
|
|
|
|
|
|
/* The address where the instruction will be executed at. */
|
|
|
|
|
CORE_ADDR new_addr;
|
|
|
|
|
/* Buffer of instructions to be copied to NEW_ADDR to execute. */
|
2019-07-04 13:41:20 +02:00
|
|
|
|
uint32_t insn_buf[AARCH64_DISPLACED_MODIFIED_INSNS];
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
/* Number of instructions in INSN_BUF. */
|
|
|
|
|
unsigned insn_count;
|
|
|
|
|
/* Registers when doing displaced stepping. */
|
|
|
|
|
struct regcache *regs;
|
|
|
|
|
|
Create a displaced_step_closure class hierarchy
displaced_step_closure is a type defined in multiple -tdep.c files.
Trying to xfree it from the common code (infrun.c) is a problem when we
try to poison xfree for non-POD types. Because there can be multiple of
these types in the same build, this patch makes a hierarchy of classes
with a virtual destructor. When the common code deletes the object
through a displaced_step_closure pointer, it will invoke the right
destructor.
The amd64 used a last-member array with a variable size. That doesn't
work with new, so I changed it for an std::vector. Other architectures
which used a simple byte buffer as a closure now use a shared
buf_displaced_step_closure, a closure type that only contains a
gdb::byte_vector.
Reg-tested on the buildbot.
gdb/ChangeLog:
* infrun.h: Include common/byte-vector.h.
(struct displaced_step_closure): New struct.
(struct buf_displaced_step_closure): New struct.
* infrun.c (displaced_step_closure::~displaced_step_closure):
Provide default implementation.
(displaced_step_clear): Deallocate step closure with delete.
* aarch64-tdep.c (displaced_step_closure): Rename to ...
(aarch64_displaced_step_closure): ... this, extend
displaced_step_closure.
(aarch64_displaced_step_data) <dsc>: Change type to
aarch64_displaced_step_closure.
(aarch64_displaced_step_copy_insn): Adjust to type change, use
unique_ptr.
(aarch64_displaced_step_fixup): Add cast for displaced step
closure.
* amd64-tdep.c (displaced_step_closure): Rename to ...
(amd64_displaced_step_closure): ... this, extend
displaced_step_closure.
<insn_buf>: Change type to std::vector<gdb_byte>.
<max_len>: Remove.
(fixup_riprel): Change type of DSC parameter, adjust to type
change of insn_buf.
(fixup_displaced_copy): Change type of DSC parameter.
(amd64_displaced_step_copy_insn): Instantiate
amd64_displaced_step_closure.
(amd64_displaced_step_fixup): Add cast for closure type, adjust
to type change of insn_buf.
* arm-linux-tdep.c (arm_linux_cleanup_svc): Change type of
parameter DSC.
(arm_linux_copy_svc): Likewise.
(cleanup_kernel_helper_return): Likewise.
(arm_catch_kernel_helper_return): Likewise.
(arm_linux_displaced_step_copy_insn): Instantiate
arm_displaced_step_closure.
* arm-tdep.c (arm_pc_is_thumb): Add cast for closure.
(displaced_read_reg): Change type of parameter DSC.
(branch_write_pc): Likewise.
(load_write_pc): Likewise.
(alu_write_pc): Likewise.
(displaced_write_reg): Likewise.
(arm_copy_unmodified): Likewise.
(thumb_copy_unmodified_32bit): Likewise.
(thumb_copy_unmodified_16bit): Likewise.
(cleanup_preload): Likewise.
(install_preload): Likewise.
(arm_copy_preload): Likewise.
(thumb2_copy_preload): Likewise.
(install_preload_reg): Likewise.
(arm_copy_preload_reg): Likewise.
(cleanup_copro_load_store): Likewise.
(install_copro_load_store): Likewise.
(arm_copy_copro_load_store) Likewise.
(thumb2_copy_copro_load_store): Likewise.
(cleanup_branch): Likewise.
(install_b_bl_blx): Likewise.
(arm_copy_b_bl_blx): Likewise.
(thumb2_copy_b_bl_blx): Likewise.
(thumb_copy_b): Likewise.
(install_bx_blx_reg): Likewise.
(arm_copy_bx_blx_reg): Likewise.
(thumb_copy_bx_blx_reg): Likewise.
(cleanup_alu_imm): Likewise.
(arm_copy_alu_imm): Likewise.
(thumb2_copy_alu_imm): Likewise.
(cleanup_alu_reg): Likewise.
(install_alu_reg): Likewise.
(arm_copy_alu_reg): Likewise.
(thumb_copy_alu_reg): Likewise.
(cleanup_alu_shifted_reg): Likewise.
(install_alu_shifted_reg): Likewise.
(arm_copy_alu_shifted_reg): Likewise.
(cleanup_load): Likewise.
(cleanup_store): Likewise.
(arm_copy_extra_ld_st): Likewise.
(install_load_store): Likewise.
(thumb2_copy_load_literal): Likewise.
(thumb2_copy_load_reg_imm): Likewise.
(arm_copy_ldr_str_ldrb_strb): Likewise.
(cleanup_block_load_all): Likewise.
(cleanup_block_store_pc): Likewise.
(cleanup_block_load_pc): Likewise.
(arm_copy_block_xfer): Likewise.
(thumb2_copy_block_xfer): Likewise.
(cleanup_svc): Likewise.
(install_svc): Likewise.
(arm_copy_svc): Likewise.
(thumb_copy_svc): Likewise.
(arm_copy_undef): Likewise.
(thumb_32bit_copy_undef): Likewise.
(arm_copy_unpred): Likewise.
(arm_decode_misc_memhint_neon): Likewise.
(arm_decode_unconditional): Likewise.
(arm_decode_miscellaneous): Likewise.
(arm_decode_dp_misc): Likewise.
(arm_decode_ld_st_word_ubyte): Likewise.
(arm_decode_media): Likewise.
(arm_decode_b_bl_ldmstm): Likewise.
(arm_decode_ext_reg_ld_st): Likewise.
(thumb2_decode_dp_shift_reg): Likewise.
(thumb2_decode_ext_reg_ld_st): Likewise.
(arm_decode_svc_copro): Likewise.
(thumb2_decode_svc_copro): Likewise.
(install_pc_relative): Likewise.
(thumb_copy_pc_relative_16bit): Likewise.
(thumb_decode_pc_relative_16bit): Likewise.
(thumb_copy_pc_relative_32bit): Likewise.
(thumb_copy_16bit_ldr_literal): Likewise.
(thumb_copy_cbnz_cbz): Likewise.
(thumb2_copy_table_branch): Likewise.
(cleanup_pop_pc_16bit_all): Likewise.
(thumb_copy_pop_pc_16bit): Likewise.
(thumb_process_displaced_16bit_insn): Likewise.
(decode_thumb_32bit_ld_mem_hints): Likewise.
(thumb_process_displaced_32bit_insn): Likewise.
(thumb_process_displaced_insn): Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(arm_displaced_step_fixup): Add cast for closure.
* arm-tdep.h: Include infrun.h.
(displaced_step_closure): Rename to ...
(arm_displaced_step_closure): ... this, extend
displaced_step_closure.
<u::svc::copy_svc_os>: Change type of parameter DSC.
<cleanup>: Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(displaced_read_reg): Likewise.
(displaced_write_reg): Likewise.
* i386-linux-tdep.c (i386_linux_displaced_step_copy_insn):
Adjust.
* i386-tdep.h: Include infrun.h.
(i386_displaced_step_closure): New typedef.
* i386-tdep.c (i386_displaced_step_copy_insn): Use
i386_displaced_step_closure.
(i386_displaced_step_fixup): Adjust.
* rs6000-tdep.c (ppc_displaced_step_closure): New typedef.
(ppc_displaced_step_copy_insn): Use ppc_displaced_step_closure
and unique_ptr.
(ppc_displaced_step_fixup): Adjust.
* s390-linux-tdep.c (s390_displaced_step_closure): New typedef.
(s390_displaced_step_copy_insn): Use s390_displaced_step_closure
and unique_ptr.
(s390_displaced_step_fixup): Adjust.
2017-10-21 17:27:52 +02:00
|
|
|
|
aarch64_displaced_step_closure *dsc;
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* Implementation of aarch64_insn_visitor method "b". */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_displaced_step_b (const int is_bl, const int32_t offset,
|
|
|
|
|
struct aarch64_insn_data *data)
|
|
|
|
|
{
|
|
|
|
|
struct aarch64_displaced_step_data *dsd
|
|
|
|
|
= (struct aarch64_displaced_step_data *) data;
|
2016-06-28 18:24:25 +02:00
|
|
|
|
int64_t new_offset = data->insn_addr - dsd->new_addr + offset;
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
|
|
|
|
|
if (can_encode_int32 (new_offset, 28))
|
|
|
|
|
{
|
|
|
|
|
/* Emit B rather than BL, because executing BL on a new address
|
|
|
|
|
will get the wrong address into LR. In order to avoid this,
|
|
|
|
|
we emit B, and update LR if the instruction is BL. */
|
|
|
|
|
emit_b (dsd->insn_buf, 0, new_offset);
|
|
|
|
|
dsd->insn_count++;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
/* Write NOP. */
|
|
|
|
|
emit_nop (dsd->insn_buf);
|
|
|
|
|
dsd->insn_count++;
|
|
|
|
|
dsd->dsc->pc_adjust = offset;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (is_bl)
|
|
|
|
|
{
|
|
|
|
|
/* Update LR. */
|
|
|
|
|
regcache_cooked_write_unsigned (dsd->regs, AARCH64_LR_REGNUM,
|
|
|
|
|
data->insn_addr + 4);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implementation of aarch64_insn_visitor method "b_cond". */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_displaced_step_b_cond (const unsigned cond, const int32_t offset,
|
|
|
|
|
struct aarch64_insn_data *data)
|
|
|
|
|
{
|
|
|
|
|
struct aarch64_displaced_step_data *dsd
|
|
|
|
|
= (struct aarch64_displaced_step_data *) data;
|
|
|
|
|
|
|
|
|
|
/* GDB has to fix up PC after displaced step this instruction
|
|
|
|
|
differently according to the condition is true or false. Instead
|
|
|
|
|
of checking COND against conditional flags, we can use
|
|
|
|
|
the following instructions, and GDB can tell how to fix up PC
|
|
|
|
|
according to the PC value.
|
|
|
|
|
|
|
|
|
|
B.COND TAKEN ; If cond is true, then jump to TAKEN.
|
|
|
|
|
INSN1 ;
|
|
|
|
|
TAKEN:
|
|
|
|
|
INSN2
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
emit_bcond (dsd->insn_buf, cond, 8);
|
|
|
|
|
dsd->dsc->cond = 1;
|
|
|
|
|
dsd->dsc->pc_adjust = offset;
|
|
|
|
|
dsd->insn_count = 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Dynamically allocate a new register. If we know the register
|
|
|
|
|
statically, we should make it a global as above instead of using this
|
|
|
|
|
helper function. */
|
|
|
|
|
|
|
|
|
|
static struct aarch64_register
|
|
|
|
|
aarch64_register (unsigned num, int is64)
|
|
|
|
|
{
|
|
|
|
|
return (struct aarch64_register) { num, is64 };
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implementation of aarch64_insn_visitor method "cb". */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_displaced_step_cb (const int32_t offset, const int is_cbnz,
|
|
|
|
|
const unsigned rn, int is64,
|
|
|
|
|
struct aarch64_insn_data *data)
|
|
|
|
|
{
|
|
|
|
|
struct aarch64_displaced_step_data *dsd
|
|
|
|
|
= (struct aarch64_displaced_step_data *) data;
|
|
|
|
|
|
|
|
|
|
/* The offset is out of range for a compare and branch
|
|
|
|
|
instruction. We can use the following instructions instead:
|
|
|
|
|
|
|
|
|
|
CBZ xn, TAKEN ; xn == 0, then jump to TAKEN.
|
|
|
|
|
INSN1 ;
|
|
|
|
|
TAKEN:
|
|
|
|
|
INSN2
|
|
|
|
|
*/
|
|
|
|
|
emit_cb (dsd->insn_buf, is_cbnz, aarch64_register (rn, is64), 8);
|
|
|
|
|
dsd->insn_count = 1;
|
|
|
|
|
dsd->dsc->cond = 1;
|
|
|
|
|
dsd->dsc->pc_adjust = offset;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implementation of aarch64_insn_visitor method "tb". */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_displaced_step_tb (const int32_t offset, int is_tbnz,
|
|
|
|
|
const unsigned rt, unsigned bit,
|
|
|
|
|
struct aarch64_insn_data *data)
|
|
|
|
|
{
|
|
|
|
|
struct aarch64_displaced_step_data *dsd
|
|
|
|
|
= (struct aarch64_displaced_step_data *) data;
|
|
|
|
|
|
|
|
|
|
/* The offset is out of range for a test bit and branch
|
|
|
|
|
instruction We can use the following instructions instead:
|
|
|
|
|
|
|
|
|
|
TBZ xn, #bit, TAKEN ; xn[bit] == 0, then jump to TAKEN.
|
|
|
|
|
INSN1 ;
|
|
|
|
|
TAKEN:
|
|
|
|
|
INSN2
|
|
|
|
|
|
|
|
|
|
*/
|
|
|
|
|
emit_tb (dsd->insn_buf, is_tbnz, bit, aarch64_register (rt, 1), 8);
|
|
|
|
|
dsd->insn_count = 1;
|
|
|
|
|
dsd->dsc->cond = 1;
|
|
|
|
|
dsd->dsc->pc_adjust = offset;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implementation of aarch64_insn_visitor method "adr". */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_displaced_step_adr (const int32_t offset, const unsigned rd,
|
|
|
|
|
const int is_adrp, struct aarch64_insn_data *data)
|
|
|
|
|
{
|
|
|
|
|
struct aarch64_displaced_step_data *dsd
|
|
|
|
|
= (struct aarch64_displaced_step_data *) data;
|
|
|
|
|
/* We know exactly the address the ADR{P,} instruction will compute.
|
|
|
|
|
We can just write it to the destination register. */
|
|
|
|
|
CORE_ADDR address = data->insn_addr + offset;
|
|
|
|
|
|
|
|
|
|
if (is_adrp)
|
|
|
|
|
{
|
|
|
|
|
/* Clear the lower 12 bits of the offset to get the 4K page. */
|
|
|
|
|
regcache_cooked_write_unsigned (dsd->regs, AARCH64_X0_REGNUM + rd,
|
|
|
|
|
address & ~0xfff);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
regcache_cooked_write_unsigned (dsd->regs, AARCH64_X0_REGNUM + rd,
|
|
|
|
|
address);
|
|
|
|
|
|
|
|
|
|
dsd->dsc->pc_adjust = 4;
|
|
|
|
|
emit_nop (dsd->insn_buf);
|
|
|
|
|
dsd->insn_count = 1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implementation of aarch64_insn_visitor method "ldr_literal". */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_displaced_step_ldr_literal (const int32_t offset, const int is_sw,
|
|
|
|
|
const unsigned rt, const int is64,
|
|
|
|
|
struct aarch64_insn_data *data)
|
|
|
|
|
{
|
|
|
|
|
struct aarch64_displaced_step_data *dsd
|
|
|
|
|
= (struct aarch64_displaced_step_data *) data;
|
|
|
|
|
CORE_ADDR address = data->insn_addr + offset;
|
|
|
|
|
struct aarch64_memory_operand zero = { MEMORY_OPERAND_OFFSET, 0 };
|
|
|
|
|
|
|
|
|
|
regcache_cooked_write_unsigned (dsd->regs, AARCH64_X0_REGNUM + rt,
|
|
|
|
|
address);
|
|
|
|
|
|
|
|
|
|
if (is_sw)
|
|
|
|
|
dsd->insn_count = emit_ldrsw (dsd->insn_buf, aarch64_register (rt, 1),
|
|
|
|
|
aarch64_register (rt, 1), zero);
|
|
|
|
|
else
|
|
|
|
|
dsd->insn_count = emit_ldr (dsd->insn_buf, aarch64_register (rt, is64),
|
|
|
|
|
aarch64_register (rt, 1), zero);
|
|
|
|
|
|
|
|
|
|
dsd->dsc->pc_adjust = 4;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implementation of aarch64_insn_visitor method "others". */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_displaced_step_others (const uint32_t insn,
|
|
|
|
|
struct aarch64_insn_data *data)
|
|
|
|
|
{
|
|
|
|
|
struct aarch64_displaced_step_data *dsd
|
|
|
|
|
= (struct aarch64_displaced_step_data *) data;
|
|
|
|
|
|
2015-10-12 12:28:39 +02:00
|
|
|
|
aarch64_emit_insn (dsd->insn_buf, insn);
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
dsd->insn_count = 1;
|
|
|
|
|
|
|
|
|
|
if ((insn & 0xfffffc1f) == 0xd65f0000)
|
|
|
|
|
{
|
|
|
|
|
/* RET */
|
|
|
|
|
dsd->dsc->pc_adjust = 0;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
dsd->dsc->pc_adjust = 4;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static const struct aarch64_insn_visitor visitor =
|
|
|
|
|
{
|
|
|
|
|
aarch64_displaced_step_b,
|
|
|
|
|
aarch64_displaced_step_b_cond,
|
|
|
|
|
aarch64_displaced_step_cb,
|
|
|
|
|
aarch64_displaced_step_tb,
|
|
|
|
|
aarch64_displaced_step_adr,
|
|
|
|
|
aarch64_displaced_step_ldr_literal,
|
|
|
|
|
aarch64_displaced_step_others,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* Implement the "displaced_step_copy_insn" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
struct displaced_step_closure *
|
|
|
|
|
aarch64_displaced_step_copy_insn (struct gdbarch *gdbarch,
|
|
|
|
|
CORE_ADDR from, CORE_ADDR to,
|
|
|
|
|
struct regcache *regs)
|
|
|
|
|
{
|
|
|
|
|
enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
|
|
|
|
|
uint32_t insn = read_memory_unsigned_integer (from, 4, byte_order_for_code);
|
|
|
|
|
struct aarch64_displaced_step_data dsd;
|
2015-11-05 10:44:32 +01:00
|
|
|
|
aarch64_inst inst;
|
|
|
|
|
|
Modify AArch64 Assembly and disassembly functions to be able to fail and report why.
This patch if the first patch in a series to add the ability to add constraints
to system registers that an instruction must adhere to in order for the register
to be usable with that instruction.
These constraints can also be used to disambiguate between registers with the
same encoding during disassembly.
This patch adds a new flags entry in the sysreg structures and ensures it is
filled in and read out during assembly/disassembly. It also adds the ability for
the assemble and disassemble functions to be able to gracefully fail and re-use
the existing error reporting infrastructure.
The return type of these functions are changed to a boolean to denote success or
failure and the error structure is passed around to them. This requires
aarch64-gen changes so a lot of the changes here are just mechanical.
gas/
PR binutils/21446
* config/tc-aarch64.c (parse_sys_reg): Return register flags.
(parse_operands): Fill in register flags.
gdb/
PR binutils/21446
* aarch64-tdep.c (aarch64_analyze_prologue,
aarch64_software_single_step, aarch64_displaced_step_copy_insn):
Indicate not interested in errors.
include/
PR binutils/21446
* opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
(aarch64_decode_insn): Accept error struct.
opcodes/
PR binutils/21446
* aarch64-asm.h (aarch64_insert_operand, aarch64_##x): Return boolean
and take error struct.
* aarch64-asm.c (aarch64_ext_regno, aarch64_ins_reglane,
aarch64_ins_reglist, aarch64_ins_ldst_reglist,
aarch64_ins_ldst_reglist_r, aarch64_ins_ldst_elemlist,
aarch64_ins_advsimd_imm_shift, aarch64_ins_imm, aarch64_ins_imm_half,
aarch64_ins_advsimd_imm_modified, aarch64_ins_fpimm,
aarch64_ins_imm_rotate1, aarch64_ins_imm_rotate2, aarch64_ins_fbits,
aarch64_ins_aimm, aarch64_ins_limm_1, aarch64_ins_limm,
aarch64_ins_inv_limm, aarch64_ins_ft, aarch64_ins_addr_simple,
aarch64_ins_addr_regoff, aarch64_ins_addr_offset, aarch64_ins_addr_simm,
aarch64_ins_addr_simm10, aarch64_ins_addr_uimm12,
aarch64_ins_simd_addr_post, aarch64_ins_cond, aarch64_ins_sysreg,
aarch64_ins_pstatefield, aarch64_ins_sysins_op, aarch64_ins_barrier,
aarch64_ins_prfop, aarch64_ins_hint, aarch64_ins_reg_extended,
aarch64_ins_reg_shifted, aarch64_ins_sve_addr_ri_s4xvl,
aarch64_ins_sve_addr_ri_s6xvl, aarch64_ins_sve_addr_ri_s9xvl,
aarch64_ins_sve_addr_ri_s4, aarch64_ins_sve_addr_ri_u6,
aarch64_ins_sve_addr_rr_lsl, aarch64_ins_sve_addr_rz_xtw,
aarch64_ins_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
aarch64_ins_sve_addr_zz_lsl, aarch64_ins_sve_addr_zz_sxtw,
aarch64_ins_sve_addr_zz_uxtw, aarch64_ins_sve_aimm,
aarch64_ins_sve_asimm, aarch64_ins_sve_index, aarch64_ins_sve_limm_mov,
aarch64_ins_sve_quad_index, aarch64_ins_sve_reglist,
aarch64_ins_sve_scale, aarch64_ins_sve_shlimm, aarch64_ins_sve_shrimm,
aarch64_ins_sve_float_half_one, aarch64_ins_sve_float_half_two,
aarch64_ins_sve_float_zero_one, aarch64_opcode_encode): Likewise.
* aarch64-dis.h (aarch64_extract_operand, aarch64_##x): Likewise.
* aarch64-dis.c (aarch64_ext_regno, aarch64_ext_reglane,
aarch64_ext_reglist, aarch64_ext_ldst_reglist,
aarch64_ext_ldst_reglist_r, aarch64_ext_ldst_elemlist,
aarch64_ext_advsimd_imm_shift, aarch64_ext_imm, aarch64_ext_imm_half,
aarch64_ext_advsimd_imm_modified, aarch64_ext_fpimm,
aarch64_ext_imm_rotate1, aarch64_ext_imm_rotate2, aarch64_ext_fbits,
aarch64_ext_aimm, aarch64_ext_limm_1, aarch64_ext_limm, decode_limm,
aarch64_ext_inv_limm, aarch64_ext_ft, aarch64_ext_addr_simple,
aarch64_ext_addr_regoff, aarch64_ext_addr_offset, aarch64_ext_addr_simm,
aarch64_ext_addr_simm10, aarch64_ext_addr_uimm12,
aarch64_ext_simd_addr_post, aarch64_ext_cond, aarch64_ext_sysreg,
aarch64_ext_pstatefield, aarch64_ext_sysins_op, aarch64_ext_barrier,
aarch64_ext_prfop, aarch64_ext_hint, aarch64_ext_reg_extended,
aarch64_ext_reg_shifted, aarch64_ext_sve_addr_ri_s4xvl,
aarch64_ext_sve_addr_ri_s6xvl, aarch64_ext_sve_addr_ri_s9xvl,
aarch64_ext_sve_addr_ri_s4, aarch64_ext_sve_addr_ri_u6,
aarch64_ext_sve_addr_rr_lsl, aarch64_ext_sve_addr_rz_xtw,
aarch64_ext_sve_addr_zi_u5, aarch64_ext_sve_addr_zz,
aarch64_ext_sve_addr_zz_lsl, aarch64_ext_sve_addr_zz_sxtw,
aarch64_ext_sve_addr_zz_uxtw, aarch64_ext_sve_aimm,
aarch64_ext_sve_asimm, aarch64_ext_sve_index, aarch64_ext_sve_limm_mov,
aarch64_ext_sve_quad_index, aarch64_ext_sve_reglist,
aarch64_ext_sve_scale, aarch64_ext_sve_shlimm, aarch64_ext_sve_shrimm,
aarch64_ext_sve_float_half_one, aarch64_ext_sve_float_half_two,
aarch64_ext_sve_float_zero_one, aarch64_opcode_decode): Likewise.
(determine_disassembling_preference, aarch64_decode_insn,
print_insn_aarch64_word, print_insn_data): Take errors struct.
(print_insn_aarch64): Use errors.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-gen.c (print_operand_inserter): Use errors and change type to
boolean in aarch64_insert_operan.
(print_operand_extractor): Likewise.
* aarch64-opc.c (aarch64_print_operand): Use sysreg struct.
2018-05-15 17:11:42 +02:00
|
|
|
|
if (aarch64_decode_insn (insn, &inst, 1, NULL) != 0)
|
2015-11-05 10:44:32 +01:00
|
|
|
|
return NULL;
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
|
|
|
|
|
/* Look for a Load Exclusive instruction which begins the sequence. */
|
2015-11-05 10:44:32 +01:00
|
|
|
|
if (inst.opcode->iclass == ldstexcl && bit (insn, 22))
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
{
|
|
|
|
|
/* We can't displaced step atomic sequences. */
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
|
Create a displaced_step_closure class hierarchy
displaced_step_closure is a type defined in multiple -tdep.c files.
Trying to xfree it from the common code (infrun.c) is a problem when we
try to poison xfree for non-POD types. Because there can be multiple of
these types in the same build, this patch makes a hierarchy of classes
with a virtual destructor. When the common code deletes the object
through a displaced_step_closure pointer, it will invoke the right
destructor.
The amd64 used a last-member array with a variable size. That doesn't
work with new, so I changed it for an std::vector. Other architectures
which used a simple byte buffer as a closure now use a shared
buf_displaced_step_closure, a closure type that only contains a
gdb::byte_vector.
Reg-tested on the buildbot.
gdb/ChangeLog:
* infrun.h: Include common/byte-vector.h.
(struct displaced_step_closure): New struct.
(struct buf_displaced_step_closure): New struct.
* infrun.c (displaced_step_closure::~displaced_step_closure):
Provide default implementation.
(displaced_step_clear): Deallocate step closure with delete.
* aarch64-tdep.c (displaced_step_closure): Rename to ...
(aarch64_displaced_step_closure): ... this, extend
displaced_step_closure.
(aarch64_displaced_step_data) <dsc>: Change type to
aarch64_displaced_step_closure.
(aarch64_displaced_step_copy_insn): Adjust to type change, use
unique_ptr.
(aarch64_displaced_step_fixup): Add cast for displaced step
closure.
* amd64-tdep.c (displaced_step_closure): Rename to ...
(amd64_displaced_step_closure): ... this, extend
displaced_step_closure.
<insn_buf>: Change type to std::vector<gdb_byte>.
<max_len>: Remove.
(fixup_riprel): Change type of DSC parameter, adjust to type
change of insn_buf.
(fixup_displaced_copy): Change type of DSC parameter.
(amd64_displaced_step_copy_insn): Instantiate
amd64_displaced_step_closure.
(amd64_displaced_step_fixup): Add cast for closure type, adjust
to type change of insn_buf.
* arm-linux-tdep.c (arm_linux_cleanup_svc): Change type of
parameter DSC.
(arm_linux_copy_svc): Likewise.
(cleanup_kernel_helper_return): Likewise.
(arm_catch_kernel_helper_return): Likewise.
(arm_linux_displaced_step_copy_insn): Instantiate
arm_displaced_step_closure.
* arm-tdep.c (arm_pc_is_thumb): Add cast for closure.
(displaced_read_reg): Change type of parameter DSC.
(branch_write_pc): Likewise.
(load_write_pc): Likewise.
(alu_write_pc): Likewise.
(displaced_write_reg): Likewise.
(arm_copy_unmodified): Likewise.
(thumb_copy_unmodified_32bit): Likewise.
(thumb_copy_unmodified_16bit): Likewise.
(cleanup_preload): Likewise.
(install_preload): Likewise.
(arm_copy_preload): Likewise.
(thumb2_copy_preload): Likewise.
(install_preload_reg): Likewise.
(arm_copy_preload_reg): Likewise.
(cleanup_copro_load_store): Likewise.
(install_copro_load_store): Likewise.
(arm_copy_copro_load_store) Likewise.
(thumb2_copy_copro_load_store): Likewise.
(cleanup_branch): Likewise.
(install_b_bl_blx): Likewise.
(arm_copy_b_bl_blx): Likewise.
(thumb2_copy_b_bl_blx): Likewise.
(thumb_copy_b): Likewise.
(install_bx_blx_reg): Likewise.
(arm_copy_bx_blx_reg): Likewise.
(thumb_copy_bx_blx_reg): Likewise.
(cleanup_alu_imm): Likewise.
(arm_copy_alu_imm): Likewise.
(thumb2_copy_alu_imm): Likewise.
(cleanup_alu_reg): Likewise.
(install_alu_reg): Likewise.
(arm_copy_alu_reg): Likewise.
(thumb_copy_alu_reg): Likewise.
(cleanup_alu_shifted_reg): Likewise.
(install_alu_shifted_reg): Likewise.
(arm_copy_alu_shifted_reg): Likewise.
(cleanup_load): Likewise.
(cleanup_store): Likewise.
(arm_copy_extra_ld_st): Likewise.
(install_load_store): Likewise.
(thumb2_copy_load_literal): Likewise.
(thumb2_copy_load_reg_imm): Likewise.
(arm_copy_ldr_str_ldrb_strb): Likewise.
(cleanup_block_load_all): Likewise.
(cleanup_block_store_pc): Likewise.
(cleanup_block_load_pc): Likewise.
(arm_copy_block_xfer): Likewise.
(thumb2_copy_block_xfer): Likewise.
(cleanup_svc): Likewise.
(install_svc): Likewise.
(arm_copy_svc): Likewise.
(thumb_copy_svc): Likewise.
(arm_copy_undef): Likewise.
(thumb_32bit_copy_undef): Likewise.
(arm_copy_unpred): Likewise.
(arm_decode_misc_memhint_neon): Likewise.
(arm_decode_unconditional): Likewise.
(arm_decode_miscellaneous): Likewise.
(arm_decode_dp_misc): Likewise.
(arm_decode_ld_st_word_ubyte): Likewise.
(arm_decode_media): Likewise.
(arm_decode_b_bl_ldmstm): Likewise.
(arm_decode_ext_reg_ld_st): Likewise.
(thumb2_decode_dp_shift_reg): Likewise.
(thumb2_decode_ext_reg_ld_st): Likewise.
(arm_decode_svc_copro): Likewise.
(thumb2_decode_svc_copro): Likewise.
(install_pc_relative): Likewise.
(thumb_copy_pc_relative_16bit): Likewise.
(thumb_decode_pc_relative_16bit): Likewise.
(thumb_copy_pc_relative_32bit): Likewise.
(thumb_copy_16bit_ldr_literal): Likewise.
(thumb_copy_cbnz_cbz): Likewise.
(thumb2_copy_table_branch): Likewise.
(cleanup_pop_pc_16bit_all): Likewise.
(thumb_copy_pop_pc_16bit): Likewise.
(thumb_process_displaced_16bit_insn): Likewise.
(decode_thumb_32bit_ld_mem_hints): Likewise.
(thumb_process_displaced_32bit_insn): Likewise.
(thumb_process_displaced_insn): Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(arm_displaced_step_fixup): Add cast for closure.
* arm-tdep.h: Include infrun.h.
(displaced_step_closure): Rename to ...
(arm_displaced_step_closure): ... this, extend
displaced_step_closure.
<u::svc::copy_svc_os>: Change type of parameter DSC.
<cleanup>: Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(displaced_read_reg): Likewise.
(displaced_write_reg): Likewise.
* i386-linux-tdep.c (i386_linux_displaced_step_copy_insn):
Adjust.
* i386-tdep.h: Include infrun.h.
(i386_displaced_step_closure): New typedef.
* i386-tdep.c (i386_displaced_step_copy_insn): Use
i386_displaced_step_closure.
(i386_displaced_step_fixup): Adjust.
* rs6000-tdep.c (ppc_displaced_step_closure): New typedef.
(ppc_displaced_step_copy_insn): Use ppc_displaced_step_closure
and unique_ptr.
(ppc_displaced_step_fixup): Adjust.
* s390-linux-tdep.c (s390_displaced_step_closure): New typedef.
(s390_displaced_step_copy_insn): Use s390_displaced_step_closure
and unique_ptr.
(s390_displaced_step_fixup): Adjust.
2017-10-21 17:27:52 +02:00
|
|
|
|
std::unique_ptr<aarch64_displaced_step_closure> dsc
|
|
|
|
|
(new aarch64_displaced_step_closure);
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
dsd.base.insn_addr = from;
|
|
|
|
|
dsd.new_addr = to;
|
|
|
|
|
dsd.regs = regs;
|
Create a displaced_step_closure class hierarchy
displaced_step_closure is a type defined in multiple -tdep.c files.
Trying to xfree it from the common code (infrun.c) is a problem when we
try to poison xfree for non-POD types. Because there can be multiple of
these types in the same build, this patch makes a hierarchy of classes
with a virtual destructor. When the common code deletes the object
through a displaced_step_closure pointer, it will invoke the right
destructor.
The amd64 used a last-member array with a variable size. That doesn't
work with new, so I changed it for an std::vector. Other architectures
which used a simple byte buffer as a closure now use a shared
buf_displaced_step_closure, a closure type that only contains a
gdb::byte_vector.
Reg-tested on the buildbot.
gdb/ChangeLog:
* infrun.h: Include common/byte-vector.h.
(struct displaced_step_closure): New struct.
(struct buf_displaced_step_closure): New struct.
* infrun.c (displaced_step_closure::~displaced_step_closure):
Provide default implementation.
(displaced_step_clear): Deallocate step closure with delete.
* aarch64-tdep.c (displaced_step_closure): Rename to ...
(aarch64_displaced_step_closure): ... this, extend
displaced_step_closure.
(aarch64_displaced_step_data) <dsc>: Change type to
aarch64_displaced_step_closure.
(aarch64_displaced_step_copy_insn): Adjust to type change, use
unique_ptr.
(aarch64_displaced_step_fixup): Add cast for displaced step
closure.
* amd64-tdep.c (displaced_step_closure): Rename to ...
(amd64_displaced_step_closure): ... this, extend
displaced_step_closure.
<insn_buf>: Change type to std::vector<gdb_byte>.
<max_len>: Remove.
(fixup_riprel): Change type of DSC parameter, adjust to type
change of insn_buf.
(fixup_displaced_copy): Change type of DSC parameter.
(amd64_displaced_step_copy_insn): Instantiate
amd64_displaced_step_closure.
(amd64_displaced_step_fixup): Add cast for closure type, adjust
to type change of insn_buf.
* arm-linux-tdep.c (arm_linux_cleanup_svc): Change type of
parameter DSC.
(arm_linux_copy_svc): Likewise.
(cleanup_kernel_helper_return): Likewise.
(arm_catch_kernel_helper_return): Likewise.
(arm_linux_displaced_step_copy_insn): Instantiate
arm_displaced_step_closure.
* arm-tdep.c (arm_pc_is_thumb): Add cast for closure.
(displaced_read_reg): Change type of parameter DSC.
(branch_write_pc): Likewise.
(load_write_pc): Likewise.
(alu_write_pc): Likewise.
(displaced_write_reg): Likewise.
(arm_copy_unmodified): Likewise.
(thumb_copy_unmodified_32bit): Likewise.
(thumb_copy_unmodified_16bit): Likewise.
(cleanup_preload): Likewise.
(install_preload): Likewise.
(arm_copy_preload): Likewise.
(thumb2_copy_preload): Likewise.
(install_preload_reg): Likewise.
(arm_copy_preload_reg): Likewise.
(cleanup_copro_load_store): Likewise.
(install_copro_load_store): Likewise.
(arm_copy_copro_load_store) Likewise.
(thumb2_copy_copro_load_store): Likewise.
(cleanup_branch): Likewise.
(install_b_bl_blx): Likewise.
(arm_copy_b_bl_blx): Likewise.
(thumb2_copy_b_bl_blx): Likewise.
(thumb_copy_b): Likewise.
(install_bx_blx_reg): Likewise.
(arm_copy_bx_blx_reg): Likewise.
(thumb_copy_bx_blx_reg): Likewise.
(cleanup_alu_imm): Likewise.
(arm_copy_alu_imm): Likewise.
(thumb2_copy_alu_imm): Likewise.
(cleanup_alu_reg): Likewise.
(install_alu_reg): Likewise.
(arm_copy_alu_reg): Likewise.
(thumb_copy_alu_reg): Likewise.
(cleanup_alu_shifted_reg): Likewise.
(install_alu_shifted_reg): Likewise.
(arm_copy_alu_shifted_reg): Likewise.
(cleanup_load): Likewise.
(cleanup_store): Likewise.
(arm_copy_extra_ld_st): Likewise.
(install_load_store): Likewise.
(thumb2_copy_load_literal): Likewise.
(thumb2_copy_load_reg_imm): Likewise.
(arm_copy_ldr_str_ldrb_strb): Likewise.
(cleanup_block_load_all): Likewise.
(cleanup_block_store_pc): Likewise.
(cleanup_block_load_pc): Likewise.
(arm_copy_block_xfer): Likewise.
(thumb2_copy_block_xfer): Likewise.
(cleanup_svc): Likewise.
(install_svc): Likewise.
(arm_copy_svc): Likewise.
(thumb_copy_svc): Likewise.
(arm_copy_undef): Likewise.
(thumb_32bit_copy_undef): Likewise.
(arm_copy_unpred): Likewise.
(arm_decode_misc_memhint_neon): Likewise.
(arm_decode_unconditional): Likewise.
(arm_decode_miscellaneous): Likewise.
(arm_decode_dp_misc): Likewise.
(arm_decode_ld_st_word_ubyte): Likewise.
(arm_decode_media): Likewise.
(arm_decode_b_bl_ldmstm): Likewise.
(arm_decode_ext_reg_ld_st): Likewise.
(thumb2_decode_dp_shift_reg): Likewise.
(thumb2_decode_ext_reg_ld_st): Likewise.
(arm_decode_svc_copro): Likewise.
(thumb2_decode_svc_copro): Likewise.
(install_pc_relative): Likewise.
(thumb_copy_pc_relative_16bit): Likewise.
(thumb_decode_pc_relative_16bit): Likewise.
(thumb_copy_pc_relative_32bit): Likewise.
(thumb_copy_16bit_ldr_literal): Likewise.
(thumb_copy_cbnz_cbz): Likewise.
(thumb2_copy_table_branch): Likewise.
(cleanup_pop_pc_16bit_all): Likewise.
(thumb_copy_pop_pc_16bit): Likewise.
(thumb_process_displaced_16bit_insn): Likewise.
(decode_thumb_32bit_ld_mem_hints): Likewise.
(thumb_process_displaced_32bit_insn): Likewise.
(thumb_process_displaced_insn): Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(arm_displaced_step_fixup): Add cast for closure.
* arm-tdep.h: Include infrun.h.
(displaced_step_closure): Rename to ...
(arm_displaced_step_closure): ... this, extend
displaced_step_closure.
<u::svc::copy_svc_os>: Change type of parameter DSC.
<cleanup>: Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(displaced_read_reg): Likewise.
(displaced_write_reg): Likewise.
* i386-linux-tdep.c (i386_linux_displaced_step_copy_insn):
Adjust.
* i386-tdep.h: Include infrun.h.
(i386_displaced_step_closure): New typedef.
* i386-tdep.c (i386_displaced_step_copy_insn): Use
i386_displaced_step_closure.
(i386_displaced_step_fixup): Adjust.
* rs6000-tdep.c (ppc_displaced_step_closure): New typedef.
(ppc_displaced_step_copy_insn): Use ppc_displaced_step_closure
and unique_ptr.
(ppc_displaced_step_fixup): Adjust.
* s390-linux-tdep.c (s390_displaced_step_closure): New typedef.
(s390_displaced_step_copy_insn): Use s390_displaced_step_closure
and unique_ptr.
(s390_displaced_step_fixup): Adjust.
2017-10-21 17:27:52 +02:00
|
|
|
|
dsd.dsc = dsc.get ();
|
2015-10-21 16:50:55 +02:00
|
|
|
|
dsd.insn_count = 0;
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
aarch64_relocate_instruction (insn, &visitor,
|
|
|
|
|
(struct aarch64_insn_data *) &dsd);
|
2019-07-04 13:41:20 +02:00
|
|
|
|
gdb_assert (dsd.insn_count <= AARCH64_DISPLACED_MODIFIED_INSNS);
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
|
|
|
|
|
if (dsd.insn_count != 0)
|
|
|
|
|
{
|
|
|
|
|
int i;
|
|
|
|
|
|
|
|
|
|
/* Instruction can be relocated to scratch pad. Copy
|
|
|
|
|
relocated instruction(s) there. */
|
|
|
|
|
for (i = 0; i < dsd.insn_count; i++)
|
|
|
|
|
{
|
|
|
|
|
if (debug_displaced)
|
|
|
|
|
{
|
|
|
|
|
debug_printf ("displaced: writing insn ");
|
|
|
|
|
debug_printf ("%.8x", dsd.insn_buf[i]);
|
|
|
|
|
debug_printf (" at %s\n", paddress (gdbarch, to + i * 4));
|
|
|
|
|
}
|
|
|
|
|
write_memory_unsigned_integer (to + i * 4, 4, byte_order_for_code,
|
|
|
|
|
(ULONGEST) dsd.insn_buf[i]);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
dsc = NULL;
|
|
|
|
|
}
|
|
|
|
|
|
Create a displaced_step_closure class hierarchy
displaced_step_closure is a type defined in multiple -tdep.c files.
Trying to xfree it from the common code (infrun.c) is a problem when we
try to poison xfree for non-POD types. Because there can be multiple of
these types in the same build, this patch makes a hierarchy of classes
with a virtual destructor. When the common code deletes the object
through a displaced_step_closure pointer, it will invoke the right
destructor.
The amd64 used a last-member array with a variable size. That doesn't
work with new, so I changed it for an std::vector. Other architectures
which used a simple byte buffer as a closure now use a shared
buf_displaced_step_closure, a closure type that only contains a
gdb::byte_vector.
Reg-tested on the buildbot.
gdb/ChangeLog:
* infrun.h: Include common/byte-vector.h.
(struct displaced_step_closure): New struct.
(struct buf_displaced_step_closure): New struct.
* infrun.c (displaced_step_closure::~displaced_step_closure):
Provide default implementation.
(displaced_step_clear): Deallocate step closure with delete.
* aarch64-tdep.c (displaced_step_closure): Rename to ...
(aarch64_displaced_step_closure): ... this, extend
displaced_step_closure.
(aarch64_displaced_step_data) <dsc>: Change type to
aarch64_displaced_step_closure.
(aarch64_displaced_step_copy_insn): Adjust to type change, use
unique_ptr.
(aarch64_displaced_step_fixup): Add cast for displaced step
closure.
* amd64-tdep.c (displaced_step_closure): Rename to ...
(amd64_displaced_step_closure): ... this, extend
displaced_step_closure.
<insn_buf>: Change type to std::vector<gdb_byte>.
<max_len>: Remove.
(fixup_riprel): Change type of DSC parameter, adjust to type
change of insn_buf.
(fixup_displaced_copy): Change type of DSC parameter.
(amd64_displaced_step_copy_insn): Instantiate
amd64_displaced_step_closure.
(amd64_displaced_step_fixup): Add cast for closure type, adjust
to type change of insn_buf.
* arm-linux-tdep.c (arm_linux_cleanup_svc): Change type of
parameter DSC.
(arm_linux_copy_svc): Likewise.
(cleanup_kernel_helper_return): Likewise.
(arm_catch_kernel_helper_return): Likewise.
(arm_linux_displaced_step_copy_insn): Instantiate
arm_displaced_step_closure.
* arm-tdep.c (arm_pc_is_thumb): Add cast for closure.
(displaced_read_reg): Change type of parameter DSC.
(branch_write_pc): Likewise.
(load_write_pc): Likewise.
(alu_write_pc): Likewise.
(displaced_write_reg): Likewise.
(arm_copy_unmodified): Likewise.
(thumb_copy_unmodified_32bit): Likewise.
(thumb_copy_unmodified_16bit): Likewise.
(cleanup_preload): Likewise.
(install_preload): Likewise.
(arm_copy_preload): Likewise.
(thumb2_copy_preload): Likewise.
(install_preload_reg): Likewise.
(arm_copy_preload_reg): Likewise.
(cleanup_copro_load_store): Likewise.
(install_copro_load_store): Likewise.
(arm_copy_copro_load_store) Likewise.
(thumb2_copy_copro_load_store): Likewise.
(cleanup_branch): Likewise.
(install_b_bl_blx): Likewise.
(arm_copy_b_bl_blx): Likewise.
(thumb2_copy_b_bl_blx): Likewise.
(thumb_copy_b): Likewise.
(install_bx_blx_reg): Likewise.
(arm_copy_bx_blx_reg): Likewise.
(thumb_copy_bx_blx_reg): Likewise.
(cleanup_alu_imm): Likewise.
(arm_copy_alu_imm): Likewise.
(thumb2_copy_alu_imm): Likewise.
(cleanup_alu_reg): Likewise.
(install_alu_reg): Likewise.
(arm_copy_alu_reg): Likewise.
(thumb_copy_alu_reg): Likewise.
(cleanup_alu_shifted_reg): Likewise.
(install_alu_shifted_reg): Likewise.
(arm_copy_alu_shifted_reg): Likewise.
(cleanup_load): Likewise.
(cleanup_store): Likewise.
(arm_copy_extra_ld_st): Likewise.
(install_load_store): Likewise.
(thumb2_copy_load_literal): Likewise.
(thumb2_copy_load_reg_imm): Likewise.
(arm_copy_ldr_str_ldrb_strb): Likewise.
(cleanup_block_load_all): Likewise.
(cleanup_block_store_pc): Likewise.
(cleanup_block_load_pc): Likewise.
(arm_copy_block_xfer): Likewise.
(thumb2_copy_block_xfer): Likewise.
(cleanup_svc): Likewise.
(install_svc): Likewise.
(arm_copy_svc): Likewise.
(thumb_copy_svc): Likewise.
(arm_copy_undef): Likewise.
(thumb_32bit_copy_undef): Likewise.
(arm_copy_unpred): Likewise.
(arm_decode_misc_memhint_neon): Likewise.
(arm_decode_unconditional): Likewise.
(arm_decode_miscellaneous): Likewise.
(arm_decode_dp_misc): Likewise.
(arm_decode_ld_st_word_ubyte): Likewise.
(arm_decode_media): Likewise.
(arm_decode_b_bl_ldmstm): Likewise.
(arm_decode_ext_reg_ld_st): Likewise.
(thumb2_decode_dp_shift_reg): Likewise.
(thumb2_decode_ext_reg_ld_st): Likewise.
(arm_decode_svc_copro): Likewise.
(thumb2_decode_svc_copro): Likewise.
(install_pc_relative): Likewise.
(thumb_copy_pc_relative_16bit): Likewise.
(thumb_decode_pc_relative_16bit): Likewise.
(thumb_copy_pc_relative_32bit): Likewise.
(thumb_copy_16bit_ldr_literal): Likewise.
(thumb_copy_cbnz_cbz): Likewise.
(thumb2_copy_table_branch): Likewise.
(cleanup_pop_pc_16bit_all): Likewise.
(thumb_copy_pop_pc_16bit): Likewise.
(thumb_process_displaced_16bit_insn): Likewise.
(decode_thumb_32bit_ld_mem_hints): Likewise.
(thumb_process_displaced_32bit_insn): Likewise.
(thumb_process_displaced_insn): Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(arm_displaced_step_fixup): Add cast for closure.
* arm-tdep.h: Include infrun.h.
(displaced_step_closure): Rename to ...
(arm_displaced_step_closure): ... this, extend
displaced_step_closure.
<u::svc::copy_svc_os>: Change type of parameter DSC.
<cleanup>: Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(displaced_read_reg): Likewise.
(displaced_write_reg): Likewise.
* i386-linux-tdep.c (i386_linux_displaced_step_copy_insn):
Adjust.
* i386-tdep.h: Include infrun.h.
(i386_displaced_step_closure): New typedef.
* i386-tdep.c (i386_displaced_step_copy_insn): Use
i386_displaced_step_closure.
(i386_displaced_step_fixup): Adjust.
* rs6000-tdep.c (ppc_displaced_step_closure): New typedef.
(ppc_displaced_step_copy_insn): Use ppc_displaced_step_closure
and unique_ptr.
(ppc_displaced_step_fixup): Adjust.
* s390-linux-tdep.c (s390_displaced_step_closure): New typedef.
(s390_displaced_step_copy_insn): Use s390_displaced_step_closure
and unique_ptr.
(s390_displaced_step_fixup): Adjust.
2017-10-21 17:27:52 +02:00
|
|
|
|
return dsc.release ();
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "displaced_step_fixup" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
aarch64_displaced_step_fixup (struct gdbarch *gdbarch,
|
Create a displaced_step_closure class hierarchy
displaced_step_closure is a type defined in multiple -tdep.c files.
Trying to xfree it from the common code (infrun.c) is a problem when we
try to poison xfree for non-POD types. Because there can be multiple of
these types in the same build, this patch makes a hierarchy of classes
with a virtual destructor. When the common code deletes the object
through a displaced_step_closure pointer, it will invoke the right
destructor.
The amd64 used a last-member array with a variable size. That doesn't
work with new, so I changed it for an std::vector. Other architectures
which used a simple byte buffer as a closure now use a shared
buf_displaced_step_closure, a closure type that only contains a
gdb::byte_vector.
Reg-tested on the buildbot.
gdb/ChangeLog:
* infrun.h: Include common/byte-vector.h.
(struct displaced_step_closure): New struct.
(struct buf_displaced_step_closure): New struct.
* infrun.c (displaced_step_closure::~displaced_step_closure):
Provide default implementation.
(displaced_step_clear): Deallocate step closure with delete.
* aarch64-tdep.c (displaced_step_closure): Rename to ...
(aarch64_displaced_step_closure): ... this, extend
displaced_step_closure.
(aarch64_displaced_step_data) <dsc>: Change type to
aarch64_displaced_step_closure.
(aarch64_displaced_step_copy_insn): Adjust to type change, use
unique_ptr.
(aarch64_displaced_step_fixup): Add cast for displaced step
closure.
* amd64-tdep.c (displaced_step_closure): Rename to ...
(amd64_displaced_step_closure): ... this, extend
displaced_step_closure.
<insn_buf>: Change type to std::vector<gdb_byte>.
<max_len>: Remove.
(fixup_riprel): Change type of DSC parameter, adjust to type
change of insn_buf.
(fixup_displaced_copy): Change type of DSC parameter.
(amd64_displaced_step_copy_insn): Instantiate
amd64_displaced_step_closure.
(amd64_displaced_step_fixup): Add cast for closure type, adjust
to type change of insn_buf.
* arm-linux-tdep.c (arm_linux_cleanup_svc): Change type of
parameter DSC.
(arm_linux_copy_svc): Likewise.
(cleanup_kernel_helper_return): Likewise.
(arm_catch_kernel_helper_return): Likewise.
(arm_linux_displaced_step_copy_insn): Instantiate
arm_displaced_step_closure.
* arm-tdep.c (arm_pc_is_thumb): Add cast for closure.
(displaced_read_reg): Change type of parameter DSC.
(branch_write_pc): Likewise.
(load_write_pc): Likewise.
(alu_write_pc): Likewise.
(displaced_write_reg): Likewise.
(arm_copy_unmodified): Likewise.
(thumb_copy_unmodified_32bit): Likewise.
(thumb_copy_unmodified_16bit): Likewise.
(cleanup_preload): Likewise.
(install_preload): Likewise.
(arm_copy_preload): Likewise.
(thumb2_copy_preload): Likewise.
(install_preload_reg): Likewise.
(arm_copy_preload_reg): Likewise.
(cleanup_copro_load_store): Likewise.
(install_copro_load_store): Likewise.
(arm_copy_copro_load_store) Likewise.
(thumb2_copy_copro_load_store): Likewise.
(cleanup_branch): Likewise.
(install_b_bl_blx): Likewise.
(arm_copy_b_bl_blx): Likewise.
(thumb2_copy_b_bl_blx): Likewise.
(thumb_copy_b): Likewise.
(install_bx_blx_reg): Likewise.
(arm_copy_bx_blx_reg): Likewise.
(thumb_copy_bx_blx_reg): Likewise.
(cleanup_alu_imm): Likewise.
(arm_copy_alu_imm): Likewise.
(thumb2_copy_alu_imm): Likewise.
(cleanup_alu_reg): Likewise.
(install_alu_reg): Likewise.
(arm_copy_alu_reg): Likewise.
(thumb_copy_alu_reg): Likewise.
(cleanup_alu_shifted_reg): Likewise.
(install_alu_shifted_reg): Likewise.
(arm_copy_alu_shifted_reg): Likewise.
(cleanup_load): Likewise.
(cleanup_store): Likewise.
(arm_copy_extra_ld_st): Likewise.
(install_load_store): Likewise.
(thumb2_copy_load_literal): Likewise.
(thumb2_copy_load_reg_imm): Likewise.
(arm_copy_ldr_str_ldrb_strb): Likewise.
(cleanup_block_load_all): Likewise.
(cleanup_block_store_pc): Likewise.
(cleanup_block_load_pc): Likewise.
(arm_copy_block_xfer): Likewise.
(thumb2_copy_block_xfer): Likewise.
(cleanup_svc): Likewise.
(install_svc): Likewise.
(arm_copy_svc): Likewise.
(thumb_copy_svc): Likewise.
(arm_copy_undef): Likewise.
(thumb_32bit_copy_undef): Likewise.
(arm_copy_unpred): Likewise.
(arm_decode_misc_memhint_neon): Likewise.
(arm_decode_unconditional): Likewise.
(arm_decode_miscellaneous): Likewise.
(arm_decode_dp_misc): Likewise.
(arm_decode_ld_st_word_ubyte): Likewise.
(arm_decode_media): Likewise.
(arm_decode_b_bl_ldmstm): Likewise.
(arm_decode_ext_reg_ld_st): Likewise.
(thumb2_decode_dp_shift_reg): Likewise.
(thumb2_decode_ext_reg_ld_st): Likewise.
(arm_decode_svc_copro): Likewise.
(thumb2_decode_svc_copro): Likewise.
(install_pc_relative): Likewise.
(thumb_copy_pc_relative_16bit): Likewise.
(thumb_decode_pc_relative_16bit): Likewise.
(thumb_copy_pc_relative_32bit): Likewise.
(thumb_copy_16bit_ldr_literal): Likewise.
(thumb_copy_cbnz_cbz): Likewise.
(thumb2_copy_table_branch): Likewise.
(cleanup_pop_pc_16bit_all): Likewise.
(thumb_copy_pop_pc_16bit): Likewise.
(thumb_process_displaced_16bit_insn): Likewise.
(decode_thumb_32bit_ld_mem_hints): Likewise.
(thumb_process_displaced_32bit_insn): Likewise.
(thumb_process_displaced_insn): Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(arm_displaced_step_fixup): Add cast for closure.
* arm-tdep.h: Include infrun.h.
(displaced_step_closure): Rename to ...
(arm_displaced_step_closure): ... this, extend
displaced_step_closure.
<u::svc::copy_svc_os>: Change type of parameter DSC.
<cleanup>: Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(displaced_read_reg): Likewise.
(displaced_write_reg): Likewise.
* i386-linux-tdep.c (i386_linux_displaced_step_copy_insn):
Adjust.
* i386-tdep.h: Include infrun.h.
(i386_displaced_step_closure): New typedef.
* i386-tdep.c (i386_displaced_step_copy_insn): Use
i386_displaced_step_closure.
(i386_displaced_step_fixup): Adjust.
* rs6000-tdep.c (ppc_displaced_step_closure): New typedef.
(ppc_displaced_step_copy_insn): Use ppc_displaced_step_closure
and unique_ptr.
(ppc_displaced_step_fixup): Adjust.
* s390-linux-tdep.c (s390_displaced_step_closure): New typedef.
(s390_displaced_step_copy_insn): Use s390_displaced_step_closure
and unique_ptr.
(s390_displaced_step_fixup): Adjust.
2017-10-21 17:27:52 +02:00
|
|
|
|
struct displaced_step_closure *dsc_,
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
CORE_ADDR from, CORE_ADDR to,
|
|
|
|
|
struct regcache *regs)
|
|
|
|
|
{
|
Create a displaced_step_closure class hierarchy
displaced_step_closure is a type defined in multiple -tdep.c files.
Trying to xfree it from the common code (infrun.c) is a problem when we
try to poison xfree for non-POD types. Because there can be multiple of
these types in the same build, this patch makes a hierarchy of classes
with a virtual destructor. When the common code deletes the object
through a displaced_step_closure pointer, it will invoke the right
destructor.
The amd64 used a last-member array with a variable size. That doesn't
work with new, so I changed it for an std::vector. Other architectures
which used a simple byte buffer as a closure now use a shared
buf_displaced_step_closure, a closure type that only contains a
gdb::byte_vector.
Reg-tested on the buildbot.
gdb/ChangeLog:
* infrun.h: Include common/byte-vector.h.
(struct displaced_step_closure): New struct.
(struct buf_displaced_step_closure): New struct.
* infrun.c (displaced_step_closure::~displaced_step_closure):
Provide default implementation.
(displaced_step_clear): Deallocate step closure with delete.
* aarch64-tdep.c (displaced_step_closure): Rename to ...
(aarch64_displaced_step_closure): ... this, extend
displaced_step_closure.
(aarch64_displaced_step_data) <dsc>: Change type to
aarch64_displaced_step_closure.
(aarch64_displaced_step_copy_insn): Adjust to type change, use
unique_ptr.
(aarch64_displaced_step_fixup): Add cast for displaced step
closure.
* amd64-tdep.c (displaced_step_closure): Rename to ...
(amd64_displaced_step_closure): ... this, extend
displaced_step_closure.
<insn_buf>: Change type to std::vector<gdb_byte>.
<max_len>: Remove.
(fixup_riprel): Change type of DSC parameter, adjust to type
change of insn_buf.
(fixup_displaced_copy): Change type of DSC parameter.
(amd64_displaced_step_copy_insn): Instantiate
amd64_displaced_step_closure.
(amd64_displaced_step_fixup): Add cast for closure type, adjust
to type change of insn_buf.
* arm-linux-tdep.c (arm_linux_cleanup_svc): Change type of
parameter DSC.
(arm_linux_copy_svc): Likewise.
(cleanup_kernel_helper_return): Likewise.
(arm_catch_kernel_helper_return): Likewise.
(arm_linux_displaced_step_copy_insn): Instantiate
arm_displaced_step_closure.
* arm-tdep.c (arm_pc_is_thumb): Add cast for closure.
(displaced_read_reg): Change type of parameter DSC.
(branch_write_pc): Likewise.
(load_write_pc): Likewise.
(alu_write_pc): Likewise.
(displaced_write_reg): Likewise.
(arm_copy_unmodified): Likewise.
(thumb_copy_unmodified_32bit): Likewise.
(thumb_copy_unmodified_16bit): Likewise.
(cleanup_preload): Likewise.
(install_preload): Likewise.
(arm_copy_preload): Likewise.
(thumb2_copy_preload): Likewise.
(install_preload_reg): Likewise.
(arm_copy_preload_reg): Likewise.
(cleanup_copro_load_store): Likewise.
(install_copro_load_store): Likewise.
(arm_copy_copro_load_store) Likewise.
(thumb2_copy_copro_load_store): Likewise.
(cleanup_branch): Likewise.
(install_b_bl_blx): Likewise.
(arm_copy_b_bl_blx): Likewise.
(thumb2_copy_b_bl_blx): Likewise.
(thumb_copy_b): Likewise.
(install_bx_blx_reg): Likewise.
(arm_copy_bx_blx_reg): Likewise.
(thumb_copy_bx_blx_reg): Likewise.
(cleanup_alu_imm): Likewise.
(arm_copy_alu_imm): Likewise.
(thumb2_copy_alu_imm): Likewise.
(cleanup_alu_reg): Likewise.
(install_alu_reg): Likewise.
(arm_copy_alu_reg): Likewise.
(thumb_copy_alu_reg): Likewise.
(cleanup_alu_shifted_reg): Likewise.
(install_alu_shifted_reg): Likewise.
(arm_copy_alu_shifted_reg): Likewise.
(cleanup_load): Likewise.
(cleanup_store): Likewise.
(arm_copy_extra_ld_st): Likewise.
(install_load_store): Likewise.
(thumb2_copy_load_literal): Likewise.
(thumb2_copy_load_reg_imm): Likewise.
(arm_copy_ldr_str_ldrb_strb): Likewise.
(cleanup_block_load_all): Likewise.
(cleanup_block_store_pc): Likewise.
(cleanup_block_load_pc): Likewise.
(arm_copy_block_xfer): Likewise.
(thumb2_copy_block_xfer): Likewise.
(cleanup_svc): Likewise.
(install_svc): Likewise.
(arm_copy_svc): Likewise.
(thumb_copy_svc): Likewise.
(arm_copy_undef): Likewise.
(thumb_32bit_copy_undef): Likewise.
(arm_copy_unpred): Likewise.
(arm_decode_misc_memhint_neon): Likewise.
(arm_decode_unconditional): Likewise.
(arm_decode_miscellaneous): Likewise.
(arm_decode_dp_misc): Likewise.
(arm_decode_ld_st_word_ubyte): Likewise.
(arm_decode_media): Likewise.
(arm_decode_b_bl_ldmstm): Likewise.
(arm_decode_ext_reg_ld_st): Likewise.
(thumb2_decode_dp_shift_reg): Likewise.
(thumb2_decode_ext_reg_ld_st): Likewise.
(arm_decode_svc_copro): Likewise.
(thumb2_decode_svc_copro): Likewise.
(install_pc_relative): Likewise.
(thumb_copy_pc_relative_16bit): Likewise.
(thumb_decode_pc_relative_16bit): Likewise.
(thumb_copy_pc_relative_32bit): Likewise.
(thumb_copy_16bit_ldr_literal): Likewise.
(thumb_copy_cbnz_cbz): Likewise.
(thumb2_copy_table_branch): Likewise.
(cleanup_pop_pc_16bit_all): Likewise.
(thumb_copy_pop_pc_16bit): Likewise.
(thumb_process_displaced_16bit_insn): Likewise.
(decode_thumb_32bit_ld_mem_hints): Likewise.
(thumb_process_displaced_32bit_insn): Likewise.
(thumb_process_displaced_insn): Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(arm_displaced_step_fixup): Add cast for closure.
* arm-tdep.h: Include infrun.h.
(displaced_step_closure): Rename to ...
(arm_displaced_step_closure): ... this, extend
displaced_step_closure.
<u::svc::copy_svc_os>: Change type of parameter DSC.
<cleanup>: Likewise.
(arm_process_displaced_insn): Likewise.
(arm_displaced_init_closure): Likewise.
(displaced_read_reg): Likewise.
(displaced_write_reg): Likewise.
* i386-linux-tdep.c (i386_linux_displaced_step_copy_insn):
Adjust.
* i386-tdep.h: Include infrun.h.
(i386_displaced_step_closure): New typedef.
* i386-tdep.c (i386_displaced_step_copy_insn): Use
i386_displaced_step_closure.
(i386_displaced_step_fixup): Adjust.
* rs6000-tdep.c (ppc_displaced_step_closure): New typedef.
(ppc_displaced_step_copy_insn): Use ppc_displaced_step_closure
and unique_ptr.
(ppc_displaced_step_fixup): Adjust.
* s390-linux-tdep.c (s390_displaced_step_closure): New typedef.
(s390_displaced_step_copy_insn): Use s390_displaced_step_closure
and unique_ptr.
(s390_displaced_step_fixup): Adjust.
2017-10-21 17:27:52 +02:00
|
|
|
|
aarch64_displaced_step_closure *dsc = (aarch64_displaced_step_closure *) dsc_;
|
|
|
|
|
|
Support displaced stepping in aarch64-linux
This patch is to support displaced stepping in aarch64-linux. A
visitor is implemented for displaced stepping, and used to record
information to fixup pc after displaced stepping if needed. Some
emit_* functions are converted to macros, and moved to
arch/aarch64-insn.{c,h} so that they can be shared.
gdb:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* aarch64-linux-tdep.c: Include arch-utils.h.
(aarch64_linux_init_abi): Call set_gdbarch_max_insn_length,
set_gdbarch_displaced_step_copy_insn,
set_gdbarch_displaced_step_fixup,
set_gdbarch_displaced_step_free_closure,
set_gdbarch_displaced_step_location,
and set_gdbarch_displaced_step_hw_singlestep.
* aarch64-tdep.c (struct displaced_step_closure): New.
(struct aarch64_displaced_step_data): New.
(aarch64_displaced_step_b): New function.
(aarch64_displaced_step_b_cond): Likewise.
(aarch64_register): Likewise.
(aarch64_displaced_step_cb): Likewise.
(aarch64_displaced_step_tb): Likewise.
(aarch64_displaced_step_adr): Likewise.
(aarch64_displaced_step_ldr_literal): Likewise.
(aarch64_displaced_step_others): Likewise.
(aarch64_displaced_step_copy_insn): Likewise.
(aarch64_displaced_step_fixup): Likewise.
(aarch64_displaced_step_hw_singlestep): Likewise.
* aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro.
(aarch64_displaced_step_copy_insn): Declare.
(aarch64_displaced_step_fixup): Declare.
(aarch64_displaced_step_hw_singlestep): Declare.
* arch/aarch64-insn.c (emit_insn): Moved from
gdbserver/linux-aarch64-low.c.
(emit_load_store): Likewise.
* arch/aarch64-insn.h (enum aarch64_opcodes): Moved from
gdbserver/linux-aarch64-low.c.
(struct aarch64_register): Likewise.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(can_encode_int32): New macro.
(emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise.
(emit_tb, emit_nop): Likewise.
(emit_insn): Declare.
(emit_load_store): Declare.
gdb/gdbserver:
2015-10-12 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c (enum aarch64_opcodes): Move to
arch/aarch64-insn.h.
(struct aarch64_memory_operand): Likewise.
(ENCODE): Likewise.
(emit_insn): Move to arch/aarch64-insn.c.
(emit_b, emit_bcond, emit_cb, emit_tb): Remove.
(emit_load_store): Move to arch/aarch64-insn.c.
(emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove.
(can_encode_int32): Remove.
2015-10-12 12:28:38 +02:00
|
|
|
|
if (dsc->cond)
|
|
|
|
|
{
|
|
|
|
|
ULONGEST pc;
|
|
|
|
|
|
|
|
|
|
regcache_cooked_read_unsigned (regs, AARCH64_PC_REGNUM, &pc);
|
|
|
|
|
if (pc - to == 8)
|
|
|
|
|
{
|
|
|
|
|
/* Condition is true. */
|
|
|
|
|
}
|
|
|
|
|
else if (pc - to == 4)
|
|
|
|
|
{
|
|
|
|
|
/* Condition is false. */
|
|
|
|
|
dsc->pc_adjust = 4;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
gdb_assert_not_reached ("Unexpected PC value after displaced stepping");
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (dsc->pc_adjust != 0)
|
|
|
|
|
{
|
|
|
|
|
if (debug_displaced)
|
|
|
|
|
{
|
|
|
|
|
debug_printf ("displaced: fixup: set PC to %s:%d\n",
|
|
|
|
|
paddress (gdbarch, from), dsc->pc_adjust);
|
|
|
|
|
}
|
|
|
|
|
regcache_cooked_write_unsigned (regs, AARCH64_PC_REGNUM,
|
|
|
|
|
from + dsc->pc_adjust);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Implement the "displaced_step_hw_singlestep" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
aarch64_displaced_step_hw_singlestep (struct gdbarch *gdbarch,
|
|
|
|
|
struct displaced_step_closure *closure)
|
|
|
|
|
{
|
|
|
|
|
return 1;
|
|
|
|
|
}
|
|
|
|
|
|
2018-05-31 14:33:04 +02:00
|
|
|
|
/* Get the correct target description for the given VQ value.
|
|
|
|
|
If VQ is zero then it is assumed SVE is not supported.
|
|
|
|
|
(It is not possible to set VQ to zero on an SVE system). */
|
2017-11-24 11:00:54 +01:00
|
|
|
|
|
|
|
|
|
const target_desc *
|
2019-03-22 10:58:42 +01:00
|
|
|
|
aarch64_read_description (uint64_t vq, bool pauth_p)
|
2017-11-24 11:00:54 +01:00
|
|
|
|
{
|
2018-05-31 14:33:04 +02:00
|
|
|
|
if (vq > AARCH64_MAX_SVE_VQ)
|
2018-06-01 17:37:45 +02:00
|
|
|
|
error (_("VQ is %" PRIu64 ", maximum supported value is %d"), vq,
|
2018-05-31 14:33:04 +02:00
|
|
|
|
AARCH64_MAX_SVE_VQ);
|
|
|
|
|
|
2019-03-22 10:58:42 +01:00
|
|
|
|
struct target_desc *tdesc = tdesc_aarch64_list[vq][pauth_p];
|
2017-11-24 11:00:54 +01:00
|
|
|
|
|
2018-05-31 14:33:04 +02:00
|
|
|
|
if (tdesc == NULL)
|
|
|
|
|
{
|
2019-03-22 10:58:42 +01:00
|
|
|
|
tdesc = aarch64_create_target_description (vq, pauth_p);
|
|
|
|
|
tdesc_aarch64_list[vq][pauth_p] = tdesc;
|
2018-05-31 14:33:04 +02:00
|
|
|
|
}
|
2017-11-24 11:00:54 +01:00
|
|
|
|
|
2018-05-31 14:33:04 +02:00
|
|
|
|
return tdesc;
|
2017-11-24 11:00:54 +01:00
|
|
|
|
}
|
|
|
|
|
|
2018-06-04 12:39:41 +02:00
|
|
|
|
/* Return the VQ used when creating the target description TDESC. */
|
|
|
|
|
|
2018-06-04 13:13:43 +02:00
|
|
|
|
static uint64_t
|
2018-06-04 12:39:41 +02:00
|
|
|
|
aarch64_get_tdesc_vq (const struct target_desc *tdesc)
|
|
|
|
|
{
|
|
|
|
|
const struct tdesc_feature *feature_sve;
|
|
|
|
|
|
|
|
|
|
if (!tdesc_has_registers (tdesc))
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
feature_sve = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.sve");
|
|
|
|
|
|
|
|
|
|
if (feature_sve == nullptr)
|
|
|
|
|
return 0;
|
|
|
|
|
|
2018-07-11 09:34:50 +02:00
|
|
|
|
uint64_t vl = tdesc_register_bitsize (feature_sve,
|
|
|
|
|
aarch64_sve_register_names[0]) / 8;
|
2018-06-04 12:39:41 +02:00
|
|
|
|
return sve_vq_from_vl (vl);
|
|
|
|
|
}
|
|
|
|
|
|
2019-02-20 12:56:23 +01:00
|
|
|
|
/* Add all the expected register sets into GDBARCH. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_add_reggroups (struct gdbarch *gdbarch)
|
|
|
|
|
{
|
|
|
|
|
reggroup_add (gdbarch, general_reggroup);
|
|
|
|
|
reggroup_add (gdbarch, float_reggroup);
|
|
|
|
|
reggroup_add (gdbarch, system_reggroup);
|
|
|
|
|
reggroup_add (gdbarch, vector_reggroup);
|
|
|
|
|
reggroup_add (gdbarch, all_reggroup);
|
|
|
|
|
reggroup_add (gdbarch, save_reggroup);
|
|
|
|
|
reggroup_add (gdbarch, restore_reggroup);
|
|
|
|
|
}
|
2018-06-04 12:39:41 +02:00
|
|
|
|
|
2019-03-22 11:31:02 +01:00
|
|
|
|
/* Implement the "cannot_store_register" gdbarch method. */
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
|
aarch64_cannot_store_register (struct gdbarch *gdbarch, int regnum)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
|
|
|
|
if (!tdep->has_pauth ())
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
/* Pointer authentication registers are read-only. */
|
|
|
|
|
return (regnum == AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base)
|
|
|
|
|
|| regnum == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base));
|
|
|
|
|
}
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* Initialize the current architecture based on INFO. If possible,
|
|
|
|
|
re-use an architecture from ARCHES, which is a list of
|
|
|
|
|
architectures already created during this debugging session.
|
|
|
|
|
|
|
|
|
|
Called e.g. at program startup, when reading a core file, and when
|
|
|
|
|
reading a binary file. */
|
|
|
|
|
|
|
|
|
|
static struct gdbarch *
|
|
|
|
|
aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|
|
|
|
{
|
2019-04-15 13:27:31 +02:00
|
|
|
|
const struct tdesc_feature *feature_core, *feature_fpu, *feature_sve;
|
2019-03-22 11:31:02 +01:00
|
|
|
|
const struct tdesc_feature *feature_pauth;
|
2019-04-15 13:27:31 +02:00
|
|
|
|
bool valid_p = true;
|
|
|
|
|
int i, num_regs = 0, num_pseudo_regs = 0;
|
|
|
|
|
int first_pauth_regnum = -1, pauth_ra_state_offset = -1;
|
|
|
|
|
|
AArch64 SVE: Check for vector length change when getting gdbarch
Override the thread_architecture method, similar to SPU. If the vector
length has changed, then find the arch using info, making sure the vector
length is passed down to the init routine.
In the init routine, ensure the arch has the correct vector length.
Example output. Program is stopped in thread 2, just before it calls prctl
to change the vector length
(gdb) info threads
Id Target Id Frame
1 Thread 0xffffbf6f4000 (LWP 3188) "sve_change" 0x0000ffffbf6ae130 in pthread_join ()
* 2 Thread 0xffffbf55e200 (LWP 3189) "sve_change" thread1 (arg=0xfeedface) at sve_change_size.c:28
(gdb) print $vg
$1 = 8
(gdb) print $z0.s.u
$2 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}
(gdb) n
29 int ret = prctl(PR_SVE_SET_VL, vl/2);
(gdb) n
30 printf ("Changed: ret\n", ret);
(gdb) print $vg
$4 = 4
(gdb) print $z0.s.u
$5 = {623191333, 623191333, 623191333, 623191333, 0, 0, 0, 0}
(gdb) thr 1
[Switching to thread 1 (Thread 0xffffbf6f4000 (LWP 3181))]
(gdb) print $vg
$6 = 8
(gdb) print $z0.s.u
$7 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}
gdb/ChangeLog:
* aarch64-linux-nat.c
(aarch64_linux_nat_target::thread_architecture): Add override.
* aarch64-tdep.c (aarch64_gdbarch_init): Ensure different tdesc for
each VQ.
2019-04-15 13:29:40 +02:00
|
|
|
|
/* Use the vector length passed via the target info. Here -1 is used for no
|
|
|
|
|
SVE, and 0 is unset. If unset then use the vector length from the existing
|
|
|
|
|
tdesc. */
|
|
|
|
|
uint64_t vq = 0;
|
|
|
|
|
if (info.id == (int *) -1)
|
|
|
|
|
vq = 0;
|
|
|
|
|
else if (info.id != 0)
|
|
|
|
|
vq = (uint64_t) info.id;
|
|
|
|
|
else
|
|
|
|
|
vq = aarch64_get_tdesc_vq (info.target_desc);
|
|
|
|
|
|
|
|
|
|
if (vq > AARCH64_MAX_SVE_VQ)
|
Use "pulongest" on aarch64-tdep.c:aarch64_gdbarch_init
While trying to build GDB on i686, I found the following error:
In file included from ../../gdb/common/common-defs.h:105,
from ../../gdb/defs.h:28,
from ../../gdb/aarch64-tdep.c:21:
../../gdb/aarch64-tdep.c: In function 'gdbarch* aarch64_gdbarch_init(gdbarch_info, gdbarch_list*)':
../../gdb/aarch64-tdep.c:3176:43: error: format '%ld' expects argument of type 'long int', but argument 4 has type 'uint64_t' {aka 'long long unsigned int'} [-Werror=format=]
3176 | internal_error (__FILE__, __LINE__, _("VQ out of bounds: %ld (max %d)"),
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../gdb/common/gdb_locale.h:28:29: note: in definition of macro '_'
28 | # define _(String) gettext (String)
| ^~~~~~
../../gdb/aarch64-tdep.c:3176:64: note: format string is defined here
3176 | internal_error (__FILE__, __LINE__, _("VQ out of bounds: %ld (max %d)"),
| ~~^
| |
| long int
| %lld
This happens because aarch64-tdep.c:aarch64_gdbarch_init prints a
"uint64_t" variable using "%ld". This patch fixes the build by using
"pulongest" instead. As explained in a similar fix (commit
495143533ad95369811391c6e3c6dadd69d7dd67), this should be safe because
if aarch64-tdep.c is included in the build, then ULONGEST must be a
64-bit type.
gdb/ChangeLog:
2019-04-24 Sergio Durigan Junior <sergiodj@redhat.com>
* aarch64-tdep.c (aarch64_gdbarch_init): Use "pulongest" to print
"vq".
2019-04-24 20:53:59 +02:00
|
|
|
|
internal_error (__FILE__, __LINE__, _("VQ out of bounds: %s (max %d)"),
|
|
|
|
|
pulongest (vq), AARCH64_MAX_SVE_VQ);
|
AArch64 SVE: Check for vector length change when getting gdbarch
Override the thread_architecture method, similar to SPU. If the vector
length has changed, then find the arch using info, making sure the vector
length is passed down to the init routine.
In the init routine, ensure the arch has the correct vector length.
Example output. Program is stopped in thread 2, just before it calls prctl
to change the vector length
(gdb) info threads
Id Target Id Frame
1 Thread 0xffffbf6f4000 (LWP 3188) "sve_change" 0x0000ffffbf6ae130 in pthread_join ()
* 2 Thread 0xffffbf55e200 (LWP 3189) "sve_change" thread1 (arg=0xfeedface) at sve_change_size.c:28
(gdb) print $vg
$1 = 8
(gdb) print $z0.s.u
$2 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}
(gdb) n
29 int ret = prctl(PR_SVE_SET_VL, vl/2);
(gdb) n
30 printf ("Changed: ret\n", ret);
(gdb) print $vg
$4 = 4
(gdb) print $z0.s.u
$5 = {623191333, 623191333, 623191333, 623191333, 0, 0, 0, 0}
(gdb) thr 1
[Switching to thread 1 (Thread 0xffffbf6f4000 (LWP 3181))]
(gdb) print $vg
$6 = 8
(gdb) print $z0.s.u
$7 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}
gdb/ChangeLog:
* aarch64-linux-nat.c
(aarch64_linux_nat_target::thread_architecture): Add override.
* aarch64-tdep.c (aarch64_gdbarch_init): Ensure different tdesc for
each VQ.
2019-04-15 13:29:40 +02:00
|
|
|
|
|
2019-04-15 13:27:31 +02:00
|
|
|
|
/* If there is already a candidate, use it. */
|
|
|
|
|
for (gdbarch_list *best_arch = gdbarch_list_lookup_by_info (arches, &info);
|
|
|
|
|
best_arch != nullptr;
|
|
|
|
|
best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info))
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (best_arch->gdbarch);
|
AArch64 SVE: Check for vector length change when getting gdbarch
Override the thread_architecture method, similar to SPU. If the vector
length has changed, then find the arch using info, making sure the vector
length is passed down to the init routine.
In the init routine, ensure the arch has the correct vector length.
Example output. Program is stopped in thread 2, just before it calls prctl
to change the vector length
(gdb) info threads
Id Target Id Frame
1 Thread 0xffffbf6f4000 (LWP 3188) "sve_change" 0x0000ffffbf6ae130 in pthread_join ()
* 2 Thread 0xffffbf55e200 (LWP 3189) "sve_change" thread1 (arg=0xfeedface) at sve_change_size.c:28
(gdb) print $vg
$1 = 8
(gdb) print $z0.s.u
$2 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}
(gdb) n
29 int ret = prctl(PR_SVE_SET_VL, vl/2);
(gdb) n
30 printf ("Changed: ret\n", ret);
(gdb) print $vg
$4 = 4
(gdb) print $z0.s.u
$5 = {623191333, 623191333, 623191333, 623191333, 0, 0, 0, 0}
(gdb) thr 1
[Switching to thread 1 (Thread 0xffffbf6f4000 (LWP 3181))]
(gdb) print $vg
$6 = 8
(gdb) print $z0.s.u
$7 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}
gdb/ChangeLog:
* aarch64-linux-nat.c
(aarch64_linux_nat_target::thread_architecture): Add override.
* aarch64-tdep.c (aarch64_gdbarch_init): Ensure different tdesc for
each VQ.
2019-04-15 13:29:40 +02:00
|
|
|
|
if (tdep && tdep->vq == vq)
|
2019-04-15 13:27:31 +02:00
|
|
|
|
return best_arch->gdbarch;
|
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
AArch64 SVE: Check for vector length change when getting gdbarch
Override the thread_architecture method, similar to SPU. If the vector
length has changed, then find the arch using info, making sure the vector
length is passed down to the init routine.
In the init routine, ensure the arch has the correct vector length.
Example output. Program is stopped in thread 2, just before it calls prctl
to change the vector length
(gdb) info threads
Id Target Id Frame
1 Thread 0xffffbf6f4000 (LWP 3188) "sve_change" 0x0000ffffbf6ae130 in pthread_join ()
* 2 Thread 0xffffbf55e200 (LWP 3189) "sve_change" thread1 (arg=0xfeedface) at sve_change_size.c:28
(gdb) print $vg
$1 = 8
(gdb) print $z0.s.u
$2 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}
(gdb) n
29 int ret = prctl(PR_SVE_SET_VL, vl/2);
(gdb) n
30 printf ("Changed: ret\n", ret);
(gdb) print $vg
$4 = 4
(gdb) print $z0.s.u
$5 = {623191333, 623191333, 623191333, 623191333, 0, 0, 0, 0}
(gdb) thr 1
[Switching to thread 1 (Thread 0xffffbf6f4000 (LWP 3181))]
(gdb) print $vg
$6 = 8
(gdb) print $z0.s.u
$7 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}
gdb/ChangeLog:
* aarch64-linux-nat.c
(aarch64_linux_nat_target::thread_architecture): Add override.
* aarch64-tdep.c (aarch64_gdbarch_init): Ensure different tdesc for
each VQ.
2019-04-15 13:29:40 +02:00
|
|
|
|
/* Ensure we always have a target descriptor, and that it is for the given VQ
|
|
|
|
|
value. */
|
2019-04-15 13:27:31 +02:00
|
|
|
|
const struct target_desc *tdesc = info.target_desc;
|
AArch64 SVE: Check for vector length change when getting gdbarch
Override the thread_architecture method, similar to SPU. If the vector
length has changed, then find the arch using info, making sure the vector
length is passed down to the init routine.
In the init routine, ensure the arch has the correct vector length.
Example output. Program is stopped in thread 2, just before it calls prctl
to change the vector length
(gdb) info threads
Id Target Id Frame
1 Thread 0xffffbf6f4000 (LWP 3188) "sve_change" 0x0000ffffbf6ae130 in pthread_join ()
* 2 Thread 0xffffbf55e200 (LWP 3189) "sve_change" thread1 (arg=0xfeedface) at sve_change_size.c:28
(gdb) print $vg
$1 = 8
(gdb) print $z0.s.u
$2 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}
(gdb) n
29 int ret = prctl(PR_SVE_SET_VL, vl/2);
(gdb) n
30 printf ("Changed: ret\n", ret);
(gdb) print $vg
$4 = 4
(gdb) print $z0.s.u
$5 = {623191333, 623191333, 623191333, 623191333, 0, 0, 0, 0}
(gdb) thr 1
[Switching to thread 1 (Thread 0xffffbf6f4000 (LWP 3181))]
(gdb) print $vg
$6 = 8
(gdb) print $z0.s.u
$7 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}
gdb/ChangeLog:
* aarch64-linux-nat.c
(aarch64_linux_nat_target::thread_architecture): Add override.
* aarch64-tdep.c (aarch64_gdbarch_init): Ensure different tdesc for
each VQ.
2019-04-15 13:29:40 +02:00
|
|
|
|
if (!tdesc_has_registers (tdesc) || vq != aarch64_get_tdesc_vq (tdesc))
|
|
|
|
|
tdesc = aarch64_read_description (vq, false);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
gdb_assert (tdesc);
|
|
|
|
|
|
2019-04-15 13:27:31 +02:00
|
|
|
|
feature_core = tdesc_find_feature (tdesc,"org.gnu.gdb.aarch64.core");
|
2018-06-04 12:39:41 +02:00
|
|
|
|
feature_fpu = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.fpu");
|
|
|
|
|
feature_sve = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.sve");
|
2019-03-22 11:31:02 +01:00
|
|
|
|
feature_pauth = tdesc_find_feature (tdesc, "org.gnu.gdb.aarch64.pauth");
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2019-04-15 13:27:31 +02:00
|
|
|
|
if (feature_core == nullptr)
|
|
|
|
|
return nullptr;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2019-04-15 13:27:31 +02:00
|
|
|
|
struct tdesc_arch_data *tdesc_data = tdesc_data_alloc ();
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2018-06-04 12:39:41 +02:00
|
|
|
|
/* Validate the description provides the mandatory core R registers
|
2013-02-04 13:48:37 +01:00
|
|
|
|
and allocate their numbers. */
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE (aarch64_r_register_names); i++)
|
2018-06-04 12:39:41 +02:00
|
|
|
|
valid_p &= tdesc_numbered_register (feature_core, tdesc_data,
|
|
|
|
|
AARCH64_X0_REGNUM + i,
|
|
|
|
|
aarch64_r_register_names[i]);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
num_regs = AARCH64_X0_REGNUM + i;
|
|
|
|
|
|
2018-06-04 12:39:41 +02:00
|
|
|
|
/* Add the V registers. */
|
2019-04-15 13:27:31 +02:00
|
|
|
|
if (feature_fpu != nullptr)
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
2019-04-15 13:27:31 +02:00
|
|
|
|
if (feature_sve != nullptr)
|
2018-06-04 12:39:41 +02:00
|
|
|
|
error (_("Program contains both fpu and SVE features."));
|
|
|
|
|
|
|
|
|
|
/* Validate the description provides the mandatory V registers
|
|
|
|
|
and allocate their numbers. */
|
2013-02-04 13:48:37 +01:00
|
|
|
|
for (i = 0; i < ARRAY_SIZE (aarch64_v_register_names); i++)
|
2018-06-04 12:39:41 +02:00
|
|
|
|
valid_p &= tdesc_numbered_register (feature_fpu, tdesc_data,
|
|
|
|
|
AARCH64_V0_REGNUM + i,
|
|
|
|
|
aarch64_v_register_names[i]);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
num_regs = AARCH64_V0_REGNUM + i;
|
2018-06-04 12:39:41 +02:00
|
|
|
|
}
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
2018-06-04 12:39:41 +02:00
|
|
|
|
/* Add the SVE registers. */
|
2019-04-15 13:27:31 +02:00
|
|
|
|
if (feature_sve != nullptr)
|
2018-06-04 12:39:41 +02:00
|
|
|
|
{
|
|
|
|
|
/* Validate the description provides the mandatory SVE registers
|
|
|
|
|
and allocate their numbers. */
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE (aarch64_sve_register_names); i++)
|
|
|
|
|
valid_p &= tdesc_numbered_register (feature_sve, tdesc_data,
|
|
|
|
|
AARCH64_SVE_Z0_REGNUM + i,
|
|
|
|
|
aarch64_sve_register_names[i]);
|
|
|
|
|
|
|
|
|
|
num_regs = AARCH64_SVE_Z0_REGNUM + i;
|
|
|
|
|
num_pseudo_regs += 32; /* add the Vn register pseudos. */
|
|
|
|
|
}
|
|
|
|
|
|
2019-04-15 13:27:31 +02:00
|
|
|
|
if (feature_fpu != nullptr || feature_sve != nullptr)
|
2018-06-04 12:39:41 +02:00
|
|
|
|
{
|
2013-02-04 13:48:37 +01:00
|
|
|
|
num_pseudo_regs += 32; /* add the Qn scalar register pseudos */
|
|
|
|
|
num_pseudo_regs += 32; /* add the Dn scalar register pseudos */
|
|
|
|
|
num_pseudo_regs += 32; /* add the Sn scalar register pseudos */
|
|
|
|
|
num_pseudo_regs += 32; /* add the Hn scalar register pseudos */
|
|
|
|
|
num_pseudo_regs += 32; /* add the Bn scalar register pseudos */
|
|
|
|
|
}
|
|
|
|
|
|
2019-03-22 11:31:02 +01:00
|
|
|
|
/* Add the pauth registers. */
|
|
|
|
|
if (feature_pauth != NULL)
|
|
|
|
|
{
|
|
|
|
|
first_pauth_regnum = num_regs;
|
2019-03-22 11:37:46 +01:00
|
|
|
|
pauth_ra_state_offset = num_pseudo_regs;
|
2019-03-22 11:31:02 +01:00
|
|
|
|
/* Validate the descriptor provides the mandatory PAUTH registers and
|
|
|
|
|
allocate their numbers. */
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE (aarch64_pauth_register_names); i++)
|
|
|
|
|
valid_p &= tdesc_numbered_register (feature_pauth, tdesc_data,
|
|
|
|
|
first_pauth_regnum + i,
|
|
|
|
|
aarch64_pauth_register_names[i]);
|
|
|
|
|
|
|
|
|
|
num_regs += i;
|
2019-03-22 11:37:46 +01:00
|
|
|
|
num_pseudo_regs += 1; /* Count RA_STATE pseudo register. */
|
2019-03-22 11:31:02 +01:00
|
|
|
|
}
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
if (!valid_p)
|
|
|
|
|
{
|
|
|
|
|
tdesc_data_cleanup (tdesc_data);
|
2019-04-15 13:27:31 +02:00
|
|
|
|
return nullptr;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* AArch64 code is always little-endian. */
|
|
|
|
|
info.byte_order_for_code = BFD_ENDIAN_LITTLE;
|
|
|
|
|
|
2019-04-15 13:27:31 +02:00
|
|
|
|
struct gdbarch_tdep *tdep = XCNEW (struct gdbarch_tdep);
|
|
|
|
|
struct gdbarch *gdbarch = gdbarch_alloc (&info, tdep);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* This should be low enough for everything. */
|
|
|
|
|
tdep->lowest_pc = 0x20;
|
|
|
|
|
tdep->jb_pc = -1; /* Longjump support not enabled by default. */
|
|
|
|
|
tdep->jb_elt_size = 8;
|
AArch64 SVE: Check for vector length change when getting gdbarch
Override the thread_architecture method, similar to SPU. If the vector
length has changed, then find the arch using info, making sure the vector
length is passed down to the init routine.
In the init routine, ensure the arch has the correct vector length.
Example output. Program is stopped in thread 2, just before it calls prctl
to change the vector length
(gdb) info threads
Id Target Id Frame
1 Thread 0xffffbf6f4000 (LWP 3188) "sve_change" 0x0000ffffbf6ae130 in pthread_join ()
* 2 Thread 0xffffbf55e200 (LWP 3189) "sve_change" thread1 (arg=0xfeedface) at sve_change_size.c:28
(gdb) print $vg
$1 = 8
(gdb) print $z0.s.u
$2 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}
(gdb) n
29 int ret = prctl(PR_SVE_SET_VL, vl/2);
(gdb) n
30 printf ("Changed: ret\n", ret);
(gdb) print $vg
$4 = 4
(gdb) print $z0.s.u
$5 = {623191333, 623191333, 623191333, 623191333, 0, 0, 0, 0}
(gdb) thr 1
[Switching to thread 1 (Thread 0xffffbf6f4000 (LWP 3181))]
(gdb) print $vg
$6 = 8
(gdb) print $z0.s.u
$7 = {623191333, 623191333, 623191333, 623191333, 0 <repeats 12 times>}
gdb/ChangeLog:
* aarch64-linux-nat.c
(aarch64_linux_nat_target::thread_architecture): Add override.
* aarch64-tdep.c (aarch64_gdbarch_init): Ensure different tdesc for
each VQ.
2019-04-15 13:29:40 +02:00
|
|
|
|
tdep->vq = vq;
|
2019-03-22 11:31:02 +01:00
|
|
|
|
tdep->pauth_reg_base = first_pauth_regnum;
|
2019-03-22 11:37:46 +01:00
|
|
|
|
tdep->pauth_ra_state_regnum = (feature_pauth == NULL) ? -1
|
|
|
|
|
: pauth_ra_state_offset + num_regs;
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
set_gdbarch_push_dummy_call (gdbarch, aarch64_push_dummy_call);
|
|
|
|
|
set_gdbarch_frame_align (gdbarch, aarch64_frame_align);
|
|
|
|
|
|
|
|
|
|
/* Advance PC across function entry code. */
|
|
|
|
|
set_gdbarch_skip_prologue (gdbarch, aarch64_skip_prologue);
|
|
|
|
|
|
|
|
|
|
/* The stack grows downward. */
|
|
|
|
|
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
|
|
|
|
|
|
|
|
|
|
/* Breakpoint manipulation. */
|
2016-11-03 15:35:14 +01:00
|
|
|
|
set_gdbarch_breakpoint_kind_from_pc (gdbarch,
|
|
|
|
|
aarch64_breakpoint::kind_from_pc);
|
|
|
|
|
set_gdbarch_sw_breakpoint_from_kind (gdbarch,
|
|
|
|
|
aarch64_breakpoint::bp_from_kind);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1);
|
2014-04-30 18:04:50 +02:00
|
|
|
|
set_gdbarch_software_single_step (gdbarch, aarch64_software_single_step);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* Information about registers, etc. */
|
|
|
|
|
set_gdbarch_sp_regnum (gdbarch, AARCH64_SP_REGNUM);
|
|
|
|
|
set_gdbarch_pc_regnum (gdbarch, AARCH64_PC_REGNUM);
|
|
|
|
|
set_gdbarch_num_regs (gdbarch, num_regs);
|
|
|
|
|
|
|
|
|
|
set_gdbarch_num_pseudo_regs (gdbarch, num_pseudo_regs);
|
|
|
|
|
set_gdbarch_pseudo_register_read_value (gdbarch, aarch64_pseudo_read_value);
|
|
|
|
|
set_gdbarch_pseudo_register_write (gdbarch, aarch64_pseudo_write);
|
|
|
|
|
set_tdesc_pseudo_register_name (gdbarch, aarch64_pseudo_register_name);
|
|
|
|
|
set_tdesc_pseudo_register_type (gdbarch, aarch64_pseudo_register_type);
|
|
|
|
|
set_tdesc_pseudo_register_reggroup_p (gdbarch,
|
|
|
|
|
aarch64_pseudo_register_reggroup_p);
|
2019-03-22 11:31:02 +01:00
|
|
|
|
set_gdbarch_cannot_store_register (gdbarch, aarch64_cannot_store_register);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* ABI */
|
|
|
|
|
set_gdbarch_short_bit (gdbarch, 16);
|
|
|
|
|
set_gdbarch_int_bit (gdbarch, 32);
|
|
|
|
|
set_gdbarch_float_bit (gdbarch, 32);
|
|
|
|
|
set_gdbarch_double_bit (gdbarch, 64);
|
|
|
|
|
set_gdbarch_long_double_bit (gdbarch, 128);
|
|
|
|
|
set_gdbarch_long_bit (gdbarch, 64);
|
|
|
|
|
set_gdbarch_long_long_bit (gdbarch, 64);
|
|
|
|
|
set_gdbarch_ptr_bit (gdbarch, 64);
|
|
|
|
|
set_gdbarch_char_signed (gdbarch, 0);
|
Teach GDB that wchar_t is a built-in type in C++ mode
GDB is currently not aware that wchar_t is a built-in type in C++
mode. This is usually not a problem because the debug info describes
the type, so when you have a program loaded, you don't notice this.
However, if you try expressions involving wchar_t before a program is
loaded, gdb errors out:
(gdb) p (wchar_t)-1
No symbol table is loaded. Use the "file" command.
(gdb) p L"hello"
No type named wchar_t.
(gdb) ptype L"hello"
No type named wchar_t.
This commit teaches gdb about the type. After:
(gdb) p (wchar_t)-1
$1 = -1 L'\xffffffff'
(gdb) p L"hello"
$2 = L"hello"
(gdb) ptype L"hello"
type = wchar_t [6]
Unlike char16_t/char32_t, unfortunately, the underlying type of
wchar_t is implementation dependent, both size and signness. So this
requires adding a couple new gdbarch hooks.
I grepped the GCC code base for WCHAR_TYPE and WCHAR_TYPE_SIZE, and it
seems to me that the majority of the ABIs have a 4-byte signed
wchar_t, so that's what I made the default for GDB too. And then I
looked for which ports have a 16-bit and/or unsigned wchar_t, and made
GDB follow suit.
gdb/ChangeLog:
2017-04-12 Pedro Alves <palves@redhat.com>
PR gdb/21323
* c-lang.c (cplus_primitive_types) <cplus_primitive_type_wchar_t>:
New enum value.
(cplus_language_arch_info): Register cplus_primitive_type_wchar_t.
* gdbtypes.h (struct builtin_type) <builtin_wchar>: New field.
* gdbtypes.c (gdbtypes_post_init): Create the "wchar_t" type.
* gdbarch.sh (wchar_bit, wchar_signed): New per-arch values.
* gdbarch.h, gdbarch.c: Regenerate.
* aarch64-tdep.c (aarch64_gdbarch_init): Override
gdbarch_wchar_bit and gdbarch_wchar_signed.
* alpha-tdep.c (alpha_gdbarch_init): Likewise.
* arm-tdep.c (arm_gdbarch_init): Likewise.
* avr-tdep.c (avr_gdbarch_init): Likewise.
* h8300-tdep.c (h8300_gdbarch_init): Likewise.
* i386-nto-tdep.c (i386nto_init_abi): Likewise.
* i386-tdep.c (i386_go32_init_abi): Likewise.
* m32r-tdep.c (m32r_gdbarch_init): Likewise.
* moxie-tdep.c (moxie_gdbarch_init): Likewise.
* nds32-tdep.c (nds32_gdbarch_init): Likewise.
* rs6000-aix-tdep.c (rs6000_aix_init_osabi): Likewise.
* sh-tdep.c (sh_gdbarch_init): Likewise.
* sparc-tdep.c (sparc32_gdbarch_init): Likewise.
* sparc64-tdep.c (sparc64_init_abi): Likewise.
* windows-tdep.c (windows_init_abi): Likewise.
* xstormy16-tdep.c (xstormy16_gdbarch_init): Likewise.
gdb/testsuite/ChangeLog:
2017-04-12 Pedro Alves <palves@redhat.com>
PR gdb/21323
* gdb.cp/wide_char_types.c: Include <wchar.h>.
(wchar): New global.
* gdb.cp/wide_char_types.exp (wide_char_types_program)
(do_test_wide_char, wide_char_types_no_program, top level): Add
wchar_t testing.
2017-04-12 15:00:49 +02:00
|
|
|
|
set_gdbarch_wchar_signed (gdbarch, 0);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
|
|
|
|
|
set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
|
|
|
|
|
set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
|
2019-04-07 23:48:00 +02:00
|
|
|
|
set_gdbarch_type_align (gdbarch, aarch64_type_align);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* Internal <-> external register number maps. */
|
|
|
|
|
set_gdbarch_dwarf2_reg_to_regnum (gdbarch, aarch64_dwarf_reg_to_regnum);
|
|
|
|
|
|
|
|
|
|
/* Returning results. */
|
|
|
|
|
set_gdbarch_return_value (gdbarch, aarch64_return_value);
|
|
|
|
|
|
|
|
|
|
/* Disassembly. */
|
|
|
|
|
set_gdbarch_print_insn (gdbarch, aarch64_gdb_print_insn);
|
|
|
|
|
|
|
|
|
|
/* Virtual tables. */
|
|
|
|
|
set_gdbarch_vbit_in_delta (gdbarch, 1);
|
|
|
|
|
|
2019-02-20 12:56:23 +01:00
|
|
|
|
/* Register architecture. */
|
|
|
|
|
aarch64_add_reggroups (gdbarch);
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
/* Hook in the ABI-specific overrides, if they have been registered. */
|
|
|
|
|
info.target_desc = tdesc;
|
2017-08-07 16:53:54 +02:00
|
|
|
|
info.tdesc_data = tdesc_data;
|
2013-02-04 13:48:37 +01:00
|
|
|
|
gdbarch_init_osabi (info, gdbarch);
|
|
|
|
|
|
|
|
|
|
dwarf2_frame_set_init_reg (gdbarch, aarch64_dwarf2_frame_init_reg);
|
2019-03-22 11:39:11 +01:00
|
|
|
|
/* Register DWARF CFA vendor handler. */
|
|
|
|
|
set_gdbarch_execute_dwarf_cfa_vendor_op (gdbarch,
|
|
|
|
|
aarch64_execute_dwarf_cfa_vendor_op);
|
2013-02-04 13:48:37 +01:00
|
|
|
|
|
|
|
|
|
/* Add some default predicates. */
|
|
|
|
|
frame_unwind_append_unwinder (gdbarch, &aarch64_stub_unwind);
|
|
|
|
|
dwarf2_append_unwinders (gdbarch);
|
|
|
|
|
frame_unwind_append_unwinder (gdbarch, &aarch64_prologue_unwind);
|
|
|
|
|
|
|
|
|
|
frame_base_set_default (gdbarch, &aarch64_normal_base);
|
|
|
|
|
|
|
|
|
|
/* Now we have tuned the configuration, set a few final things,
|
|
|
|
|
based on what the OS ABI has told us. */
|
|
|
|
|
|
|
|
|
|
if (tdep->jb_pc >= 0)
|
|
|
|
|
set_gdbarch_get_longjmp_target (gdbarch, aarch64_get_longjmp_target);
|
|
|
|
|
|
2015-07-09 17:35:11 +02:00
|
|
|
|
set_gdbarch_gen_return_address (gdbarch, aarch64_gen_return_address);
|
|
|
|
|
|
2019-08-16 11:19:18 +02:00
|
|
|
|
set_gdbarch_get_pc_address_flags (gdbarch, aarch64_get_pc_address_flags);
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
tdesc_use_registers (gdbarch, tdesc, tdesc_data);
|
|
|
|
|
|
|
|
|
|
/* Add standard register aliases. */
|
|
|
|
|
for (i = 0; i < ARRAY_SIZE (aarch64_register_aliases); i++)
|
|
|
|
|
user_reg_add (gdbarch, aarch64_register_aliases[i].name,
|
|
|
|
|
value_of_aarch64_user_reg,
|
|
|
|
|
&aarch64_register_aliases[i].regnum);
|
|
|
|
|
|
2018-11-02 18:37:29 +01:00
|
|
|
|
register_aarch64_ravenscar_ops (gdbarch);
|
|
|
|
|
|
2013-02-04 13:48:37 +01:00
|
|
|
|
return gdbarch;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
|
|
|
|
|
|
|
|
|
|
if (tdep == NULL)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
fprintf_unfiltered (file, _("aarch64_dump_tdep: Lowest pc = 0x%s"),
|
|
|
|
|
paddress (gdbarch, tdep->lowest_pc));
|
|
|
|
|
}
|
|
|
|
|
|
2017-04-21 16:14:37 +02:00
|
|
|
|
#if GDB_SELF_TEST
|
2017-03-23 15:11:04 +01:00
|
|
|
|
namespace selftests
|
|
|
|
|
{
|
|
|
|
|
static void aarch64_process_record_test (void);
|
|
|
|
|
}
|
2017-04-21 16:14:37 +02:00
|
|
|
|
#endif
|
2017-03-23 15:11:04 +01:00
|
|
|
|
|
2020-01-13 20:01:38 +01:00
|
|
|
|
void _initialize_aarch64_tdep ();
|
2013-02-04 13:48:37 +01:00
|
|
|
|
void
|
2020-01-13 20:01:38 +01:00
|
|
|
|
_initialize_aarch64_tdep ()
|
2013-02-04 13:48:37 +01:00
|
|
|
|
{
|
|
|
|
|
gdbarch_register (bfd_arch_aarch64, aarch64_gdbarch_init,
|
|
|
|
|
aarch64_dump_tdep);
|
|
|
|
|
|
|
|
|
|
/* Debug this file's internals. */
|
|
|
|
|
add_setshow_boolean_cmd ("aarch64", class_maintenance, &aarch64_debug, _("\
|
|
|
|
|
Set AArch64 debugging."), _("\
|
|
|
|
|
Show AArch64 debugging."), _("\
|
|
|
|
|
When on, AArch64 specific debugging is enabled."),
|
|
|
|
|
NULL,
|
|
|
|
|
show_aarch64_debug,
|
|
|
|
|
&setdebuglist, &showdebuglist);
|
2016-12-02 10:37:30 +01:00
|
|
|
|
|
|
|
|
|
#if GDB_SELF_TEST
|
Add selftests run filtering
With the growing number of selftests, I think it would be useful to be
able to run only a subset of the tests. This patch associates a name to
each registered selftest. It then allows doing something like:
(gdb) maintenance selftest aarch64
Running self-tests.
Running selftest aarch64-analyze-prologue.
Running selftest aarch64-process-record.
Ran 2 unit tests, 0 failed
or with gdbserver:
./gdbserver --selftest=aarch64
In both cases, only the tests that contain "aarch64" in their name are
ran. To help validate that the tests you want to run were actually ran,
it also prints a message with the test name before running each test.
Right now, all the arch-dependent tests are registered as a single test
of the selftests. To be able to filter those too, I made them
"first-class citizen" selftests. The selftest type is an interface,
with different implementations for "simple selftests" and "arch
selftests". The run_tests function simply iterates on that an invokes
operator() on each test.
I changed the tests data structure from a vector to a map, because
- it allows iterating in a stable (alphabetical) order
- it allows to easily verify if a test with a given name has been
registered, to avoid duplicates
There's also a new command "maintenance info selftests" that lists the
registered selftests.
gdb/ChangeLog:
* common/selftest.h (selftest): New struct/interface.
(register_test): Add name parameter, add new overload.
(run_tests): Add filter parameter.
(for_each_selftest_ftype): New typedef.
(for_each_selftest): New declaration.
* common/selftest.c (tests): Change type to
map<string, unique_ptr<selftest>>.
(simple_selftest): New struct.
(register_test): New function.
(register_test): Add name parameter and use it.
(run_tests): Add filter parameter and use it. Add prints.
Adjust to vector -> map change.
* aarch64-tdep.c (_initialize_aarch64_tdep): Add names when
registering selftests.
* arm-tdep.c (_initialize_arm_tdep): Likewise.
* disasm-selftests.c (_initialize_disasm_selftests): Likewise.
* dwarf2-frame.c (_initialize_dwarf2_frame): Likewise.
* dwarf2loc.c (_initialize_dwarf2loc): Likewise.
* findvar.c (_initialize_findvar): Likewise.
* gdbarch-selftests.c (_initialize_gdbarch_selftests): Likewise.
* maint.c (maintenance_selftest): Update call to run_tests.
(maintenance_info_selftests): New function.
(_initialize_maint_cmds): Register "maintenance info selftests"
command. Update "maintenance selftest" doc.
* regcache.c (_initialize_regcache): Add names when registering
selftests.
* rust-exp.y (_initialize_rust_exp): Likewise.
* selftest-arch.c (gdbarch_selftest): New struct.
(gdbarch_tests): Remove.
(register_test_foreach_arch): Add name parameter. Call
register_test.
(tests_with_arch): Remove, move most content to
gdbarch_selftest::operator().
(_initialize_selftests_foreach_arch): Remove.
* selftest-arch.h (register_test_foreach_arch): Add name
parameter.
(run_tests_with_arch): New declaration.
* utils-selftests.c (_initialize_utils_selftests): Add names
when registering selftests.
* utils.c (_initialize_utils): Likewise.
* unittests/array-view-selftests.c
(_initialize_array_view_selftests): Likewise.
* unittests/environ-selftests.c (_initialize_environ_selftests):
Likewise.
* unittests/function-view-selftests.c
(_initialize_function_view_selftests): Likewise.
* unittests/offset-type-selftests.c
(_initialize_offset_type_selftests): Likewise.
* unittests/optional-selftests.c
(_initialize_optional_selftests): Likewise.
* unittests/scoped_restore-selftests.c
(_initialize_scoped_restore_selftests): Likewise.
* NEWS: Document "maintenance selftest" and "maint info
selftests".
gdb/gdbserver/ChangeLog:
* server.c (captured_main): Accept argument for --selftest.
Update run_tests call.
* linux-x86-tdesc-selftest.c (initialize_low_tdesc): Add names
when registering selftests.
gdb/doc/ChangeLog:
* gdb.texinfo (Maintenance Commands): Document filter parameter
of "maint selftest". Document "maint info selftests" command.
2017-09-16 14:06:03 +02:00
|
|
|
|
selftests::register_test ("aarch64-analyze-prologue",
|
|
|
|
|
selftests::aarch64_analyze_prologue_test);
|
|
|
|
|
selftests::register_test ("aarch64-process-record",
|
|
|
|
|
selftests::aarch64_process_record_test);
|
2016-12-02 10:37:30 +01:00
|
|
|
|
#endif
|
2013-02-04 13:48:37 +01:00
|
|
|
|
}
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
/* AArch64 process record-replay related structures, defines etc. */
|
|
|
|
|
|
|
|
|
|
#define REG_ALLOC(REGS, LENGTH, RECORD_BUF) \
|
|
|
|
|
do \
|
|
|
|
|
{ \
|
|
|
|
|
unsigned int reg_len = LENGTH; \
|
|
|
|
|
if (reg_len) \
|
|
|
|
|
{ \
|
|
|
|
|
REGS = XNEWVEC (uint32_t, reg_len); \
|
|
|
|
|
memcpy(®S[0], &RECORD_BUF[0], sizeof(uint32_t)*LENGTH); \
|
|
|
|
|
} \
|
|
|
|
|
} \
|
|
|
|
|
while (0)
|
|
|
|
|
|
|
|
|
|
#define MEM_ALLOC(MEMS, LENGTH, RECORD_BUF) \
|
|
|
|
|
do \
|
|
|
|
|
{ \
|
|
|
|
|
unsigned int mem_len = LENGTH; \
|
|
|
|
|
if (mem_len) \
|
|
|
|
|
{ \
|
|
|
|
|
MEMS = XNEWVEC (struct aarch64_mem_r, mem_len); \
|
|
|
|
|
memcpy(&MEMS->len, &RECORD_BUF[0], \
|
|
|
|
|
sizeof(struct aarch64_mem_r) * LENGTH); \
|
|
|
|
|
} \
|
|
|
|
|
} \
|
|
|
|
|
while (0)
|
|
|
|
|
|
|
|
|
|
/* AArch64 record/replay structures and enumerations. */
|
|
|
|
|
|
|
|
|
|
struct aarch64_mem_r
|
|
|
|
|
{
|
|
|
|
|
uint64_t len; /* Record length. */
|
|
|
|
|
uint64_t addr; /* Memory address. */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
enum aarch64_record_result
|
|
|
|
|
{
|
|
|
|
|
AARCH64_RECORD_SUCCESS,
|
|
|
|
|
AARCH64_RECORD_UNSUPPORTED,
|
|
|
|
|
AARCH64_RECORD_UNKNOWN
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
typedef struct insn_decode_record_t
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch *gdbarch;
|
|
|
|
|
struct regcache *regcache;
|
|
|
|
|
CORE_ADDR this_addr; /* Address of insn to be recorded. */
|
|
|
|
|
uint32_t aarch64_insn; /* Insn to be recorded. */
|
|
|
|
|
uint32_t mem_rec_count; /* Count of memory records. */
|
|
|
|
|
uint32_t reg_rec_count; /* Count of register records. */
|
|
|
|
|
uint32_t *aarch64_regs; /* Registers to be recorded. */
|
|
|
|
|
struct aarch64_mem_r *aarch64_mems; /* Memory locations to be recorded. */
|
|
|
|
|
} insn_decode_record;
|
|
|
|
|
|
|
|
|
|
/* Record handler for data processing - register instructions. */
|
|
|
|
|
|
|
|
|
|
static unsigned int
|
|
|
|
|
aarch64_record_data_proc_reg (insn_decode_record *aarch64_insn_r)
|
|
|
|
|
{
|
|
|
|
|
uint8_t reg_rd, insn_bits24_27, insn_bits21_23;
|
|
|
|
|
uint32_t record_buf[4];
|
|
|
|
|
|
|
|
|
|
reg_rd = bits (aarch64_insn_r->aarch64_insn, 0, 4);
|
|
|
|
|
insn_bits24_27 = bits (aarch64_insn_r->aarch64_insn, 24, 27);
|
|
|
|
|
insn_bits21_23 = bits (aarch64_insn_r->aarch64_insn, 21, 23);
|
|
|
|
|
|
|
|
|
|
if (!bit (aarch64_insn_r->aarch64_insn, 28))
|
|
|
|
|
{
|
|
|
|
|
uint8_t setflags;
|
|
|
|
|
|
|
|
|
|
/* Logical (shifted register). */
|
|
|
|
|
if (insn_bits24_27 == 0x0a)
|
|
|
|
|
setflags = (bits (aarch64_insn_r->aarch64_insn, 29, 30) == 0x03);
|
|
|
|
|
/* Add/subtract. */
|
|
|
|
|
else if (insn_bits24_27 == 0x0b)
|
|
|
|
|
setflags = bit (aarch64_insn_r->aarch64_insn, 29);
|
|
|
|
|
else
|
|
|
|
|
return AARCH64_RECORD_UNKNOWN;
|
|
|
|
|
|
|
|
|
|
record_buf[0] = reg_rd;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
if (setflags)
|
|
|
|
|
record_buf[aarch64_insn_r->reg_rec_count++] = AARCH64_CPSR_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (insn_bits24_27 == 0x0b)
|
|
|
|
|
{
|
|
|
|
|
/* Data-processing (3 source). */
|
|
|
|
|
record_buf[0] = reg_rd;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
else if (insn_bits24_27 == 0x0a)
|
|
|
|
|
{
|
|
|
|
|
if (insn_bits21_23 == 0x00)
|
|
|
|
|
{
|
|
|
|
|
/* Add/subtract (with carry). */
|
|
|
|
|
record_buf[0] = reg_rd;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
if (bit (aarch64_insn_r->aarch64_insn, 29))
|
|
|
|
|
{
|
|
|
|
|
record_buf[1] = AARCH64_CPSR_REGNUM;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 2;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else if (insn_bits21_23 == 0x02)
|
|
|
|
|
{
|
|
|
|
|
/* Conditional compare (register) and conditional compare
|
|
|
|
|
(immediate) instructions. */
|
|
|
|
|
record_buf[0] = AARCH64_CPSR_REGNUM;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
else if (insn_bits21_23 == 0x04 || insn_bits21_23 == 0x06)
|
|
|
|
|
{
|
2019-10-18 02:48:08 +02:00
|
|
|
|
/* Conditional select. */
|
2015-05-11 13:10:46 +02:00
|
|
|
|
/* Data-processing (2 source). */
|
|
|
|
|
/* Data-processing (1 source). */
|
|
|
|
|
record_buf[0] = reg_rd;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return AARCH64_RECORD_UNKNOWN;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
REG_ALLOC (aarch64_insn_r->aarch64_regs, aarch64_insn_r->reg_rec_count,
|
|
|
|
|
record_buf);
|
|
|
|
|
return AARCH64_RECORD_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Record handler for data processing - immediate instructions. */
|
|
|
|
|
|
|
|
|
|
static unsigned int
|
|
|
|
|
aarch64_record_data_proc_imm (insn_decode_record *aarch64_insn_r)
|
|
|
|
|
{
|
2016-06-06 22:18:30 +02:00
|
|
|
|
uint8_t reg_rd, insn_bit23, insn_bits24_27, setflags;
|
2015-05-11 13:10:46 +02:00
|
|
|
|
uint32_t record_buf[4];
|
|
|
|
|
|
|
|
|
|
reg_rd = bits (aarch64_insn_r->aarch64_insn, 0, 4);
|
|
|
|
|
insn_bit23 = bit (aarch64_insn_r->aarch64_insn, 23);
|
|
|
|
|
insn_bits24_27 = bits (aarch64_insn_r->aarch64_insn, 24, 27);
|
|
|
|
|
|
|
|
|
|
if (insn_bits24_27 == 0x00 /* PC rel addressing. */
|
|
|
|
|
|| insn_bits24_27 == 0x03 /* Bitfield and Extract. */
|
|
|
|
|
|| (insn_bits24_27 == 0x02 && insn_bit23)) /* Move wide (immediate). */
|
|
|
|
|
{
|
|
|
|
|
record_buf[0] = reg_rd;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
else if (insn_bits24_27 == 0x01)
|
|
|
|
|
{
|
|
|
|
|
/* Add/Subtract (immediate). */
|
|
|
|
|
setflags = bit (aarch64_insn_r->aarch64_insn, 29);
|
|
|
|
|
record_buf[0] = reg_rd;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
if (setflags)
|
|
|
|
|
record_buf[aarch64_insn_r->reg_rec_count++] = AARCH64_CPSR_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
else if (insn_bits24_27 == 0x02 && !insn_bit23)
|
|
|
|
|
{
|
|
|
|
|
/* Logical (immediate). */
|
|
|
|
|
setflags = bits (aarch64_insn_r->aarch64_insn, 29, 30) == 0x03;
|
|
|
|
|
record_buf[0] = reg_rd;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
if (setflags)
|
|
|
|
|
record_buf[aarch64_insn_r->reg_rec_count++] = AARCH64_CPSR_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return AARCH64_RECORD_UNKNOWN;
|
|
|
|
|
|
|
|
|
|
REG_ALLOC (aarch64_insn_r->aarch64_regs, aarch64_insn_r->reg_rec_count,
|
|
|
|
|
record_buf);
|
|
|
|
|
return AARCH64_RECORD_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Record handler for branch, exception generation and system instructions. */
|
|
|
|
|
|
|
|
|
|
static unsigned int
|
|
|
|
|
aarch64_record_branch_except_sys (insn_decode_record *aarch64_insn_r)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_tdep *tdep = gdbarch_tdep (aarch64_insn_r->gdbarch);
|
|
|
|
|
uint8_t insn_bits24_27, insn_bits28_31, insn_bits22_23;
|
|
|
|
|
uint32_t record_buf[4];
|
|
|
|
|
|
|
|
|
|
insn_bits24_27 = bits (aarch64_insn_r->aarch64_insn, 24, 27);
|
|
|
|
|
insn_bits28_31 = bits (aarch64_insn_r->aarch64_insn, 28, 31);
|
|
|
|
|
insn_bits22_23 = bits (aarch64_insn_r->aarch64_insn, 22, 23);
|
|
|
|
|
|
|
|
|
|
if (insn_bits28_31 == 0x0d)
|
|
|
|
|
{
|
|
|
|
|
/* Exception generation instructions. */
|
|
|
|
|
if (insn_bits24_27 == 0x04)
|
|
|
|
|
{
|
2015-05-27 12:29:24 +02:00
|
|
|
|
if (!bits (aarch64_insn_r->aarch64_insn, 2, 4)
|
|
|
|
|
&& !bits (aarch64_insn_r->aarch64_insn, 21, 23)
|
|
|
|
|
&& bits (aarch64_insn_r->aarch64_insn, 0, 1) == 0x01)
|
2015-05-11 13:10:46 +02:00
|
|
|
|
{
|
|
|
|
|
ULONGEST svc_number;
|
|
|
|
|
|
|
|
|
|
regcache_raw_read_unsigned (aarch64_insn_r->regcache, 8,
|
|
|
|
|
&svc_number);
|
|
|
|
|
return tdep->aarch64_syscall_record (aarch64_insn_r->regcache,
|
|
|
|
|
svc_number);
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return AARCH64_RECORD_UNSUPPORTED;
|
|
|
|
|
}
|
|
|
|
|
/* System instructions. */
|
|
|
|
|
else if (insn_bits24_27 == 0x05 && insn_bits22_23 == 0x00)
|
|
|
|
|
{
|
|
|
|
|
uint32_t reg_rt, reg_crn;
|
|
|
|
|
|
|
|
|
|
reg_rt = bits (aarch64_insn_r->aarch64_insn, 0, 4);
|
|
|
|
|
reg_crn = bits (aarch64_insn_r->aarch64_insn, 12, 15);
|
|
|
|
|
|
|
|
|
|
/* Record rt in case of sysl and mrs instructions. */
|
|
|
|
|
if (bit (aarch64_insn_r->aarch64_insn, 21))
|
|
|
|
|
{
|
|
|
|
|
record_buf[0] = reg_rt;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
/* Record cpsr for hint and msr(immediate) instructions. */
|
|
|
|
|
else if (reg_crn == 0x02 || reg_crn == 0x04)
|
|
|
|
|
{
|
|
|
|
|
record_buf[0] = AARCH64_CPSR_REGNUM;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
/* Unconditional branch (register). */
|
|
|
|
|
else if((insn_bits24_27 & 0x0e) == 0x06)
|
|
|
|
|
{
|
|
|
|
|
record_buf[aarch64_insn_r->reg_rec_count++] = AARCH64_PC_REGNUM;
|
|
|
|
|
if (bits (aarch64_insn_r->aarch64_insn, 21, 22) == 0x01)
|
|
|
|
|
record_buf[aarch64_insn_r->reg_rec_count++] = AARCH64_LR_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return AARCH64_RECORD_UNKNOWN;
|
|
|
|
|
}
|
|
|
|
|
/* Unconditional branch (immediate). */
|
|
|
|
|
else if ((insn_bits28_31 & 0x07) == 0x01 && (insn_bits24_27 & 0x0c) == 0x04)
|
|
|
|
|
{
|
|
|
|
|
record_buf[aarch64_insn_r->reg_rec_count++] = AARCH64_PC_REGNUM;
|
|
|
|
|
if (bit (aarch64_insn_r->aarch64_insn, 31))
|
|
|
|
|
record_buf[aarch64_insn_r->reg_rec_count++] = AARCH64_LR_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
/* Compare & branch (immediate), Test & branch (immediate) and
|
|
|
|
|
Conditional branch (immediate). */
|
|
|
|
|
record_buf[aarch64_insn_r->reg_rec_count++] = AARCH64_PC_REGNUM;
|
|
|
|
|
|
|
|
|
|
REG_ALLOC (aarch64_insn_r->aarch64_regs, aarch64_insn_r->reg_rec_count,
|
|
|
|
|
record_buf);
|
|
|
|
|
return AARCH64_RECORD_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Record handler for advanced SIMD load and store instructions. */
|
|
|
|
|
|
|
|
|
|
static unsigned int
|
|
|
|
|
aarch64_record_asimd_load_store (insn_decode_record *aarch64_insn_r)
|
|
|
|
|
{
|
|
|
|
|
CORE_ADDR address;
|
|
|
|
|
uint64_t addr_offset = 0;
|
|
|
|
|
uint32_t record_buf[24];
|
|
|
|
|
uint64_t record_buf_mem[24];
|
|
|
|
|
uint32_t reg_rn, reg_rt;
|
|
|
|
|
uint32_t reg_index = 0, mem_index = 0;
|
|
|
|
|
uint8_t opcode_bits, size_bits;
|
|
|
|
|
|
|
|
|
|
reg_rt = bits (aarch64_insn_r->aarch64_insn, 0, 4);
|
|
|
|
|
reg_rn = bits (aarch64_insn_r->aarch64_insn, 5, 9);
|
|
|
|
|
size_bits = bits (aarch64_insn_r->aarch64_insn, 10, 11);
|
|
|
|
|
opcode_bits = bits (aarch64_insn_r->aarch64_insn, 12, 15);
|
|
|
|
|
regcache_raw_read_unsigned (aarch64_insn_r->regcache, reg_rn, &address);
|
|
|
|
|
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("Process record: Advanced SIMD load/store\n");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
/* Load/store single structure. */
|
|
|
|
|
if (bit (aarch64_insn_r->aarch64_insn, 24))
|
|
|
|
|
{
|
|
|
|
|
uint8_t sindex, scale, selem, esize, replicate = 0;
|
|
|
|
|
scale = opcode_bits >> 2;
|
|
|
|
|
selem = ((opcode_bits & 0x02) |
|
|
|
|
|
bit (aarch64_insn_r->aarch64_insn, 21)) + 1;
|
|
|
|
|
switch (scale)
|
|
|
|
|
{
|
|
|
|
|
case 1:
|
|
|
|
|
if (size_bits & 0x01)
|
|
|
|
|
return AARCH64_RECORD_UNKNOWN;
|
|
|
|
|
break;
|
|
|
|
|
case 2:
|
|
|
|
|
if ((size_bits >> 1) & 0x01)
|
|
|
|
|
return AARCH64_RECORD_UNKNOWN;
|
|
|
|
|
if (size_bits & 0x01)
|
|
|
|
|
{
|
|
|
|
|
if (!((opcode_bits >> 1) & 0x01))
|
|
|
|
|
scale = 3;
|
|
|
|
|
else
|
|
|
|
|
return AARCH64_RECORD_UNKNOWN;
|
|
|
|
|
}
|
|
|
|
|
break;
|
|
|
|
|
case 3:
|
|
|
|
|
if (bit (aarch64_insn_r->aarch64_insn, 22) && !(opcode_bits & 0x01))
|
|
|
|
|
{
|
|
|
|
|
scale = size_bits;
|
|
|
|
|
replicate = 1;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
return AARCH64_RECORD_UNKNOWN;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
esize = 8 << scale;
|
|
|
|
|
if (replicate)
|
|
|
|
|
for (sindex = 0; sindex < selem; sindex++)
|
|
|
|
|
{
|
|
|
|
|
record_buf[reg_index++] = reg_rt + AARCH64_V0_REGNUM;
|
|
|
|
|
reg_rt = (reg_rt + 1) % 32;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
for (sindex = 0; sindex < selem; sindex++)
|
2016-01-29 21:32:29 +01:00
|
|
|
|
{
|
|
|
|
|
if (bit (aarch64_insn_r->aarch64_insn, 22))
|
|
|
|
|
record_buf[reg_index++] = reg_rt + AARCH64_V0_REGNUM;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
record_buf_mem[mem_index++] = esize / 8;
|
|
|
|
|
record_buf_mem[mem_index++] = address + addr_offset;
|
|
|
|
|
}
|
|
|
|
|
addr_offset = addr_offset + (esize / 8);
|
|
|
|
|
reg_rt = (reg_rt + 1) % 32;
|
|
|
|
|
}
|
2015-05-11 13:10:46 +02:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
/* Load/store multiple structure. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
uint8_t selem, esize, rpt, elements;
|
|
|
|
|
uint8_t eindex, rindex;
|
|
|
|
|
|
|
|
|
|
esize = 8 << size_bits;
|
|
|
|
|
if (bit (aarch64_insn_r->aarch64_insn, 30))
|
|
|
|
|
elements = 128 / esize;
|
|
|
|
|
else
|
|
|
|
|
elements = 64 / esize;
|
|
|
|
|
|
|
|
|
|
switch (opcode_bits)
|
|
|
|
|
{
|
|
|
|
|
/*LD/ST4 (4 Registers). */
|
|
|
|
|
case 0:
|
|
|
|
|
rpt = 1;
|
|
|
|
|
selem = 4;
|
|
|
|
|
break;
|
|
|
|
|
/*LD/ST1 (4 Registers). */
|
|
|
|
|
case 2:
|
|
|
|
|
rpt = 4;
|
|
|
|
|
selem = 1;
|
|
|
|
|
break;
|
|
|
|
|
/*LD/ST3 (3 Registers). */
|
|
|
|
|
case 4:
|
|
|
|
|
rpt = 1;
|
|
|
|
|
selem = 3;
|
|
|
|
|
break;
|
|
|
|
|
/*LD/ST1 (3 Registers). */
|
|
|
|
|
case 6:
|
|
|
|
|
rpt = 3;
|
|
|
|
|
selem = 1;
|
|
|
|
|
break;
|
|
|
|
|
/*LD/ST1 (1 Register). */
|
|
|
|
|
case 7:
|
|
|
|
|
rpt = 1;
|
|
|
|
|
selem = 1;
|
|
|
|
|
break;
|
|
|
|
|
/*LD/ST2 (2 Registers). */
|
|
|
|
|
case 8:
|
|
|
|
|
rpt = 1;
|
|
|
|
|
selem = 2;
|
|
|
|
|
break;
|
|
|
|
|
/*LD/ST1 (2 Registers). */
|
|
|
|
|
case 10:
|
|
|
|
|
rpt = 2;
|
|
|
|
|
selem = 1;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
return AARCH64_RECORD_UNSUPPORTED;
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
for (rindex = 0; rindex < rpt; rindex++)
|
|
|
|
|
for (eindex = 0; eindex < elements; eindex++)
|
|
|
|
|
{
|
|
|
|
|
uint8_t reg_tt, sindex;
|
|
|
|
|
reg_tt = (reg_rt + rindex) % 32;
|
|
|
|
|
for (sindex = 0; sindex < selem; sindex++)
|
|
|
|
|
{
|
|
|
|
|
if (bit (aarch64_insn_r->aarch64_insn, 22))
|
|
|
|
|
record_buf[reg_index++] = reg_tt + AARCH64_V0_REGNUM;
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
record_buf_mem[mem_index++] = esize / 8;
|
|
|
|
|
record_buf_mem[mem_index++] = address + addr_offset;
|
|
|
|
|
}
|
|
|
|
|
addr_offset = addr_offset + (esize / 8);
|
|
|
|
|
reg_tt = (reg_tt + 1) % 32;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (bit (aarch64_insn_r->aarch64_insn, 23))
|
|
|
|
|
record_buf[reg_index++] = reg_rn;
|
|
|
|
|
|
|
|
|
|
aarch64_insn_r->reg_rec_count = reg_index;
|
|
|
|
|
aarch64_insn_r->mem_rec_count = mem_index / 2;
|
|
|
|
|
MEM_ALLOC (aarch64_insn_r->aarch64_mems, aarch64_insn_r->mem_rec_count,
|
|
|
|
|
record_buf_mem);
|
|
|
|
|
REG_ALLOC (aarch64_insn_r->aarch64_regs, aarch64_insn_r->reg_rec_count,
|
|
|
|
|
record_buf);
|
|
|
|
|
return AARCH64_RECORD_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Record handler for load and store instructions. */
|
|
|
|
|
|
|
|
|
|
static unsigned int
|
|
|
|
|
aarch64_record_load_store (insn_decode_record *aarch64_insn_r)
|
|
|
|
|
{
|
|
|
|
|
uint8_t insn_bits24_27, insn_bits28_29, insn_bits10_11;
|
|
|
|
|
uint8_t insn_bit23, insn_bit21;
|
|
|
|
|
uint8_t opc, size_bits, ld_flag, vector_flag;
|
|
|
|
|
uint32_t reg_rn, reg_rt, reg_rt2;
|
|
|
|
|
uint64_t datasize, offset;
|
|
|
|
|
uint32_t record_buf[8];
|
|
|
|
|
uint64_t record_buf_mem[8];
|
|
|
|
|
CORE_ADDR address;
|
|
|
|
|
|
|
|
|
|
insn_bits10_11 = bits (aarch64_insn_r->aarch64_insn, 10, 11);
|
|
|
|
|
insn_bits24_27 = bits (aarch64_insn_r->aarch64_insn, 24, 27);
|
|
|
|
|
insn_bits28_29 = bits (aarch64_insn_r->aarch64_insn, 28, 29);
|
|
|
|
|
insn_bit21 = bit (aarch64_insn_r->aarch64_insn, 21);
|
|
|
|
|
insn_bit23 = bit (aarch64_insn_r->aarch64_insn, 23);
|
|
|
|
|
ld_flag = bit (aarch64_insn_r->aarch64_insn, 22);
|
|
|
|
|
vector_flag = bit (aarch64_insn_r->aarch64_insn, 26);
|
|
|
|
|
reg_rt = bits (aarch64_insn_r->aarch64_insn, 0, 4);
|
|
|
|
|
reg_rn = bits (aarch64_insn_r->aarch64_insn, 5, 9);
|
|
|
|
|
reg_rt2 = bits (aarch64_insn_r->aarch64_insn, 10, 14);
|
|
|
|
|
size_bits = bits (aarch64_insn_r->aarch64_insn, 30, 31);
|
|
|
|
|
|
|
|
|
|
/* Load/store exclusive. */
|
|
|
|
|
if (insn_bits24_27 == 0x08 && insn_bits28_29 == 0x00)
|
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("Process record: load/store exclusive\n");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
if (ld_flag)
|
|
|
|
|
{
|
|
|
|
|
record_buf[0] = reg_rt;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
if (insn_bit21)
|
|
|
|
|
{
|
|
|
|
|
record_buf[1] = reg_rt2;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 2;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (insn_bit21)
|
|
|
|
|
datasize = (8 << size_bits) * 2;
|
|
|
|
|
else
|
|
|
|
|
datasize = (8 << size_bits);
|
|
|
|
|
regcache_raw_read_unsigned (aarch64_insn_r->regcache, reg_rn,
|
|
|
|
|
&address);
|
|
|
|
|
record_buf_mem[0] = datasize / 8;
|
|
|
|
|
record_buf_mem[1] = address;
|
|
|
|
|
aarch64_insn_r->mem_rec_count = 1;
|
|
|
|
|
if (!insn_bit23)
|
|
|
|
|
{
|
|
|
|
|
/* Save register rs. */
|
|
|
|
|
record_buf[0] = bits (aarch64_insn_r->aarch64_insn, 16, 20);
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
/* Load register (literal) instructions decoding. */
|
|
|
|
|
else if ((insn_bits24_27 & 0x0b) == 0x08 && insn_bits28_29 == 0x01)
|
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("Process record: load register (literal)\n");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
if (vector_flag)
|
|
|
|
|
record_buf[0] = reg_rt + AARCH64_V0_REGNUM;
|
|
|
|
|
else
|
|
|
|
|
record_buf[0] = reg_rt;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
/* All types of load/store pair instructions decoding. */
|
|
|
|
|
else if ((insn_bits24_27 & 0x0a) == 0x08 && insn_bits28_29 == 0x02)
|
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("Process record: load/store pair\n");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
if (ld_flag)
|
|
|
|
|
{
|
|
|
|
|
if (vector_flag)
|
|
|
|
|
{
|
|
|
|
|
record_buf[0] = reg_rt + AARCH64_V0_REGNUM;
|
|
|
|
|
record_buf[1] = reg_rt2 + AARCH64_V0_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
record_buf[0] = reg_rt;
|
|
|
|
|
record_buf[1] = reg_rt2;
|
|
|
|
|
}
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 2;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
uint16_t imm7_off;
|
|
|
|
|
imm7_off = bits (aarch64_insn_r->aarch64_insn, 15, 21);
|
|
|
|
|
if (!vector_flag)
|
|
|
|
|
size_bits = size_bits >> 1;
|
|
|
|
|
datasize = 8 << (2 + size_bits);
|
|
|
|
|
offset = (imm7_off & 0x40) ? (~imm7_off & 0x007f) + 1 : imm7_off;
|
|
|
|
|
offset = offset << (2 + size_bits);
|
|
|
|
|
regcache_raw_read_unsigned (aarch64_insn_r->regcache, reg_rn,
|
|
|
|
|
&address);
|
|
|
|
|
if (!((insn_bits24_27 & 0x0b) == 0x08 && insn_bit23))
|
|
|
|
|
{
|
|
|
|
|
if (imm7_off & 0x40)
|
|
|
|
|
address = address - offset;
|
|
|
|
|
else
|
|
|
|
|
address = address + offset;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
record_buf_mem[0] = datasize / 8;
|
|
|
|
|
record_buf_mem[1] = address;
|
|
|
|
|
record_buf_mem[2] = datasize / 8;
|
|
|
|
|
record_buf_mem[3] = address + (datasize / 8);
|
|
|
|
|
aarch64_insn_r->mem_rec_count = 2;
|
|
|
|
|
}
|
|
|
|
|
if (bit (aarch64_insn_r->aarch64_insn, 23))
|
|
|
|
|
record_buf[aarch64_insn_r->reg_rec_count++] = reg_rn;
|
|
|
|
|
}
|
|
|
|
|
/* Load/store register (unsigned immediate) instructions. */
|
|
|
|
|
else if ((insn_bits24_27 & 0x0b) == 0x09 && insn_bits28_29 == 0x03)
|
|
|
|
|
{
|
|
|
|
|
opc = bits (aarch64_insn_r->aarch64_insn, 22, 23);
|
|
|
|
|
if (!(opc >> 1))
|
2017-03-23 15:11:04 +01:00
|
|
|
|
{
|
|
|
|
|
if (opc & 0x01)
|
|
|
|
|
ld_flag = 0x01;
|
|
|
|
|
else
|
|
|
|
|
ld_flag = 0x0;
|
|
|
|
|
}
|
2015-05-11 13:10:46 +02:00
|
|
|
|
else
|
2017-03-23 15:11:04 +01:00
|
|
|
|
{
|
2017-03-23 15:11:04 +01:00
|
|
|
|
if (size_bits == 0x3 && vector_flag == 0x0 && opc == 0x2)
|
|
|
|
|
{
|
|
|
|
|
/* PRFM (immediate) */
|
|
|
|
|
return AARCH64_RECORD_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
else if (size_bits == 0x2 && vector_flag == 0x0 && opc == 0x2)
|
|
|
|
|
{
|
|
|
|
|
/* LDRSW (immediate) */
|
|
|
|
|
ld_flag = 0x1;
|
|
|
|
|
}
|
2017-03-23 15:11:04 +01:00
|
|
|
|
else
|
2017-03-23 15:11:04 +01:00
|
|
|
|
{
|
|
|
|
|
if (opc & 0x01)
|
|
|
|
|
ld_flag = 0x01;
|
|
|
|
|
else
|
|
|
|
|
ld_flag = 0x0;
|
|
|
|
|
}
|
2017-03-23 15:11:04 +01:00
|
|
|
|
}
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
if (record_debug)
|
|
|
|
|
{
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("Process record: load/store (unsigned immediate):"
|
|
|
|
|
" size %x V %d opc %x\n", size_bits, vector_flag,
|
|
|
|
|
opc);
|
2015-05-11 13:10:46 +02:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (!ld_flag)
|
|
|
|
|
{
|
|
|
|
|
offset = bits (aarch64_insn_r->aarch64_insn, 10, 21);
|
|
|
|
|
datasize = 8 << size_bits;
|
|
|
|
|
regcache_raw_read_unsigned (aarch64_insn_r->regcache, reg_rn,
|
|
|
|
|
&address);
|
|
|
|
|
offset = offset << size_bits;
|
|
|
|
|
address = address + offset;
|
|
|
|
|
|
|
|
|
|
record_buf_mem[0] = datasize >> 3;
|
|
|
|
|
record_buf_mem[1] = address;
|
|
|
|
|
aarch64_insn_r->mem_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (vector_flag)
|
|
|
|
|
record_buf[0] = reg_rt + AARCH64_V0_REGNUM;
|
|
|
|
|
else
|
|
|
|
|
record_buf[0] = reg_rt;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
/* Load/store register (register offset) instructions. */
|
2015-05-27 12:29:24 +02:00
|
|
|
|
else if ((insn_bits24_27 & 0x0b) == 0x08 && insn_bits28_29 == 0x03
|
|
|
|
|
&& insn_bits10_11 == 0x02 && insn_bit21)
|
2015-05-11 13:10:46 +02:00
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("Process record: load/store (register offset)\n");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
opc = bits (aarch64_insn_r->aarch64_insn, 22, 23);
|
|
|
|
|
if (!(opc >> 1))
|
|
|
|
|
if (opc & 0x01)
|
|
|
|
|
ld_flag = 0x01;
|
|
|
|
|
else
|
|
|
|
|
ld_flag = 0x0;
|
|
|
|
|
else
|
|
|
|
|
if (size_bits != 0x03)
|
|
|
|
|
ld_flag = 0x01;
|
|
|
|
|
else
|
|
|
|
|
return AARCH64_RECORD_UNKNOWN;
|
|
|
|
|
|
|
|
|
|
if (!ld_flag)
|
|
|
|
|
{
|
2016-04-20 21:15:21 +02:00
|
|
|
|
ULONGEST reg_rm_val;
|
|
|
|
|
|
2015-05-11 13:10:46 +02:00
|
|
|
|
regcache_raw_read_unsigned (aarch64_insn_r->regcache,
|
|
|
|
|
bits (aarch64_insn_r->aarch64_insn, 16, 20), ®_rm_val);
|
|
|
|
|
if (bit (aarch64_insn_r->aarch64_insn, 12))
|
|
|
|
|
offset = reg_rm_val << size_bits;
|
|
|
|
|
else
|
|
|
|
|
offset = reg_rm_val;
|
|
|
|
|
datasize = 8 << size_bits;
|
|
|
|
|
regcache_raw_read_unsigned (aarch64_insn_r->regcache, reg_rn,
|
|
|
|
|
&address);
|
|
|
|
|
address = address + offset;
|
|
|
|
|
record_buf_mem[0] = datasize >> 3;
|
|
|
|
|
record_buf_mem[1] = address;
|
|
|
|
|
aarch64_insn_r->mem_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (vector_flag)
|
|
|
|
|
record_buf[0] = reg_rt + AARCH64_V0_REGNUM;
|
|
|
|
|
else
|
|
|
|
|
record_buf[0] = reg_rt;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
/* Load/store register (immediate and unprivileged) instructions. */
|
2015-05-27 12:29:24 +02:00
|
|
|
|
else if ((insn_bits24_27 & 0x0b) == 0x08 && insn_bits28_29 == 0x03
|
|
|
|
|
&& !insn_bit21)
|
2015-05-11 13:10:46 +02:00
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
|
|
|
|
{
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("Process record: load/store "
|
|
|
|
|
"(immediate and unprivileged)\n");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
}
|
|
|
|
|
opc = bits (aarch64_insn_r->aarch64_insn, 22, 23);
|
|
|
|
|
if (!(opc >> 1))
|
|
|
|
|
if (opc & 0x01)
|
|
|
|
|
ld_flag = 0x01;
|
|
|
|
|
else
|
|
|
|
|
ld_flag = 0x0;
|
|
|
|
|
else
|
|
|
|
|
if (size_bits != 0x03)
|
|
|
|
|
ld_flag = 0x01;
|
|
|
|
|
else
|
|
|
|
|
return AARCH64_RECORD_UNKNOWN;
|
|
|
|
|
|
|
|
|
|
if (!ld_flag)
|
|
|
|
|
{
|
|
|
|
|
uint16_t imm9_off;
|
|
|
|
|
imm9_off = bits (aarch64_insn_r->aarch64_insn, 12, 20);
|
|
|
|
|
offset = (imm9_off & 0x0100) ? (((~imm9_off) & 0x01ff) + 1) : imm9_off;
|
|
|
|
|
datasize = 8 << size_bits;
|
|
|
|
|
regcache_raw_read_unsigned (aarch64_insn_r->regcache, reg_rn,
|
|
|
|
|
&address);
|
|
|
|
|
if (insn_bits10_11 != 0x01)
|
|
|
|
|
{
|
|
|
|
|
if (imm9_off & 0x0100)
|
|
|
|
|
address = address - offset;
|
|
|
|
|
else
|
|
|
|
|
address = address + offset;
|
|
|
|
|
}
|
|
|
|
|
record_buf_mem[0] = datasize >> 3;
|
|
|
|
|
record_buf_mem[1] = address;
|
|
|
|
|
aarch64_insn_r->mem_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (vector_flag)
|
|
|
|
|
record_buf[0] = reg_rt + AARCH64_V0_REGNUM;
|
|
|
|
|
else
|
|
|
|
|
record_buf[0] = reg_rt;
|
|
|
|
|
aarch64_insn_r->reg_rec_count = 1;
|
|
|
|
|
}
|
|
|
|
|
if (insn_bits10_11 == 0x01 || insn_bits10_11 == 0x03)
|
|
|
|
|
record_buf[aarch64_insn_r->reg_rec_count++] = reg_rn;
|
|
|
|
|
}
|
|
|
|
|
/* Advanced SIMD load/store instructions. */
|
|
|
|
|
else
|
|
|
|
|
return aarch64_record_asimd_load_store (aarch64_insn_r);
|
|
|
|
|
|
|
|
|
|
MEM_ALLOC (aarch64_insn_r->aarch64_mems, aarch64_insn_r->mem_rec_count,
|
|
|
|
|
record_buf_mem);
|
|
|
|
|
REG_ALLOC (aarch64_insn_r->aarch64_regs, aarch64_insn_r->reg_rec_count,
|
|
|
|
|
record_buf);
|
|
|
|
|
return AARCH64_RECORD_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Record handler for data processing SIMD and floating point instructions. */
|
|
|
|
|
|
|
|
|
|
static unsigned int
|
|
|
|
|
aarch64_record_data_proc_simd_fp (insn_decode_record *aarch64_insn_r)
|
|
|
|
|
{
|
|
|
|
|
uint8_t insn_bit21, opcode, rmode, reg_rd;
|
|
|
|
|
uint8_t insn_bits24_27, insn_bits28_31, insn_bits10_11, insn_bits12_15;
|
|
|
|
|
uint8_t insn_bits11_14;
|
|
|
|
|
uint32_t record_buf[2];
|
|
|
|
|
|
|
|
|
|
insn_bits24_27 = bits (aarch64_insn_r->aarch64_insn, 24, 27);
|
|
|
|
|
insn_bits28_31 = bits (aarch64_insn_r->aarch64_insn, 28, 31);
|
|
|
|
|
insn_bits10_11 = bits (aarch64_insn_r->aarch64_insn, 10, 11);
|
|
|
|
|
insn_bits12_15 = bits (aarch64_insn_r->aarch64_insn, 12, 15);
|
|
|
|
|
insn_bits11_14 = bits (aarch64_insn_r->aarch64_insn, 11, 14);
|
|
|
|
|
opcode = bits (aarch64_insn_r->aarch64_insn, 16, 18);
|
|
|
|
|
rmode = bits (aarch64_insn_r->aarch64_insn, 19, 20);
|
|
|
|
|
reg_rd = bits (aarch64_insn_r->aarch64_insn, 0, 4);
|
|
|
|
|
insn_bit21 = bit (aarch64_insn_r->aarch64_insn, 21);
|
|
|
|
|
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("Process record: data processing SIMD/FP: ");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
if ((insn_bits28_31 & 0x05) == 0x01 && insn_bits24_27 == 0x0e)
|
|
|
|
|
{
|
|
|
|
|
/* Floating point - fixed point conversion instructions. */
|
|
|
|
|
if (!insn_bit21)
|
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("FP - fixed point conversion");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
if ((opcode >> 1) == 0x0 && rmode == 0x03)
|
|
|
|
|
record_buf[0] = reg_rd;
|
|
|
|
|
else
|
|
|
|
|
record_buf[0] = reg_rd + AARCH64_V0_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
/* Floating point - conditional compare instructions. */
|
|
|
|
|
else if (insn_bits10_11 == 0x01)
|
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("FP - conditional compare");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
record_buf[0] = AARCH64_CPSR_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
/* Floating point - data processing (2-source) and
|
|
|
|
|
conditional select instructions. */
|
|
|
|
|
else if (insn_bits10_11 == 0x02 || insn_bits10_11 == 0x03)
|
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("FP - DP (2-source)");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
record_buf[0] = reg_rd + AARCH64_V0_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
else if (insn_bits10_11 == 0x00)
|
|
|
|
|
{
|
|
|
|
|
/* Floating point - immediate instructions. */
|
|
|
|
|
if ((insn_bits12_15 & 0x01) == 0x01
|
|
|
|
|
|| (insn_bits12_15 & 0x07) == 0x04)
|
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("FP - immediate");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
record_buf[0] = reg_rd + AARCH64_V0_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
/* Floating point - compare instructions. */
|
|
|
|
|
else if ((insn_bits12_15 & 0x03) == 0x02)
|
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("FP - immediate");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
record_buf[0] = AARCH64_CPSR_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
/* Floating point - integer conversions instructions. */
|
2015-05-27 12:08:40 +02:00
|
|
|
|
else if (insn_bits12_15 == 0x00)
|
2015-05-11 13:10:46 +02:00
|
|
|
|
{
|
|
|
|
|
/* Convert float to integer instruction. */
|
|
|
|
|
if (!(opcode >> 1) || ((opcode >> 1) == 0x02 && !rmode))
|
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("float to int conversion");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
record_buf[0] = reg_rd + AARCH64_X0_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
/* Convert integer to float instruction. */
|
|
|
|
|
else if ((opcode >> 1) == 0x01 && !rmode)
|
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("int to float conversion");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
record_buf[0] = reg_rd + AARCH64_V0_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
/* Move float to integer instruction. */
|
|
|
|
|
else if ((opcode >> 1) == 0x03)
|
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("move float to int");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
if (!(opcode & 0x01))
|
|
|
|
|
record_buf[0] = reg_rd + AARCH64_X0_REGNUM;
|
|
|
|
|
else
|
|
|
|
|
record_buf[0] = reg_rd + AARCH64_V0_REGNUM;
|
|
|
|
|
}
|
2015-05-27 12:08:40 +02:00
|
|
|
|
else
|
|
|
|
|
return AARCH64_RECORD_UNKNOWN;
|
2015-05-11 13:10:46 +02:00
|
|
|
|
}
|
2015-05-27 12:08:40 +02:00
|
|
|
|
else
|
|
|
|
|
return AARCH64_RECORD_UNKNOWN;
|
2015-05-11 13:10:46 +02:00
|
|
|
|
}
|
2015-05-27 12:08:40 +02:00
|
|
|
|
else
|
|
|
|
|
return AARCH64_RECORD_UNKNOWN;
|
2015-05-11 13:10:46 +02:00
|
|
|
|
}
|
|
|
|
|
else if ((insn_bits28_31 & 0x09) == 0x00 && insn_bits24_27 == 0x0e)
|
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("SIMD copy");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
/* Advanced SIMD copy instructions. */
|
|
|
|
|
if (!bits (aarch64_insn_r->aarch64_insn, 21, 23)
|
|
|
|
|
&& !bit (aarch64_insn_r->aarch64_insn, 15)
|
|
|
|
|
&& bit (aarch64_insn_r->aarch64_insn, 10))
|
|
|
|
|
{
|
|
|
|
|
if (insn_bits11_14 == 0x05 || insn_bits11_14 == 0x07)
|
|
|
|
|
record_buf[0] = reg_rd + AARCH64_X0_REGNUM;
|
|
|
|
|
else
|
|
|
|
|
record_buf[0] = reg_rd + AARCH64_V0_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
else
|
|
|
|
|
record_buf[0] = reg_rd + AARCH64_V0_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
/* All remaining floating point or advanced SIMD instructions. */
|
|
|
|
|
else
|
|
|
|
|
{
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("all remain");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
record_buf[0] = reg_rd + AARCH64_V0_REGNUM;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (record_debug)
|
2015-09-15 19:38:57 +02:00
|
|
|
|
debug_printf ("\n");
|
2015-05-11 13:10:46 +02:00
|
|
|
|
|
|
|
|
|
aarch64_insn_r->reg_rec_count++;
|
|
|
|
|
gdb_assert (aarch64_insn_r->reg_rec_count == 1);
|
|
|
|
|
REG_ALLOC (aarch64_insn_r->aarch64_regs, aarch64_insn_r->reg_rec_count,
|
|
|
|
|
record_buf);
|
|
|
|
|
return AARCH64_RECORD_SUCCESS;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Decodes insns type and invokes its record handler. */
|
|
|
|
|
|
|
|
|
|
static unsigned int
|
|
|
|
|
aarch64_record_decode_insn_handler (insn_decode_record *aarch64_insn_r)
|
|
|
|
|
{
|
|
|
|
|
uint32_t ins_bit25, ins_bit26, ins_bit27, ins_bit28;
|
|
|
|
|
|
|
|
|
|
ins_bit25 = bit (aarch64_insn_r->aarch64_insn, 25);
|
|
|
|
|
ins_bit26 = bit (aarch64_insn_r->aarch64_insn, 26);
|
|
|
|
|
ins_bit27 = bit (aarch64_insn_r->aarch64_insn, 27);
|
|
|
|
|
ins_bit28 = bit (aarch64_insn_r->aarch64_insn, 28);
|
|
|
|
|
|
|
|
|
|
/* Data processing - immediate instructions. */
|
|
|
|
|
if (!ins_bit26 && !ins_bit27 && ins_bit28)
|
|
|
|
|
return aarch64_record_data_proc_imm (aarch64_insn_r);
|
|
|
|
|
|
|
|
|
|
/* Branch, exception generation and system instructions. */
|
|
|
|
|
if (ins_bit26 && !ins_bit27 && ins_bit28)
|
|
|
|
|
return aarch64_record_branch_except_sys (aarch64_insn_r);
|
|
|
|
|
|
|
|
|
|
/* Load and store instructions. */
|
|
|
|
|
if (!ins_bit25 && ins_bit27)
|
|
|
|
|
return aarch64_record_load_store (aarch64_insn_r);
|
|
|
|
|
|
|
|
|
|
/* Data processing - register instructions. */
|
|
|
|
|
if (ins_bit25 && !ins_bit26 && ins_bit27)
|
|
|
|
|
return aarch64_record_data_proc_reg (aarch64_insn_r);
|
|
|
|
|
|
|
|
|
|
/* Data processing - SIMD and floating point instructions. */
|
|
|
|
|
if (ins_bit25 && ins_bit26 && ins_bit27)
|
|
|
|
|
return aarch64_record_data_proc_simd_fp (aarch64_insn_r);
|
|
|
|
|
|
|
|
|
|
return AARCH64_RECORD_UNSUPPORTED;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Cleans up local record registers and memory allocations. */
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
deallocate_reg_mem (insn_decode_record *record)
|
|
|
|
|
{
|
|
|
|
|
xfree (record->aarch64_regs);
|
|
|
|
|
xfree (record->aarch64_mems);
|
|
|
|
|
}
|
|
|
|
|
|
2017-03-23 15:11:04 +01:00
|
|
|
|
#if GDB_SELF_TEST
|
|
|
|
|
namespace selftests {
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
aarch64_process_record_test (void)
|
|
|
|
|
{
|
|
|
|
|
struct gdbarch_info info;
|
|
|
|
|
uint32_t ret;
|
|
|
|
|
|
|
|
|
|
gdbarch_info_init (&info);
|
|
|
|
|
info.bfd_arch_info = bfd_scan_arch ("aarch64");
|
|
|
|
|
|
|
|
|
|
struct gdbarch *gdbarch = gdbarch_find_by_info (info);
|
|
|
|
|
SELF_CHECK (gdbarch != NULL);
|
|
|
|
|
|
|
|
|
|
insn_decode_record aarch64_record;
|
|
|
|
|
|
|
|
|
|
memset (&aarch64_record, 0, sizeof (insn_decode_record));
|
|
|
|
|
aarch64_record.regcache = NULL;
|
|
|
|
|
aarch64_record.this_addr = 0;
|
|
|
|
|
aarch64_record.gdbarch = gdbarch;
|
|
|
|
|
|
|
|
|
|
/* 20 00 80 f9 prfm pldl1keep, [x1] */
|
|
|
|
|
aarch64_record.aarch64_insn = 0xf9800020;
|
|
|
|
|
ret = aarch64_record_decode_insn_handler (&aarch64_record);
|
|
|
|
|
SELF_CHECK (ret == AARCH64_RECORD_SUCCESS);
|
|
|
|
|
SELF_CHECK (aarch64_record.reg_rec_count == 0);
|
|
|
|
|
SELF_CHECK (aarch64_record.mem_rec_count == 0);
|
|
|
|
|
|
|
|
|
|
deallocate_reg_mem (&aarch64_record);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
} // namespace selftests
|
|
|
|
|
#endif /* GDB_SELF_TEST */
|
|
|
|
|
|
2015-05-11 13:10:46 +02:00
|
|
|
|
/* Parse the current instruction and record the values of the registers and
|
|
|
|
|
memory that will be changed in current instruction to record_arch_list
|
|
|
|
|
return -1 if something is wrong. */
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
aarch64_process_record (struct gdbarch *gdbarch, struct regcache *regcache,
|
|
|
|
|
CORE_ADDR insn_addr)
|
|
|
|
|
{
|
|
|
|
|
uint32_t rec_no = 0;
|
|
|
|
|
uint8_t insn_size = 4;
|
|
|
|
|
uint32_t ret = 0;
|
|
|
|
|
gdb_byte buf[insn_size];
|
|
|
|
|
insn_decode_record aarch64_record;
|
|
|
|
|
|
|
|
|
|
memset (&buf[0], 0, insn_size);
|
|
|
|
|
memset (&aarch64_record, 0, sizeof (insn_decode_record));
|
|
|
|
|
target_read_memory (insn_addr, &buf[0], insn_size);
|
|
|
|
|
aarch64_record.aarch64_insn
|
|
|
|
|
= (uint32_t) extract_unsigned_integer (&buf[0],
|
|
|
|
|
insn_size,
|
|
|
|
|
gdbarch_byte_order (gdbarch));
|
|
|
|
|
aarch64_record.regcache = regcache;
|
|
|
|
|
aarch64_record.this_addr = insn_addr;
|
|
|
|
|
aarch64_record.gdbarch = gdbarch;
|
|
|
|
|
|
|
|
|
|
ret = aarch64_record_decode_insn_handler (&aarch64_record);
|
|
|
|
|
if (ret == AARCH64_RECORD_UNSUPPORTED)
|
|
|
|
|
{
|
|
|
|
|
printf_unfiltered (_("Process record does not support instruction "
|
|
|
|
|
"0x%0x at address %s.\n"),
|
|
|
|
|
aarch64_record.aarch64_insn,
|
|
|
|
|
paddress (gdbarch, insn_addr));
|
|
|
|
|
ret = -1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (0 == ret)
|
|
|
|
|
{
|
|
|
|
|
/* Record registers. */
|
|
|
|
|
record_full_arch_list_add_reg (aarch64_record.regcache,
|
|
|
|
|
AARCH64_PC_REGNUM);
|
|
|
|
|
/* Always record register CPSR. */
|
|
|
|
|
record_full_arch_list_add_reg (aarch64_record.regcache,
|
|
|
|
|
AARCH64_CPSR_REGNUM);
|
|
|
|
|
if (aarch64_record.aarch64_regs)
|
|
|
|
|
for (rec_no = 0; rec_no < aarch64_record.reg_rec_count; rec_no++)
|
|
|
|
|
if (record_full_arch_list_add_reg (aarch64_record.regcache,
|
|
|
|
|
aarch64_record.aarch64_regs[rec_no]))
|
|
|
|
|
ret = -1;
|
|
|
|
|
|
|
|
|
|
/* Record memories. */
|
|
|
|
|
if (aarch64_record.aarch64_mems)
|
|
|
|
|
for (rec_no = 0; rec_no < aarch64_record.mem_rec_count; rec_no++)
|
|
|
|
|
if (record_full_arch_list_add_mem
|
|
|
|
|
((CORE_ADDR)aarch64_record.aarch64_mems[rec_no].addr,
|
|
|
|
|
aarch64_record.aarch64_mems[rec_no].len))
|
|
|
|
|
ret = -1;
|
|
|
|
|
|
|
|
|
|
if (record_full_arch_list_add_end ())
|
|
|
|
|
ret = -1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
deallocate_reg_mem (&aarch64_record);
|
|
|
|
|
return ret;
|
|
|
|
|
}
|