2014-07-10 12:21:48 +02:00
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2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
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Alexander Ivchenko <alexander.ivchenko@intel.com>
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Maxim Kuznetsov <maxim.kuznetsov@intel.com>
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Sergey Lega <sergey.s.lega@intel.com>
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Anna Tikhonova <anna.tikhonova@intel.com>
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Ilya Tocar <ilya.tocar@intel.com>
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Andrey Turetskiy <andrey.turetskiy@intel.com>
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Ilya Verbin <ilya.verbin@intel.com>
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Kirill Yukhin <kirill.yukhin@intel.com>
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Michael Zolotukhin <michael.v.zolotukhin@intel.com>
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* i386-opc.tbl: Add AVX512VL and AVX512CD instructions.
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* i386-tbl.h: Regenerate.
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2014-07-18 12:59:54 +02:00
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2014-07-22 Sergey Guriev <sergey.s.guriev@intel.com>
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Alexander Ivchenko <alexander.ivchenko@intel.com>
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Maxim Kuznetsov <maxim.kuznetsov@intel.com>
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Sergey Lega <sergey.s.lega@intel.com>
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Anna Tikhonova <anna.tikhonova@intel.com>
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Ilya Tocar <ilya.tocar@intel.com>
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Andrey Turetskiy <andrey.turetskiy@intel.com>
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Ilya Verbin <ilya.verbin@intel.com>
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Kirill Yukhin <kirill.yukhin@intel.com>
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Michael Zolotukhin <michael.v.zolotukhin@intel.com>
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* i386-dis.c (intel_operand_size): Support 128/256 length in
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vex_vsib_q_w_dq_mode.
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(OP_E_memory): Add ymmq_mode handling, handle new broadcast.
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* i386-gen.c (cpu_flag_init): Add CPU_AVX512VL_FLAGS.
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(cpu_flags): Add CpuAVX512VL.
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* i386-init.h: Regenerated.
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* i386-opc.h (CpuAVX512VL): New.
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(i386_cpu_flags): Add cpuavx512vl.
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(BROADCAST_1TO4, BROADCAST_1TO2): Define.
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* i386-opc.tbl: Add AVX512VL instructions.
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* i386-tbl.h: Regenerate.
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2014-07-20 19:26:09 +02:00
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2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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* or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
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* or1k-opinst.c: Regenerate.
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2014-07-08 11:45:43 +02:00
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2014-07-08 Ilya Tocar <ilya.tocar@intel.com>
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* i386-dis-evex.h (EVEX_W_0F10_P_1_M_1): Fix vmovss.
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(EVEX_W_0F10_P_3_M_1): Fix vmovsd.
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2014-07-04 05:29:42 +02:00
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2014-07-04 Alan Modra <amodra@gmail.com>
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* configure.ac: Rename from configure.in.
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* Makefile.in: Regenerate.
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* config.in: Regenerate.
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2014-07-04 04:05:16 +02:00
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2014-07-04 Alan Modra <amodra@gmail.com>
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* configure.in: Include bfd/version.m4.
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(AC_INIT, AM_INIT_AUTOMAKE): Use modern form.
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(BFD_VERSION): Delete.
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* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Remove bfd/configure.in.
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* configure: Regenerate.
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* Makefile.in: Regenerate.
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2014-07-01 11:20:17 +02:00
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2014-07-01 Barney Stratford <barney_stratford@fastmail.fm>
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Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
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Pitchumani Sivanupandi <pitchumani.s@atmel.com>
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Soundararajan <Sounderarajan.D@atmel.com>
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* avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
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2014-07-04 04:05:16 +02:00
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(print_insn_avr): Do not select opcode if insn ISA is avrtiny and
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machine is not avrtiny.
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2014-07-01 11:20:17 +02:00
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2014-06-26 14:18:04 +02:00
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2014-06-26 Philippe De Muyter <phdm@macqel.be>
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* or1k-desc.h (spr_field_masks): Add U suffix to the end of long
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constants.
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2014-06-12 04:34:06 +02:00
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2014-06-12 Alan Modra <amodra@gmail.com>
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* or1k-asm.c, * or1k-desc.c, * or1k-desc.h, * or1k-dis.c,
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* or1k-ibld.c, * or1k-opc.c, * or1k-opc.h, * or1k-opinst.c: Regenerate.
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2014-06-10 20:16:41 +02:00
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2014-06-10 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (fwait_prefix): New.
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(ckprefix): Set fwait_prefix.
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(print_insn): Properly print prefixes before fwait.
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2014-06-07 04:39:04 +02:00
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2014-06-07 Alan Modra <amodra@gmail.com>
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* ppc-opc.c (UISIGNOPT): Define and use with cmpli.
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Make it easy to make --disable-werror the default for both binutils and gdb
The goal of this patch is to provide an easy way to make
--disable-werror the default when building binutils, or the parts
of binutils that need to get built when building GDB. In development
mode, we want to continue making -Werror the default with GCC.
But, when making releases, I think we want to make it as easy as
possible for regular users to successfully build from sources.
GDB already has this kind of feature to turn -Werror as well as
the use of the libmcheck library. As GDB Release Manager, I take
advantage of it to turn those off after having cut the branch.
I'd like to be able to do the same for the binutils bits. And
perhaps Tristan will want to do the same for his releases too
(not sure, binutils builders might be a little savvier than GDB
builders).
This patch introduces a new file, called development.sh, which
just sets a variable called $development. In our development branches
(Eg. "master"), it's set to true. But setting it to false would allow
us to change the default behavior of various development-related
features to be turned off; in this case, it turns off the use of
-Werror by default (use --enable-werror to turn it back on).
bfd/ChangeLog:
* development.sh: New file.
* warning.m4 (AM_BINUTILS_WARNINGS): Source bfd/development.sh.
Make -Werror the default with GCC only if DEVELOPMENT is true.
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add
$(srcdir)/development.sh.
* Makefile.in, configure: Regenerate.
binutils/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gas/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gold/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): New.
* Makefile.in, configure: Regenerate.
gprof/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
ld/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
opcodes/ChangeLog:
* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
bfd's development.sh.
* Makefile.in, configure: Regenerate.
gdb/ChangeLog:
* development.sh: Delete.
* Makefile.in (config.status): Adjust dependency on development.sh.
* configure.ac: Adjust development.sh source call.
* configure: Regenerate.
gdb/gdbserver/ChangeLog:
* configure.ac: Adjust development.sh source call.
* Makefile.in (config.status): Adjust dependency on development.sh.
* configure: Regenerate.
Tested on x86_64-linux by building two ways: One with DEVELOPMENT
set to true, and one with DEVELOPMENT set to false. In the first
case, I could see the use of -Werror, while it disappeared in
the second case.
2014-05-19 23:46:01 +02:00
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2014-06-05 Joel Brobecker <brobecker@adacore.com>
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* Makefile.am (CONFIG_STATUS_DEPENDENCIES): Add dependency on
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bfd's development.sh.
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* Makefile.in, configure: Regenerate.
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2014-06-03 09:54:04 +02:00
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2014-06-03 Nick Clifton <nickc@redhat.com>
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* msp430-dis.c (msp430_doubleoperand): Use extension_word to
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decide when extended addressing is being used.
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2014-06-02 13:11:17 +02:00
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2014-06-02 Eric Botcazou <ebotcazou@adacore.com>
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* sparc-opc.c (cas): Disable for LEON.
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(casl): Likewise.
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2014-05-20 05:45:18 +02:00
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2014-05-20 Alan Modra <amodra@gmail.com>
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* m68k-dis.c: Don't include setjmp.h.
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2014-05-09 19:58:00 +02:00
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2014-05-09 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (ADDR16_PREFIX): Removed.
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(ADDR32_PREFIX): Likewise.
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(DATA16_PREFIX): Likewise.
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(DATA32_PREFIX): Likewise.
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(prefix_name): Updated.
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(print_insn): Simplify data and address size prefixes processing.
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2014-05-08 07:53:09 +02:00
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2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
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* or1k-desc.c: Regenerated.
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* or1k-desc.h: Likewise.
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* or1k-opc.c: Likewise.
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* or1k-opc.h: Likewise.
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* or1k-opinst.c: Likewise.
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Add MIPS r3 and r5 support.
This patch firstly adds support for mips32r3 mips32r5, mips64r3
and mips64r5. Secondly it adds support for the eretnc instruction.
ChangeLog:
bfd/
* aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3,
mips32r5 and mips64r5.
* archures.c (bfd_architecture): Likewise.
* bfd-in2.h (bfd_architecture): Likewise.
* cpu-mips.c (arch_info_struct): Likewise.
* elfxx-mips.c (mips_set_isa_flags): Likewise.
gas/
* tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3
and mips64r5.
(ISA_HAS_64BIT_FPRS): Likewise.
(ISA_HAS_ROR): Likewise.
(ISA_HAS_ODD_SINGLE_FPR): Likewise.
(ISA_HAS_MXHC1): Likewise.
(hilo_interlocks): Likewise.
(md_longopts): Likewise.
(ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5.
(ISA_HAS_DROR): Likewise.
(options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and
OPTION_MIPS64R5.
(mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and
mips64r5.
(md_parse_option): Likewise.
(s_mipsset): Likewise.
(mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3
and mips64r5. Also change p5600 entry to be mips32r5.
* configure.in: Add support for mips32r3, mips32r5, mips64r3 and
mips64r5.
* configure: Regenerate.
* doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and
-mips64r5 command line options.
* doc/as.texinfo: Likewise.
gas/testsuite/
* gas/mips/mips.exp: Add MIPS32r5 tests. Also add the mips32r3,
mips32r5, mips64r3 and mips64r5 isas to the testsuite.
* gas/mips/r5.s: New test.
* gas/mips/r5.d: Likewise.
include/opcode/
* mips.h (INSN_ISA_MASK): Updated.
(INSN_ISA32R3): New define.
(INSN_ISA32R5): New define.
(INSN_ISA64R3): New define.
(INSN_ISA64R5): New define.
(INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32
INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered.
(mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and
mips64r5.
(INSN_UPTO32R3): New define.
(INSN_UPTO32R5): New define.
(INSN_UPTO64R3): New define.
(INSN_UPTO64R5): New define.
(ISA_MIPS32R3): New define.
(ISA_MIPS32R5): New define.
(ISA_MIPS64R3): New define.
(ISA_MIPS64R5): New define.
(CPU_MIPS32R3): New define.
(CPU_MIPS32R5): New define.
(CPU_MIPS64R3): New define.
(CPU_MIPS64R5): New define.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
(I34): New define.
(I36): New define.
(I66): New define.
(I68): New define.
* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
mips64r5.
(parse_mips_dis_option): Update MSA and virtualization support to
allow mips64r3 and mips64r5.
2014-05-02 15:12:48 +02:00
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2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
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* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
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(I34): New define.
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(I36): New define.
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(I66): New define.
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(I68): New define.
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* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
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mips64r5.
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(parse_mips_dis_option): Update MSA and virtualization support to
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2014-06-03 09:54:04 +02:00
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allow mips64r3 and mips64r5.
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Add MIPS r3 and r5 support.
This patch firstly adds support for mips32r3 mips32r5, mips64r3
and mips64r5. Secondly it adds support for the eretnc instruction.
ChangeLog:
bfd/
* aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3,
mips32r5 and mips64r5.
* archures.c (bfd_architecture): Likewise.
* bfd-in2.h (bfd_architecture): Likewise.
* cpu-mips.c (arch_info_struct): Likewise.
* elfxx-mips.c (mips_set_isa_flags): Likewise.
gas/
* tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3
and mips64r5.
(ISA_HAS_64BIT_FPRS): Likewise.
(ISA_HAS_ROR): Likewise.
(ISA_HAS_ODD_SINGLE_FPR): Likewise.
(ISA_HAS_MXHC1): Likewise.
(hilo_interlocks): Likewise.
(md_longopts): Likewise.
(ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5.
(ISA_HAS_DROR): Likewise.
(options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and
OPTION_MIPS64R5.
(mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and
mips64r5.
(md_parse_option): Likewise.
(s_mipsset): Likewise.
(mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3
and mips64r5. Also change p5600 entry to be mips32r5.
* configure.in: Add support for mips32r3, mips32r5, mips64r3 and
mips64r5.
* configure: Regenerate.
* doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and
-mips64r5 command line options.
* doc/as.texinfo: Likewise.
gas/testsuite/
* gas/mips/mips.exp: Add MIPS32r5 tests. Also add the mips32r3,
mips32r5, mips64r3 and mips64r5 isas to the testsuite.
* gas/mips/r5.s: New test.
* gas/mips/r5.d: Likewise.
include/opcode/
* mips.h (INSN_ISA_MASK): Updated.
(INSN_ISA32R3): New define.
(INSN_ISA32R5): New define.
(INSN_ISA64R3): New define.
(INSN_ISA64R5): New define.
(INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32
INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered.
(mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and
mips64r5.
(INSN_UPTO32R3): New define.
(INSN_UPTO32R5): New define.
(INSN_UPTO64R3): New define.
(INSN_UPTO64R5): New define.
(ISA_MIPS32R3): New define.
(ISA_MIPS32R5): New define.
(ISA_MIPS64R3): New define.
(ISA_MIPS64R5): New define.
(CPU_MIPS32R3): New define.
(CPU_MIPS32R5): New define.
(CPU_MIPS64R3): New define.
(CPU_MIPS64R5): New define.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
(I34): New define.
(I36): New define.
(I66): New define.
(I68): New define.
* mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
mips64r5.
(parse_mips_dis_option): Update MSA and virtualization support to
allow mips64r3 and mips64r5.
2014-05-02 15:12:48 +02:00
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2014-05-06 16:43:13 +02:00
|
|
|
|
2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com>
|
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|
|
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|
|
|
|
* mips-opc.c (G3): Remove I4.
|
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|
2014-05-02 20:22:04 +02:00
|
|
|
|
2014-05-05 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
|
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|
|
|
|
|
|
PR binutils/16893
|
|
|
|
|
|
* i386-dis.c (twobyte_has_mandatory_prefix): New variable.
|
|
|
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|
|
(end_codep): Likewise.
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|
|
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|
|
(mandatory_prefix): Likewise.
|
|
|
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|
|
(active_seg_prefix): Likewise.
|
|
|
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|
|
(ckprefix): Set active_seg_prefix to the active segment register
|
|
|
|
|
|
prefix.
|
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|
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|
|
(seg_prefix): Removed.
|
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|
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|
|
(get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
|
|
|
|
|
|
for prefix index. Ignore the index if it is invalid and the
|
|
|
|
|
|
mandatory prefix isn't required.
|
|
|
|
|
|
(print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
|
|
|
|
|
|
mandatory. Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
|
|
|
|
|
|
in used_prefixes here. Don't print unused prefixes. Check
|
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|
|
|
|
active_seg_prefix for the active segment register prefix.
|
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|
|
Restore the DFLAG bit in sizeflag if the data size prefix is
|
|
|
|
|
|
unused. Check the unused mandatory PREFIX_XXX prefixes
|
|
|
|
|
|
(append_seg): Only print the segment register which gets used.
|
|
|
|
|
|
(OP_E_memory): Check active_seg_prefix for the segment register
|
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|
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|
prefix.
|
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|
(OP_OFF): Likewise.
|
|
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|
|
(OP_OFF64): Likewise.
|
|
|
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|
|
(OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
|
|
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|
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|
|
2014-05-02 17:27:16 +02:00
|
|
|
|
2014-05-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/16886
|
|
|
|
|
|
* config.in: Regenerated.
|
|
|
|
|
|
* configure: Likewise.
|
|
|
|
|
|
* configure.in: Check if sigsetjmp is available.
|
|
|
|
|
|
* h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
|
|
|
|
|
|
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
|
|
|
|
|
|
(print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
|
|
|
|
|
|
* i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
|
|
|
|
|
|
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
|
|
|
|
|
|
(print_insn): Replace setjmp with OPCODES_SIGSETJMP.
|
|
|
|
|
|
* ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
|
|
|
|
|
|
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
|
|
|
|
|
|
(print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
|
|
|
|
|
|
* sysdep.h (OPCODES_SIGJMP_BUF): New macro.
|
|
|
|
|
|
(OPCODES_SIGSETJMP): Likewise.
|
|
|
|
|
|
(OPCODES_SIGLONGJMP): Likewise.
|
|
|
|
|
|
* vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
|
|
|
|
|
|
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
|
|
|
|
|
|
(print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
|
|
|
|
|
|
* xtensa-dis.c (dis_private): Replace jmp_buf with
|
|
|
|
|
|
OPCODES_SIGJMP_BUF.
|
|
|
|
|
|
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
|
|
|
|
|
|
(print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
|
|
|
|
|
|
* z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
|
|
|
|
|
|
(fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
|
|
|
|
|
|
(print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
|
|
|
|
|
|
|
2014-05-01 18:39:51 +02:00
|
|
|
|
2014-05-01 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/16891
|
|
|
|
|
|
* i386-dis.c (print_insn): Handle prefixes before fwait.
|
|
|
|
|
|
|
2014-04-26 15:30:09 +02:00
|
|
|
|
2014-04-26 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
|
2014-04-23 12:24:30 +02:00
|
|
|
|
2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
|
|
|
|
|
|
to allow the MIPS XPA ASE.
|
|
|
|
|
|
(parse_mips_dis_option): Process the -Mxpa option.
|
|
|
|
|
|
* mips-opc.c (XPA): New define.
|
|
|
|
|
|
(mips_builtin_opcodes): Add MIPS XPA instructions and move the
|
|
|
|
|
|
locations of the ctc0 and cfc0 instructions.
|
|
|
|
|
|
|
2014-04-22 16:57:47 +02:00
|
|
|
|
2014-04-22 Christian Svensson <blue@cmd.nu>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am: Remove openrisc and or32 support. Add support for or1k.
|
|
|
|
|
|
* configure.in: Likewise.
|
|
|
|
|
|
* disassemble.c: Likewise.
|
|
|
|
|
|
* or1k-asm.c: New file.
|
|
|
|
|
|
* or1k-desc.c: New file.
|
|
|
|
|
|
* or1k-desc.h: New file.
|
|
|
|
|
|
* or1k-dis.c: New file.
|
|
|
|
|
|
* or1k-ibld.c: New file.
|
|
|
|
|
|
* or1k-opc.c: New file.
|
|
|
|
|
|
* or1k-opc.h: New file.
|
|
|
|
|
|
* or1k-opinst.c: New file.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* openrisc-asm.c: Delete.
|
|
|
|
|
|
* openrisc-desc.c: Delete.
|
|
|
|
|
|
* openrisc-desc.h: Delete.
|
|
|
|
|
|
* openrisc-dis.c: Delete.
|
|
|
|
|
|
* openrisc-ibld.c: Delete.
|
|
|
|
|
|
* openrisc-opc.c: Delete.
|
|
|
|
|
|
* openrisc-opc.h: Delete.
|
|
|
|
|
|
* or32-dis.c: Delete.
|
|
|
|
|
|
* or32-opc.c: Delete.
|
|
|
|
|
|
|
2014-04-03 14:40:04 +02:00
|
|
|
|
2014-04-04 Ilya Tocar <ilya.tocar@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-dis.c (rm_table): Add encls, enclu.
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
|
|
|
|
|
|
(cpu_flags): Add CpuSE1.
|
|
|
|
|
|
* i386-opc.h (enum): Add CpuSE1.
|
|
|
|
|
|
(i386_cpu_flags): Add cpuse1.
|
|
|
|
|
|
* i386-opc.tbl: Add encls, enclu.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
2014-04-03 02:04:23 +02:00
|
|
|
|
2014-04-02 Anthony Green <green@moxielogic.com>
|
|
|
|
|
|
|
|
|
|
|
|
* moxie-opc.c (moxie_form1_opc_info): Add sign-extension
|
|
|
|
|
|
instructions, sex.b and sex.s.
|
|
|
|
|
|
|
2014-03-26 19:44:27 +01:00
|
|
|
|
2014-03-26 Jiong Wang <jiong.wang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
|
|
|
|
|
|
instructions.
|
|
|
|
|
|
|
Fix memory size for gather/scatter instructions
For gathers with indices larger than elements (e. g.)
vpgatherqd ymm6{k1}, ZMMWORD PTR [ebp+zmm7*8-123]
We currently treat memory size as a size of index register, while it is
actually should be size of destination register:
vpgatherqd ymm6{k1}, YMMWORD PTR [ebp+zmm7*8-123]
This patch fixes it.
opcodes/
* i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
vscatterqps.
* i386-tbl.h: Regenerate.
gas/testsuite/
* gas/i386/avx512pf-intel.d: Change memory size for vgatherpf0qps,
vgatherpf1qps, vscatterpf0qps, vscatterpf1qps.
* gas/i386/avx512pf.s: Ditto.
* gas/i386/x86-64-avx512pf-intel.d: Ditto.
* gas/i386/x86-64-avx512pf.s: Ditto.
* gas/i386/avx512f-intel.d: Change memory size for vgatherqps,
vpgatherqd, vpscatterqd, vscatterqps.
* gas/i386/avx512f.s: Ditto.
* gas/i386/x86-64-avx512f-intel.d: Ditto.
* gas/i386/x86-64-avx512f.s: Ditto.
2014-03-20 10:12:16 +01:00
|
|
|
|
2014-03-20 Ilya Tocar <ilya.tocar@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
|
|
|
|
|
|
vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
|
|
|
|
|
|
vscatterqps.
|
|
|
|
|
|
* i386-tbl.h: Regenerate.
|
|
|
|
|
|
|
2014-03-19 17:43:41 +01:00
|
|
|
|
2014-03-19 Jose E. Marchesi <jose.marchesi@oracle.com>
|
|
|
|
|
|
|
|
|
|
|
|
* sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
|
|
|
|
|
|
%hstick_enable added.
|
|
|
|
|
|
|
2014-03-19 10:38:25 +01:00
|
|
|
|
2014-03-19 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* rx-decode.opc (bwl): Allow for bogus instructions with a size
|
|
|
|
|
|
field of 3.
|
2014-03-19 10:40:21 +01:00
|
|
|
|
(sbwl, ubwl, SCALE): Likewise.
|
2014-03-19 10:38:25 +01:00
|
|
|
|
* rx-decode.c: Regenerate.
|
|
|
|
|
|
|
2014-03-12 05:32:00 +01:00
|
|
|
|
2014-03-12 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
2014-03-05 12:46:15 +01:00
|
|
|
|
2014-03-05 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
Update copyright years.
|
|
|
|
|
|
|
2014-03-04 22:30:39 +01:00
|
|
|
|
2014-03-04 Heiher <r@hev.cc>
|
2014-03-04 22:18:02 +01:00
|
|
|
|
|
|
|
|
|
|
* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
|
|
|
|
|
|
|
2014-03-04 22:16:38 +01:00
|
|
|
|
2014-03-04 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
|
|
|
|
|
|
so that they come after the Loongson extensions.
|
|
|
|
|
|
|
2014-03-01 12:25:26 +01:00
|
|
|
|
2014-03-03 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (process_copyright): Emit copyright notice on one line.
|
|
|
|
|
|
|
2014-02-28 05:02:26 +01:00
|
|
|
|
2014-02-28 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* msp430-decode.c: Regenerate.
|
|
|
|
|
|
|
2014-02-27 16:06:56 +01:00
|
|
|
|
2014-02-27 Jiong Wang <jiong.wang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
|
|
|
|
|
|
FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
|
|
|
|
|
|
|
2014-02-27 15:55:46 +01:00
|
|
|
|
2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* aarch64-opc.c (print_register_offset_address): Call
|
|
|
|
|
|
get_int_reg_name to prepare the register name.
|
|
|
|
|
|
|
2014-02-20 16:08:13 +01:00
|
|
|
|
2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Remove wrong variant of vcvtps2ph
|
|
|
|
|
|
* i386-tbl.h: Regenerate.
|
|
|
|
|
|
|
|
|
|
|
|
2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
|
2014-02-20 15:57:31 +01:00
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
|
|
|
|
|
|
(cpu_flags): Add CpuPREFETCHWT1.
|
|
|
|
|
|
* i386-init.h: Regenerate.
|
|
|
|
|
|
* i386-opc.h (CpuPREFETCHWT1): New.
|
|
|
|
|
|
(i386_cpu_flags): Add cpuprefetchwt1.
|
|
|
|
|
|
* i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
|
|
|
|
|
|
* i386-tbl.h: Regenerate.
|
|
|
|
|
|
|
2014-02-20 15:31:11 +01:00
|
|
|
|
2014-02-20 Ilya Tocar <ilya.tocar@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
|
|
|
|
|
|
to CpuAVX512F.
|
|
|
|
|
|
* i386-tbl.h: Regenerate.
|
|
|
|
|
|
|
2014-02-19 21:53:27 +01:00
|
|
|
|
2014-02-19 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* i386-gen.c (output_cpu_flags): Don't output trailing space.
|
|
|
|
|
|
(output_opcode_modifier): Likewise.
|
|
|
|
|
|
(output_operand_type): Likewise.
|
|
|
|
|
|
* i386-init.h: Regenerated.
|
|
|
|
|
|
* i386-tbl.h: Likewise.
|
|
|
|
|
|
|
Add clflushopt, xsaves, xsavec, xrstors
gas/
2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
* config/tc-i386.c (cpu_arch): Add .clflushopt, .xsavec, .xsaves.
* doc/c-i386.texi: Document .xsavec/xsavec/.xsaves/xsaves/
clflushopt/.clfushopt.
gas/testsuite/
2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
* gas/i386/clflushopt-intel.d: New.
* gas/i386/clflushopt.d: Ditto.
* gas/i386/clflushopt.s: Ditto.
* gas/i386/i386.exp: Run new tests.
* gas/i386/x86-64-clflushopt-intel.d: New.
* gas/i386/x86-64-clflushopt.d: Ditto.
* gas/i386/x86-64-clflushopt.s: Ditto.
* gas/i386/x86-64-xsavec-intel.d: Ditto.
* gas/i386/x86-64-xsavec.d: Ditto.
* gas/i386/x86-64-xsavec.s: Ditto.
* gas/i386/x86-64-xsaves-intel.d: Ditto.
* gas/i386/x86-64-xsaves.d: Ditto.
* gas/i386/x86-64-xsaves.s: Ditto.
* gas/i386/xsavec-intel.d: Ditto.
* gas/i386/xsavec.d: Ditto.
* gas/i386/xsavec.s: Ditto.
* gas/i386/xsaves-intel.d: Ditto.
* gas/i386/xsaves.d: Ditto.
* gas/i386/xsaves.s: Ditto.
opcodes/
2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
* i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
MOD_0FC7_REG_5.
(PREFIX enum): Add PREFIX_0FAE_REG_7.
(reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
(prefix_table): Add clflusopt.
(mod_table): Add xrstors, xsavec, xsaves.
* i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
(cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
* i386-init.h: Regenerate.
* i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
xsaves64, xsavec, xsavec64.
* i386-tbl.h: Regenerate.
2013-11-25 13:35:42 +01:00
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2014-02-12 Ilya Tocar <ilya.tocar@intel.com>
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* i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
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MOD_0FC7_REG_5.
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(PREFIX enum): Add PREFIX_0FAE_REG_7.
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(reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
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(prefix_table): Add clflusopt.
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(mod_table): Add xrstors, xsavec, xsaves.
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* i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
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CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
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(cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
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* i386-init.h: Regenerate.
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* i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
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xsaves64, xsavec, xsavec64.
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* i386-tbl.h: Regenerate.
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2014-02-10 00:29:35 +01:00
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2014-02-10 Alan Modra <amodra@gmail.com>
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* po/POTFILES.in: Regenerate.
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* po/opcodes.pot: Regenerate.
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2014-01-30 16:38:09 +01:00
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2014-01-30 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
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Jan Beulich <jbeulich@suse.com>
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PR binutils/16490
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* i386-dis.c (OP_E_memory): Fix shift computation for
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vex_vsib_q_w_dq_mode.
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2014-01-09 19:13:10 +01:00
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2014-01-09 Bradley Nelson <bradnelson@google.com>
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Roland McGrath <mcgrathr@google.com>
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* i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
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last_rex_prefix is -1.
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2014-01-08 14:48:12 +01:00
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2014-01-08 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (process_copyright): Update copyright year to 2014.
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2014-01-06 03:40:48 +01:00
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2014-01-03 Maciej W. Rozycki <macro@codesourcery.com>
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* nds32-asm.c (parse_operand): Fix out-of-range integer constant.
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2014-01-08 14:32:12 +01:00
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For older changes see ChangeLog-2013
|
1999-05-03 09:29:11 +02:00
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2014-01-08 14:32:12 +01:00
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Copyright (C) 2014 Free Software Foundation, Inc.
|
2012-12-10 13:48:03 +01:00
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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1999-05-03 09:29:11 +02:00
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Local Variables:
|
2001-01-11 20:01:42 +01:00
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mode: change-log
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left-margin: 8
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fill-column: 74
|
1999-05-03 09:29:11 +02:00
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version-control: never
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End:
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