the errors exposed by this addition. These were intel mode
"fi... word ptr", "fi... dword ptr", "jmp Imm seg, Imm offset", "out dx,al".
The failure with intel "out dx,al" was also present in att "out al,dx".
Extend testsuite to catch this case too.
* config/tc-mips.c (mips_gp32): New variable.
(macro_build) Use mips_gp32.
(mips_ip): Ditto.
(md_longopts): Add "-mgp32" and "-mgp64".
(md_parse_option): Add OPTION_GP32 and OPTION_GP64.
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.
bfd:
* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
(bfd_mach_sh3_dsp): Likewise.
(bfd_mach_sh4): Reinstate.
(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
* bfd-in2.h: Regenerate.
* coff-sh.c (struct sh_opcode): flags is no longer short.
(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
(sh_opcodes): No longer const.
(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
(sh_insn_uses_reg): Check for USESAS and USESR8.
(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
(_bfd_sh_align_load_span): Return early for SH4.
Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
Take into account that field b of a parallel processing insn
could be mistaken for a separate insn.
* cpu-sh.c (arch_info_struct): New array elements for
sh2, sh-dsp and sh3-dsp.
Reinstate element for sh4.
(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
(SH4_NEXT): Reinstate.
(SH3_NEXT, SH3E_NEXT): Adjust.
* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
* elf32-sh.c (sh_elf_set_private_flags): New function.
(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
(sh_elf_merge_private_data): New function.
(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
(bfd_elf32_bfd_copy_private_bfd_data): Define.
(bfd_elf32_bfd_merge_private_bfd_data): Change to
sh_elf_merge_private_data.
gas:
* config/tc-sh.c ("elf/sh.h"): Include.
(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
(md.begin): Initialize target_arch.
Only include opcodes in has table that match selected architecture.
(parse_reg): Recognize register names for sh-dsp.
(parse_at): Recognize post-modify addressing.
(get_operands): The leading space is now optional.
(get_specific): Remove FDREG_N support. Add support for sh-dsp
arguments. Update valid_arch.
(build_Mytes): Add support for SDT_REG_N.
(find_cooked_opcode): New function, broken out of md_assemble.
(assemble_ppi, sh_elf_final_processing): New functions.
(md_assemble): Use find_cooked_opcode and assemble_ppi.
(md_longopts, md_parse_option): New option: -dsp.
* config/tc-sh.h (elf_tc_final_processing): Define.
(sh_elf_final_processing): Declare.
include/elf:
* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.
opcodes:
* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
(print_insn_ppi): Likewise.
(print_insn_shx): Use info->mach to select appropriate insn set.
Add support for sh-dsp. Remove FD_REG_N support.
* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
(sh_arg_type): Likewise. Remove FD_REG_N.
(sh_dsp_reg_nums): New enum.
(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
(arch_sh3_dsp_up): Likewise.
(sh_opcode_info): New field: arch.
(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
D_REG_N. Fill in arch field. Add sh-dsp insns.
already defined.
* config/tc-ppc.h [OBJ_XCOFF] (OBJ_COPY_SYMBOL_ATTRIBUTES):
New macro.
* config/tc-ppc.c (ppc_fix_adjustable): Don't look at the frag
of a symbol when we really care about its value.
assembler. ie. You will be able to do "as --em=i386aout" on an x86
linux-elf assembler to generate aout format object files, rather than
using a separate assembler. The aout emulation is enabled by giving
"--enable-targets=i386-linuxaout" to configure.
Oh yeah, there's a couple of fixes too. Error messages shouldn't be
passed to printf in the format arg just in case someone puts a `%' in
the message.
* gas/i386/general.{s,l}: Move 16 bit jmp and call tests from here
* gas/i386/jump16.{s,d}: To here.
* gas/i386/jump.{s,d}: New files. Duplicate 32 bit jmp and call
tests in general.s so that objdump is exercised.
* gas/i386/i386.exp: Call new tests.
if it is defined.
* config/obj-elf.c (elf_set_index): Add ATTRIBUTE_UNUSED.
* config/obj-elf.c (elf_frob_file_after_relocs): Don't pass NULL
to bfd_set_section_contents.
* mips.h (OPCODE_IS_MEMBER): New.
For gas:
* config/tc-mips.c (macro_build): Use OPCODE_IS_MEMBER.
(mips_ip): Use OPCODE_IS_MEMBER.
For opcodes:
* mips-dis.c (_print_insn_mips): Use OPCODE_IS_MEMBER.
(ISA_HAS_64_BIT_REGS) New.
(gpr_interlocks,md_begin,reg_needs_delay,append_insn,
mips_emit_delays,macro_build,load_register,load_addresss,
macro,macro2,mips_ip,s_cprestore,s_cpadd): Simplify
and/or use new ISA_xxx macros in expressions involving
ISA, particularly mips_opts.isa.
(parse_args): Add --no-warn, --warn, --fatal-warnings,
which become 'W', OPTION_WARN, and OPTION_WARN_FATAL.
(parse_args): Parse the new options.
(main): If there were warnings, and --fatal-warnings
was specified, print an error.
* as.h: New variable, flag_fatal_warnings, for new option.
indeterminate number of extra lines here".
* gas/elf/elf.exp: Remove XFAILs.
* gas/elf/section0.d: Make pass on MIPS (and hopefully alpha).
* gas/elf/section1.d: Likewise.
* gas/mips/elf-rel.d: New file.
* gas/mips/elf-rel2.d: New file.
* gas/mips/e32-rel2.d: New file.
* gas/mips/elf-rel2.s: New file.
* gas/mips/mips.exp: Add elf-rel, elf-rel2.
* gas/mips/elf_e_flags1.d: Tweak a little so it passes
even if the CPU is set to something by default.
* gas/m32r/m32rx.exp: New testcase driver.
* gas/m32r/fslotx.[sd]: New testcase.
* gas/m32r/m32rx.[sd]: New testcase.
* gas/m32r/relax-s.[sd]: New testcase.
* gas/m32r/interfere.s: New testcase.
* gas/m32r/wrongsize.s: New testcase.
* config/tc-m32r.c (enable_m32rx): New static global.
(enable_special,warn_explicit_parallel_conflicts,optimize): Ditto.
(allow_m32rx): New function.
(M32R_SHORTOPTS): Add `O'.
(md_longopts): Add --m32rx plus several warning options.
(md_parse_option): Handle new options.
(md_show_usage): Print them.
(md_begin): Enable m32rx.
(OPERAND_IS_COND_BIT): New macro.
(first_writes_to_seconds_operands): New function.
(writes_to_pc,can_make_parallel,make_parallel): New functions.
(target_make_parallel,assemble_two_insns): New functions.
(md_assemble): Recognize "insn1 -> insn2" and "insn1 || insn2".
If optimizing and m32rx, try to make consecutive insns parallel.
H.J. Lu
Alan Modra
Nick Clifton
Catherine Moore
Richard Henderson
Timothy Wall
Chandra Chavva
Andrew Haley
Ian Lance Taylor
Joern Rennecke
Jeff Law
Geoffrey Keating
Clinton Popetz
Michael Meissner
Donald Lindsay
Gavin Romig-Koch
Diego Novillo
Doug Evans