Commit Graph

580 Commits

Author SHA1 Message Date
Martin Schwidefsky bac0268913 * s390-dis.c (s390_extract_operand): Add support for long displacements.
* s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z990.
        * s390-opc.c (D20_20): Add define for 20 bit displacements.
        (INSTR_RRF_R0RR, INSTR_RSL_R0RD, INSTR_RSY_RRRD, INSTR_RSY_RURD,
        INSTR_RSY_AARD, INSTR_RXY_RRRD, INSTR_RXY_FRRD, INSTR_SIY_URD): Add
        new instruction formats.
        (MASK_RRF_R0RR, MASK_RSL_R0RD, MASK_RSY_RRRD, MASK_RSY_RURD,
        MASK_RSY_AARD, MASK_RXY_RRRD, MASK_RXY_FRRD, MASK_SIY_URD): Likewise.
        (s390_opformats): Likewise.
        * s390-opc.txt: Add new instructions for cpu type z990. Add missing
        hfp instructions. Add missing instructions pgin, pgout and xsch.
2003-07-01 14:47:58 +00:00
H.J. Lu ca164297eb gas/
2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* gas/config/tc-i386.c (md_assemble): Support Intel Precott New
	Instructions.

	* gas/config/tc-i386.h (CpuPNI): New.
	(CpuUnknownFlags): Add CpuPNI.

gas/testsuite/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Add prescott.

	* gas/i386/prescott.d: New file.
	* gas/i386/prescott.s: Likewise.

include/opcode/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* i386.h (i386_optab): Support Intel Precott New Instructions.

opcodes/

2003-06-23  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
	Intel Precott New Instructions.
	(PREGRP27): New. Added for "addsubpd" and "addsubps".
	(PREGRP28): New. Added for "haddpd" and "haddps".
	(PREGRP29): New. Added for "hsubpd" and "hsubps".
	(PREGRP30): New. Added for "movsldup" and "movddup".
	(PREGRP31): New. Added for "movshdup" and "movhpd".
	(PREGRP32): New. Added for "lddqu".
	(dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
	Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
	entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
	entry 0xd0. Use PREGRP32 for entry 0xf0.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(grps): Use PNI_Fixup in the "sidtQ" entry.
	(prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
	PREGRP31 and PREGRP32.
	(float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
	Use "fisttpll" in entry 1 in opcode 0xdd.
	Use "fisttp" in entry 1 in opcode 0xdf.
2003-06-23 20:15:34 +00:00
Christian Groessler 6ddfd88c72 * z8k-dis.c (instr_data_s): Change tabl_index from long to int.
(print_insn_z8k): Correctly check return value from
	z8k_lookup_instr call.
	(unparse_instr): Handle CLASS_IRO case.
	* z8kgen.c: Fix function definitions.  Fix formatting.
	(opt): Add brk opcode alias for non-simulator breakpoint.  Add
	missing and fix existing in/out and sin/sout opcode definitions.
	(args): "@ri", "@ro" - add CLASS_IRO register usage for in/out
	opcodes.
	(internal): Check p->flags for non-zero before dereferencing it.
	(gas): Add CLASS_IRO line.  Insert new OPC_xxx lines for the added
	opcodes and renumber the remaining lines repectively.
	(main): Remove "-d" command line switch.
	* z8k-opc.h: Regenerate with new z8kgen.c.
2003-06-19 13:46:37 +00:00
H.J. Lu 3b4433739c bfd/
2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

binutils/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

gas/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

gprof/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

ld/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.

opcodes/

2003-06-06  H.J. Lu <hongjiu.lu@intel.com>

	* po/Make-in (DESTDIR): New.
	(install-data-yes): Support $(DESTDIR).
	(uninstall): Likewise.
2003-06-11 01:32:08 +00:00
Alan Modra 795bb480ca * bfd/Makefile.am (config.status): Depend on version.h.
Run "make dep-am" in bfd/ and elsewhere, and regen files.
2003-06-10 23:44:42 +00:00
Doug Evans b11dcf4e7f opcodes:
* cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to
	CGEN_INSN_RELAXED.
	* fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate.
	* frv-asm.c,frv-desc.c,frv-desc.h: Regenerate.
	* ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate.
	* iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate.
	* m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate.
	* openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate.
	* xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate.
gas:
	* cgen.c (gas_cgen_finish_insn): CGEN_INSN_RELAX renamed to
	CGEN_INSN_RELAXED.
	* config/tc-fr30.c (md_estimate_size_before_relax): Ditto.
	* config/tc-m32r.c (md_estimate_size_before_relax): Ditto.
	* config/tc-openrisc.c (md_estimate_size_before_relax): Ditto.
2003-06-10 22:08:45 +00:00
Alan Modra adadcc0cc9 Add "attn", "lq" and "stq" power4 insns. 2003-06-10 07:44:11 +00:00
Richard Sandiford 0613284fd4 opcodes/
* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round
	rts/l and rte/l register lists.

gas/
	* config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register
	lists.  Allow single-register ranges.

testsuite/
	* gas/h8300/h8sx_rtsl.[sd]: New test.
	* gas/h8300/h8300.exp: Run it.
2003-06-10 07:27:56 +00:00
Nick Clifton 36c3ae2457 Add code to handle even-numbered only register operands 2003-06-05 16:04:20 +00:00
Michael Snyder 20dc5b5ae3 2003-06-03 Michael Snyder <msnyder@redhat.com>
and Bernd Schmidt   <bernds@redhat.com>
	and Alexandre Oliva <aoliva@redhat.com>
	* disassemble.c (disassembler): Add support for h8300sx.
	* h8300-dis.c: Ditto.
2003-06-03 21:32:52 +00:00
Nick Clifton 7579829884 FRV: Use a signed 6-bit immediate value not unsigned for mdrotli insn.
Use maintainer mode to regenerate ports.
2003-06-03 17:15:25 +00:00
Jason Eckhardt 14218d5f24 2003-05-23 Jason Eckhardt <jle@rice.edu>
gas:
        * config/tc-i860.c (target_xp): Declare variable.
        (OPTION_XP): Declare macro.
        (md_longopts): Add option -mxp.
        (md_parse_option): Set target_xp.
        (md_show_usage): Add -mxp usage.
        (i860_process_insn): Recognize XP registers bear, ccr, p0-p3.
        (md_assemble): Don't try expansions if XP_ONLY is set.
        * doc/c-i860.texi: Document -mxp option.

gas/testsuite:
        * gas/i860/xp.s: New file.
        * gas/i860/xp.d: New file.

include/opcode:
        * i860.h (expand_type): Add XP_ONLY.
        (scyc.b): New XP instruction.
        (ldio.l): Likewise.
        (ldio.s): Likewise.
        (ldio.b): Likewise.
        (ldint.l): Likewise.
        (ldint.s): Likewise.
        (ldint.b): Likewise.
        (stio.l): Likewise.
        (stio.s): Likewise.
        (stio.b): Likewise.
        (pfld.q): Likewise.

opcodes:
        * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
        (print_insn_i860): Grab 4 bits of the control register field
        instead of 3.
2003-05-24 04:22:23 +00:00
Jason Eckhardt b645cb1726 2003-05-18 Jason Eckhardt <jle@rice.edu>
gas:
        * config/tc-i860.c (i860_process_insn): Initialize fc after
        each opcode mismatch.

include/opcode:
        * i860.h (form, pform): Add missing .dd suffix.

opcodes:
        * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
        print it.

bfd:
        * elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.
2003-05-18 21:24:33 +00:00
Andreas Jaeger dd4b5cc0c0 * Makefile.am (libopcodes_la_LIBADD): Add libbfd.la.
(libopcodes_la_DEPENDENCIES): Add libbfd.la.
        * Makefile.in: Regenerated.
2003-05-17 07:27:24 +00:00
Nick Clifton 71bee782bf New Romanian translation 2003-05-16 09:39:56 +00:00
Nick Clifton 049f8936e9 Add support for h8300hn and h8300sn 2003-05-12 11:57:32 +00:00
Alan Modra 8373f9713f * i386-dis.c (print_insn): Test intel_syntax against (char) -1 in
case char is unsigned.
2003-05-09 11:36:43 +00:00
Christian Groessler 13e10c0a01 * z8k-dis.c (z8k_lookup_instr): Optimize FETCH_DATA calls.
(unpack_instr): Fix representation of segmented addresses.
	(intr_name): Added, contains names of the parameters to the EI/DI
	instructions.
	(unparse_instr): Fix display of EI/DI parameters.
2003-05-01 20:08:55 +00:00
Doug Evans 390ff83f72 * fr30-desc.c,fr30-desc.h,fr30-opc.c,fr30-opc.h: Regenerate.
* frv-desc.c,frv-desc.h,frv-opc.c,frv-opc.h: Regenerate.
	* ip2k-desc.c,ip2k-desc.h,ip2k-opc.c,ip2k-opc.h: Regenerate.
	* m32r-desc.c,m32r-desc.h,m32r-opc.c,m32r-opc.h: Regenerate.
	* m32r-opinst.c: Regenerate.
	* openrisc-desc.c,openrisc-desc.h,openrisc-opc.c,openrisc-opc.h: Regenerate.
	* xstormy16-desc.c,xstormy16-desc.h,xstormy16-opc.c,xstormy16-opc.h: Regenerate.
2003-04-22 18:50:55 +00:00
Nick Clifton c2dcd04ec8 Replace occurrances of 'Hitachi' with 'Renesas'. 2003-04-15 08:51:55 +00:00
Nick Clifton 983aea3412 * ia64-ic.tbl (fr-readers): Add mem-writers-fp.
* ia64-asmtab.c: Regenerate.
* gas/ia64/dependency-1.s: New file: Test read before write dependency.
* gas/ia64/dependency-1.d: New file: Expected assembly results.
* gas/ia64/ia64.exp: Run the new test.
2003-04-08 09:50:07 +00:00
Alexandre Oliva 0b14f26eff * mips-dis.c (mips_gpr_names_newabi): Reverted previous patch. 2003-04-08 07:14:47 +00:00
Alexandre Oliva 8aa4c77d70 * mips-dis.c (mips_gpr_names_newabi): $12-$15 are named $t4-$t7. 2003-04-08 00:39:16 +00:00
Svein Seldal be33c5dd4d Namespace cleanup for the tic4x target. Replace s/c4x/tic4x/ and s/c3x/tic3x/. 2003 copyright update 2003-04-04 08:15:15 +00:00
Nick Clifton 5a6c681789 Fixes for iWMMXt contribution. 2003-04-01 13:08:06 +00:00
Nick Clifton e16bb312f5 Add iWMMXt support 2003-03-25 20:56:01 +00:00
Doug Evans 067186e45f * i386-dis.c (dis386): Recognize icebp (0xf1). 2003-03-22 18:56:45 +00:00
Martin Schwidefsky af169f2333 * s390-dis.c (init_disasm): Rename S390_OPCODE_ESAME to
S390_OPCODE_ZARCH.
	(print_insn_s390): Use new modes field of s390_opcodes.
	* s390-mkopc.c (ARCHBITS_ESAONLY, ARCHBITS_ESA, ARCHBITS_ESAME): Remove.
	(s390_opcode_mode_val, s390_opcode_cpu_val): New enums.
	(struct op_struct): Remove archbits. Add mode_bits and min_cpu.
	(insertOpcode): Replace archbits by min_cpu and mode_bits.
	(dumpTable): Write mode_bits and min_cpu instead of archbits.
	(main): Adapt to new format in s390-opcode.txt.
	* s390-opc.c (s390_opformats): Replace archbits by min_cpu and
	mode_bits.
	* s390-opc.txt: Replace archbits by min_cpu and mode_bits.
2003-03-21 13:28:09 +00:00
Nick Clifton 112290abe5 Fix formatting. Update copyright date. 2003-03-17 11:43:30 +00:00
Daniel Jacobowitz 1c7c333e1f ppc-opc.c (powerpc_opcodes): Readd tlbre for PPC403. 2003-03-14 21:07:54 +00:00
Alan Modra ca504dff71 * hppa-dis.c: Formatting.
* hppa-dis.c (print_insn_hppa): Implement fcnv instruction modifiers.
2003-02-25 03:22:06 +00:00
Alan Modra 75776faa40 * hppa-dis.c (print_insn_hppa <2 bit space register>): Do not print
the space register when the value is zero.
2003-02-25 00:20:29 +00:00
Chris Demetriou 4a9a3c54b7 2003-02-23 Elias Athanasopoulos <elathan@phys.uoa.gr>
* mips-dis.c (print_mips_disassembler_options): Make 'i' unsigned,
        use ARRAY_SIZE in loops.
2003-02-23 19:52:49 +00:00
Dave Brolley 282f90000e 003-02-12 Dave Brolley <brolley@redhat.com>
* fr30-desc.c: Regenerate.
2003-02-12 22:33:59 +00:00
Alan Modra db6eb5be2c * i386-dis.c (dq_mode, Edq): Define.
(dis386_twobyte): Correct movd operands.
	(OP_E): Handle dq_mode case.
2003-02-06 01:48:41 +00:00
Nick Clifton 0f6ab988cc (print_insn_sparc): When examining values added in to rs1, make sure that
there are previous instructions.
2003-01-29 12:51:57 +00:00
Nick Clifton 5177500f26 Add SH2E support 2003-01-23 18:50:57 +00:00
Alan Modra f0abc2a11f include/elf/ChangeLog
* sh.h: Split out various bits to bfd/elf32-sh64.h.

include/opcode/ChangeLog
	* m68hc11.h (cpu6812s): Define.

bfd/ChangeLog
	* elf-bfd.h (struct bfd_elf_section_data): Remove tdata.  Change
	dynindx to an int.  Rearrange for better packing.
	* elf.c (_bfd_elf_new_section_hook): Don't alloc if already done.
	* elf32-mips.c (bfd_elf32_new_section_hook): Define.
	* elf32-sh64.h: New.  Split out from include/elf/sh.h.
	(struct _sh64_elf_section_data): New struct.
	(sh64_elf_section_data): Don't dereference sh64_info (was tdata).
	* elf32-sh64-com.c: Include elf32-sh64.h.
	* elf32-sh64.c: Likewise.
	(sh64_elf_new_section_hook): New function.
	(bfd_elf32_new_section_hook): Define.
	(sh64_elf_fake_sections): Adjust for sh64_elf_section_data change.
	(sh64_bfd_elf_copy_private_section_data): Likewise.
	(sh64_elf_final_write_processing): Likewise.
	* elf32-sparc.c (struct elf32_sparc_section_data): New.
	(elf32_sparc_new_section_hook): New function.
	(SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete.
	(sec_do_relax): Define.
	(elf32_sparc_relax_section): Adjust to use sec_do_relax.
	(elf32_sparc_relocate_section): Likewise.
	* elf64-mips.c (bfd_elf64_new_section_hook): Define.
	* elf64-mmix.c (struct _mmix_elf_section_data): New.
	(mmix_elf_section_data): Define.  Use throughout file.
	(mmix_elf_new_section_hook): New function.
	(bfd_elf64_new_section_hook): Define.
	* elf64-ppc.c (struct _ppc64_elf_section_data): New.
	(ppc64_elf_section_data): Define.  Use throughout.
	(ppc64_elf_new_section_hook): New function.
	(bfd_elf64_new_section_hook): Define.
	* elf64-sparc.c (struct sparc64_elf_section_data): New.
	(sparc64_elf_new_section_hook): New function.
	(SET_SEC_DO_RELAX, SEC_DO_RELAX): Delete.
	(sec_do_relax): Define.
	(sparc64_elf_relax_section): Adjust to use sec_do_relax.
	(sparc64_elf_relocate_section): Likewise.
	(bfd_elf64_new_section_hook): Define.
	* elfn32-mips.c (bfd_elf32_new_section_hook): Define.
	* elfxx-mips.c (struct _mips_elf_section_data): New.
	(mips_elf_section_data): Define.  Use throughout.
	(_bfd_mips_elf_new_section_hook): New function.
	(mips_elf_create_got_section): Don't alloc used_by_bfd.
	* elfxx-mips.h (_bfd_mips_elf_new_section_hook): Declare.
	* elfxx-target.h (bfd_elfNN_new_section_hook): Add #ifndef.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.

opcodes/ChangeLog
	* sh64-dis.c: Include elf32-sh64.h.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.

gas/ChangeLog
	* config/tc-sh64.c (shmedia_frob_section_type): Adjust for changed
	sh64_elf_section_data.
	* config/tc-sh64.h: Include elf32-sh64.h.
	* config/tc-m68hc11.c: Don't include stdio.h.
	(md_show_usage): Fix missing continuation.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.

ld/ChangeLog
	* emultempl/sh64elf.em: Include elf32-sh64.h.
	(sh64_elf_${EMULATION_NAME}_before_allocation): Adjust for changed
	sh64_elf_section_data.
	(sh64_elf_${EMULATION_NAME}_after_allocation): Likewise.
2003-01-23 11:51:35 +00:00
Richard Henderson 0f247f8d12 * alpha-opc.c (alpha_opcodes): Add bugchk, rduniq, wruniq, gentrap
PAL entry points.
2003-01-17 23:43:20 +00:00
Alan Modra f62ba8f237 * Makefile.am: Run "make dep-am".
* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
2003-01-16 04:11:36 +00:00
Klee Dienes 40065372d5 2003-01-08 Klee Dienes <kdienes@apple.com>
* Makefile.am (ALL_MACHINES): Add msp430-dis.lo.
        * Makefile.in: Regenerate.
2003-01-09 08:32:26 +00:00
Alan Modra 29ef7e545a * ppc-opc.c (powerpc_macros <extrwi>): Accept a shift of 32. 2003-01-08 02:55:52 +00:00
Stan Cox 47b1a55a55 * iq2000-asm.c: New file.
* iq2000-desc.c: Likewise.
	* iq2000-desc.h: Likewise.
	* iq2000-dis.c: Likewise.
	* iq2000-ibld.c: Likewise.
	* iq2000-opc.c: Likewise.
	* iq2000-opc.h: Likewise.
	* Makefile.am (HFILES): Add iq2000-desc.h, iq2000-opc.h.
	(CFILES): Add iq2000-asm.c, iq2000-desc.c, iq2000-dis.c,
	iq2000-ibld.c, iq2000-opc.c.
	(ALL_MACHINES): Add iq2000-asm.lo, iq2000-desc.lo, iq2000-dis.lo,
	iq2000-ibld.lo, iq2000-opc.lo.
	(CLEANFILES): Add stamp-iq2000.
	(IQ2000_DEPS): New macro.
	(stamp-iq2000): New target.
	* Makefile.in: Regenerate.
	* configure.in: Handle bfd_iq2000_arch.
	* configure: Regenerate.
2003-01-03 19:52:23 +00:00
Chris Demetriou 440cc0bc1a 2003-01-02 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (print_insn_args): Use position extracted by "+A"
        to calculate size for "+B".  Redo code for "+C" so it shares
        the same style as "+A" and "+B" now do.
2003-01-02 22:04:55 +00:00
Chris Demetriou 794ac9d074 2003-01-02 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c: Update copyright years.
        (print_insn_arg): Rename to...
        (print_insn_args): This, returning void.  Process the whole
        string of args rather than a single one.  Reindent.
        (print_insn_mips): Update to match the above.
2003-01-02 21:07:00 +00:00
Chris Demetriou 3cf6d008cd 2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Move "di" into the
        right order alphabetically, and make all hex constants use
        lower-case letters.
2003-01-01 01:06:13 +00:00
Chris Demetriou bbcc08074f [ gas/ChangeLog ]
2002-12-31  Chris Demetriou  <cgd@broadcom.com>

	* config/tc-mips.c (validate_mips_insn, mips_ip): Recognize
	the "+D" operand, which will be used only by the disassembler.

[ gas/testsuite/ChangeLog ]
2002-12-31  Chris Demetriou  <cgd@broadcom.com>

	* gas/mips/cp0sel-names-mips32.d: New test.
	* gas/mips/cp0sel-names-mips32r2.d: New test.
	* gas/mips/cp0sel-names-mips64.d: New test.
	* gas/mips/cp0sel-names-numeric.d: New test.
	* gas/mips/cp0sel-names-sb1.d: New test.
	* gas/mips/cp0sel-names.s: New test source file.
	* gas/mips/mips.exp: Run new tests.

[ include/opcode/ChangeLog ]
2002-12-31  Chris Demetriou  <cgd@broadcom.com>

	* mips.h: Note that the "+D" operand type name is now used.

[ opcodes/ChangeLog ]
2002-12-31  Chris Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_cp0sel_name): New structure.
	(mips_cp0sel_names_mips3264, mips_cp0sel_names_mips3264r2)
	(mips_cp0sel_names_sb1): New arrays.
	(mips_arch_choice): New structure members "cp0sel_names" and
	"cp0sel_names_len".
	(mips_arch_choices): Add references to new cp0sel_names arrays
	as appropriate, and make all existing entries reference
	appropriate mips_XXX_names_numeric arrays rather than simply
	using NULL.
	(mips_cp0sel_names, mips_cp0sel_names_len): New variables.
	(lookup_mips_cp0sel_name): New function.
	(set_default_mips_dis_options): Set mips_cp0sel_names and
	mips_cp0sel_names_len as appropriate.  Remove now-unnecessary
	checks for NULL register name arrays.
	(parse_mips_dis_option): Likewise.
	(print_insn_arg): Handle "+D" operand type.
	* mips-opc.c (mips_builtin_opcodes): Add new "+D" variants
	of mfc0, mtc0, dmfc0, and dmtc0 to print CP0+sel register
	names symbolically.
2002-12-31 08:11:18 +00:00
Chris Demetriou af7ee8bfa9 [ bfd/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
	* archures.c (bfd_mach_mipsisa32r2): New define.
	* bfd-in2.h: Regenerate.
	* cpu-mips.c (I_mipsisa32r2): New enum value.
	(arch_info_struct): Add entry for I_mipsisa32r2.
	* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
	(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
	(_bfd_mips_elf_final_write_processing): Add
	bfd_mach_mipsisa32r2 case.
	(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
	binaries marked as using MIPS32 Release 2.

[ binutils/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
	changes in MIPS -M options.

[ gas/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
	CPU variants.
	* configure: Regenerate.
	* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
	(macro_build): Handle "K" operand.
	(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
	CPU_HAS_DROR and CPU_HAS_ROR are currently used.
	(mips_ip): New variable "lastpos", and implement "+A", "+B",
	and "+C" operands for MIPS32 Release 2 ins/ext instructions.
	Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
	(validate_mips_insn): Implement "+" as a way to extend the
	allowed operands, and implement "K", "+A", "+B", and "+C"
	operands.
	(OPTION_MIPS32R2): New define.
	(md_longopts): Add entry for OPTION_MIPS32R2.
	(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
	(md_parse_option): Handle OPTION_MIPS32R2.
	(s_mipsset): Reimplement handling of ".set mipsN" options
	and add support for ".set mips32r2".
	(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
	(md_show_usage): Document "-mips32r2" option.
	* doc/as.texinfo: Document "-mips32r2" option.
	* doc/c-mips.texi: Likewise.

[ gas/testsuite/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* gas/mips/cp0-names-mips32r2.d: New test.
	* gas/mips/hwr-names-mips32r2.d: New test.
	* gas/mips/hwr-names-numeric.d: New test.
	* gas/mips/hwr-names.s: New test source file.
	* gas/mips/mips32r2.d: New test.
	* gas/mips/mips32r2.s: New test source file.
	* gas/mips/mips32r2-ill.l: New test.
	* gas/mips/mips32r2-ill.s: New test source file.
	* gas/mips/mips.exp: Add mips32r2 architecture data array
	entry.  Run new tests mentioned above.

[ include/elf/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h (E_MIPS_ARCH_32R2): New define.

[ include/opcode/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h: Document "+" as the start of two-character operand
	type names, and add new "K", "+A", "+B", and "+C" operand types.
	(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
	(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
	defines.

[ opcodes/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
	(mips_hwr_names_mips3264r2): New arrays.
	(mips_arch_choice): New "hwr_names" member.
	(mips_arch_choices): Adjust for structure change, and add a new
	entry for "mips32r2" ISA.
	(mips_hwr_names): New variable.
	(set_default_mips_dis_options): Set mips_hwr_names.
	(parse_mips_dis_option): New "hwr-names" option which sets
	mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
	(print_insn_arg): Change return type to "int"
	and use that to indicate number of characters consumed.
	Add support for "+" operand extension character, "+A", "+B",
	"+C", and "K" operands.
	(print_insn_mips): Adjust for changes to print_insn_arg.
	(print_mips_disassembler_options): Adjust for "hwr-names"
	addition and "reg-names" change.
	* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
	(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
	forms of "sll".  Add new MIPS32 Release 2 instructions: ehb,
	di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
	rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
	Note that hardware rotate instructions (ror, rorv) can be
	used on MIPS32 Release 2, and add the official mnemonics
	for them (rotr, rotrv) and the similar "rotl" mnemonic for
	left-rotate.
2002-12-31 07:29:29 +00:00
Nick Clifton 2469cfa284 Add support for msp430. 2002-12-30 19:25:13 +00:00
Chris Demetriou 790851713f Fix ChangeLog for previous: mips-dis.c now includes libiberty.h 2002-12-27 18:18:58 +00:00