Commit Graph

3852 Commits

Author SHA1 Message Date
Joseph Myers
87a1fd79ce gas:
* config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
	merging with previous long opcode.

gas/testsuite:
	* gas/arm/unwind.s: Test not merging iWMMXt register save with
	previous long opcode.
	* gas/arm/unwind.d, gas/arm/unwind_vxworks.d: Update.
2006-08-21 11:41:24 +00:00
Nick Clifton
7148cc28af bfd
* Makefile.am: Add rules to build pe-arm-wince.lo and pei-arm-wince.lo objects.
* Makefile.in: Regenerate.
* pe-arm-wince.c: New file.
* pei-arm-wince.c: New file.
* pei-arm.c: Remove ARM_WINCE block.
* pe-arm.c: Remove ARM_WINCE block. Rename
bfd_arm_pe_allocate_interworking_sections,
bfd_arm_pe_get_bfd_for_interworking, and
bfd_arm_pe_process_before_allocation to
bfd_armpe_allocate_interworking_sections,
bfd_armpe_get_bfd_for_interworking, and
bfd_armpe_process_before_allocation. Move them before including bfd.h.
* bfd.c: ARM wince bfd format names were renamed. Adjust.
* coff-arm.c [ARM_WINCE]: Adjust so Windows CE doesn't end up with unexpected/conflicting relocs.
* targets.c: The arm-wince-pe target got its own new vector.  Adjust.
* config.bfd: Likewise.
* configure.in: Likewise.
* configure: Regenerate.

binutils
* configure.in: Split arm-pe and arm-wince-pe. Build dlltool with -DDLLTOOL_ARM_WINCE for Windows CE case.
* configure: Regenerate.
* dlltool.c: Add support for arm-wince.

gas
* Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
* Makefile.in: Regenerate.
* config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were  renamed. Adjust.

ld
* Makefile.am: Split arm-wince into its own emulation.
* Makefile.in: Regenerate.
* configure.tgt: Set targ_emul to arm_wince_pe for ARM Windows CE targets.
* pe-dll.c : Define PE_ARCH_arm_wince.
  (pe_detail_list): Add PE_ARCH_arm_wince case.
  (make_one): Handle PE_ARCH_arm_epoc and PE_ARCH_arm_wince cases.
* emulparams/arm_wince_pe.sh: New file.
* emultempl/pe.em: Handle new TARGET_IS_arm_wince_pe define.
  Remap bfd_arm_allocate_interworking_sections, bfd_arm_get_bfd_for_interworking and
  bfd_arm_process_before_allocation for arm-pe and arm-wince-pe targets too.
  (gld_${EMULATION_NAME}_recognized_file): Handle arm-wince and arm-epoc bfd format names.
2006-08-21 08:12:46 +00:00
Julian Brown
3e9e4fcfb0 * config/tc-arm.c (md_assemble): Improve diagnostic when attempting
to use ARM instructions on non-ARM-supporting cores.
	(autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
	mode automatically based on cpu variant.
	(md_begin): Call above function.
2006-08-16 10:33:50 +00:00
Julian Brown
07161fb2ba * gas/arm/noarm.s: Add test for disabled ARM insns.
* gas/arm/noarm.d: Drive test for above.
	* gas/arm/noarm.l: Expected error output.
2006-08-16 10:32:40 +00:00
Julian Brown
267d2029e7 * config/tc-arm.c (opcode_lookup): Allow Neon type suffixes to be
recognized in non-unified syntax mode.
2006-08-16 10:16:29 +00:00
Thiemo Seufer
4be041b2db [ ChangeLog ]
* config.sub: Add support for sde as alias of mipsisa32-sde-elf.

	[ bfd/ChangeLog ]
	* config.bfd: Add configurations for mips*el-sde-elf* and
	mips*-sde-elf*.

	[ binutils/testsuite/ChangeLog ]
	* binutils-all/readelf.exp (readelf_test): Handle mips*-sde-elf*.

	[ gas/ChangeLog ]
	* configure.tgt: Handle mips*-sde-elf*.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips.exp: Handle mips*-sde-elf*.
2006-08-15 18:23:11 +00:00
Michael Meissner
4d9567e059 Fix bug 3000 2006-08-14 23:45:59 +00:00
Thiemo Seufer
3a93f742d4 [ gas/ChangeLog ]
* config/tc-mips.c (mips16_ip): Fix argument register handling
	for restore instruction.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips16-save.d: Fix testcase.
2006-08-12 23:00:35 +00:00
Bob Wilson
1737851b20 gas/ChangeLog:
* dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): New.
	(out_sleb128): New.
	(out_fixed_inc_line_addr): New.
	(process_entries): Use out_fixed_inc_line_addr when
	DWARF2_USE_FIXED_ADVANCE_PC is set.
	* config/tc-xtensa.h (DWARF2_USE_FIXED_ADVANCE_PC): Define.
gas/testsuite/ChangeLog:
	* gas/lns/lns-common-1-alt.d: New file.
	* gas/lns/lns.exp: Use lns-common-1-alt.d for xtensa targets.
2006-08-08 19:09:34 +00:00
DJ Delorie
e14e52f868 * config/tc-sh.c (sh_frob_section): Canonicalize pointers to local
vs full symbols so that we never have more than one pointer value
for any given symbol in our symbol table.
2006-08-08 17:21:04 +00:00
Nick Clifton
802f5d9e8e * dwarf2dbg.c (out_debug_info): Add new parameter ranges_seg and emit
DW_AT_ranges when code in compilation unit is not contiguous.
  (out_debug_abbrev): Emit DW_AT_ranges abbreviation if code in is not contiguous.
  (dwarf2_finish): Create and pass ranges_seg to out_debug_info.
  (out_debug_ranges): New function to emit .debug_ranges section when code is not contiguous.
2006-08-08 08:29:08 +00:00
Nick Clifton
720abc6078 * config/tc-arm.c (WARN_DEPRECATED): Enable. 2006-08-08 08:23:25 +00:00
Nick Clifton
f301d54cd8 * gas/arm/thumb2_add.s: Don't use elf specific ".type" pseudo-op. 2006-08-06 15:15:36 +00:00
Nick Clifton
e486c55d69 * gas/arm/wince.s: New test.
* gas/arm/wince.d: New test.
2006-08-06 15:11:08 +00:00
Nick Clifton
f0927246c4 * bfd.c (bfd_get_sign_extend_vma): Add cases for pe-arm-little and pei-arm-little.
* coff-arm.c (coff_arm_rtype_to_howto) [COFF_WITH_PE]: Handle ARM_SECREL.
  (coff_arm_reloc_type_lookup): Map BFD_RELOC_32_SECREL to  ARM_SECREL.
* pe-arm.c [COFF_SECTION_ALIGNMENT_ENTRIES]: Define.
* pei-arm.c [TARGET_UNDERSCORE]: Define for ARM_WINCE like in pe-arm.c.
  [COFF_SECTION_ALIGNMENT_ENTRIES]: Define.

* config/tc-arm.c: Move "dwarf2dbg.h" inclusion out of OBJ_ELF only block.
  (pe_directive_secrel) [TE_PE]: New function.
  (md_pseudo_table) [!OBJ_ELF]: Handle 2byte, 4byte, 8byte, file, loc, loc_mark_labels.
  [TE_PE]: Handle secrel32.
  (output_relax_insn): Remove OBJ_ELF around dwarf2_emit_insn call.
  (output_inst): Remove OBJ_ELF around dwarf2_emit_insn call.
  (arm_frob_label): Remove OBJ_ELF around dwarf2_emit_label call.
  (md_section_align): Only round section sizes here for AOUT targets.
  (tc_arm_regname_to_dw2regnum): Move out for OBJ_ELF only block.
  (tc_pe_dwarf2_emit_offset): New function.
  (md_apply_fix) [TE_PE]: Handle BFD_RELOC_32_SECREL.
  (cons_fix_new_arm): Handle O_secrel.
* config/tc-arm.h : Move DWARF2_LINE_MIN_INSN_LENGTH, DWARF2_DEFAULT_RETURN_COLUMN and DWARF2_CIE_DATA_ALIGNMENT out of OBJ_ELF only block.
  [TE_PE]: Define O_secrel, TC_DWARF2_EMIT_OFFSET, and declare tc_pe_dwarf2_emit_offset.

* ld-pe/pe.exp: Enable tests on arm-wince-pe.
* ld-pe/secrel.d: Adjust test to work on arm-wince-pe too.
2006-08-06 15:04:23 +00:00
Richard Sandiford
55e6e39790 bfd/
2006-08-02  Richard Sandiford  <richard@codesourcery.com>
	    Kazu Hirata  <kazu@codesourcery.com>
	    Phil Edwards  <phil@codesourcery.com>
	    Nathan Sidwell  <nathan@codesourcery.com>

	* config.bfd (sh-*-vxworks): Use bfd_elf32_shvxworks_vec and
	bfd_elf32_shlvxworks_vec.
	* configure.in (bfd_elf32_sh64_vec): Add elf-vxworks.lo.
	(bfd_elf32_sh64l_vec, bfd_elf32_sh64lin_vec): Likewise.
	(bfd_elf32_sh64blin_vec, bfd_elf32_sh64lnbsd_vec): Likewise.
	(bfd_elf32_sh64nbsd_vec, bfd_elf32_sh_vec): Likewise.
	(bfd_elf32_shblin_vec, bfd_elf32_shl_vec): Likewise.
	(bfd_elf32_shl_symbian_vec, bfd_elf32_shlin_vec): Likewise.
	(bfd_elf32_shlnbsd_vec, bfd_elf32_shnbsd_vec): Likewise.
	(bfd_elf32_shlvxworks_vec, bfd_elf32_shvxworks_vec): New stanzas.
	* configure: Regenerate.
	* Makefile.am: Regenerate dependencies.
	* Makefile.in: Regenerate.
	* elf-vxworks.c (elf_vxworks_gott_symbol_p): New function.
	(elf_vxworks_add_symbol_hook): Use it.
	(elf_vxworks_link_output_symbol_hook): Likewise.  Use the hash
	table entry to check for weak undefined symbols and to obtain
	the original bfd.
	(elf_vxworks_emit_relocs): Use target_index instead of this_idx.
	* elf32-sh-relocs.h: New file, split from elf32-sh.c.
	(R_SH_DIR32): Use SH_PARTIAL32 for the partial_inplace field,
	SH_SRC_MASK32 for the src_mask field, and SH_ELF_RELOC for the
	special_function field.
	(R_SH_REL32): Use SH_PARTIAL32 and SH_SRC_MASK32 here too.
	(R_SH_REL32, R_SH_TLS_GD_32, R_SH_TLS_LD_32): Likewise.
	(R_SH_TLS_LDO_32, R_SH_TLS_IE_32, R_SH_TLS_LE_32): Likewise.
	(R_SH_TLS_DTPMOD32, R_SH_TLS_DTPOFF32, R_SH_TLS_TPOFF32): Likewise.
	(R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT): Likewise.
	(R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Likewise.
	(SH_PARTIAL32, SH_SRC_MASK32, SH_ELF_RELOC): Undefine at end of file.
	* elf32-sh.c: Include elf32-vxworks.h.
	(MINUS_ONE): Define.
	(sh_elf_howto_table): Include elf32-sh-relocs.h with SH_PARTIAL32
	set to TRUE, SH_SRC_MASK32 set to 0xffffffff, and SH_ELF_RELOC set
	to sh_elf_reloc.
	(sh_vxworks_howto_table): New variable.  Include elf32-sh-relocs.h
	with SH_PARTIAL32 set to FALSE, SH_SRC_MASK32 set to 0, and
	SH_ELF_RELOC set to bfd_elf_generic_reloc.
	(vxworks_object_p, get_howto_table): New functions.
	(sh_elf_reloc_type_lookup): Fix typo.  Use get_howto_table.
	(sh_elf_info_to_howto): Use get_howto_table.
	(sh_elf_relax_section): Honor the partial_inplace field of the
	R_SH_DIR32 howto.
	(sh_elf_relax_delete_bytes): Likewise.
	(elf_sh_plt_info): New structure.
	(PLT_ENTRY_SIZE): Replace both definitions with...
	(ELF_PLT_ENTRY_SIZE): ...this new macro, with separate definitions for
	INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
	(elf_sh_plt0_entry_be): Update sizes of both definitions accordingly.
	(elf_sh_plt0_entry_le): Likewise.
	(elf_sh_plt_entry_be, elf_sh_plt_entry_le): Likewise.
	(elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le): Likewise.
	(elf_sh_plts): New structure, with separate definitions for
	INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
	(elf_sh_plt0_entry): Delete both definitions.
	(elf_sh_plt_entry, elf_sh_pic_plt_entry): Likewise.
	(elf_sh_sizeof_plt, elf_sh_plt_plt0_offset): Likewise.
	(elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset): Likewise.
	(elf_sh_plt_reloc_offset): Likewise.
	(movi_shori_putval): Delete in favor of...
	(install_plt_field): ...this new function, with separate definitions
	for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
	(get_plt_info): New function, with separate definitions
	for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA.
	(elf_sh_plt0_linker_offset, elf_sh_plt0_gotid_offset): Delete.
	(VXWORKS_PLT_HEADER_SIZE, VXWORKS_PLT_ENTRY_SIZE): New macros.
	(vxworks_sh_plt0_entry_be, vxworks_sh_plt0_entry_le): New constants.
	(vxworks_sh_plt_entry_be, vxworks_sh_plt_entry_le): Likewise.
	(vxworks_sh_pic_plt_entry_be, vxworks_sh_pic_plt_entry_le): Likewise.
	(get_plt_index, get_plt_offset): New functions.
	(elf_sh_link_hash_table): Add srelplt2, plt_info and vxworks_p fields.
	(sh_elf_link_hash_table_create): Initialize them.
	(sh_elf_create_dynamic_sections): Call
	elf_vxworks_create_dynamic_sections for VxWorks.
	(allocate_dynrelocs): Use htab->plt_info to get the size of PLT
	entries.  Allocate relocation entries in .rela.plt.unloaded if
	generating a VxWorks executable.
	(sh_elf_always_size_sections): New function.
	(sh_elf_size_dynamic_sections): Extend .rela.plt handling to
	.rela.plt.unloaded.
	(sh_elf_relocate_section): Use get_howto_table.  Honor
	partial_inplace when calculating the addend for dynamic
	relocations.  Use get_plt_index.
	(sh_elf_finish_dynamic_symbol): Use get_plt_index, install_plt_field
	and htab->plt_info.  Fill in the bra .plt offset for VxWorks
	executables.  Populate .rela.plt.unloaded.  Do not make
	_GLOBAL_OFFSET_TABLE_ absolute on VxWorks.
	(sh_elf_finish_dynamic_sections): Use install_plt_field and
	htab->plt_info.  Handle cases where there is no special PLT header.
	Populate the first relocation in .rela.plt.unloaded and fix up
	the remaining entries.
	(sh_elf_plt_sym_val): Use get_plt_info.
	(elf_backend_always_size_sections): Define.
	(TARGET_BIG_SYM, TARGET_BIG_NAME): Override for VxWorks.
	(TARGET_LITTLE_SYM, TARGET_BIG_SYM): Likewise.
	(elf32_bed, elf_backend_want_plt_sym): Likewise.
	(elf_symbol_leading_char, elf_backend_want_got_underscore): Likewise.
	(elf_backend_grok_prstatus, elf_backend_grok_psinfo): Likewise.
	(elf_backend_add_symbol_hook): Likewise.
	(elf_backend_link_output_symbol_hook): Likewise.
	(elf_backend_emit_relocs): Likewise.
	(elf_backend_final_write_processing): Likewise.
	(ELF_MAXPAGESIZE, ELF_COMMONPAGESIZE): Likewise.
	* targets.c (bfd_elf32_shlvxworks_vec): Declare.
	(bfd_elf32_shvxworks_vec): Likewise.
	(_bfd_target_vector): Include bfd_elf32_shlvxworks_vec and
	bfd_elf32_shvxworks_vec.

gas/
	* config/tc-sh.c (apply_full_field_fix): New function.
	(md_apply_fix): Use it instead of md_number_to_chars.  Do not fill
	in fx_addnumber for BFD_RELOC_32_PLT_PCREL.
	(tc_gen_reloc): Use fx_addnumber rather than 0 as the default case.
	* config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS.

ld/
2006-08-02  Richard Sandiford  <richard@codesourcery.com>
	    Kazu Hirata  <kazu@codesourcery.com>
	    Phil Edwards  <phil@codesourcery.com>

	* Makefile.am (ALL_EMULATIONS): Add eshelf_vxworks.o and
	eshlelf_vxworks.o.
	(eshelf_vxworks.c, eshlelf_vxworks.c): New rules.
	* Makefile.in: Regenerate.
	* configure.tgt (sh-*-vxworks): Use shelf_vxworks and
	shlelf_vxworks.
	* emulparams/shelf_vxworks.sh: New file.
	* emulparams/shlelf_vxworks.sh: Likewise.
	* emulparams/vxworks.sh (FINI): Prefix _etext with ${SYMPREFIX}.
	(OTHER_END_SYMBOLS): Likewise _ehdr.
	(DATA_END_SYMBOLS): Likewise _edata.
	* emultempl/vxworks.em (vxworks_after_open): Check whether output_bfd
	is indeed an ELF file before dealing with --force-dynamic.

ld/testsuite/
	* ld-sh/rd-sh.exp: Treat vxworks1-static.d specially.
	* ld-sh/sh-vxworks.exp: New file.
	* ld-sh/sh.exp: Extend sh-linux SIZEOF_HEADERS handling to
	sh-*-vxworks.
	* ld-sh/vxworks1-le.dd, ld-sh/vxworks1-lib-le.dd,
	* ld-sh/vxworks1-lib.dd, ld-sh/vxworks1-lib.nd,
	* ld-sh/vxworks1-lib.rd, ld-sh/vxworks1-lib.s,
	* ld-sh/vxworks1-static.d, ld-sh/vxworks1.dd,
	* ld-sh/vxworks1.ld, ld-sh/vxworks1.rd, ld-sh/vxworks1.s,
	* ld-sh/vxworks2-static.sd, ld-sh/vxworks2.s,
	* ld-sh/vxworks2.sd, ld-sh/vxworks3-le.dd,
	* ld-sh/vxworks3-lib-le.dd, ld-sh/vxworks3-lib.dd,
	* ld-sh/vxworks3-lib.s, ld-sh/vxworks3.dd, ld-sh/vxworks3.s,
	* ld-sh/vxworks4.d, ld-sh/vxworks4a.s, ld-sh/vxworks4b.s,
	* ld-sh/reloc1.s, ld-sh/reloc1.d: New tests.
2006-08-04 13:13:56 +00:00
Nick Clifton
9cd19b1730 PR gas/2991
* config.in: Regenerate.
2006-08-03 17:01:10 +00:00
Joseph Myers
97f87066f6 gas:
* config/tc-arm.c (parse_operands): Handle invalid register name
	for OP_RIWR_RIWC.

gas/testsuite:
	* gas/arm/iwmmxt-bad.s: Test invalid register names for wldrw and
	wstrw.
	* gas/arm/iwmmxt-bad.l: Update.
2006-08-03 15:59:00 +00:00
Joseph Myers
41adaa5cab gas:
* config/tc-arm.c (enum operand_parse_code): Add OP_RIWC_RIWG.
	(parse_operands): Handle it.
	(insns): Use it for tmcr and tmrc.

gas/testsuite:
	* gas/arm/iwmmxt.s: Test tmcr and tmrc with wcgr registers.
	* gas/arm/iwmmxt.d: Update.
2006-08-03 15:57:04 +00:00
Nick Clifton
9d7cbccda0 PR binutils/2983
* bfd/elf64-x86-64.c: Add FreeBSD support.
  (elf64_x86_64_fbsd_post_process_headers): New function.
* bfd/targets.c (_bfd_target_vector): Add bfd_elf64_x86_64_freebsd_vec.
* bfd/config.bfd (x64_64-*-freebsd*): Add bfd_elf64_x86_64_freebsd_vec to the targ_selvecs.
* bfd/configure.in: Add entry for bfd_elf64_x86_64_freebsd_vec.
* bfd/configure: Regenerate.
* gas/config/tc-i386.c (md_parse_option): Treat any target starting with elf64_x86_64 as a viable target for the -64 switch.
  (i386_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64.
* gas/config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
* ld/emulparams/elf_x86_64_fbsd.sh (OUTPUT_FORMAT): Define as elf64-x86-64-freebsd.
2006-08-02 16:25:14 +00:00
Nick Clifton
c973bc5cd4 PR gas/2991
* acinclude.m4 (BFD_BINARY_FOPEN): Import this function from bfd/aclocal.m4.
* configure.in: Run BFD_BINARY_FOPEN.
* configure: Regenerate.
* as.h: Look at USE_BINARY_FOPEN to decide which fopen-*.h header file to include.
2006-08-02 14:26:07 +00:00
H.J. Lu
cfde7f7078 gas/
2006-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Don't update
	cpu_arch_isa_flags.

gas/testsuite/

2006-08-01  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/nops-2-i386.d: Updated.
	* gas/i386/nops-2-merom.d: Likewise.
	* gas/i386/nops-2.d: Likewise.
2006-08-01 17:54:28 +00:00
Thiemo Seufer
b4c71f5629 * config/tc-mips.c (md_section_align): Check ELF-ness at runtime. 2006-08-01 07:58:22 +00:00
Thiemo Seufer
54f4ddb3c6 * config/tc-mips.c (macro_build_lui): Fix comment formatting.
(md_apply_fix): Likewise. Unify handling of BFD_RELOC_RVA,
	BFD_RELOC_32 and BFD_RELOC_16.
	(s_align, s_cpload, s_cplocal, s_cprestore, s_mips_stab,
	md_convert_frag, md_obj_end): Fix comment formatting.
2006-08-01 05:49:02 +00:00
Thiemo Seufer
d103cf6117 * config/tc-mips.c (md_apply_fix, tc_gen_reloc): Remove special
handling for BFD_RELOC_MIPS16_JMP.
2006-07-31 17:23:31 +00:00
Richard Sandiford
777b13b958 opcodes/
* m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
	"fdaddl" entry.

gas/testsuite/
	* gas/m68k/mcf-fpu.s: Add tests for all addressing modes.
	* gas/m68k/mcf-fpu.d: Update accordingly.
2006-07-29 08:55:38 +00:00
Nick Clifton
601e61cdeb PR/2756
* read.c (read_a_source_file): Ignore unknown text after line comment
  character.  Fix misleading comment.
2006-07-24 16:30:55 +00:00
Nick Clifton
b45619c047 Fix spelling typos 2006-07-24 13:49:50 +00:00
Nick Clifton
784906c5f1 * config/tc-sh.c (md_longopts): Add -EL and -EB for use by the linker testsuite. 2006-07-21 09:46:15 +00:00
Michael Meissner
46e742443d Update amd family 10 instructions to add appropriate alignment for cygwin 2006-07-20 23:09:32 +00:00
Thiemo Seufer
d5f010e93b * config/tc-mips.c (md_parse_option): Don't infer optimisation
options from debug options.
2006-07-20 16:51:38 +00:00
Thiemo Seufer
35d3d567cc [ bfd/ChangeLog ]
* elf32-mips.c (mips16_jump_reloc): Remove function.
	(elf_mips16_howto_table_rel): Use _bfd_mips_elf_generic_reloc
	instead of mips16_jump_reloc.
	* elf64_mips.c, wlfn32-mips.c (mips16_jump_reloc): Remove function.
	(elf_mips16_howto_table_rel, elf_mips16_howto_table_rela): Use
	_bfd_mips_elf_generic_reloc instead of mips16_jump_reloc.

	[ gas/ChangeLog ]
	* config/tc-mips.c (mips_fix_adjustable): Handle BFD_RELOC_MIPS16_JMP.
	(tc_gen_reloc): Handle mips16 jumps to section symbol offsets.

	[ ld/testsuite/ChangeLog ]
	* ld-mips-elf/mips16-call-global-1.s,
	ld-mips-elf/mips16-call-global-2.s,
	ld-mips-elf/mips16-call-global-3.s, ld-mips-elf/mips16-call-global.d:
	Test linking of external mips16 jumps.
	* ld-mips-elf/mips-elf.exp: Run new test.
2006-07-20 16:46:30 +00:00
Paul Brook
401a54cf6e 2006-07-19 Paul Brook <paul@codesourcery.com>
gas/
	* config/tc-arm.c (insns): Fix rbit Arm opcode.
	gas/testsuite/
	* gas/arm/archv6t2.d: Adjust expected output for rbit.
	opcodes/
	* armd-dis.c (arm_opcodes): Fix rbit opcode.
2006-07-19 12:53:33 +00:00
H.J. Lu
2b516b7297 gas/testsuite/
2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/opcode.s: Add sldt, smsw and str.
	* gas/i386/x86-64-opcode.s: Likewise.

	* gas/i386/opcode.d: Updated.
	* gas/i386/x86-64-opcode.d: Likewise.

opcodes/

2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
	"sldt", "str" and "smsw".
2006-07-18 20:25:41 +00:00
Paul Brook
16805f35a3 2006-07-18 Paul Brook <paul@codesourcery.com>
bfd/
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* reloc.c: Add BFD_RELOC_ARM_T32_ADD_IMM.

	gas/
	* tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
	(md_convert_frag): Use correct reloc for add_pc.  Use
	BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
	(md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
	(arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.

	gas/testsuite/
	* gas/arm/thumb2_add.d: New test.
	* gas/arm/thumb2_add.s: New test.
2006-07-18 16:44:47 +00:00
Thiemo Seufer
2f2760a39d * gas/mips/mips4.s, gas/mips/mips4.d: Enable the "pref" test. Change
arguments for "madd.s" so that the instruction is correct for mips1
	and still matches "bc3*".
2006-07-18 14:06:10 +00:00
Alan Modra
d9e05e4ed1 * symbols.c (report_op_error): Fix pasto. Don't use as_bad_where
when file and line unknown.
2006-07-17 12:49:50 +00:00
Thiemo Seufer
f43abd2b39 * read.c (s_struct): Use IS_ELF.
* config/tc-mips.c (md_begin, mips16_mark_labels, mips_ip,
	md_parse_option, s_change_sec, pic_need_relax, mips_fix_adjustable,
	tc_gen_reloc, mips_frob_file_after_relocs, s_mips_end, s_mips_frame,
	s_mips_mask): Likewise.
2006-07-17 10:40:11 +00:00
Thiemo Seufer
a2902af6f4 * read.c (s_struct): Handle ELF section changing.
* config/tc-mips.c (s_align): Leave enabling auto-align to the
	generic code.
	(s_change_sec): Try section changing only if we output ELF.
2006-07-16 10:19:19 +00:00
H.J. Lu
d32cad6576 2006-07-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
	CpuAmdFam10.
	(smallest_imm_type): Remove Cpu086.
	(i386_target_format): Likewise.

	* config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
	Update CpuXXX.
2006-07-15 16:32:48 +00:00
Michael Meissner
050dfa73de Add amdfam10 instructions 2006-07-13 22:25:48 +00:00
H.J. Lu
6b2de085ee 2006-07-13 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (Size64): Fix a typo in comment.
2006-07-13 18:13:36 +00:00
Nick Clifton
7cfe9437c6 Fix grammatical error in ChangeLog entry 2006-07-12 09:08:34 +00:00
Nick Clifton
01eaea5ad2 * config/tc-sh.c (md_apply_fix): Do not allow the generic code in
fixup_segment() to repeat a range check on a value that have already
  been checked here.
* gas/sh/basic.exp: Run "too_large" dump test.
* gas/sh/too_large.s: New test file.  Check that .byte directives do not
  generate a bogus overflow message.
* gas/sh/too_large.s: New test control file.
2006-07-12 09:02:00 +00:00
Jim Wilson
1e85aad828 Add Broadcom SB-1A support.
* config/tc-mips.c (mips_cpu_info_table): Add sb1a.
2006-07-07 23:17:55 +00:00
Nick Clifton
1370e33d0d PR binutils/2877
* doc/as.texi: Fix spelling typo: branchs => branches.
* doc/c-m68hc11.texi: Likewise.
* config/tc-m68hc11.c: Likewise.
  Support old spelling of command line switch for backwards compatibility.
2006-07-06 10:34:02 +00:00
Julian Brown
c5cfaa43af * gas/arm/vfp-neon-syntax.d: Tweak expected fmsrr syntax.
* gas/arm/vfp-neon-syntax_t2.d: Likewise.
    * gas/arm/vfp2.d: Likewise.
    * gas/arm/vfp2_t2.d: Likewise.
2006-07-05 17:08:09 +00:00
Thiemo Seufer
5f0fe04bc5 * config/tc-mips.c (s_is_linkonce): New function.
(mips16_mark_labels): Don't adjust mips16 symbol addresses for
	weak, external, and linkonce symbols.
	(pic_need_relax): Use s_is_linkonce.
2006-07-04 17:22:11 +00:00
Thiemo Seufer
cd9260d951 * gas/mips/e32-rel2.d, gas/mips/e32-rel4.d: Use -mabi=32 for as.
* gas/mips/mips.exp: Move mips16e testcase to ELF only tests.
	Run elf{el}-rel2 and elf-rel4 for all arches with gpr64. Run
	e32-rel2 and e32-rel4 also for 64 bit configurations.
2006-07-04 16:39:08 +00:00
H.J. Lu
85234291d9 2006-06-24 H.J. Lu <hongjiu.lu@intel.com>
* doc/as.texinfo (Org): Remove space.
	(P2align): Add "@var{abs-expr},".
2006-06-24 18:25:10 +00:00