Commit Graph

1408 Commits

Author SHA1 Message Date
DJ Delorie 378a0c07ca [cgen]
* cpu/mep.opc (mep_cgen_insn_supported_asm): New, skip the short
	version of BSR when assembling VLIW bundles.  Use it in mep-asm.c

[opcodes]

	* mep-asm.c: Regenerate.
	* mep-opc.c: Regenerate.
	* mep-opc.h: Regenerate.
2009-06-24 01:44:53 +00:00
Nick Clifton aece7d2e74 * po/fi.po: Updated Finish translation. 2009-06-22 11:32:21 +00:00
Alan Modra 1998a8e033 cpu/
* m32c.opc (parse_lab_5_3): Use correct enum.
opcodes/
	* m32c-asm.c: Regenerate.
2009-06-22 00:53:25 +00:00
Alan Modra b33bafa0d7 * score-dis.c (print_insn_score48, print_insn_score32): Move default
case label to proper lexical block.
	* score7-dis.c (print_insn_score32): Likewise.
2009-06-22 00:01:57 +00:00
Martin Schwidefsky ce21feb4ba * s390-opc.c (INSTR_RR_0R_OPT, INSTR_RX_0RRD_OPT, MASK_RR_0R_OPT,
MASK_RX_0RRD_OPT): New instruction formats with optional arguments.
        * s390-opc.txt (nopr, nop): Use new instruction format.
2009-06-19 10:55:42 +00:00
Nick Clifton 0313a2b8d2 PR 10288
* arm-dis.c (print_insn_coprocessor): Check that a user specified
        ARM architecture supports the matched instruction.
        (print_insn_arm): Likewise.
        (select_arm_features): New function.  Fills in the fields of an
        arm_feature_set structure based on a given arm machine number.
        (print_insn): Initialise an arm_feature_set structure.

        * objdump.c (disassemble_bytes): Set the
        USER_SPECIFIED_MACHINE_TYPE flag in the disassemble_info structure
        if the user has invoked the -m switch.
        * doc/binutils.texi: Document the additional behaviour of
        objdump's -m switch for ARM targets.

        * dis-asm.h (USER_SPECIFIED_MACHINE_TYPE): New value for the flags
        field of struct disassemble_info.

        * gas/arm/align.s: Add labels so that COFF based targets can
        correctly locate THUMB code.
        * gas/arm/copro.d: Do not pass --architecture switch to objdump.
2009-06-18 10:31:21 +00:00
Maciej W. Rozycki 6db7e006e4 bfd/
* elf32-vax.c (elf_vax_plt_sym_val): New function.
(elf_backend_plt_sym_val): Define.

opcodes/
* vax-dis.c (is_function_entry): Return success for synthetic
symbols too.
(is_plt_tail): New function.
(print_insn_vax): Decode PLT entry offset longword.
2009-06-16 02:23:09 +00:00
Nick Clifton fe2ceba101 PR 10186
* arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
        instruction.

        * gas/arm/thumb32.d: Fix expected binary value of SEV.W instruction.

        * config/tc-arm.c (T16_32_TAB): Fix binary value of SEV.W
        instruction.
2009-06-15 15:42:36 +00:00
Nick Clifton 522fe56177 PR 10173
* cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
2009-06-15 15:24:52 +00:00
Nick Clifton 1316c8b37f PR 10263
* arm-dis.c (print_insn): Ignore is_data if the user has requested
        the disassembly of data as well as instructions.

        * objdump.c (disassemble_bytes): Set the DISASSEMBLE_DATA bit in
        the flags field of the disassemble_info structure if the -D switch
        is in operation.

        * dis-asm.h (struct disassemble_info): New value for the flags
        field.
2009-06-15 11:37:26 +00:00
Doug Evans f6475b4872 * cgen.sh: Handle multiple simultaneous runs for parallel makes. 2009-06-14 16:36:56 +00:00
Anthony Green f865a31d1e Add PC-relative branch instructions to moxie port. 2009-06-11 11:27:58 +00:00
Anthony Green 0e7c7f11f4 Print moxie addresses nicely. 2009-06-06 13:02:21 +00:00
Alan Modra 67a648f17a * dep-in.sed: Don't use \n in replacement part of s command.
* Makefile.am (DEP1): LC_ALL for uniq.
	* Makefile.in: Regenerate.
2009-06-04 06:57:56 +00:00
Nick Clifton 06c582ac9d * po/nl.po: Updated Dutch translation. 2009-06-02 16:31:59 +00:00
Tristan Gingold 3164099e4f 2009-05-29 Tristan Gingold <gingold@adacore.com>
* ia64-gen.c (parse_resource_users, print_dependency_table,
	add_dis_table_ent, finish_distable, insert_bit_table_ent,
	add_dis_entry, compact_distree, gen_dis_table, completer_entries_eq,
	get_prefix_len, compute_completer_bits, insert_opcode_dependencies,
	insert_completer_entry, print_completer_entry, print_completer_table,
	opcodes_eq, add_opcode_entry, shrink): Use ISO C syntax for functions.
2009-06-02 07:48:05 +00:00
DJ Delorie d285268e48 [cgen]
* cpu/mep.opc (parse_signed16_range): New.
	(parse_unsigned16_range): New.
	* cpu/mep-ivc2.cpu (imm16p0, simm16p0): Use them.
[opcodes]
	* mep-asm.c: Regenerate.
	* mep-desc.c: Regenerate.
2009-05-28 22:53:08 +00:00
DJ Delorie 2f3565a392 [cgen/cpu]
* cpu/mep-ivc2.cpu (h-ccr-ivc2): Enable for C3 slots, fix
	accumulator names.
	(f-ivc2-ccrn-c3hi): New.
	(f-ivc2-ccrn-c3lo): New.
	(f-ivc2-ccrn-c3): New.
	(ivc2c3ccrn): Use it.

[sid/component/cgen-cpu/mep]

	* mep-cop1-32-decode.cxx: Regenerate.
	* mep-cop1-32-decode.h: Regenerate.
	* mep-cop1-32-sem.cxx: Regenerate.
	* mep-cop1-48-sem.cxx: Regenerate.

[opcodes]

	* mep-asm.c: Regenerate.
	* mep-desc.c: Regenerate.
	* mep-desc.h: Regenerate.
	* mep-dis.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mep-opc.c: Regenerate.
	* mep-opc.h: Regenerate.
2009-05-27 01:49:46 +00:00
Nick Clifton f12e7348b2 Update Indonesian translations.
Update translation templates.
2009-05-26 16:49:41 +00:00
Alan Modra 9e097a72c9 * dep-in.sed: Don't modify .o to .lo here. Output one filename
per line with all lines having continuation backslash.  Prefix
	first line with "A", following lines with "B".
	* Makefile.am (DEP): Don't use dep.sed here.
	(DEP1): Run $MKDEP on single files, modify .o to .lo here.  Use
	dep.sed here on dependencies, sort and uniq.
	* Makefile.in: Regenerate.
2009-05-26 03:19:28 +00:00
Tristan Gingold 4f8318f890 2009-05-25 Tristan Gingold <gingold@adacore.com>
* makefile.vms (OPT): New variable.
	(CFLAGS): Update compilation flags.
2009-05-25 12:43:48 +00:00
DJ Delorie 1d74713bc6 [cgen]
* cpu/mep.opc (mep_examine_ivc2_insns): Fix bug in ivc2 decoder.
	(mep_config_map): Regenerate.

	* cpu/mep-ivc2.cpu (h-ccr-ivc2): Add generic names as well as
	ivc2-specific names.
	(simm8p20): New.
	(cmovc): move to after field definitions, use ivc2-specific
	register names.
	(cpmovi_b_P0S_P1): New.

[utils/mep]

	* mepcfgtool.c (do_cgen_config_opc): Propagate endianness and VLIW
	size to default configuration.

[sid/component/cgen-cpu/mep]

	* mep-cop1-16-decode.cxx: Regenerate.
	* mep-cop1-16-decode.h: Regenerate.
	* mep-cop1-16-model.cxx: Regenerate.
	* mep-cop1-16-model.h: Regenerate.
	* mep-cop1-16-sem.cxx: Regenerate.
	* mep-cop1-64-decode.cxx: Regenerate.
	* mep-cop1-64-decode.h: Regenerate.
	* mep-cop1-64-model.cxx: Regenerate.
	* mep-cop1-64-model.h: Regenerate.
	* mep-cop1-64-sem.cxx: Regenerate.

[opcodes]

	* mep-asm.c: Regenerate.
	* mep-desc.c: Regenerate.
	* mep-desc.h: Regenerate.
	* mep-dis.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mep-opc.c: Regenerate.
	* mep-opc.h: Regenerate.
2009-05-22 17:37:45 +00:00
Dwarakanath Rajagopal c1e679ec0a <gas changes>
2009-05-22  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>

	* config/tc-i386.c (process_drex): Delete. Remove SSE5 support.
	(build_modrm_byte): Remove DREX handling support.
	(DREX_*): Delete.
	(drex_byte): Delete.
	(md_assemble): Remove DREX handling support.
	(process_operands): Remove DREX, SSE5 support.
	(i386_insn): Remove DREX.

<gas/testsuite changes>
2009-05-22  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>

	* gas/i386/i386.exp: Remove SSE5 tests.
	* gas/i386/x86-64-sse5.s: Delete. Remove SSE5 tests.
	* gas/i386/x86-64-sse5.d: Ditto.
	* gas/i386/arch-10-1.l: Remove SSE5 tests.
	* gas/i386/arch-10-2.l: Ditto.
	* gas/i386/arch-10-3.l: Ditto.
	* gas/i386/arch-10-4.l: Ditto.
	* gas/i386/arch-10.d: Ditto.
	* gas/i386/arch-10.s: Ditto.
	* gas/i386/arch-4.s: Delete. Remove SSE5 tests.
	* gas/i386/arch-4.d: Ditto.
	* gas/i386/arch-8.s: Ditto.
	* gas/i386/arch-8.d: Ditto.
	* gas/i386/arch-2.s: Remove SSE5 tests.
	* gas/i386/arch-2.d: Remove SSE5 tests.
	* gas/i386/x86-64-arch-2.s: Ditto.

<opcodes changes>
2009-05-22  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>

	* i386-opc.h (Cpusse5): Delete.
	(i386_cpu_flags): Delete.
	* i386-gen.c: Remove CpuSSE5, Drex, Drexv and Drexc.
	* i386-opc.tbl: Remove SSE5 instructions.
	* i386-tbl.h: Regenerate.
	* i386-init.h: Regenerate.
	* i386-dis.c (OP_E_memeory, OP_E_extended): Remove drex handling.
	(print_drex_arg): Delete.
	(OP_DREX4): Delete.
	(OP_DREX3): Delete.
	(OP_DREX_ICMP): Delete.
	(OP_DREX_FCMP): Delete.
	(DREX_*): Delete.
	(THREE_BYTE_0F24, THREE_BYTE_0F25, THREE_BYTE_0f7B): Delete.
2009-05-22 15:57:25 +00:00
Alan Modra 2b3decb5e1 Run "make dep-am" and regenerate 2009-05-22 09:33:16 +00:00
DJ Delorie eb9568003a * mep-asm.c: Regenerate.
* mep-opc.c: Regenerate.
2009-05-19 23:35:47 +00:00
DJ Delorie 3526b6802e Index: opcodes
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.

Index: gas

* config/tc-mep.c (md_begin): Check coprocessor type.
(md_check_parallel64_scheduling): Use memset to initialize the buffer.
(md_check_parallel32_scheduling): Likewise.
(slot_ok): New.
(mep_check_ivc2_scheduling): New.
(mep_check_parallel_scheduling): Call it.
(mep_process_saved_insns): Add IVC2 slot support.
(md_assemble): Likewise.
2009-04-30 21:23:30 +00:00
DJ Delorie 45be3704c8 [cgen]
* cpu/mep-c5.cpu (f-12s20): Change to signed.
	(lhucpm1): Limit to C5 mach.
	(dsp0,dsp1): Rewrite as aliases so that intrinsics are generated.
	* cpu/mep-core.cpu (extend-cdisp10): New.
	(f-cdisp10): Change to signed, use extend-cdisp10 to sign extend.

[opcodes]
	* mep-desc.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mep-opc.c: Regenerate.
	* mep-opc.h: Regenerate.

[sid/component/cgen-cpu/mep]
	* mep-core1-decode.cxx: Regenerate.
	* mep-core1-decode.h: Regenerate.
	* mep-decode.cxx: Regenerate.
	* mep-decode.h: Regenerate.
2009-04-18 02:56:43 +00:00
DJ Delorie 52de720d5d Add missing ChangeLog entry:
* mep-asm.c: Regenerate.
* mep-desc.c: Regenerate.
* mep-desc.h: Regenerate.
* mep-dis.c: Regenerate.
* mep-ibld.c: Regenerate.
* mep-opc.c: Regenerate.
* mep-opc.h: Regenerate.
2009-04-18 01:50:02 +00:00
Nick Clifton 20135e4cea Add new binutils target: moxie 2009-04-16 15:39:48 +00:00
Jan Beulich ac5c19e6ba gas/testsuite/
2009-04-15  Jan Beulich  <jbeulich@novell.com>

	* gas/i386/x86-64-sse5.s: Add test of protd.
	* gas/i386/x86-64-sse5.d: Adjust expectations to match input.

opcodes/
2009-04-15  Jan Beulich  <jbeulich@novell.com>

	* i386-opc.tbl (protb, protw, protd, protq): Set opcode
	extension to None.
	(pshab, pshaw, pshad, pshaq): Likewise.
	* i386-tbl.h: Re-generate.
2009-04-15 13:31:28 +00:00
Peter Bergner 858d7a6db2 opcodes/
* ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva",
	"tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation.
	Reorder entries so the extended mnemonics are listed before tlbilx.

gas/testsuite/
	* gas/ppc/e500mc.d: Update to match extended mnemonics.
2009-04-07 18:28:02 +00:00
Peter Bergner 70dc4e324b opcodes/
* ppc-dis.c (powerpc_init_dialect): Do not choose a default dialect
	due to -many/-Many.
	(print_insn_powerpc): Make sure we only deprecate instructions using
	the original dialect and not a modified dialect due to -Many handling.
	Move the handling of the condition register and default operands to
	the end of the if/else if/else chain.
	* ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
	instructions from newer processors are listed before older ones.
	<"icblce", "sync", "eieio", "tlbld">: Deprecate for processors
	that have instructions with conflicting opcodes.
2009-04-02 13:30:56 +00:00
Peter Bergner e401b04ca7 opcodes/
* ppc-opc.c (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and
        E500MC entries.
2009-04-02 00:42:29 +00:00
Christophe Lyon b8f9ee44f9 2009-04-01 Christophe Lyon <christophe.lyon@st.com>
opcodes/
	* arm-dis.c (print_insn): Print BE8 opcodes in little endianness.

	ld/testsuite/
	* ld-arm/arm-elf.exp: BE8 tests expect the same output as the
	default ones.
	* ld-arm/arm-be8.d: Print opcodes in little endian.
	* ld-arm/farcall-thumb-arm-be8.d: Removed useless expected result.
	* ld-arm/farcall-arm-arm-be8.d: Likewise.
2009-04-01 15:45:13 +00:00
Joseph Myers d460e92e41 gas/testsuite:
* gas/arm/mapsecs.d, gas/arm/mapsecs.s: New.

opcodes:
	* arm-dis.c (print_insn): Also check section matches in backwards
	search for mapping symbol.
2009-03-30 14:41:31 +00:00
H.J. Lu d34b50065a 2009-03-26 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (get_valid_dis386): Abort on unhandled table.
2009-03-27 00:28:32 +00:00
Alan Modra 3889c459bb bfd/
* vms-hdr.c: Don't include alloca.h.
opcodes/
	* cgen-opc.c: Include alloca-conf.h rather than alloca.h.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
2009-03-18 11:47:18 +00:00
Alan Modra 8d25cc3de0 include/
* alloca-conf.h: Revise based on autoconf-2.61, autoconf-2.13
	documentation.
bfd/
	* elf32-m68hc1x.c: Include alloca-conf.h.
	* xsym.c: Likewise.
	* elf64-hppa.c: Likewise.  Remove existing #if's handling alloca.
	* som.c: Likewise.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
binutils/
	* sysdep.h: Include alloca-conf.h instead of config.h and remove
	existing #if's handling alloca.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
gas/
	* as.h: Include alloca-conf.h instead of config.h and remove
	existing #if's handling alloca.
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
opcodes/
	* Makefile.am: Run "make dep-am".
	* Makefile.in: Regenerate.
	* openrisc-opc.c: Regenerate.
ld/
	* ld.h: Remove alloca handling.
2009-03-18 11:27:18 +00:00
Nick Clifton 34dd024a28 Add Spanish translation to gold.
Update Indonesian translation for opcodes.
2009-03-10 09:21:01 +00:00
Alan Modra 69fe9ce501 include/opcode/
* ppc.h (ppc_parse_cpu): Declare.
opcodes/
	* ppc-dis.c: Include "opintl.h".
	(struct ppc_mopt, ppc_opts): New.
	(ppc_parse_cpu): New function.
	(powerpc_init_dialect): Use it.
	(print_ppc_disassembler_options): Dump options from ppc_opts.
	Internationalize message.
gas/
	* config/tc-ppc.c (parse_cpu): Delete.
	(md_parse_option, ppc_machine): Use ppc_parse_cpu.
gas/testsuite/
	* gas/ppc/altivec_and_spe.d (objdump): Add -Maltivec.
	* gas/ppc/common.d: Adjust for -Mcom not including -Mppc.
2009-03-10 06:53:46 +00:00
Nick Clifton d11fd24905 Updated Spanish translations. 2009-03-06 12:14:40 +00:00
Alan Modra 51dec22749 bfd/
PR 6768
	* configure.in: Test for ld --as-needed support.  Link shared
	libbfd against libm.
	* configure: Regenerate.
opcodes/
	PR 6768
	* configure.in: Test for ld --as-needed support.  Link shared
	libopcodes against libm.
	* configure: Regenerate.
2009-03-04 02:10:34 +00:00
Alan Modra a1f7ca36bf missing from make dep-am commit 2009-03-04 01:16:15 +00:00
Peter Bergner c72ab5f2c5 opcodes/
* ppc-opc.c (powerpc_opcodes): Reorder the opcode table so that
	instructions from newer processors are listed before older ones.
2009-03-04 01:00:53 +00:00
Nick Clifton c3b7224ae4 Add support for Score7 architecture. 2009-03-02 10:33:08 +00:00
Ralf Wildenhues 58e2467181 Backport from git Libtool:
2009-01-19  Robert Millan  <rmh@aybabtu.com>
	Support GNU/kOpenSolaris.
	* libltdl/m4/libtool.m4 (_LT_SYS_DYNAMIC_LINKER)
	(_LT_CHECK_MAGIC_METHOD, _LT_COMPILER_PIC, _LT_LINKER_SHLIBS)
	(_LT_LANG_CXX_CONFIG) [kopensolaris*-gnu]: Recognize
	GNU/kOpenSolaris.

binutils/
	* configure: Regenerate.

opcodes/
	* configure: Regenerate.

bfd/
	* configure: Regenerate.

gas/
	* configure: Regenerate.

gprof/
	* configure: Regenerate.

ld/
	* configure: Regenerate.
2009-03-01 18:57:19 +00:00
H.J. Lu d6f574e0ed 2009-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_EX): Call OP_E_memory instead of OP_E.
2009-02-27 20:13:04 +00:00
Peter Bergner 066be9f7bd gas/
* config/tc-ppc.c (pre_defined_registers): Add "f32" to "f63",
	"f.32" to "f.63", "vs0" to "vs63" and "vs.0" to "vs.63".
	(parse_cpu): Extend -mpower7 to accept power7 and isel instructions.

gas/testsuite/
	* gas/ppc/e500mc.d ("wait", "waitsrv", "waitimpl"): Add tests.
	* gas/ppc/e500mc.s: Likewise.
	* gas/ppc/power6.d ("cdtbcd", "cbcdtd", "addg6s"): Add tests.
	* gas/ppc/power6.s: Likewise.
	* gas/ppc/power7.d ("lfdpx", "mffgpr", "mftgpr"): Remove invalid tests.
	("wait", "waitsrv", "waitimpl", "divwe", "divwe.", "divweo", "divweo.",
	"divweu", "divweu.", "divweuo", "divweuo.", "bpermd", "popcntw",
	"popcntd", "ldbrx", "stdbrx", "lfiwzx", "lfiwzx", "fcfids", "fcfids.",
	"fcfidus", "fcfidus.", "fctiwu", "fctiwu.", "fctiwuz", "fctiwuz.",
	"fctidu", "fctidu.", "fctiduz", "fctiduz.", "fcfidu", "fcfidu.",
	"ftdiv", "ftdiv", "ftsqrt", "ftsqrt", "dcbtt", "dcbtstt", "dcffix",
	"dcffix.", "lbarx", "lbarx", "lbarx", "lharx", "lharx", "lharx",
	"stbcx.", "sthcx.", "fre", "fre.", "fres", "fres.", "frsqrte",
	"frsqrte.", "frsqrtes", "frsqrtes.", "isel"): Add tests.
	* gas/ppc/power7.s: Likewise.
	* gas/ppc/vsx.d: New test.
	* gas/ppc/vsx.s: Likewise.
	* gas/ppc/ppc.exp: Run it.

include/opcode/
	* ppc.h (PPC_OPCODE_POWER7): New.

opcodes/
	* ppc-dis.c (powerpc_init_dialect): Extend -Mpower7 to disassemble
	the power7 and the isel instructions.
	* ppc-opc.c (insert_xc6, extract_xc6): New static functions.
	(insert_dm, extract_dm): Likewise.
	(XB6): Update comment to include XX2 form.
	(WC, XC6, SHW, DMEX, UIM, XX2, XX3RC, XX4, XX2_MASK, XX2UIM_MASK,
	XX2BF_MASK, XX3BF_MASK, XX3SHW_MASK, XX4_MASK, XWC_MASK, POWER7): New.
	(RemoveXX3DM): Delete.
	(powerpc_opcodes): <"lfdp", "lfdpx", "mcrxr", "mftb", "mffgpr",
	"mftgpr">: Deprecate for POWER7.
	<"fres", "fres.", "frsqrtes", "frsqrtes.", "fre", "fre.", "frsqrte",
	"frsqrte.">: Deprecate the three operand form and enable the two
	operand form for POWER7 and later.
	<"wait">: Extend to accept optional parameter.  Enable for POWER7.
	<"waitsrv", "waitimpl">: Add extended opcodes.
	<"ldbrx", "stdbrx">: Enable for POWER7.
	<"cdtbcd", "cbcdtd", "addg6s">: Add POWER6 opcodes.
	<"bpermd", "dcbtstt", "dcbtt", "dcffix.", "dcffix", "divde.", "divde",
	"divdeo.", "divdeo", "divdeu.", "divdeu", "divdeuo.", "divdeuo",
	"divwe.", "divwe", "divweo.", "divweo", "divweu.", "divweu", "divweuo.",
	"divweuo", "fcfids.", "fcfids", "fcfidu.", "fcfidu", "fcfidus.",
	"fcfidus", "fctidu.", "fctidu", "fctiduz.", "fctiduz", "fctiwu.",
	"fctiwu", "fctiwuz.", "fctiwuz", "ftdiv", "ftsqrt", "lbarx", "lfiwzx",
	"lharx", "popcntd", "popcntw", "stbcx.", "sthcx.">: Add POWER7 opcodes.
	<"lxsdux", "lxsdx", "lxvdsx", "lxvw4ux", "lxvw4x", "stxsdux", "stxsdx",
	"stxvw4ux", "stxvw4x", "xsabsdp", "xsadddp", "xscmpodp", "xscmpudp",
	"xscpsgndp", "xscvdpsp", "xscvdpsxds", "xscvdpsxws", "xscvdpuxds",
	"xscvdpuxws", "xscvspdp", "xscvsxddp", "xscvuxddp", "xsdivdp",
	"xsmaddadp", "xsmaddmdp", "xsmaxdp", "xsmindp", "xsmsubadp",
	"xsmsubmdp", "xsmuldp", "xsnabsdp", "xsnegdp", "xsnmaddadp",
	"xsnmaddmdp", "xsnmsubadp", "xsnmsubmdp", "xsrdpi", "xsrdpic",
	"xsrdpim", "xsrdpip", "xsrdpiz", "xsredp", "xsrsqrtedp", "xssqrtdp",
	"xssubdp", "xstdivdp", "xstsqrtdp", "xvabsdp", "xvabssp", "xvadddp",
	"xvaddsp", "xvcmpeqdp.", "xvcmpeqdp", "xvcmpeqsp.", "xvcmpeqsp",
	"xvcmpgedp.", "xvcmpgedp", "xvcmpgesp.", "xvcmpgesp", "xvcmpgtdp.",
	"xvcmpgtdp", "xvcmpgtsp.", "xvcmpgtsp", "xvcpsgnsp", "xvcvdpsp",
	"xvcvdpsxds", "xvcvdpsxws", "xvcvdpuxds", "xvcvdpuxws", "xvcvspdp",
	"xvcvspsxds", "xvcvspsxws", "xvcvspuxds", "xvcvspuxws", "xvcvsxddp",
	"xvcvsxdsp", "xvcvsxwdp", "xvcvsxwsp", "xvcvuxddp", "xvcvuxdsp",
	"xvcvuxwdp", "xvcvuxwsp", "xvdivdp", "xvdivsp", "xvmaddadp",
	"xvmaddasp", "xvmaddmdp", "xvmaddmsp", "xvmaxdp", "xvmaxsp",
	"xvmindp", "xvminsp", "xvmovsp", "xvmsubadp", "xvmsubasp", "xvmsubmdp",
	"xvmsubmsp", "xvmuldp", "xvmulsp", "xvnabsdp", "xvnabssp", "xvnegdp",
	"xvnegsp", "xvnmaddadp", "xvnmaddasp", "xvnmaddmdp", "xvnmaddmsp",
	"xvnmsubadp", "xvnmsubasp", "xvnmsubmdp", "xvnmsubmsp", "xvrdpi",
	"xvrdpic", "xvrdpim", "xvrdpip", "xvrdpiz", "xvredp", "xvresp",
	"xvrspi", "xvrspic", "xvrspim", "xvrspip", "xvrspiz", "xvrsqrtedp",
	"xvrsqrtesp", "xvsqrtdp", "xvsqrtsp", "xvsubdp", "xvsubsp", "xvtdivdp",
	"xvtdivsp", "xvtsqrtdp", "xvtsqrtsp", "xxland", "xxlandc", "xxlnor",
	"xxlor", "xxlxor", "xxmrghw", "xxmrglw", "xxsel", "xxsldwi", "xxspltd",
	"xxspltw", "xxswapd">: Add VSX opcodes.
2009-02-26 22:07:33 +00:00
H.J. Lu 4c664d7bf7 gas/
2009-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (vex_imm4): Removed.
	(VEX_check_operands): Likewise.
	(match_template): Updated.

opcodes/

2009-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (operand_type_init): Remove OPERAND_TYPE_VEX_IMM4.
	(operand_types): Remove Vex_Imm4.

	* i386-opc.h (Vex_Imm4): Removed.
	(OTMax): Updated.
	(i386_operand_type): Remove vex_imm4.

	* i386-opc.tbl: Remove Vex_Imm4 comments.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
2009-02-23 20:41:46 +00:00
Richard Earnshaw 4ce8808b2c * arm-dis.c (neon_opcodes): Correct bit-mask and patterns for
vq{r}shr{u}n.s64 insnstructions.
2009-02-23 14:58:34 +00:00