2009-07-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10420
* config/tc-i386.c (i386_align_code): Tune for 32bit nops in
64bit.
(i386_target_format): Set cpu_arch_isa_flags.bitfield.cpulm
for 64bit.
gas/testsuite/
2009-07-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10420
* gas/i386/i386.exp: Run x86-64-nops-1-pentium.
* gas/i386/x86-64-nops-1-pentium.d: New.
* config/tc-i386.c (md_assemble): Update operand types.
(update_imm): Updated.
(finalize_imm): Update the first 2 immediate operands only
for instructions with 2 operands or more.
(MAX_MEM_FOR_RS_ALIGN_CODE): Define in terms of
MAX_MEM_ALIGNMENT_BYTES.
* config/tc-arm.c (arm_frag_align_code): Replace hard coded
constant with MAX_MEM_FOR_RS_ALIGN_CODE.
* gas/arm/align64.s: New test case.
* gas/arm/align64.d: Expected disassembly.
* config/tc-arm.c (md_assemble): Added validation.
gas/testsuite
* gas/arm/thumb-w-bad.d: New test case.
* gas/arm/thumb-w-bad.l: New file.
* gas/arm/thumb-w-bad.s: New file.
* gas/arm/thumb-w-good.d: New test case.
* gas/arm/thumb-w-good.s: New file.
(set_it_insn_type_nonvoid): New macro.
(emit_thumb32_expr): New function.
(thumb_insn_size): New function.
(emit_insn): New function.
(s_arm_elf_inst): New function.
(md_pseudo_table): New pseudo-opcode entries added.
* doc/c-arm.texi: New directive added.
* gas/arm/inst-po.d: New testcase.
* gas/arm/inst-po.s: New file.
* gas/arm/inst-po-2.d: New testcase.
* gas/arm/inst-po-2.s: New file.
* gas/arm/inst-po-2.l: New file.
* gas/arm/inst-po-3.d: New testcase.
* gas/arm/inst-po-3.s: New file.
* gas/arm/inst-po-be.d: New testcase.
* arm-dis.c (coprocessor): Print the LDC and STC versions of the
LFM and SFM instructions as comments,.
Improve consistency of formatting for instructions displayed as
comments and decimal values displayed with their hexadecimal
equivalents.
Formatting tidy ups.
Updated expected disassembler regexps.
* arm-dis.c (enum opcode_sentinels): New: Used to mark the
boundary between variaant and generic coprocessor instuctions.
(coprocessor): Use it.
Fix architecture version of MCRR and MRRC instructions.
(arm_opcdes): Fix patterns for STRB and STRH instructions.
(print_insn_coprocessor): Check architecture and extension masks.
Print a hexadecimal version of any decimal constant that is
outside of the range of -16 to +32.
(print_arm_address): Add a return value of the offset used in the
adress, if it is worth printing a hexadecimal version of it.
(print_insn_neon): Print a hexadecimal version of any decimal
constant that is outside of the range of -16 to +32.
(print_insn_arm): Likewise.
(print_insn_thumb16): Likewise.
(print_insn_thumb32): Likewise.
PR 10297
* arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
of an undefined instruction.
(arm_opcodes): Use it.
(thumb_opcod): Use it.
(thumb32_opc): Use it.
Update expected disassembly regrexps in GAS and LD testsuites.
32 bits for relaxable branches so that we can relax them later.
(md_estimate_size_before_relax): Assume IVC2 branches will be relaxed.
(mep_relax_frag): New.
(md_convert_frag): Relax IVC2 branches in-place.
* config/tc-mep.h ((mep_relax_frag): New.
(implicit_it_mode): New global.
(it_instruction_type): New enum.
(arm_parse_it_mode): New function.
(arm_long_opts): New option added.
(arm_it): New field.
(it_state): New enum.
(now_it): New macro.
(check_it_blocks_finished): New function.
(insns[]): Use the IT Thumb opcodes for ARM too.
(arm_cleanup): Call check_it_blocks_finished.
(now_it_compatible): New function.
(conditional_insn): New function.
(set_it_insn_type): New macro.
(set_it_insn_type_last): New macro.
(do_it): Call automatic IT machinery functions.
(do_t_add_sub): Likewise
(do_t_arit3): Likewise.
(do_t_arit3c): Likewise.
(do_t_blx): Likewise.
(do_t_branch): Likewise.
(do_t_bkpt): Likewise.
(do_t_branch23): Likewise.
(do_t_bx): Likewise.
(do_t_bxj): Likewise.
(do_t_cps): Likewise.
(do_t_cpsi): Likewise.
(do_t_cbz): Likewise.
(do_t_it): Likewise.
(encode_thumb2_ldmstm): Likewise.
(do_t_ldst): Likewise.
(do_t_mov_cmp): Likewise.
(do_t_mvn_tst): Likewise.
(do_t_mul): Likewise.
(do_t_neg): Likewise.
(do_t_setend): Likewise.
(do_t_shift): Likewise.
(do_t_tb): Likewise.
(output_it_inst): New function.
(new_automatic_it_block): New function.
(close_automatic_it_block): New function.
(now_it_add_mask): New function.
(it_fsm_pre_encode): New function.
(handle_it_state): New function.
(it_fsm_post_encode): New function.
(force_automatic_it_block_close): New function.
(in_it_block): New function.
(md_assemble): Call automatic IT block machinery functions.
(arm_frob_label): Likewise.
(arm_opts): New element.
* config/tc-arm.h (it_state): New enum.
(current_it): New struct.
(arm_segment_info_type): New member added.
* doc/c-arm.texi: New option -mimplicit-it documented.
* gas/arm/arm-it-auto.d: New test.
* gas/arm/arm-it-auto.s: New file.
* gas/arm/arm-it-auto-2.d: New test case.
* gas/arm/arm-it-auto-2.s: New file.
* gas/arm/arm-it-auto-3.d: New test case.
* gas/arm/arm-it-auto-3.s: New file.
* gas/arm/arm-it-bad.d: New test case.
* gas/arm/arm-it-bad.l: New file.
* gas/arm/arm-it-bad.s: New file.
* gas/arm/arm-it-bad-2.d: New test case.
* gas/arm/arm-it-bad-2.l: New file.
* gas/arm/arm-it-bad-2.s: New file.
* gas/arm/arm-it-bad-3.d: New test case.
* gas/arm/arm-it-bad-3.l: New file.
* gas/arm/arm-it-bad-3.s: New file.
* gas/arm/thumb2_it_auto.d: New test.
* gas/arm/thumb2_it_bad.l: Error message updated.
* gas/arm/thumb2_it_bad_auto.d: New test.
* gas/arm/thumb2_it.d: Comment added.
* gas/arm/thumb2_it_bad.d: Comment added.
* gas/tc-arm.c (do_t_ssat): Move common code from here...
(do_t_usat): ... and here to...
(do_t_ssat_usat): New function: ... here. Add code to check that
the shift value, if present, is in range.
* gas/arm/thumb2_bad_reg.s: Add tests for SSAT and USAT with an
out of range shift.
* gas/arm/thumb2_bad_reg.l: Update expected error messages.
* arm-dis.c (print_insn_coprocessor): Check that a user specified
ARM architecture supports the matched instruction.
(print_insn_arm): Likewise.
(select_arm_features): New function. Fills in the fields of an
arm_feature_set structure based on a given arm machine number.
(print_insn): Initialise an arm_feature_set structure.
* objdump.c (disassemble_bytes): Set the
USER_SPECIFIED_MACHINE_TYPE flag in the disassemble_info structure
if the user has invoked the -m switch.
* doc/binutils.texi: Document the additional behaviour of
objdump's -m switch for ARM targets.
* dis-asm.h (USER_SPECIFIED_MACHINE_TYPE): New value for the flags
field of struct disassemble_info.
* gas/arm/align.s: Add labels so that COFF based targets can
correctly locate THUMB code.
* gas/arm/copro.d: Do not pass --architecture switch to objdump.
* elf32-vax.c (elf_vax_check_relocs): Handle the visibility
attribute.
(elf_vax_relocate_section): Likewise.
gas/
* config/tc-vax.c (md_estimate_size_before_relax): Accept
indirect symbol references in the PIC mode and emit a
PC-relative relocation instead of a GOT/PLT one. Likewise
for symbols known to be hidden at this point.
* arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
instruction.
* gas/arm/thumb32.d: Fix expected binary value of SEV.W instruction.
* config/tc-arm.c (T16_32_TAB): Fix binary value of SEV.W
instruction.
* config/tc-i386.c (md_estimate_size_before_relax): Don't relax
branches to weak symbols.
(md_apply_fix): Don't convert fixes against weak symbols to
section-relative offsets, but save addend for later reloc emission.
(tc_gen_reloc): When emitting reloc against weak symbol, adjust
addend to pre-compensate for bfd_install_relocation.
H.J. Lu
Nick Clifton
Nathan Sidwell
Tom Tromey
DJ Delorie
Tristan Gingold
Dwarakanath Rajagopal
Alan Modra
Paul Brook
Martin Schwidefsky
Dave Korn
Maciej W. Rozycki
Anthony Green
Jakub Jelinek
Catherine Moore