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5311 Commits

Author SHA1 Message Date
Sterling Augustine 19ef5f3d6d 2010-02-08 Sterling Augustine <sterling@tensilica.com> 
* config/tc-xtensa.c (frag_format_size): Generalize logic to
	handle more instruction	sizes and fetch widths.
	(branch_align_power): Likewise.
	(text_align_power): Likewise.
	(bytes_to_stretch): Likewise.
 2010-02-08 18:45:05 +00:00
Nick Clifton bb7c70edcc * objdump.c (disassemble_bytes): Clear aux->reloc before printing 
a new address, so as not to reuse a previous, non-related reloc.

        * gas/arm/arm-it-auto.d, gas/arm/bl-local-v4t.d,
        gas/arm/blx-local.d, gas/arm/thumb-w-good.d: Update expected
        results.
 2010-02-08 14:33:22 +00:00
Alan Modra ce3d2015b2 include/ 
* opcode/ppc.h (PPC_OPCODE_TITAN): Define.
bfd/
	* archures.c (bfd_mach_ppc_titan): Define.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (bfd_powerpc_archs): Add titan entry.
opcodes/
	* ppc-dis.c (ppc_opts): Add titan entry.
	* ppc-opc.c (TITAN, MULHW): Define.
	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
gas/
	* config/tc-ppc.c (md_show_usage): Mention -mtitan.  Don't use tabs.
	(ppc_mach): Handle titan.
	* doc/c-ppc.texi: Mention -mtitan.
gas/testsuite/
	* gas/ppc/titan.d, * gas/ppc/titan.s: New test.
	* gas/ppc/ppc.exp: Run it.
 2010-02-08 01:59:38 +00:00
Sterling Augustine 1beeb6866d 10-02-05 Sterling Augustine <sterling@tensilica.com> 
* config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and
	replace with...
	(xtensa_fetch_width) ...this.
 2010-02-05 18:52:27 +00:00
Joseph Myers 1e4cb85751 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID, 
MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove.
	* Makefile.in: Regenerate.
 2010-02-05 12:43:09 +00:00
Sebastian Pop 68339fdf88 2010-02-03 Quentin Neill <quentin.neill@amd.com> 
gas/
	* config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1.
	(i386_align_code): Rename  PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1.
	* config/tc-i386.h (processor_type): Same.
	* doc/c-i386.texi: Change amdfam15 to bdver1.

opcodes/
	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	to CPU_BDVER1_FLAGS
	* i386-init.h: Regenerated.

testsuite/
	* gas/i386/i386.exp: Rename amdfam15 test cases to bdver1.
	* gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to
	gas/i386/x86-64-nops-1-bdver1.d.
	* gas/i386/nops-1-amdfam15.d: Renamed test case to
	gas/i386/nops-1-bdver1.d.
 2010-02-03 20:36:14 +00:00
Daniel Jacobowitz b0e28b39b7 gas/testsuite/ 
* gas/arm/dis-data.d: Update test name.  Do not expect
	.word output.
	* gas/arm/dis-data2.d, gas/arm/dis-data2.s,
	gas/arm/dis-data3.d, gas/arm/dis-data3.s: New tests.

	opcodes/
	* opcodes/arm-dis.c (struct arm_private_data): New.
	(print_insn_coprocessor, print_insn_arm): Update to use struct
	arm_private_data.
	(is_mapping_symbol, get_map_sym_type): New functions.
	(get_sym_code_type): Check the symbol's section.  Do not check
	mapping symbols.
	(print_insn): Default to disassembling ARM mode code.  Check
	for mapping symbols separately from other symbols.  Use
	struct arm_private_data.
 2010-01-29 16:47:55 +00:00
Nick Clifton 99b253c514 PR 11136 
* config/tc-arm.c (neon_check_type): Handle a neon_shape value of
        NS_NULL.
        * gas/arm/neon-omit.s: Add instruction that causes crash.
        * gas/arm/neon-omit.d: Add expected disassembly.
 2010-01-29 16:02:41 +00:00
Dave Korn 09be49c9dd * gas/pe/section-align-1.d: Don't test section flags. 
* gas/pe/section-align-2.d: Likewise.
 2010-01-28 19:00:03 +00:00
H.J. Lu 1c4809636b Allow VL=1 on scalar FMA instructions. 
gas/testsuite/

2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/fma-scalar-intel.d: New.
	* gas/i386/fma-scalar.d: Likewise.
	* gas/i386/fma-scalar.s: Likewise.
	* gas/i386/x86-64-fma-scalar-intel.d: Likewise.
	* gas/i386/x86-64-fma-scalar.d: Likewise.
	* gas/i386/x86-64-fma-scalar.s: Likewise.

	* gas/i386/i386.exp: Run fma-scalar, fma-scalar-intel,
	x86-64-fma-scalar and x86-64-fma-scalar-intel.

opcodes/

2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (EXVexWdqScalar): New.
	(vex_scalar_w_dq_mode): Likewise.
	(prefix_table): Update entries for PREFIX_VEX_3899,
	PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
	PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
	PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
	PREFIX_VEX_38BD and PREFIX_VEX_38BF.
	(intel_operand_size): Handle vex_scalar_w_dq_mode.
	(OP_EX): Likewise.
 2010-01-28 15:33:23 +00:00
Nick Clifton 70ecb3842d PR 11225 
* objdump.c (only): Replace with linked list.
        (only_size, only_used): Replace with only_list.
        (process_section_p): Set seen field on matches sections.
        (add_only): New function.
        (free_only_list): New function.
        (disassemble_section): Check only_list.
        (main): Use add_only and free_only_list.

        * gas/pe/aligncomm-c.d: Dump all sections.

        * ld-sh/refdbg-0-dso.d: Dump all sections.
 2010-01-28 15:25:20 +00:00
Dave Korn 31907d5e90 gas/ChangeLog: 
* NEWS: Mention new feature.
	* config/obj-coff.c (obj_coff_section): Accept digits and use
	to override default section alignment power if specified.
	* doc/as.texinfo (.section directive): Update documentation.

gas/testsuite/ChangeLog:

	* gas/pe/section-align-1.s: New test source file.
	* gas/pe/section-align-1.d: Likewise control script.
	* gas/pe/section-align-2.s: Likewise ...
	* gas/pe/section-align-2.d: ... and likewise.
	* gas/pe/pe.exp: Invoke new testcases.
 2010-01-27 22:01:38 +00:00
H.J. Lu 539f890d01 Allow VL=1 on AVX scalar instructions. 
gas/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (avxscalar): New.
	(OPTION_MAVXSCALAR): Likewise.
	(build_vex_prefix): Select vector_length for scalar instructions
	based on avxscalar.
	(md_longopts): Add OPTION_MAVXSCALAR.
	(md_parse_option): Handle OPTION_MAVXSCALAR.
	(md_show_usage): Add -mavxscalar=.

	* doc/c-i386.texi: Document -mavxscalar=.

gas/testsuite/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/avx-scalar-intel.d: New.
	* gas/i386/avx-scalar.d: Likewise.
	* gas/i386/avx-scalar.s: Likewise.
	* gas/i386/x86-64-avx-scalar-intel.d: Likewise.
	* gas/i386/x86-64-avx-scalar.d: Likewise.
	* gas/i386/x86-64-avx-scalar.s: Likewise.

	* gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel,
	x86-64-avx-scalar and x86-64-avx-scalar-intel.

opcodes/

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (XMScalar): New.
	(EXdScalar): Likewise.
	(EXqScalar): Likewise.
	(EXqScalarS): Likewise.
	(VexScalar): Likewise.
	(EXdVexScalarS): Likewise.
	(EXqVexScalarS): Likewise.
	(XMVexScalar): Likewise.
	(scalar_mode): Likewise.
	(d_scalar_mode): Likewise.
	(d_scalar_swap_mode): Likewise.
	(q_scalar_mode): Likewise.
	(q_scalar_swap_mode): Likewise.
	(vex_scalar_mode): Likewise.
	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	q_scalar_mode, q_scalar_swap_mode.
	(OP_XMM): Handle scalar_mode.
	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	and q_scalar_swap_mode.
	(OP_VEX): Handle vex_scalar_mode.
 2010-01-27 14:34:40 +00:00
H.J. Lu 80de6e001d Set the first 3byte VEX prefix individually. 
2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to
	0xc4 individually.
 2010-01-24 15:44:05 +00:00
H.J. Lu caca49762b Add more AVX tests. 
2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/avx.s: Add more tests.
	* gas/i386/x86-64-avx.s: Likewise.

	* gas/i386/avx-intel.d: Updated.
	* gas/i386/avx.d: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
 2010-01-23 18:04:05 +00:00
Richard Sandiford c865e45b1b bfd/ 
* coff-rs6000.c (xcoff_howto_table): Change size to 0 and bitsize to 1.
	(_bfd_xcoff_reloc_type_lookup): Handle BFD_RELOC_NONE.
	* coff64-rs6000.c (xcoff64_howto_table): Change size to 0 and
	bitsize to 1.
	(xcoff64_reloc_type_lookup): Handle BFD_RELOC_NONE.

gas/
	* write.h (fix_at_start): Declare.
	* write.c (fix_new_internal): Add at_beginning parameter.
	Use it instead of REVERSE_SORT_RELOCS.  Fix the handling of
	seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case.
	(fix_new, fix_new_exp): Update accordingly.
	(fix_at_start): New function.
	* config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section.
	(ppc_ref): New function, for OBJ_XCOFF.
	(md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF.
	* config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef.

gas/testsuite/
	* gas/ppc/xcoff-ref-1.s, gas/ppc/xcoff-ref-1.l: New test.
	* gas/ppc/aix.exp: Run it.


ld/testsuite/
	* ld-powerpc/aix-ref-1-32.od, ld-powerpc/aix-ref-1-64.od,
	ld-powerpc/aix-ref-1.s: New tests.
	* ld-powerpc/aix52.exp: Run them.
 2010-01-23 12:05:33 +00:00
Rainer Orth 53e5c8fee6 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-only 
on 64-bit Solaris/x86.
	Include obj-format.h earlier.
 2010-01-21 20:58:34 +00:00
H.J. Lu 706e820514 Correct month. 2010-01-21 17:32:32 +00:00
H.J. Lu 73bb672904 Add xsave64 and xrstor64. 
gas/testsuite/

2010-02-21  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/x86-64-xsave.s: Add tests for xsave64 and xrstor64.

	* gas/i386/x86-64-xsave-intel.d: Updated.
	* gas/i386/x86-64-xsave.d: Likewise.

opcodes/

2010-02-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.

	* i386-opc.tbl: Add xsave64 and xrstor64.
	* i386-tbl.h: Regenerated.
 2010-01-21 17:30:14 +00:00
Andreas Krebbel 55786da2bf 2010-01-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 
* readelf.c (get_machine_flags): Handle EF_S390_HIGH_GPRS.

2010-01-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* s390.h (EF_S390_HIGH_GPRS): Added macro definition.

2010-01-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/tc-s390.c (s390_elf_final_processing): New function.
	* config/tc-s390.h (elf_tc_final_processing): New macro definition.
	(s390_elf_final_processing): Added prototype.

2010-01-21  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* elf32-s390.c (elf32_s390_merge_private_bfd_data): New function.
	(bfd_elf32_bfd_merge_private_bfd_data): New macro definition.
 2010-01-21 11:40:28 +00:00
Nick Clifton 760f3a89bc Add changelog entries for PR 11109. Patch itself was accidentally committed earlier. 
Remove Spurious whitespace in ChangeLog-2009.
 2010-01-20 11:21:37 +00:00
Tristan Gingold 37a1f2771f 2010-01-18 Tristan Gingold <gingold@adacore.com> 
* config/tc-ia64.c (ia64_vms_note): Generate 24 bytes note headers.
 2010-01-19 09:14:54 +00:00
Sebastian Pop a6461c0251 2010-01-15 Sebastian Pop <sebastian.pop@amd.com> 
gas/
	* config/tc-i386.c (md_assemble): Before accessing the IMM field
	check that it's not an XOP insn.

gas/testsuite/
	* gas/i386/x86-64-xop.d: Add missing patterns.
	* gas/i386/x86-64-xop.s: Same.
	* gas/i386/xop.d: Same.
	* gas/i386/xop.s: Same.

opcodes/
	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	* i386-tbl.h: Regenerated.
 2010-01-15 21:24:13 +00:00
Jie Zhang 62fb9fe1fc * config/bfin-aux.h: Remove argument names in function 
declarations.
	* config/bfin-lex.l (parse_int): Fix shadowed variable name
	warning.
	* config/bfin-parse.y (value_match): Remove argument names
	in declaration.
	(notethat): Likewise.
	(yyerror): Likewise.
 2010-01-14 04:52:57 +00:00
Daniel Jacobowitz 43579b2591 gas/testsuite/ 
* gas/arm/thumb-nop.s: Add .syntax unified.
 2010-01-13 19:07:31 +00:00
Daniel Jacobowitz afa62d5e34 gas/ 
* config/tc-arm.c (do_t_nop): Correct check for Thumb-2 NOP.

	gas/testsuite/
	* gas/arm/thumb-nop.d, gas/arm/thumb-nop.s: New test.
	* gas/arm/relax_branch_align.d: Expect a default NOP instruction.
	* gas/arm/vfp1_t2.d, gas/arm/vfp1xD_t2.d: Specify a CPU with
	Thumb-2.

	ld/testsuite/
	* ld-arm/arm-elf.exp (armelftests): Assemble Cortex-A8 tests with
	-mcpu=cortex-a8.
 2010-01-13 19:01:10 +00:00
Nick Clifton 52b010e442 * config/tc-h8300.c (h8300_elf_section): New function - issue a 
warning message if a new section is created without setting any
        attributes for it.
        (md_pseudo_table): Intercept section creation pseudos.
        (md_pcrel_from): Replace abort with an error message.
        * config/obj-elf.c (obj_elf_section_name): Export this function.
        * config/obj-elf.h (obj_elf_section_name): Prototype.

        * gas/elf/section0.d: Skip this test for the h8300.
        * gas/elf/section1.d: Likewise.
        * gas/elf/section6.d: Likewise.
        * gas/elf/elf.exp: Skip section2 and section5 tests when the
        target is the h8300.

        * ld-scrips/sort.exp: Skip these tests when the target is the
        h8300.
 2010-01-13 14:08:54 +00:00
Alan Modra cc761f759c PR 11122 
* listing.c (print_source): Add one to line number.
 2010-01-12 01:10:55 +00:00
Ralf Wildenhues 3725885a65 Sync Libtool from GCC. 
/:
	* libtool.m4: Sync from git Libtool.
	* ltmain.sh: Likewise.
	* ltoptions.m4: Likewise.
	* ltversion.m4: Likewise.
	* lt~obsolete.m4: Likewise.

sim/iq2000/:
	* configure: Regenerate.

sim/d10v/:
	* configure: Regenerate.

sim/m32r/:
	* configure: Regenerate.

sim/frv/:
	* configure: Regenerate.

sim/:
	* avr/configure: Regenerate.
	* cris/configure: Regenerate.
	* microblaze/configure: Regenerate.

sim/h8300/:
	* configure: Regenerate.

sim/mn10300/:
	* configure: Regenerate.

sim/erc32/:
	* configure: Regenerate.

sim/arm/:
	* configure: Regenerate.

sim/m68hc11/:
	* configure: Regenerate.

sim/lm32/:
	* configure: Regenerate.

sim/sh64/:
	* configure: Regenerate.

sim/v850/:
	* configure: Regenerate.

sim/cr16/:
	* configure: Regenerate.

sim/moxie/:
	* configure: Regenerate.

sim/m32c/:
	* configure: Regenerate.

sim/mips/:
	* configure: Regenerate.

sim/mcore/:
	* configure: Regenerate.

sim/sh/:
	* configure: Regenerate.

gprof/:
	* Makefile.in: Regenerate.
	* configure: Regenerate.

opcodes/:
	* Makefile.in: Regenerate.
	* configure: Regenerate.

gas/:
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* doc/Makefile.in: Regenerate.

ld/:
	* configure: Regenerate.

gdb/testsuite/:
	* gdb.cell/configure: Regenerate.

binutils/:
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* doc/Makefile.in: Regenerate.

bfd/:
	* Makefile.in: Regenerate.
	* configure: Regenerate.

bfd/doc/:
	* Makefile.in: Regenerate.
 2010-01-09 21:11:44 +00:00
H.J. Lu 5256a5b03f Change to "Copyright 2010". 2010-01-08 19:40:08 +00:00
Sebastian Pop 69dd98654a 2010-01-06 Quentin Neill <quentin.neill@amd.com> 
gas/
       * config/tc-i386.c (cpu_arch): Add amdfam15.
         (i386_align_code): Add PROCESSOR_AMDFAM15 cases.
       * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15.
       * doc/c-i386.texi: Add amdfam15.

opcodes/
       * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
       * i386-init.h: Regenerated.

testsuite/
       * gas/i386/i386.exp: Add new amdfam15 test cases.
       * gas/i386/nops-1-amdfam15.d: New.
 2010-01-06 22:52:47 +00:00
Nick Clifton e3e535bc58 * arm-dis.c (print_insn): Fixed search for next 
symbol and data dumping condition, and the
    initial mapping symbol state.

    * gas/arm/dis-data.d: New test case.
    * gas/arm/dis-data.s: New file.
 2010-01-06 15:02:45 +00:00
Daniel Gutson 4316f0d240 2010-01-04 Daniel Gutson <dgutson@codesourcery.com> 
gas/
        * config/tc-arm.c (do_neon_logic): Accept imm value
        in the third operand too.
        (operand_parse_code): OP_RNDQ_IMVNb renamed to
        OP_RNDQ_Ibig.
        (parse_operands): OP_NILO case removed, applied renaming.
        (insns): Neon shape changed for some logic instructions.

        gas/testsuite/
        * gas/arm/neon-logic.d: New test case.
        * gas/arm/neon-logic.s: New file.
 2010-01-04 23:31:04 +00:00
Daniel Gutson b1a769ed35 2010-01-04 Daniel Gutson <dgutson@codesourcery.com> 
gas/
    * config/tc-arm.c (do_neon_ldx_stx): Added
    validation for vector load/store insns.

    gas/testsuite/
    * gas/arm/neon-addressing-bad.d: New test case.
    * gas/arm/neon-addressing-bad.s: New file.
    * gas/arm/neon-addressing-bad.l: New file.
 2010-01-04 22:19:03 +00:00
Alan Modra 0dc9305793 bfd/ 
* archures.c: Add bfd_mach_ppc_e500mc64.
	* bfd-in2.h: Regenerate.
	* cpu-powerpc.c (bfd_powerpc_archs): Add entry for
	bfd_mach_ppc_e500mc64.
gas/
	* config/tc-ppc.c (md_show_usage): Document -me500mc64.
opcodes/
	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 2010-01-04 02:32:56 +00:00
Daniel Gutson 88714cb802 2010-01-03 Daniel Gutson <dgutson@codesourcery.com> 
gas/
    * config/tc-arm.c (struct arm_it): New flag 'is_neon'.
    (NEON_ENC_*): Macros renamed to _NEON_ENC_*.
    (NEON_ENCODE): New macro.
    (check_neon_suffixes): New macro.
    (do_vfp_cond_or_thumb): Set the 'is_neon' flag.
    (do_vfp_nsyn_opcode): Likewise.
    (do_vfp_nsyn_nmul): Use the new 'NEON_ENCODE' macro.
    (do_vfp_nsyn_cmp): Likewise.
    (do_neon_shl_imm): Likewise.
    (do_neon_qshl_imm): Likewise.
    (neon_dyadic_misc): Likewise.
    (do_neon_mac_maybe_scalar): Likewise.
    (do_neon_qdmulh): Likewise.
    (do_neon_qmovn): Likewise.
    (do_neon_qmovun): Likewise.
    (do_neon_movn): Likewise.
    (neon_mac_reg_scalar_long): Likewise.
    (do_neon_vmull): Likewise.
    (do_neon_trn): Likewise.
    (do_neon_ldx_stx): Likewise.
    (neon_dp_fixup): Changed signature and set the flag.
    (neon_three_same): Call the above with new signature.
    (neon_two_same): Likewise.
    (neon_imm_shift): Likewise.
    (neon_mul_mac): Likewise.
    (do_neon_abs_neg): Likewise.
    (neon_mixed_length): Likewise.
    (do_neon_ext): Likewise.
    (do_neon_mov): Likewise.
    (do_neon_tbl_tbx): Likewise.
    (do_neon_logic): Likewise, and use the new 'NEON_ENCODE' macro.
    (neon_compare): Likewise.
    (do_neon_shll): Likewise.
    (do_neon_cvt): Likewise.
    (do_neon_mvn): Likewise.
    (do_neon_dup): Likewise.
    (md_assemble): Call check_neon_suffixes ().

    gas/testsuite/
    * gas/arm/neon-suffix-bad.d: New test case.
    * gas/arm/neon-suffix-bad.s: New file.
    * gas/arm/neon-suffix-bad.l: New file.
 2010-01-04 00:39:28 +00:00
H.J. Lu 43ecc30f09 Move 2009 binutils ChangeLog to ChangeLog-2009. 2010-01-01 18:06:10 +00:00
Daniel Gutson 99f1a7a78a 2009-12-28 Daniel Gutson <dgutson@codesourcery.com> 
* doc/c-arm.texi: Document NEON alignment specifiers.
 2009-12-28 18:27:42 +00:00
Ramana Radhakrishnan 4a42ebbc0e Fix Thumb2 bl range options. 
2009-12-21  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
            Richard Earnshaw  <richard.earnshaw@arm.com>

        * config/tc-arm.c (encode_thumb2_b_bl_offset): New. Refactored
        from md_apply_fix.
        (md_apply_fix): Fixup range checks for Thumb2 version
        of unconditional calls. Call encode_thumb2_b_bl_offset for
        unconditional branches / function calls.
 2009-12-21 12:56:41 +00:00
Doug Evans e3ea77accc * gas/xc16x/xc16x.exp (*): Add missing " in timeout cases. 2009-12-19 19:34:07 +00:00
H.J. Lu 2426c15ff8 Replace VexNDS, VexNDD and VexLWP with VexVVVV. 
gas/

2009-12-19  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_operands): Check vexvvvv instead
	of vexnds and vexndd.
	(build_modrm_byte): Check vexvvvv instead of vexnds, vexndd
	and vexlwp.

opcodes/

2009-12-19  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove VexNDS, VexNDD and
	VexLWP.  Add VexVVVV.

	* i386-opc.h (VexNDS): Removed.
	(VexNDD): Likewise.
	(VexLWP): Likewise.
	(VEXXDS): New.
	(VEXNDD): Likewise.
	(VEXLWP): Likewise.
	(VexVVVV): Likewise.
	(i386_opcode_modifier): Remove vexnds, vexndd and vexlwp.
	Add vexvvvv.

	* i386-opc.tbl: Replace VexNDS with VexVVVV=1, VexNDD with
	VexVVVV=2 and VexLWP with VexVVVV=3.
	* i386-tbl.h: Regenerated.
 2009-12-19 18:36:27 +00:00
Maciej W. Rozycki 42853c79aa * gas/mips/eret-2.s: Add an instruction to fill a branch delay 
slot.
	* gas/mips/eret-2.d: Adjust accordingly.
 2009-12-19 00:24:09 +00:00
Maciej W. Rozycki 7c0fc5246b gas/ 
* config/tc-mips.c (s_mips_ent): Also set BSF_FUNCTION for
	".aent".

	gas/testsuite/
	* gas/mips/aent.d: New test.
	* gas/mips/aent.s: Source for the new test.
	* gas/mips/mips.exp: Run it.
 2009-12-19 00:21:29 +00:00
Steve Ellcey fd4db1a12f 2009-12-18 Steve Ellcey <sje@cup.hp.com> 
* config/tc-hppa.c: Change access to access_ctr.
 2009-12-18 18:11:56 +00:00
Nick Clifton ff4a8d2b93 PR binutils/10924 
* config/tc-arm.c (do_ldstv4): Do not allow r15 as the destination
        register.
        (do_mrs): Likewise.
        (do_mul): Likewise.

        * arm-dis.c: Add support for %<>ru and %<>rU formats to enforce
        unique register numbers.  Extend support for %<>R format to
        thumb32 and coprocessor instructions.

        * gas/arm/unpredictable.s: Add more unpredictable instructions.
        * gas/arm/unpredictable.d: Add expected disassemblies.
 2009-12-17 09:52:18 +00:00
H.J. Lu 2eb952a4d9 Remove ByteOkIntel. 
gas/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_suffix): Set i.suffix to 0 in
	Intel syntax if size is ignored and b/l/w suffixes are
	illegal.
	(check_byte_reg): Remove byteokintel check.

opcodes/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove ByteOkIntel.

	* i386-opc.h (ByteOkIntel): Removed.
	(i386_opcode_modifier): Remove byteokintel.

	* i386-opc.tbl: Remove ByteOkIntel.
	* i386-tbl.h: Regenerated.
 2009-12-16 20:08:32 +00:00
H.J. Lu 7f399153c6 Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode. 
gas/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Replace vex0f, vex0f38,
	vex0f3a, xop08, xop09 and xop0a with vexopcode.

opcodes/

2009-12-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove Vex0F, Vex0F38,
	Vex0F3A, XOP08, XOP09 and XOP0A.  Add VexOpcode.

	* i386-opc.h (Vex0F): Removed.
	(Vex0F38): Likewise.
	(Vex0F3A): Likewise.
	(VexOpcode): New.
	(VEX0F): Likewise.
	(VEX0F38): Likewise.
	(VEX0F3A): Likewise.
	(XOP08): Defined as a macro.
	(XOP09): Likewise.
	(XOP0A): Likewise.
	(i386_opcode_modifier): Remove vex0f, vex0f38, vex0f3a, xop08,
	xop09 and xop0a.  Add vexopcode.

	* i386-opc.tbl: Replace Vex0F with VexOpcode=0, Vex0F38 with
	VexOpcode=1, Vex0F3A with VexOpcode=2, XOP08 with VexOpcode=3,
	XOP09 with VexOpcode=4 and XOP0A with VexOpcode=5.
	* i386-tbl.h: Regenerated.
 2009-12-16 15:43:16 +00:00
H.J. Lu 8c43a48b28 Replace VEX2SOURCES with XOP2SOURCES. 
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Check XOP2SOURCES
	instead VEX2SOURCES.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEX2SOURCES): Renamed to ...
	(XOP2SOURCES): This.
 2009-12-16 05:18:11 +00:00
H.J. Lu 8cd7925b45 Replace Vex2Sources and Vex3Sources with VexSources. 
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (process_operands): Check vexsources
	instead of vex3sources.
	(build_modrm_byte): Check vexsources instead of vex2sources
	and vex3sources.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove Vex3Sources and
	Vex2Sources.  Add VexSources.

	* i386-opc.h ()Vex2Sources: Removed.
	(Vex3Sources): Likewise.
	(VEX2SOURCES): New.
	(VEX3SOURCES): Likewise.
	(VexSources): Likewise.
	(i386_opcode_modifier): Remove vex2sources and vex3sources.
	Add vexsources.

	* i386-opc.tbl: Replace Vex2Sources with VexSources=1 and
	Vex3Sourceswith VexSources=2.
	* i386-tbl.h: Regenerated.
 2009-12-16 04:00:35 +00:00
H.J. Lu 1ef99a7be9 Remove VexW0 and VexW1. Add VexW. 
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1
	with vexw.
	(build_modrm_byte): Likewise.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1.  Add
	VexW.

	* i386-opc.h (VexW0): Removed.
	(VexW1): Likewise.
	(VEXW0): New.
	(VEXW1): Likewise.
	(VexW): Likewise.
	(i386_opcode_modifier): Remove vexw0 and vexw1.  Add vexw.

	* i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
	Vex=2.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
 2009-12-16 02:10:45 +00:00
H.J. Lu 0175442dfa 2009-12-15 H.J. Lu <hongjiu.lu@intel.com> 
* as.h (mempcpy): New.

	* configure.in: Check if mempcpy is declared.
	* configure: Regenerated.
	* config.in: Likewise.
 2009-12-16 00:28:56 +00:00
H.J. Lu e3c58833bf Define VEX128 and VEX256. 
gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Use VEX256.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEX128): New.
	(VEX256): Likewise.
 2009-12-15 16:36:59 +00:00
Nick Clifton ab8e2090b6 PR binutils/10924 
* arm-dis.c (arm_opcodes): Specify %R in cases where using r15
        results in unpredictable behaviour.
        (print_insn_arm): Handle %R.

        * gas/arm/unpredictable.s: New test case - checks the disassembly
        of instructions with unpredictable behaviour.
        * gas/arm/unpredictable.d: New file - expected disassembly.
 2009-12-14 16:38:23 +00:00
Nick Clifton 3aa4238e26 Fix PR number typo. 2009-12-14 11:01:25 +00:00
Nick Clifton 34ab888845 PR gas/11089 
* config/tc-rx.c (rx_equ): Rename 'expr' to 'expression' in order
        to avoid shadowing a global symbol of the same name.
 2009-12-14 10:59:37 +00:00
Nick Clifton c7d6f51805 * config/tc-microblaze.c (md_assemble): Rename 'imm' to 'immed' in 
order to avoid shadowing global variable of the same name.
 2009-12-14 09:50:18 +00:00
Sebastian Pop 02e647f941 2009-12-11 Quentin Neill <quentin.neill@amd.com> 
gas/testsuite/
	* gas/i386/fma4.d: Add test cases.
	* gas/i386/fma4.s: Add test cases.
	* gas/i386/x86-64-fma4.d: Add test cases.
	* gas/i386/x86-64-fma4.s: Add test cases.

	opcodes/
	* i386-dis.c (get_vex_imm8): Extend logic to apply in all
	cases, to avoid fetching ahead for the immediate bytes when
	OP_E_memory has already been called.  Fix indentation.
 2009-12-11 20:38:51 +00:00
Andrew Jenner 2e98972ef6 * config/tc-arm.c (arm_init_frag): Set thumb MODE_RECORDED flag for 
non-elf.
       (arm_handle_align): Re-enable assert for non-elf.
 2009-12-11 17:44:24 +00:00
Nick Clifton 91d6fa6a03 Add -Wshadow to the gcc command line options used when compiling the binutils. 
Fix up all warnings generated by the addition of this switch.
 2009-12-11 13:42:17 +00:00
H.J. Lu 8a2c8fef19 2009-12-09 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (arch_entry): Add len and skip.
	(cpu_arch): Use STRING_COMMA_LEN.
	(MESSAGE_TEMPLATE): New.
	(show_arch): Likewise.
	(md_show_usage): Use show_arch.
 2009-12-10 02:51:39 +00:00
H.J. Lu 087d837e04 Call symbol_same_p to check to if 2 symbols are the same. 
gas/

2009-12-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/11037
	* expr.c (resolve_expression): Call symbol_same_p to check
	if 2 symbols are the same.

	* symbols.c (symbol_same_p): New.
	* symbols.h (symbol_same_p): Likewise.

gas/testsuite/

2009-12-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/11037
	* gas/i386/intelpic.s: Add testcases.
	* gas/i386/intelpic.d: Updated.
 2009-12-08 03:14:29 +00:00
H.J. Lu eacc9c891d Support fxsave64 and fxrstor64. 
gas/testsuite/

2009-12-03  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run x86-64-fxsave and x86-64-fxsave-intel.

	* gas/i386/rex.d: Updated for fxsave64.

	* gas/i386/x86-64-fxsave-intel.d: New.
	* gas/i386/x86-64-fxsave.d: Likewise.
	* gas/i386/x86-64-fxsave.s: Likewise.

opcodes/

2009-12-03  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (FXSAVE_Fixup): New.
	(FXSAVE): Likewise.
	(mod_table): Use FXSAVE on fxsave and fxrstor.

	* i386-opc.tbl: Add fxsave64 and fxrstor64.
	* i386-tbl.h: Regenerated.
 2009-12-04 07:51:41 +00:00
Nick Clifton 03ee1b7f8e PR gas/11013 
* arm-dis.c (thumb32_opc): Adjust disassembly of QADD, QDADD, QSUB
        and QDSUB.

        * gas/arm/arch7em.d: Update expected disassembly.
        * gas/arm/thumb32.d: Likewise.

        * config/tc-arm.c (do_t_simd2): New function.
        (insns): Use do_t_simd2 for QADD, QDADD, QSUB and QDSUB.
 2009-12-02 20:26:30 +00:00
Joseph Myers 3388710e18 config: 
* largefile.m4 (ACX_LARGEFILE): Require AC_CANONICAL_HOST and
	AC_CANONICAL_TARGET.

bfd:
	* configure: Regenerate.

binutils:
	* configure: Regenerate.

gas:
	* configure: Regenerate.

gdb:
	* configure: Regenerate.

gprof:
	* configure: Regenerate.

ld:
	* configure: Regenerate.
 2009-11-30 16:46:47 +00:00
Nick Clifton 974da60de1 PR gas/11032 
* config/tc-arm.c (relax_adr): Cope with a frag with no symbol.
 2009-11-30 14:36:21 +00:00
Sebastian Pop ccc5981b93 2009-11-17 Quentin Neill <quentin.neill@amd.com> 
Sebastian Pop  <sebastian.pop@amd.com>

	gas/testsuite/
	* gas/i386/x86-64-fma4.d: Add new patterns.
	* gas/i386/x86-64-fma4.s: Same.
	* gas/i386/x86-64-xop.d: Adjusted.

	opcodes/
	* i386-dis.c (get_vex_imm8): Increase bytes_before_imm when
	decoding the second source operand from the immediate byte.
	(OP_EX_VexW): Pass an extra integer to identify the second
	and third source arguments.
 2009-11-25 15:15:30 +00:00
H.J. Lu 18d0c96eb9 Allow lock on cmpxch16b. 
gas/testsuite/

2009-11-19  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/lock-1.s: Add cmpxchg16b test.
	* gas/i386/lock-1-intel.d: Updated.
	* gas/i386/lock-1.d: Likewise.

opcodes/

2009-11-19  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.tbl: Add IsLockable to cmpxch16b.
	* i386-tbl.h: Regenerated.
 2009-11-19 15:26:42 +00:00
Nick Clifton 945ee43039 PR binutils/10924 
* gas/arm/arch4t-eabi.d: Restore previous expected dissambly of
        instructions using Immediate Offset addressing with an offset of
        zero.
        * gas/arm/arch4t.d: Likewise.
        * gas/arm/arm7t.d: Likewise.
        * gas/arm/xscale.d: Likewise.
        * gas/arm/wince-inst.d: Remove 'p' suffix from cmp, cmn, teq and
        tst instructions.

        PR binutils/10924
        * arm-dis.c (print_insn_arm): Do not print an offset of zero when
        decoding Immediaate Offset addressing.
 2009-11-19 14:07:11 +00:00
Jan Beulich f08e1e197a gas/ 
2009-11-19  Jan Beulich  <jbeulich@novell.com>

	* read.c (pseudo_set): Also call copy_symbol_attributes() for
	undefined target symbol.
 2009-11-19 08:41:27 +00:00
Sebastian Pop 41effecb2d 2009-11-18 Sebastian Pop <sebastian.pop@amd.com> 
opcodes/
	PR binutils/10973
	* i386-dis.c (get_vex_imm8): Do not increment codep.
	Avoid incrementing bytes_before_imm when OP_E_memory
	has already forwarded the codep pointer.
	(OP_EX_VexW): Increment codep to skip mod/rm byte.

	gas/testsuite/
	* gas/i386/x86-64-xop.d: Update patterns.
 2009-11-19 07:08:39 +00:00
Sebastian Pop f0ae4a24b0 2009-11-18 Sebastian Pop <sebastian.pop@amd.com> 
gas/
	* config/tc-i386.c (cpu_arch): Remove cvt16.
	(md_show_usage): Same.
	* doc/c-i386.texi: Same.

	gas/testsuite/
	* gas/i386/cvt16.d: Removed.
	* gas/i386/cvt16.s: Removed.
	* gas/i386/x86-64-cvt16.d: Removed.
	* gas/i386/x86-64-cvt16.s: Removed.
	* gas/i386/i386.exp: Remove cvt16 and x86-64-cvt16 tests.

	opcodes/
	* i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
	(VEX_LEN_XOP_08_A1): Removed.
	(xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
	VEX_LEN_XOP_08_A1.
	(vex_len_table): Same.
	* i386-gen.c (CPU_CVT16_FLAGS): Removed.
	(cpu_flags): Remove field for CpuCVT16.
	* i386-opc.h (CpuCVT16): Removed.
	(i386_cpu_flags): Remove bitfield cpucvt16.
	(i386-opc.tbl): Remove CVT16 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.
 2009-11-18 20:28:59 +00:00
H.J. Lu d72de478df Remove suffix on fxsave. 
2009-11-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/rex.d: Remove suffix on fxsave.
 2009-11-18 20:04:47 +00:00
Paul Brook ada65aa377 2009-11-18 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (arm_fpus): Add fpv4-sp-d16.
	(aeabi_set_public_attributes): Correctly mark VFPv3xD.

	include/opcode/
	* arm.h (FPU_VFP_V4_SP_D16, FPU_ARCH_VFP_V4_SP_D16): Define.
 2009-11-18 15:48:59 +00:00
Alan Modra 2d0f389600 bfd/ 
* bfd-in.h (_bfd_elf_ppc_at_tls_transform): Declare.
	* bfd-in2.h: Regenerate.
	* elf64-ppc.c (ppc64_elf_relocate_section): Move code for R_PPC64_TLS
	insn optimisation to..
	* elf32-ppc.c (_bfd_elf_ppc_at_tls_transform): ..here.  New function.
	(ppc_elf_relocate_section): Use it.
gas/
	* config/tc-ppc.c (md_assemble): Report error on invalid @tls operands
	and opcode.
 2009-11-18 12:42:52 +00:00
Sebastian Pop 5dd85c9970 2009-11-17 Sebastian Pop <sebastian.pop@amd.com> 
Quentin Neill  <quentin.neill@amd.com>

	gas/
	* config/tc-i386.c (cpu_arch): Added .xop and .cvt16.
	(build_vex_prefix): Handle xop08.
	(md_assemble): Don't special case the constant 3 for insns using MODRM.
	(build_modrm_byte): Handle vex2sources.
	(md_show_usage): Add xop and cvt16.
	* doc/c-i386.texi: Document fma4, xop, and cvt16.

	gas/testsuite/
	* gas/i386/i386.exp: Run xop and cvt16 in 32-bit mode.
	Run x86-64-xop and x86-64-cvt16 in 64-bit mode.
	* gas/i386/lwp.d: Update name of the testcase.
	* gas/i386/x86-64-xop.d: New.
	* gas/i386/x86-64-xop.s: New.
	* gas/i386/xop.d: New.
	* gas/i386/xop.s: New.
	* gas/i386/cvt16.d: New.
	* gas/i386/cvt16.s: New.

	opcodes/
	* i386-dis.c (OP_Vex_2src_1): New.
	(OP_Vex_2src_2): New.
	(Vex_2src_1): New.
	(Vex_2src_2): New.
	(XOP_08): Added.
	(VEX_LEN_XOP_08_A0): Added.
	(VEX_LEN_XOP_08_A1): Added.
	(VEX_LEN_XOP_09_80): Added.
	(VEX_LEN_XOP_09_81): Added.
	(xop_table): Added an entry for XOP_08.  Handle xop instructions.
	(vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
	VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
	(get_valid_dis386): Handle XOP_08.
	(OP_Vex_2src): New.
	* i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
	(cpu_flags): Add CpuXOP and CpuCVT16.
	(opcode_modifiers): Add XOP08, Vex2Sources.
	* i386-opc.h (CpuXOP): Added.
	(CpuCVT16): Added.
	(i386_cpu_flags): Add cpuxop and cpucvt16.
	(XOP08): Added.
	(Vex2Sources): Added.
	(i386_opcode_modifier): Add xop08, vex2sources.
	* i386-opc.tbl: Add entries for XOP and CVT16 instructions.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.
 2009-11-18 04:04:17 +00:00
Nick Clifton aefd8a406c * gas/arm/vfma1.d: Only run on ELF based targets. 
PR binutils/10924
        * gas/arm/arch4t-eabi.d: Update expected disassembly.
        * gas/arm/arch4t.d: Likewise.
        * gas/arm/archv6t2.d: Likewise.
        * gas/arm/arm7t.d: Likewise.
        * gas/arm/inst.d: Likewise.
        * gas/arm/xscale.d: Likewise.

        PR binutils/10924
        * arm-dis.c (arm_opcodes): Add patterns to match undefined LDRB
        instruction variants.  Add pattern for MRS variant that was being
        confused with CMP.
        (arm_decode_shift): Place error message in a comment.
        (print_insn_arm): Note that writing back to the PC is
        unpredictable.
        Only print 'p' variants of cmp/cmn/teq/tst instructions if
        decoding for pre-V6 architectures.
 2009-11-17 17:20:26 +00:00
Paul Brook 9e3c6df664 2009-11-17 Paul Brook <paul@codesourcery.com> 
Daniel Jacobowitz  <dan@codesourcery.com>

	gas/
	* doc/c-arm.texi: Document .arch armv7e-m.
	* config/tc-arm.c (arm_ext_v6_dsp, arm_ext_v7m): New.
	(insns): Put Thumb versions of v5TExP instructions into
	arm_ext_v5exp also.  Move some Thumb variants from
	arm_ext_v6_notm to arm_ext_v6_dsp.
	(arm_archs): Add armv7e-m architecture.
	(aeabi_set_public_attributes): Handle -march=armv7e-m.

	gas/testsuite/
	* gas/arm/attr-march-armv7em.d: New test.
	* gas/arm/arch7em-bad.d: New test.
	* gas/arm/arch7em-bad.l: New test.
	* gas/arm/arch7em.d: New test.
	* gas/arm/arch7em.s: New test.

	include/elf/
	* arm.h (TAG_CPU_ARCH_V7E_M): Define.

	include/opcode/
	* arm.h (ARM_EXT_V6_DSP): Define.
	(ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP.
	(ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define.

	binutils/
	* readelf.c (arm_attr_tag_CPU_arch): Add v7E-M.

	bfd/
	* elf32-arm.c (using_thumb_only, arch_has_arm_nop,
	arch_has_thumb2_nop): Handle TAG_CPU_ARCH_V7E_M.
	(tag_cpu_arch_combine): Ditto. Correct MAX_TAG_CPU_ARCH test.
 2009-11-17 16:31:56 +00:00
Nick Clifton 27b4051da3 * gas/rx/macros.inc (creg): Remove cpen. 
* gas/rx/mvfc.d: Remove expected uses of cpen register.
        * gas/rx/mvtc.d: Likewise.
        * gas/rx/popc.d: Likewise.
        * gas/rx/pushc.d: Likewise.
 2009-11-17 10:36:48 +00:00
Nick Clifton f7c21dc7b8 * config/tc-arm.c (parse_operands): Encode APSR_nzcv as r15. 
(do_vmrs): New function.
        (do_vmsr): New function.
        (insns): Add vmrs and vmsr.

        * gas/arm/vfp1xD.s: Add vmrs and vmsr instructions.
        * gas/arm/vfp1xD.d: Update expected disassembly.
 2009-11-16 11:47:36 +00:00
H.J. Lu c1ba026631 Check destination operand for lockable instructions. 
gas/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (md_assemble): Check destination operand
	for lockable instructions.

gas/testsuite/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/lock-1-intel.d: Updated.
	* gas/i386/lock-1.d: Likewise.
	* gas/i386/lock-1.s: Likewise.
	* gas/i386/lockbad-1.l: Likewise.
	* gas/i386/lockbad-1.s: Likewise.
	* gas/i386/x86-64-lock-1-intel.d: Likewise.
	* gas/i386/x86-64-lock-1.d: Likewise.
	* gas/i386/x86-64-lock-1.s: Likewise.
	* gas/i386/x86-64-lockbad-1.l: Likewise.
	* gas/i386/x86-64-lockbad-1.s: Likewise.
 2009-11-14 06:04:34 +00:00
H.J. Lu 4473e00469 2009-11-13 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (_i386_insn): Don't use bit field on
	swap_operand.
 2009-11-14 01:46:28 +00:00
H.J. Lu 2a70cca486 Check rex_ignored. 
gas/testsuite/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/rex.s: Add a test for VEX insn.
	* gas/i386/rex.d: Updated.

opcodes/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Check rex_ignored.
 2009-11-13 23:13:48 +00:00
H.J. Lu f16cd0d502 Rewrite prefix processing. 
gas/testsuite/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run long-1, long-1-intel, x86-64-long-1,
	and x86-64-long-1-intel.

	* gas/i386/long-1-intel.d: New.
	* gas/i386/long-1.d: Likewise.
	* gas/i386/long-1.s: Likewise.
	* gas/i386/x86-64-long-1-intel.d: Likewise.
	* gas/i386/x86-64-long-1.d: Likewise.
	* gas/i386/x86-64-long-1.s: Likewise.

	* gas/i386/jump16.d: Updated for prefix processing.
	* gas/i386/naked.d: Likewise.
	* gas/i386/nops-1-core2.d: Likewise.
	* gas/i386/nops-1-i686.d: Likewise.
	* gas/i386/nops-3-i686.d: Likewise.
	* gas/i386/nops-4-i686.d: Likewise.
	* gas/i386/nops-5-i686.d: Likewise.
	* gas/i386/nops-5.d: Likewise.
	* gas/i386/prefix.d: Likewise.
	* gas/i386/rep.d: Likewise.
	* gas/i386/string-ok.d: Likewise.
	* gas/i386/x86-64-addr32-intel.d: Likewise.
	* gas/i386/x86-64-addr32.d: Likewise.
	* gas/i386/x86-64-cbw-intel.d: Likewise.
	* gas/i386/x86-64-cbw.d: Likewise.
	* gas/i386/x86-64-io-intel.d: Likewise.
	* gas/i386/x86-64-io-suffix.d: Likewise.
	* gas/i386/x86-64-io.d: Likewise.
	* gas/i386/x86-64-lwp.d: Likewise.
	* gas/i386/x86-64-nops-1-core2.d: Likewise.
	* gas/i386/x86-64-nops-1-nocona.d: Likewise.
	* gas/i386/x86-64-nops-1.d: Likewise.
	* gas/i386/x86-64-nops-2.d: Likewise.
	* gas/i386/x86-64-nops-3.d: Likewise.
	* gas/i386/x86-64-nops-4-core2.d: Likewise.
	* gas/i386/x86-64-nops-4.d: Likewise.
	* gas/i386/x86-64-nops-5-k8.d: Likewise.
	* gas/i386/x86-64-nops-5.d: Likewise.
	* gas/i386/x86-64-rep.d: Likewise.
	* gas/i386/x86-64-stack-intel.d: Likewise.
	* gas/i386/x86-64-stack-suffix.d: Likewise.
	* gas/i386/x86-64-stack.d: Likewise.

ld/testsuite/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* ld-x86-64/tlsbin.dd: Updated for prefix processing.
	* ld-x86-64/tlsgdesc.dd: Likewise.
	* ld-x86-64/tlsld1.dd: Likewise.
	* ld-x86-64/tlspic.dd: Likewise.

opcodes/

2009-11-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (ckprefix): Updated to return 0 if number of
	prefixes > 14 and record the last position for each prefix.
	(lock_prefix): Removed.
	(data_prefix): Likewise.
	(addr_prefix): Likewise.
	(repz_prefix): Likewise.
	(repnz_prefix): Likewise.
	(last_lock_prefix): New.
	(last_repz_prefix): Likewise.
	(last_repnz_prefix): Likewise.
	(last_data_prefix): Likewise.
	(last_addr_prefix): Likewise.
	(last_rex_prefix): Likewise.
	(last_seg_prefix): Likewise.
	(MAX_CODE_LENGTH): Likewise.
	(ADDR16_PREFIX): Likewise.
	(ADDR32_PREFIX): Likewise.
	(DATA16_PREFIX): Likewise.
	(DATA32_PREFIX): Likewise.
	(REP_PREFIX): Likewise.
	(seg_prefix): Likewise.
	(all_prefixes): Change size to MAX_CODE_LENGTH - 1.
	(prefix_name): Handle ADDR16_PREFIX, ADDR32_PREFIX,
	DATA16_PREFIX, DATA32_PREFIX and REP_PREFIX.
	(get_valid_dis386): Updated.
	(OP_C): Likewise.
	(OP_Monitor): Likewise.
	(REP_Fixup): Likewise.
	(print_insn): Display all prefixes.
	(putop): Set PREFIX_DATA on used_prefixes only if it is used.
	(intel_operand_size): Likewise.
	(OP_E_register): Likewise.
	(OP_G): Likewise.
	(OP_REG): Likewise.
	(OP_IMREG): Likewise.
	(OP_I): Likewise.
	(OP_I64): Likewise.
	(OP_sI): Likewise.
	(CRC32_Fixup): Likewise.
	(MOVBE_Fixup): Likewise.
	(OP_E_memory): Set REFIX_DATA on used_prefixes when it is used
	in 16bit mode.
	(OP_J): Set REX_W used if it is used. Set PREFIX_DATA on
	used_prefixes only if it is used.
 2009-11-13 20:42:10 +00:00
H.J. Lu c32fa91d70 gas/ 
2009-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (LOCKREP_PREFIX): Removed.
	(REP_PREFIX): New.
	(LOCK_PREFIX): Likewise.
	(PREFIX_GROUP): Likewise.
	(REX_PREFIX): Updated.
	(MAX_PREFIXES): Likewise.
	(add_prefix): Updated.  Return enum PREFIX_GROUP.
	(md_assemble): Check for lock without a lockable instruction.
	(parse_insn): Updated.
	(output_insn): Likewise.

gas/testsuite/

2009-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run lock-1, lock-1-intel, lockbad-1,
	x86-64-lock-1, x86-64-lock-1-intel and x86-64-lockbad-1.

	* gas/i386/lock-1-intel.d: New.
	* gas/i386/lock-1.d: Likewise.
	* gas/i386/lock-1.s: Likewise.
	* gas/i386/lockbad-1.l: Likewise.
	* gas/i386/lockbad-1.s: Likewise.
	* gas/i386/x86-64-lock-1-intel.d: Likewise.
	* gas/i386/x86-64-lock-1.d: Likewise.
	* gas/i386/x86-64-lock-1.s: Likewise.
	* gas/i386/x86-64-lockbad-1.l: Likewise.
	* gas/i386/x86-64-lockbad-1.s: Likewise.

opcodes/

2009-11-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Add IsLockable.

	* i386-opc.h (IsLockable): New.
	(i386_opcode_modifier): Add islockable.

	* i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
	bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
	xor, xadd and xchg.
	* i386-tbl.h: Regenerated.
 2009-11-12 18:57:14 +00:00
Daniel Jacobowitz 79862e4574 gas/testsuite/ 
* gas/arm/copro.d, gas/arm/fp-save.d, gas/arm/float.d,
	gas/arm/fpa-mem.d: Update for removed generic coprocessor instructions
	and expanded PC-relative offsets.

	opcodes/
	* arm-dis.c (coprocessor_opcodes): Use %A instead of %C.  Remove
	generic coprocessor instructions for FPA loads and stores.
	(print_insn_coprocessor): Remove %C support.  Display address for
	PC-relative offsets in %A.
 2009-11-12 14:49:45 +00:00
Nick Clifton fa78c13aad Updated Russian bfd translation. 
Updated Indonesian gas translation.
 2009-11-12 09:35:23 +00:00
H.J. Lu 1b9f0c97ad 2009-11-11 H.J. Lu <hongjiu.lu@intel.com> 
* config/tc-i386.c (build_modrm_byte): Don't set register
	operand twice.
 2009-11-12 02:21:46 +00:00
H.J. Lu f310f33d50 gas/testsuite/ 
2009-11-11  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/prefix.d: Swap order of ADDR and REP prefixes.
	* gas/i386/rep.d: Likewise.
	* gas/i386/x86-64-rep.d: Likewise.

opcodes/

2009-11-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (all_prefixes): New.
	(ckprefix): Set all_prefixes.
	(print_insn): Print all_prefixes instead of lock_prefix,
	repz_prefix, repnz_prefix, addr_prefix and data_prefix.
 2009-11-12 02:13:06 +00:00
Jan Kratochvil da2f07f1aa bfd/ 
* configure.in: Call ACX_LARGEFILE.  Stop calling AC_PLUGINS,
	AC_SYS_LARGEFILE and checking the Solaris largefile exception.
	* aclocal.m4: Regenerate.
	* configure: Regenerate.

binutils/
	* configure.in: Call ACX_LARGEFILE.  Stop calling AC_PLUGINS,
	AC_SYS_LARGEFILE and checking the Solaris largefile exception.
	* aclocal.m4: Regenerate.
	* configure: Regenerate.

gas/
	* configure.in: Call ACX_LARGEFILE.  Stop calling AC_SYS_LARGEFILE.
	* aclocal.m4: Regenerate.
	* configure: Regenerate.

gdb/
	* configure.ac: Call ACX_LARGEFILE.
	* aclocal.m4: Call m4_include for ../config/largefile.m4 and
	../config/plugins.m4.
	* configure: Regenerate.
	* config.in: Regenerate.

gprof/
	* configure.in: Call ACX_LARGEFILE.  Stop calling AC_SYS_LARGEFILE.
	* aclocal.m4: Regenerate.
	* configure: Regenerate.

ld/
	* configure.in: Call ACX_LARGEFILE.  Stop calling AC_SYS_LARGEFILE.
	* aclocal.m4: Regenerate.
	* configure: Regenerate.
 2009-11-11 04:42:42 +00:00
Maxim Kuvyrkov 0d999f3337 * config/m68k-parse.h (enum m68k_register): Add ACR[4-7], RGPIOBAR. 
* config/tc-m68k.c (mcf5206_ctrl): Fix whitespace.
	(mcf52223_ctrl): Remove non-existent registers.
	(mcf54418): Define.
	(mcf54455): Remove MBAR.
	(m68k_cpus): Add lines for MCF5441x family.
	(m68k_ip, init_table): Handle RGPIOBAR, ACR[4-7].

	* m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
 2009-11-10 18:05:24 +00:00
Sebastian Pop c48244a521 2009-11-06 Sebastian Pop <sebastian.pop@amd.com> 
* opcodes/i386-dis.c (reg_table): Add XOP_8F_TABLE (XOP_09) to
	reg_table[REG_8F][1]: for XOP instructions, ModRM.reg first points to
	B.mm in the RXB.mmmmm byte, and so when B is set, we still should use
	the xop_table.
	(get_valid_dis386): Removed unused condition (from cut/n/paste) for
	XOP instructions.

	* gas/testsuite/gas/i386/x86-64-lwp.s: Updated to also contain
	patterns with r[8-15] registers.
	* gas/testsuite/gas/i386/x86-64-lwp.d: Same.
 2009-11-06 23:17:26 +00:00
H.J. Lu df6d8da17b 2009-11-06 H.J. Lu <hongjiu.lu@intel.com> 
* doc/c-i386.texi: Move .lwp.
 2009-11-06 22:59:44 +00:00
Alan Modra 23ddb8504a * config/obj-elf.c (obj_elf_change_section): Remove FIXME from 
comment.
 2009-11-06 11:51:04 +00:00
Sebastian Pop f88c9eb030 2009-11-05 Sebastian Pop <sebastian.pop@amd.com> 
Quentin Neill  <quentin.neill@amd.com>

	* gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS.
	(build_vex_prefix): Handle xop09 and xop0a.
	(build_modrm_byte): Handle vexlwp.
	(md_show_usage): Add lwp.
	* gas/doc/c-i386.texi (i386-LWP): New section.

	* gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp in 64-bit mode,
	run lwp in 32-bit mode.
	* gas/testsuite/gas/i386/x86-64-lwp.d: New.
	* gas/testsuite/gas/i386/x86-64-lwp.s: New.
	* gas/testsuite/gas/i386/lwp.d: New.
	* gas/testsuite/gas/i386/lwp.s: New.

	* opcodes/i386-dis.c (OP_LWPCB_E): New.
	(OP_LWP_E): New.
	(OP_LWP_I): New.
	(USE_XOP_8F_TABLE): New.
	(XOP_8F_TABLE): New.
	(REG_XOP_LWPCB): New.
	(REG_XOP_LWP): New.
	(XOP_09): New.
	(XOP_0A): New.
	(reg_table): Redirect REG_8F to XOP_8F_TABLE.
	Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
	(xop_table): New.
	(get_valid_dis386): Handle USE_XOP_8F_TABLE.
	Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
	to access to the vex_table.
	(OP_LWPCB_E): New.
	(OP_LWP_E): New.
	(OP_LWP_I): New.
	* opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
	(cpu_flags): Add CpuLWP.
	(opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
	* opcodes/i386-opc.h (CpuLWP): New.
	(i386_cpu_flags): Add bit cpulwp.
	(VexLWP): New.
	(XOP09): New.
	(XOP0A): New.
	(i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
	* opcodes/i386-opc.tbl (llwpcb): Added.
	(lwpval): Added.
	(lwpins): Added.
 2009-11-05 23:40:05 +00:00
Nick Clifton cdcf946711 * gas/i386/i386.exp (space1): Move test inside check for x86 
target.
 2009-11-05 11:02:16 +00:00
DJ Delorie 0d734b5d06 [opcodes] 
* rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
	(mvtcp, mvfcp, opecp): Remove.
	* rx-decode.c: Regenerate.
	* rx-dis.c (cpen): Remove.

[gas]
	* config/rx-parse.y (MVTIPL): Update bit pattern.
	(cpen): Remove.

[include/opcode]
	* rx.h (rx_decode_opcode) (mvtipl): Add.
	(mvtcp, mvfcp, opecp): Remove.
 2009-11-05 00:38:45 +00:00
H.J. Lu 6c78a1f83e 2009-11-04 H.J. Lu <hongjiu.lu@intel.com> 
PR gas/876
	* gas/i386/i386.exp: Run space1.

	* gas/i386/space1.l: New.
	* gas/i386/space1.s: Likewise.
 2009-11-04 18:52:03 +00:00
Paul Brook c7cbc7a8c2 Fix ChangeLog typo. 2009-11-04 10:22:03 +00:00
Maxim Kuvyrkov 2c678708e6 2009-11-04 Daniel Jacobowitz <dan@codesourcery.com> 
Maxim Kuvyrkov  <maxim@codesourcery.com>

	* config/tc-m68k.h (CF_DIFF_EXPR_OK): Define to 0 for uClinux.
	(CFI_DIFF_LSDA_OK): Define.
	* config/te-uclinux.h: New file.
	* configure.tgt (m68k-uclinux): Define em.
	* dw2gencfi.c (CFI_DIFF_LSDA_OK): New macro.
	(dot_cfi_lsda, output_fde): Use instead of CFI_DIFF_EXPR_OK.
 2009-11-04 09:52:00 +00:00
Paul Brook 1ee6951580 2009-11-03 Paul Brook <paul@codesourcery.com> 
gas/
	* config/tc-arm.c (do_vfp_nsyn_mla_mls): Fix vmls excoding.

	gas/testsuite/
	* gas/arm/vfp-neon-syntax.d: Update expected results.
	* gas/arm/vfp-neon-syntax_t2.d: Update expected results.
 2009-11-03 12:37:45 +00:00