Commit Graph

164 Commits

Author SHA1 Message Date
Jeff Law 3e75ff7efd * am33.igen: Add many more am33 instructions. 1998-07-06 21:41:06 +00:00
Jeff Law 0f7d73858c * am33.igen: New file with some am33 support.
Checking in work-to-date.
1998-07-01 23:13:14 +00:00
Jeff Law de2adf7070 * mn10300_sim.h (FETCH24): Define.
* mn10300_sim.h: Add defines for some registers found on the AM33.
1998-07-01 23:11:59 +00:00
Jeff Law a6cbaa652a * mn10300_sim.h: Include bfd.h
(struct state): Add more room for processor specific registers.
start-sanitize-am33
        (REG_E0): Define.
end-sanitize-am33
1998-06-30 17:28:54 +00:00
Joyce Janczyn 5eb78d70cc Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com>
* dv-mn103tim.c: Include sim-assert.h
	* dv-mn103ser.c (do_polling_event): Check for incoming data on
	serial line and schedule next polling event.
	(read_status_reg): schedule events to check for incoming data on
	serial line and issue interrupt if necessary.
1998-06-25 14:17:47 +00:00
Joyce Janczyn 0df90cd8e4 Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com>
* interp.c (board): Rename am32 to stdeval1 as this is the name
	consistently used to refer to the mn1030002 board.
1998-06-19 16:02:51 +00:00
Joyce Janczyn f0ce242fcd Thu June 18 14:37:14 1998 Joyce Janczyn <janczyn@cygnus.com>
* interp.c (sim_open): Fix typo in address of EXTMD register
	(0x34000280, not 0x3400280).
1998-06-18 18:43:11 +00:00
Joyce Janczyn f14defcc75 Tue June 16 09:36:21 1998 Joyce Janczyn <janczyn@cygnus.com>
* dv-mn103int.c (mn103int_finish): Regular interrupts (not NMI or
	reset) are not enabled on reset.
1998-06-16 13:43:34 +00:00
Joyce Janczyn 2a62f119fa Updates to dv-mn103iop.c, dv-mn103ser.c and inter.c 1998-06-14 21:19:53 +00:00
Joyce Janczyn 55a7ce4ea8 Fri June 12 16:24:00 1998 Joyce Janczyn <janczyn@cygnus.com>
* dv-mn103iop.c: New file for handling am32 io ports.
	* configure.in: Add mn103iop to hw_device list.
	* configure: Re-generate.
	* interp.c (sim_open): Create io port device.
1998-06-12 20:46:23 +00:00
Joyce Janczyn 8c2de2aa33 Wed June 10 14:34:00 1998 Joyce Janczyn <janczyn@cygnus.com>
* dv-mn103int.c (external_group): Use enumerated types to access
	correct group addresses.
	* dv-mn103tim.c (do_counter_event): Underflow of cascaded timer
	triggers an interrupt on the higher-numbered timer's port.
1998-06-10 18:47:09 +00:00
Joyce Janczyn d3f76d42ac Add timer and serial devices (mn103tim and mn103ser), support
--board=am32 for runtime control of device simulation, and adjust
interrupt settings to support am32 instead of am30.
1998-06-08 17:46:25 +00:00
Andrew Cagney 39e953a722 Split out hw-event code. Clean up interface. Update all users. 1998-05-25 07:37:30 +00:00
Andrew Cagney f872d0d643 Only enable H/W on some mips targets.
Move common hw-obj to Make-common
Pacify GCC
1998-05-22 05:23:04 +00:00
Andrew Cagney 56833aba59 Back out of hw-main _callback -> _descriptor changes 1998-05-22 01:12:06 +00:00
Andrew Cagney 26feb3a83d Fix sign extension on 32 bit add/sub instructions. 1998-05-21 09:32:07 +00:00
Geoffrey Noer 9d45df1b8c Tue Apr 28 18:28:58 1998 Geoffrey Noer <noer@cygnus.com>
* common/aclocal.m4: call AM_EXEEXT in SIM_AC_COMMON, define
        AM_CYGWIN32 and AM_EXEEXT.
        * common/Make-common.in: set EXEEXT, add missing EXEEXTs
        to run and install-common rules.
        * common/configure: regenerate

And update all subdirectory ChangeLogs and configure files.
1998-04-29 01:44:23 +00:00
Tom Tromey 5da9ce07eb * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* acconfig.h: New file.
	* configure.in: Reverted change of Apr 24; use sinclude again.
1998-04-26 22:03:55 +00:00
Tom Tromey b1df34b9ed * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* configure.in: Don't call sinclude.
1998-04-24 20:39:48 +00:00
Andrew Cagney 1e23866b9b o Use new `!<field>' and `=<field>' operators in spec of
MOV and CMP instructions.
o	Enable basic inlining.  Diable use of SIM_MAIN_INLINE.
1998-04-14 00:59:30 +00:00
Andrew Cagney 278bda4050 Cleanup INLINE support for simulators using common framework.
Make IGEN responsible for co-ordinating inlining of generated files.
By default, aclocal.m4 disabled all inlining.
1998-04-04 12:33:11 +00:00
Andrew Cagney 6d133cc9df Add sanitize-am30 markers. Keep details of AM30 implementation of
mn10300 out of the public eye.
Do something with top-level cgen directory.
1998-03-27 03:10:53 +00:00
Andrew Cagney 1b756ba6d5 * dv-mn103cpu.c (deliver_mn103cpu_interrupt): Stop loss of succeeding
interrupts, clear pending_handler when the handler isn't re-scheduled.
1998-03-26 14:00:18 +00:00
Stu Grossman abf6ba256a * Makefile.in (tmp-igen): Prefix all usage of move-if-change
script with $(SHELL) to make NT native builds happy.
	* configure:  Regenerate because of change to ../common/aclocal.m4.
1998-03-26 10:18:35 +00:00
Andrew Cagney 51ccd82f7f * configure.in: Make --enable-sim-common the default.
* configure: Re-generate.
* sim-main.h (CIA_GET, CIA_SET): Save/restore current instruction
address into Sate.regs[REG_PC] instead of common struct.
1998-03-26 01:13:38 +00:00
Joyce Janczyn d1607ed316 * mn10300.igen (cmp imm8,An): Do not sign extend imm8 value. 1998-03-25 22:43:19 +00:00
Joyce Janczyn 52ef605e6d * simops.c (OP_F0FD): Initialise variable 'sp' for rti instruction. 1998-03-25 17:10:01 +00:00
Andrew Cagney c357e16ac8 * dv-mn103int.c (decode_group): A group register every 4 bytes not 8.
(write_icr): Rewrite equation updating request field.
(read_iagr): Fix check that interrupt is still pending.
1998-03-25 14:52:44 +00:00
Andrew Cagney 8077fed51e * interp.c (sim_open): Tidy up device creation.
* dv-mn103int.c (mn103int_port_event): Drive NMI with non-zero value.
(mn103int_io_read_buffer): Convert absolute address to register block offsets.
(read_icr, write_icr): Convert block offset into group offset.
1998-03-25 05:37:42 +00:00
Andrew Cagney 6100784a60 * interp.c (sim_open): Create second 1mb memory region at 0x40000000.
(sim_open): Create a device tree.
(sim-hw.h): Include.
(do_interrupt): Delete, needs to use dv-mn103cpu.c
* dv-mn103int.c, dv-mn103cpu.c: New files.
1998-03-25 04:15:38 +00:00
Andrew Cagney 8388c9a564 * mn10300_sim.h (EXTRACT_PSW_LM, INSERT_PSW_LM, PSW_IE, PSW_LM): Define.
(SP): Define.
1998-03-25 04:07:31 +00:00
Andrew Cagney d89fa2d80a Re-do --enable-sim-hardware so that each simulator can specify the devices
it wants built.
Generate hw-config.h.
1998-03-25 01:41:33 +00:00
Andrew Cagney e855e57637 Pacify GCC. 1998-03-25 00:08:52 +00:00
Joyce Janczyn 55045e7b32 Port mn10300 simulator to build with the common simulator framework
under the configure option --enable-sim-common.
1998-03-24 20:30:03 +00:00
Jeff Law 097e6924c2 * simops.c (signed multiply instructions): Cast input operands to
signed32 before casting them to signed64 so that the sign bit
        is propagated properly.
1998-02-25 08:58:23 +00:00
Mark Alexander a9faef120e * Makefile.in: Last change was bad. Define NL_TARGET
so that targ-vals.h will be used instead of syscall.h.
	* simops.c: Use targ-vals.h instead of syscall.h.
	(OP_F020): Disable unsupported system calls.
1998-02-24 05:07:11 +00:00
Mark Alexander e04b0d76da * Makefile.in: Get header files from libgloss/mn10300/sys. 1998-02-23 17:51:23 +00:00
Jeff Law 7eab31b76f * simops.c: Include sim-types.h. 1998-02-22 22:59:43 +00:00
Andrew Cagney fbb8b6b9ab For sim_fetch_register / sim_store_register: Add LENGTH parameter,
return actual size of register, 0 if not applicable, -1 of legacy
implementation.
1998-02-17 04:06:38 +00:00
Andrew Cagney 412c4e940e Add config support for the size of the target address and OF cell. 1998-01-31 14:07:23 +00:00
Doug Evans 462cfbc4eb * aclocal.m4: Recognize --enable-maintainer-mode.
*/configure: Regenerated.
1998-01-20 06:37:00 +00:00
Andrew Cagney b5da31ac7c Correct name of file given in ChangeLog for change: Pass lma_p and
sim_write args to sim_load_file.
1997-10-25 05:04:25 +00:00
Andrew Cagney 9e03a68f13 Add LMA_P and DO_WRITE arguments to sim/common/sim-load.c:sim_load_file().
Update all simulators.
Clarify behavour of sim_load in remote-sim.h
1997-10-22 05:26:27 +00:00
Jeff Law f4ab2b2fdc * simops.c: Correctly handle register restores for "ret" and "retf"
instructions.
pr13306 related stuff.
1997-10-21 16:07:53 +00:00
Andrew Cagney 92f91d1ff0 Remove need to update <targ>/Makefile.in when adding optional options
to <targ>/configure.in.
Simplify logic used to select target [default] endianness.
1997-09-23 01:25:26 +00:00
Andrew Cagney 794e9ac96a Simplify logic behind the generic configuration option --enable-sim-alignment. 1997-09-22 02:49:57 +00:00
Andrew Cagney b45caf050c Add support for --enable-sim-alignment to simulator common aclocal.m4
Add support for --alignment={strict,nonstrict,forced} to simulator common
run-time options.
For v850 use, make the default NONSTRICT_ALIGNMENT.
1997-09-22 00:24:46 +00:00
David Edelsohn 6fea47635b * configure: Regenerated to track ../common/aclocal.m4 changes. 1997-09-05 00:42:05 +00:00
Andrew Cagney 8811705410 Fix doco on enable-sim-inline. 1997-08-27 22:43:18 +00:00
Andrew Cagney fafce69ab1 Add ABFD argument to sim_create_inferior. Document.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
1997-08-27 04:44:41 +00:00
Andrew Cagney 7230ff0faa Flush defunct sim_kill. 1997-08-26 02:05:18 +00:00
Andrew Cagney 247fccdeb5 Add ABFD argument to sim_open call. Pass through to sim_config so
that image properties such as endianness can be checked.

More strongly document the expected behavour of each of the sim_*
interfaces.

Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN.  Use in sim_config.
1997-08-25 23:14:25 +00:00
Jeff Law c370b3cd95 * simops.c: Fix thinko in last change. 1997-06-12 04:14:42 +00:00
Jeff Law dbdb5bd881 * simops.c: "call" stores the callee saved registers into the
stack!  Update the stack pointer properly when done with
        register saves.
1997-06-10 22:59:13 +00:00
Jeff Law 0a8fa63cb8 * simops.c: Fix return address computation for "call" instructions. 1997-06-10 18:32:40 +00:00
Jeff Law 09e142d5a2 * interp.c (sim_resume): Add missing case in big switch
statement (for extb instruction).
1997-05-22 05:28:34 +00:00
Jeff Law 003c91bec4 * interp.c: Replace all references to load_mem and store_mem
with references to load_byte, load_half, load_3_byte, load_word
        and store_byte, store_half, store_3_byte, store_word.
        (INLINE): Delete definition.
        (load_mem_big): Likewise.
        (max_mem): Make it global.
        (dispatch): Make this function inline.
        (load_mem, store_mem): Delete functions.
        * mn10300_sim.h (INLINE): Define.
        (RLW): Delete unused definition.
        (load_mem, store_mem): Delete declarations.
        (load_mem_big): New definition.
        (load_byte, load_half, load_3_byte, load_word): New functions.
        (store_byte, store_half, store_3_byte, store_word): New functions.
        * simops.c:  Replace all references to load_mem and store_mem
        with references to load_byte, load_half, load_3_byte, load_word
        and store_byte, store_half, store_3_byte, store_word.
1997-05-20 23:53:47 +00:00
Jeff Law 4df7aeb3c5 * interp.c (dispatch): Make this an inline function.
* simops.c (syscall): Use callback->write regardless of
        what file descriptor we're writing too.
1997-05-19 19:55:31 +00:00
Jeff Law b07a1e78c5 * interp.c (load_mem_big): Remove function. It's now a macro
defined elsewhere.
        (compare_simops): New function.
        (sim_open): Sort the Simops table before inserting entries
        into the hash table.
        * mn10300_sim.h: Remove unused #defines.
        (load_mem_big): Define.
Another 20% so performance improvement for the mn10300 simulator.
1997-05-18 22:57:49 +00:00
Jeff Law 234a9a49cf * interp.c (load_mem): If we get a load from an out of range
address, abort.
        (store_mem): Likewise for stores.
        (max_mem): New variable.
1997-05-16 22:37:02 +00:00
Jeff Law 8def922034 * mn10300_sim.h: Fix ordering of bits in the PSW. 1997-05-06 19:42:17 +00:00
Jeff Law baa83bcc80 * interp.c: Improve hashing routine to avoid long list
traversals for common instructions.  Add HASH_STAT support.
        Rewrite opcode dispatch code using a big switch instead of
        cascaded if/else statements.  Avoid useless calls to load_mem.
1997-05-06 19:27:22 +00:00
Jeff Law 26e9f63c11 * mn10300_sim.h (struct _state): Add space for mdrq register.
(REG_MDRQ): Define.
        * simops.c: Don't abort for trap.  Add support for the extended
        instructions, "getx", "putx", "mulq", "mulqu", "sat16", "sat24",
        and "bsch".
1997-05-06 00:35:42 +00:00
Andrew Cagney 8517f62b16 Ref gdb/11763 - can't stop a running simulator:
o	Provide poll_quit callback to simulators
		so that they can poll for SIGINT on
		clueless OS's.

	o	Add sim_stop to simulators so that clients
		can request a halt (eg gdbtk's STOP button)
		Works for PPC!

	o	Re-arange remote-sim.c so that the
		hard work is moved from gdbsim_resume()
		to gdbsim_wait() (where it should be).
1997-04-18 12:24:52 +00:00
David Edelsohn 6cc6987e1e * Makefile.in (SIM_OBJS): Add sim-load.o.
* interp.c (sim_kind, myname): New static locals.
	(sim_open): Set sim_kind, myname.  Ignore -E arg.
	(sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
	load file into simulator.  Set start address from bfd.
	(sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1997-04-17 10:27:47 +00:00
Andrew Cagney 87e43259f1 Cleanups to compile under FreeBSD 1997-04-17 06:05:19 +00:00
Andrew Cagney 08db4a658e Get configure to define RETSIGTYPE 1997-04-07 05:58:59 +00:00
Ian Lance Taylor ea553f5643 * Makefile.in: Change mn10300-opc.o to m10300-opc.o, to match
corresponding change in opcodes directory.
1997-04-05 01:03:01 +00:00
David Edelsohn 8a7c3105b5 * interp.c (sim_open): New arg `kind'. 1997-04-02 23:39:50 +00:00
David Edelsohn fbda74b1c1 * aclocal.m4: Check for stdlib.h, string.h, strings.h, unistd.h.
(sim-debug): Allow arguments.  Define WITH_DEBUG in addition to
	-DDEBUG.
	* configure: Regenerated to track ../common/aclocal.m4 changes.
1997-04-02 23:17:50 +00:00
Andrew Cagney a35e91c3c7 New file common/sim-config.c sets/checks simulator configuration options.
Update common/aclocal.m4 to better work with sim-config.[hc].
1997-04-02 05:04:25 +00:00
Andrew Cagney c695046ac9 Move SIM_AC_OPTION_ macros out of SIM_AC_COMMON macro - was trashing
optional arguments.
* Regenerate all configure scripts.
1997-03-18 14:28:34 +00:00
Andrew Cagney a77aa7ec4b * configure: Re-generate.
* Make-common.in (CSEARCH): Do not include the gdb directory in
        the search path.
        * Make-common.in (SIM_ENDIAN, SIM_HOSTENDIAN, SIM_INLINE,
        SIM_WARNING): Drop, requiring the simulator specific Makefile.in
        to explicitly incorporate these.

        * aclocal.m4 (--enable-sim-alignment); New option. Strongly
        specify the alignment restrictions of the target architecture -
        without this option all alignment restrictions are accomodated.
        (--enable-sim-assert): New option.  Conditionally compile in
        assertion statements.
        (--enable-sim-float): New option. Strongly specify the target's
        floating point support.
        (--enable-sim-hardware): New option.  Specify the hardware devices
        included in the simulation.
        (--enable-sim-packages): New option.  Specify the hardware
        packages included in the simulation.
        (--enable-sim-regparm): New option.  Specify that parameters be
        passed in registers instead of on the stack.
        (--enable-sim-reserved-bits): New option. Specify that reserved
        bits within an instruction are are correctly set.
        (--enable-sim-smp): New option. Specify the level of SMP support
        to be included in the simulator.
        (--enable-sim-stdcall): New option.  Specify an alternative
        function call convention.
        (--enable-sim-xor-endian): New option.  Configure xor-endian
        support used by some targets to implement bi-endian support.
1997-03-17 15:29:29 +00:00
Michael Meissner 601fb8aea6 Regenerate simulator configure scripts; Remove d10v traps 1-3, Make 15 the system call trap, keeping 0 temporarily 1997-03-14 16:21:57 +00:00
David Edelsohn 53b9417eb3 * interp.c (sim_open): New SIM_DESC result. Argument is now
in argv form.
	(other sim_*): New SIM_DESC argument.
1997-03-13 20:55:26 +00:00
Jeff Law 0ade484f98 * simops.c: Fix carry bit computation for "add" instructions.
More bugs exposed by new mn10300 compiler optimizations.
1997-03-12 22:20:13 +00:00
Jeff Law 09eef8af93 * simops.c: Fix typos in bset insns. Fix arguments to store_mem
for bset imm8,(d8,an) and bclr imm8,(d8,an).
Bugs exposed by new compiler optimizations.
1997-03-12 22:05:49 +00:00
Jeff Law 018f9eb41f * interp.c (init_system): Allocate 2^19 bytes of space for the
simulator.
To match the linker.
1997-01-24 17:48:35 +00:00
Stu Grossman 295dbbe44c * configure configure.in Makefile.in: Update to new configure
scheme which is more compatible with WinGDB builds.
	* configure.in:  Improve comment on how to run autoconf.
	* configure:  Re-run autoconf to get new ../common/aclocal.m4.
	* Makefile.in:  Use autoconf substitution to install common
	makefile fragment.
1997-01-23 22:09:52 +00:00
Jeff Law f95251f068 * simops.c: Undo last change to "rol" and "ror", original code
was correct!
1997-01-21 22:03:39 +00:00
Jeff Law b4b290a020 * simops.c: Fix "rol" and "ror".
Something I noticed while working on the mn10200.
1997-01-16 18:28:46 +00:00
Jeff Law 2da0bc1bf9 * simops.c: Use REG macros in few places not using them yet.
Something I noticed while working on the mn10200 simulator.
1997-01-13 20:28:37 +00:00
Jeff Law bbd1706224 * mn10300_sim.h (struct _state): Fix number of registers!
Just something I noticed while working on the mn10200 simulator.
1997-01-06 23:25:53 +00:00
Jeff Law b774c0e4b1 * mn10300_sim.h (struct _state): Put all registers into a single
array to make gdb implementation easier.
        (REG_*): Add definitions for all registers in the state array.
        (SEXT32, SEXT40, SEXT44, SEXT60): Remove unused macros.
        * simops.c: Related changes.
1996-12-31 23:26:11 +00:00
Jeff Law d657034d38 * interp.c (sim_resume): Handle 0xff as a single byte insn.
* simops.c: Fix overflow computation for "add" and "inc"
        instructions.
1996-12-18 17:15:21 +00:00
Jeff Law 093e9a32d3 * simops.c: Handle "break" instruction. 1996-12-16 22:31:37 +00:00
Jeff Law 16d2e2b670 * simops.c: Fix restoring the PC for "ret" and "retf" instructions. 1996-12-16 17:08:10 +00:00
Jeff Law 95d18eb74d * simops.c (REG0_4): Define.
Use REG0_4 for indexed loads/stores.
Fixes bugs exposed after minor codegen improvements in the compiler.
1996-12-10 22:10:07 +00:00
Jeff Law 2e8f4133d7 * simops.c (REG0_16): Fix typo. 1996-12-07 16:54:57 +00:00
Jeff Law b2f7a7e5b3 * simops.c: Call abort for any instruction that's not currently
simulated.
1996-12-06 21:49:27 +00:00
Jeff Law 9f4a551e11 * simops.c: Define accessor macros to extract register
values from instructions.  Use them consistently.
1996-12-06 21:47:21 +00:00
Jeff Law 7c52bf32f2 * interp.c: Delete unused global variable "OP".
(sim_resume): Remove unused variable "opcode".
        * simops.c: Fix some uninitialized variable problems, add
        parens to fix various -Wall warnings.
Fixing assorted -Wall problems.
1996-12-06 21:33:48 +00:00
Jeff Law d252301029 * gencode.c (write_header): Add "insn" and "extension" arguments
to the OP_* declarations.
        (write_template): Similarly for function templates.
        * interp.c (insn, extension): Remove global variables.  Instead
        pass them as arguments to the OP_* functions.
        * mn10300_sim.h: Remove decls for "insn" and "extension".
        * simops.c (OP_*): Accept "insn" and "extension" as arguments
        instead of using globals.
Starting to clean things up.
1996-12-06 21:19:37 +00:00
Jeff Law e5a7a53799 * simops.c: Fix typos in "mov am,(d16,an)" and "mov am,(d32,an)"
Fixes remaining hangs while running c-torture execution tests.
Only 12 c-torture execution failures left:

  * 920625-1.c fails all 6 execution tests.

  * 960521-1.c fails all 6 execution tests.
1996-12-06 07:57:21 +00:00
Jeff Law 4d8ced6cb1 * simops.c: Fix thinkos in last change to "inc dn". 1996-12-06 05:30:24 +00:00
Jeff Law 61ecca95c0 * simops.c: "add imm,sp" does not effect the condition codes.
"inc dn" does effect the condition codes.
Just something I noticed.
1996-12-04 18:02:00 +00:00
Jeff Law e4e1302293 * simops.c: Treat both operands as signed values for
"div" instruction.
Fixes another dozen c-torture execution failures.
1996-12-04 05:00:49 +00:00
Jeff Law fcfaf40d78 * simops.c: Fix "mov imm8,an" and "mov imm16,dn".
Fixes 80 or so c-torture execution failures.  400 to go.
1996-12-02 19:35:55 +00:00
Jeff Law b7b89deb44 * simops.c: Fix overflow computation for many instructions.
Fixes several hangs in the c-torture execution tests.  Also fixes about
40 failures.
1996-12-02 08:35:20 +00:00
Jeff Law af388638ae * simops.c: Fix "movdm, an", "movbu dm, (an)", and "movhu dm, (an)".
Along with some compiler, bfd, assembler changes this fixes 90 or so
c-torture execution failures.
1996-12-02 07:38:10 +00:00