9b254dd1ce
Updated copyright notices for most files.
2008-01-01 22:53:26 +00:00
4744ac1bb0
Switch the license of all files explicitly copyright the FSF
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to GPLv3.
2007-08-24 14:30:15 +00:00
6aba47ca06
Copyright updates for 2007.
2007-01-09 17:59:20 +00:00
6edf0760c5
Add support for m32r-linux target, including a RELA ABI and PIC.
2003-12-19 11:44:01 +00:00
b85e4829fa
2002-11-22 Andrew Cagney <ac131313@redhat.com>
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* dv-core.c: Update copyright. sim/common contributed to the FSF.
* dv-glue.c, dv-pal.c, hw-base.c, hw-base.h, hw-device.c: Ditto.
* hw-device.h, hw-handles.c, hw-handles.h: Ditto.
* hw-instances.c, hw-instances.h, hw-properties.c: Ditto.
* hw-properties.h, hw-tree.c, hw-tree.h, sim-alu.h: Ditto.
* sim-basics.h, sim-bits.c, sim-bits.h, sim-config.c: Ditto.
* sim-config.h, sim-core.c, sim-core.h, sim-endian.c: Ditto.
* sim-endian.h, sim-events.c, sim-events.h, sim-inline.c: Ditto.
* sim-inline.h, sim-io.c, sim-io.h, sim-n-bits.h: Ditto.
* sim-n-core.h, sim-n-endian.h, sim-types.h: Ditto.
2002-11-23 01:12:05 +00:00
35c209920b
* tweak
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2001-03-15 Frank Ch. Eigler <fche@redhat.com>
* sim-core.c (sim_core_map_attach): Correct overlap-related
error messages.
2001-03-16 03:20:26 +00:00
7a292a7adf
import gdb-19990422 snapshot
1999-04-26 18:34:20 +00:00
c906108c21
Initial creation of sourceware repository
1999-04-16 01:35:26 +00:00
071ea11e85
Initial creation of sourceware repository
1999-04-16 01:34:07 +00:00
169c74762a
* sim-core.h (SIM_CORE_SIGNAL_FN): New typedef.
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* sim-core.c (sim_core_signal): Make extern, always define.
1998-06-11 07:55:29 +00:00
e4726e6dfc
* sim-core.c (sim_core_attach): Use xmalloc instead of zalloc.
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Use 0xa5 as initial value.
(sim_core_map_detach): Use free instead of zfree.
Back out this change.
1998-03-04 02:05:06 +00:00
2307e0ee98
Good grief. Detailed function descriptions should accompany their definition.
1998-03-03 00:45:10 +00:00
84fc6bd9df
(sim_core_attach): Add a comment describing its function.
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Tweak switch() sanity check.
1998-03-03 00:30:24 +00:00
0471756934
* sim-core.c (sim_core_attach): Revise last patch.
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Use 0xa5 as initial value.
1998-03-02 23:03:32 +00:00
de13b4cbdb
* sim-core.c (sim_core_attach): Use xmalloc instead of zalloc.
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(sim_core_map_detach): Use free instead of zfree.
1998-03-02 18:20:39 +00:00
751197f231
(profile_print_core): Simplify by calling sim_core_map_to_str.
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* sim-core.h (sim_core_map_to_str): Declare.
* sim-core.c (sim_core_map_to_str): Make non-static.
1998-02-25 07:36:23 +00:00
d147d3844f
Backout of revision 1.35. Abort may be valid operation.
1998-02-20 03:20:49 +00:00
a4b44a2b08
* sim-core.c (sim_core_signal): Use sim_stopped instead of
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sim_signalled.
1997-11-19 08:03:53 +00:00
1ebc7e0e24
* sim-signal.c, sim-signal.h: New files.
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* Make-common.in (sim-signal.o): Add rule for.
(SIM_NEW_COMMON_OBJS): Add sim-signal.o.
* sim-abort.c: Don't include <signal.h>.
* sim-basics.h: #include "sim-signal.h".
* sim-break.c: Don't include <signal.h>.
(sim_handle_breakpoint): Replace SIGTRAP with SIM_SIGTRAP.
* sim-core.c: Don't include <signal.h>.
(SIGBUS): Delete definition.
(sim_core_signal): Replace SIGSEGV,SIGBUS with SIM_SIGSEGV,SIM_SIGBUS.
* sim-engine.c: Don't include <signal.h>.
(sim_engine_abort): Replace SIGABRT with SIM_SIGABRT.
* sim-reason.c (sim_stop_reason): Call sim_signal_to_host.
* sim-resume.c: Don't include <signal.h>.
(SIGTRAP): Delete definition.
(has_stepped): Replace SIGTRAP with SIM_SIGTRAP.
* sim-stop.c: Don't include <signal.h>.
(control_c_simulation): Replace SIGINT with SIM_SIGINT.
* sim-watch.c: Don't include <signal.h>.
(handle_watchpoint): Replace SIGINT with SIM_SIGINT.
1997-11-19 08:00:37 +00:00
340d8e209e
* sim-core.c (sim_core_signal): Use CIA_ADDR to fetch value.
1997-11-18 23:59:29 +00:00
cf02c13ce2
(sim_core_signal): Add missing "\n" in message.
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Forgot to check in yesterday.
1997-11-14 21:52:04 +00:00
63be8febf7
Rewrite the MIPS simulator's memory model so that it uses the generic
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common/sim-core.
Add support for 3, 5, 6, 7 byte transfers to sim core.
1997-11-05 08:17:26 +00:00
fcc86d82f7
Make memory regions layered (just like existing device regions) so
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that overlapping regions can be defined.
Allow the layer (level) of a memory region to be specified as part of
an address parameter to memory options.
Update simulators.
1997-10-31 08:49:10 +00:00
a86809d323
Implement sim_core_{read,write}_word using sim_core_{read,write}_<N>.
1997-10-28 02:13:09 +00:00
f45dd42b32
Add 128 bit transfers to sim core.
1997-10-27 03:00:12 +00:00
fd89abc204
Handle core regions which start at a poorly aligned address.
1997-10-14 23:45:52 +00:00
31dda65aff
* sim-core.h (sim_cpu_core): [WITH_XOR_ENDIAN + 1], to avoid
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illegal zero-sized array.
* sim-core.c (sim_core_xor_read_buffer): same.
1997-09-10 04:46:37 +00:00
1bba340afe
Redo watchpoint code so that it target can specify interrupt names.
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Replace v850 interrupt code with this common watchpoint code.
Other minor fixes to core.
1997-09-05 08:16:23 +00:00
30efae3acd
Define SIGNED64 and UNSIGNED64 macros - handle MSC/GCC LL issue.
1997-09-05 00:30:38 +00:00
a34abff813
o Add modulo argument to sim_core_attach
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o Add sim-memopt module - memory option processing.
1997-09-04 03:47:39 +00:00
80c651f02d
Stanify error reporting memory overlaps.
1997-09-03 04:06:27 +00:00
f90b720ba1
Passify GCC. Convert 0x0LL to something more portable in the FP code.
1997-08-30 00:02:19 +00:00
cd0d873d0f
Preliminary suport for xor-endian suport in core module.
1997-05-23 09:19:43 +00:00
50a2a69182
Watchpoint interface.
1997-05-21 06:54:13 +00:00
c445af5a2b
c80 simulator fixes.
1997-05-12 04:57:49 +00:00
7a418800c1
Start of implementation of a distributed (between processors)
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simulator core object.
1997-05-05 13:21:04 +00:00
1fe052808a
Update devo version of m32r sim to build with recent sim/common changes.
1997-05-02 08:41:15 +00:00
c967f1874a
* Makefile.in (sim-options_h): Define.
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(sim-{module,options,trace,profile,utils}.o): Clean up dependencies.
(sim-model.o): Add new rule.
(cgen-{scache,trace,utils}.o): Add new rules.
* aclocal.m4 (SIM_AC_OPTION_{SCACHE,DEFAULT_MODEL}): Add.
* cgen-scache.c (scache_print_profile): Change `sd' arg to `cpu'.
Indent output by 2 spaces.
* cgen-scache.h (scache_print_profile): Update.
* cgen-trace.c (trace_insn_fini): Indent output by 2 spaces.
Use trace_printf, not fprintf.
(trace_extract): Use trace_printf, not cgen_trace_printf.
* genmloop.sh (!FAST case): Increment `insn_count'.
* sim-base.h (sim_state_base): Only include scache_size if WITH_SCACHE.
(sim_cpu_base): Rename member `sd' to `state' to be consistent with
access macro's name.
* sim-core.c (sim_core_init): Use EXTERN_SIM_CORE to define it.
Change return type to SIM_RC.
(sim_core_{install,uninstall}): New functions.
* sim-core.h (sim_core_{install,uninstall}): Declare.
(sim_core_init): Use EXTERN_SIM_CORE to define it.
Change return type to SIM_RC.
* sim-model.h (models,machs,model_install): Declare.
* sim-module.c (modules): Add scache_install, model_install.
(sim_post_argv_init): Set cpu->state backlinks.
* sim-options.c (standard_options): Delete --simcache-size,--max-insns.
(standard_option_handler): Likewise.
* sim-profile.c (PROFILE_{HISTOGRAM,LABEL}_WIDTH): Move to
sim-profile.h.
(*): Assume ANSI C.
(profile_options): Delete --profile-simcache.
(profile_option_handler): Likewise.
(profile_print_insn): Change `sd' arg to `cpu'. Indent output 2
spaces.
(profile_print_{memory,model}): Likewise.
(profile_print_simcache): Delete.
(profile_print_speed): New function.
(profile_print): Rewrite.
* sim-profile.h (PROFILE_scache): Renamed from PROFILE_simcache.
(WITH_PROFILE_SCACHE_P): Renamed from WITH_PROFILE_SIMCACHE_P.
(PROFILE_DATA): Delete members simcache_{hits,misses}.
(PROFILE_COUNT_SIMCACHE_{HIT,MISS}): Delete.
(PROFILE_{CALLBACK,CPU_CALLBACK}): New types.
(profile_print): Update prototype.
1997-05-01 18:05:37 +00:00
f2de7dfd8c
Add a number of per-simulator options: hostendian, endian, inline, warnings.
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Rename *-n.h files to be dos compatible
1997-03-14 15:13:58 +00:00
Daniel Jacobowitz