Commit Graph

3845 Commits

Author SHA1 Message Date
Maciej W. Rozycki
e2e31f1039 Update my e-mail address, limit maintenance to MIPS I-IV ISAs
binutils/
	* MAINTAINERS: Update my e-mail address, downgrade to MIPS I-IV
	ISA maintenance.

	gdb/
	* MAINTAINERS: Update my e-mail address, downgrade to MIPS I-IV
	ISA maintenance.

	sim/
	* MAINTAINERS: Update my e-mail address, downgrade to MIPS I-IV
	ISA maintenance.
2018-07-21 00:14:01 +01:00
DJ Delorie
79f5b65e3e Remove myself from target-specific MAINTAINERS
[binutils]
	* MAINTAINERS (RL78, RX): Remove myself as maintainer.
[sim]
	* MAINTAINERS (rl78, m32c, rx, v850): Remove myself as maintainer.
2018-07-19 22:08:51 -04:00
Stafford Horne
3137562654 sim: Add Stafford Horne as or1k maintainer.
Since I helped upstream the or1k port I would like to claim myself as
maintainer.

sim/ChangeLog:

yyyy-mm-dd  Stafford Horne  <shorne@gmail.com>

	* MAINTAINERS (or1k): Add myself as or1k maintainer.

Signed-off-by: Stafford Horne <shorne@gmail.com>
2018-07-14 05:59:26 +09:00
Simon Marchi
d0ac1c4488 Bump to autoconf 2.69 and automake 1.15.1
When trying to run the update-gnulib.sh script in gdb, I get this:

Error: Wrong automake version (Unescaped left brace in regex is deprecated, passed through in regex; marked by <-- HERE in m/\${ <-- HERE ([^      =:+{}]+)}/ at /opt/automake/1.11.1/bin/automake line 4113.), we need 1.11.1.
Aborting.

Apparently, it's an issue with a regex in automake that triggers a
warning starting with Perl 5.22.  It has been fixed in automake 1.15.1.
So I think it's a good excuse to bump the versions of autoconf and
automake used in the gnulib import.  And to avoid requiring multiple
builds of autoconf/automake, it was suggested that we bump the required
version of those tools for all binutils-gdb.

For autoconf, the 2.69 version is universally available, so it's an easy
choice.  For automake, different distros and distro versions have
different automake versions.  But 1.15.1 seems to be the most readily
available as a package.  In any case, it's easy to build it from source.

I removed the version checks from AUTOMAKE_OPTIONS and AC_PREREQ,
because I don't think they are useful in our case.  They only specify a
lower bound for the acceptable version of automake/autoconf.  That's
useful if you let the user choose the version of the tool they want to
use, but want to set a minimum version (because you use a feature that
was introduced in that version).  In our case, we force people to use a
specific version anyway.  For the autoconf version, we have the check in
config/override.m4 that enforces the version we want.  It will be one
less thing to update next time we change autotools version.

I hit a few categories of problems that required some changes.  They are
described below along with the chosen solutions.

Problem 1:

  configure.ac:17: warning: AM_INIT_AUTOMAKE: two- and three-arguments forms are deprecated.  For more info, see:
  configure.ac:17: http://www.gnu.org/software/automake/manual/automake.html#Modernize-AM_005fINIT_005fAUTOMAKE-invocation

Solution 1:

  Adjust the code based on the example at that URL.

Problem 2 (in zlib/):

  Makefile.am: error: required file './INSTALL' not found
  Makefile.am:   'automake --add-missing' can install 'INSTALL'
  Makefile.am: error: required file './NEWS' not found
  Makefile.am: error: required file './AUTHORS' not found
  Makefile.am: error: required file './COPYING' not found
  Makefile.am:   'automake --add-missing' can install 'COPYING'

Solution 2:

  Add the foreign option to AUTOMAKE_OPTIONS.

Problem 3:

  doc/Makefile.am:20: error: support for Cygnus-style trees has been removed

Solution 3:

  Remove the cygnus options.

Problem 4:

  Makefile.am:656: warning: 'INCLUDES' is the old name for 'AM_CPPFLAGS' (or '*_CPPFLAGS')

Solution 4:

  Rename "INCLUDES = " to "AM_CPPFLAGS += " (because AM_CPPFLAGS is
  already defined earlier).

Problem 5:

  doc/Makefile.am:71: warning: suffix '.texinfo' for Texinfo files is discouraged; use '.texi' instead
  doc/Makefile.am: warning: Oops!
  doc/Makefile.am:     It appears this file (or files included by it) are triggering
  doc/Makefile.am:     an undocumented, soon-to-be-removed automake hack.
  doc/Makefile.am:     Future automake versions will no longer place in the builddir
  doc/Makefile.am:     (rather than in the srcdir) the generated '.info' files that
  doc/Makefile.am:     appear to be cleaned, by e.g. being listed in CLEANFILES or
  doc/Makefile.am:     DISTCLEANFILES.
  doc/Makefile.am:     If you want your '.info' files to be placed in the builddir
  doc/Makefile.am:     rather than in the srcdir, you have to use the shiny new
  doc/Makefile.am:     'info-in-builddir' automake option.

Solution 5:

  Rename .texinfo files to .texi.

Problem 6:

  doc/Makefile.am: warning: Oops!
  doc/Makefile.am:     It appears this file (or files included by it) are triggering
  doc/Makefile.am:     an undocumented, soon-to-be-removed automake hack.
  doc/Makefile.am:     Future automake versions will no longer place in the builddir
  doc/Makefile.am:     (rather than in the srcdir) the generated '.info' files that
  doc/Makefile.am:     appear to be cleaned, by e.g. being listed in CLEANFILES or
  doc/Makefile.am:     DISTCLEANFILES.
  doc/Makefile.am:     If you want your '.info' files to be placed in the builddir
  doc/Makefile.am:     rather than in the srcdir, you have to use the shiny new
  doc/Makefile.am:     'info-in-builddir' automake option.

Solution 6:

  Remove the hack at the bottom of doc/Makefile.am and use
  the info-in-builddir automake option.

Problem 7:

  doc/Makefile.am:35: error: required file '../texinfo.tex' not found
  doc/Makefile.am:35:   'automake --add-missing' can install 'texinfo.tex'

Solution 7:

  Use the no-texinfo.tex automake option.  We also have one in
  texinfo/texinfo.tex, not sure if we should point to that, or move it
  (or a newer version of it added with automake --add-missing) to
  top-level.

Problem 8:

  Makefile.am:131: warning: source file 'config/tc-aarch64.c' is in a subdirectory,
  Makefile.am:131: but option 'subdir-objects' is disabled
  automake: warning: possible forward-incompatibility.
  automake: At least a source file is in a subdirectory, but the 'subdir-objects'
  automake: automake option hasn't been enabled.  For now, the corresponding output
  automake: object file(s) will be placed in the top-level directory.  However,
  automake: this behaviour will change in future Automake versions: they will
  automake: unconditionally cause object files to be placed in the same subdirectory
  automake: of the corresponding sources.
  automake: You are advised to start using 'subdir-objects' option throughout your
  automake: project, to avoid future incompatibilities.

Solution 8:

  Use subdir-objects, that means adjusting references to some .o that will now
  be in config/.

Problem 9:

  configure.ac:375: warning: AC_LANG_CONFTEST: no AC_LANG_SOURCE call detected in body
  ../../lib/autoconf/lang.m4:193: AC_LANG_CONFTEST is expanded from...
  ../../lib/autoconf/general.m4:2601: _AC_COMPILE_IFELSE is expanded from...
  ../../lib/autoconf/general.m4:2617: AC_COMPILE_IFELSE is expanded from...
  ../../lib/m4sugar/m4sh.m4:639: AS_IF is expanded from...
  ../../lib/autoconf/general.m4:2042: AC_CACHE_VAL is expanded from...
  ../../lib/autoconf/general.m4:2063: AC_CACHE_CHECK is expanded from...
  configure.ac:375: the top level

Solution 9:

  Use AC_LANG_SOURCE, or use proper quoting.

Problem 10 (in intl/):

  configure.ac:7: warning: AC_COMPILE_IFELSE was called before AC_USE_SYSTEM_EXTENSIONS
  /usr/share/aclocal/threadlib.m4:36: gl_THREADLIB_EARLY_BODY is expanded from...
  /usr/share/aclocal/threadlib.m4:29: gl_THREADLIB_EARLY is expanded from...
  /usr/share/aclocal/threadlib.m4:318: gl_THREADLIB is expanded from...
  /usr/share/aclocal/lock.m4:9: gl_LOCK is expanded from...
  /usr/share/aclocal/intl.m4:211: gt_INTL_SUBDIR_CORE is expanded from...
  /usr/share/aclocal/intl.m4:25: AM_INTL_SUBDIR is expanded from...
  /usr/share/aclocal/gettext.m4:57: AM_GNU_GETTEXT is expanded from...
  configure.ac:7: the top level

Solution 10:

  Add AC_USE_SYSTEM_EXTENSIONS in configure.ac.

ChangeLog:

	* libtool.m4: Use AC_LANG_SOURCE.
	* configure.ac: Remove AC_PREREQ, use AC_LANG_SOURCE.
	* README-maintainer-mode: Update version requirements.
	* ar-lib: New file.
	* test-driver: New file.
	* configure: Re-generate.

bfd/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11.
	(INCLUDES): Rename to ...
	(AM_CPPFLAGS): ... this.
	* configure.ac: Remove AC_PREREQ.
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Remove 1.9, cygnus, add
	info-in-builddir no-texinfo.tex.
	(info_TEXINFOS): Rename bfd.texinfo to bfd.texi.
	* doc/bfd.texinfo: Rename to ...
	* doc/bfd.texi: ... this.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

binutils/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* doc/Makefile.am (AUTOMAKE_OPTIONS): Remove cygnus, add
	info-in-builddir no-texinfo.tex.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

config/ChangeLog:

	* override.m4 (_GCC_AUTOCONF_VERSION): Bump from 2.64 to 2.69.

etc/ChangeLog:

	* configure.in: Remove AC_PREREQ.
	* configure: Re-generate.

gas/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11, add subdir-objects.
	(TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O): Add config/ prefix.
	* configure.ac (TARG_CPU_O, OBJ_FORMAT_O, ATOF_TARG_O, emfiles,
	extra_objects): Add config/ prefix.
	* doc/as.texinfo: Rename to...
	* doc/as.texi: ... this.
	* doc/Makefile.am: Rename as.texinfo to as.texi throughout.
	Remove DISTCLEANFILES hack.
	(AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add no-texinfo.tex and
	info-in-builddir.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.
	* doc/Makefile.in: Re-generate.

gdb/ChangeLog:

	* common/common-defs.h (PACKAGE_NAME, PACKAGE_VERSION,
	PACKAGE_STRING, PACKAGE_TARNAME): Undefine.
	* configure.ac: Remove AC_PREREQ, add missing quoting.
	* gnulib/configure.ac: Modernize usage of
	AC_INIT/AM_INIT_AUTOMAKE.  Remove AC_PREREQ.
	* gnulib/update-gnulib.sh (AUTOCONF_VERSION): Bump to 2.69.
	(AUTOMAKE_VERSION): Bump to 1.15.1.
	* configure: Re-generate.
	* config.in: Re-generate.
	* aclocal.m4: Re-generate.
	* gnulib/aclocal.m4: Re-generate.
	* gnulib/config.in: Re-generate.
	* gnulib/configure: Re-generate.
	* gnulib/import/Makefile.in: Re-generate.

gdb/gdbserver/ChangeLog:

	* configure.ac: Remove AC_PREREQ, add missing quoting.
	* configure: Re-generate.
	* config.in: Re-generate.
	* aclocal.m4: Re-generate.

gdb/testsuite/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.

gold/ChangeLog:

	* configure.ac: Remove AC_PREREQ, add missing quoting and usage
	of AC_LANG_SOURCE.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
	* testsuite/Makefile.in: Re-generate.

gprof/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* Makefile.am: Remove DISTCLEANFILES hack.
	(AUTOMAKE_OPTIONS): Remove 1.11, add info-in-builddir.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
	* gconfig.in: Re-generate.

intl/ChangeLog:

	* configure.ac: Add AC_USE_SYSTEM_EXTENSIONS, remove AC_PREREQ.
	* configure: Re-generate.
	* config.h.in: Re-generate.
	* aclocal.m4: Re-generate.

ld/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* Makefile.am: Remove DISTCLEANFILES hack, rename ld.texinfo to
	ld.texi, ldint.texinfo to ldint.texi throughout.
	(AUTOMAKE_OPTIONS): Add info-in-builddir.
	* README: Rename ld.texinfo to ld.texi, ldint.texinfo to
	ldint.texi throughout.
	* gen-doc.texi: Likewise.
	* h8-doc.texi: Likewise.
	* ld.texinfo: Rename to ...
	* ld.texi: ... this.
	* ldint.texinfo: Rename to ...
	* ldint.texi: ... this.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* config.in: Re-generate.
	* configure: Re-generate.

libdecnumber/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.
	* aclocal.m4.

libiberty/ChangeLog:

	* configure.ac: Remove AC_PREREQ.
	* configure: Re-generate.
	* config.in: Re-generate.

opcodes/ChangeLog:

	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.11.
	* configure.ac: Remove AC_PREREQ.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.

readline/ChangeLog.gdb:

	* configure: Re-generate.
	* examples/rlfe/configure: Re-generate.

sim/ChangeLog:

	* All configure.ac: Remove AC_PREREQ.
	* All configure: Re-generate.

zlib/ChangeLog.bin-gdb:

	* configure.ac: Modernize AC_INIT call, remove AC_PREREQ.
	* Makefile.am (AUTOMAKE_OPTIONS): Remove 1.8, cygnus, add
	foreign.
	* Makefile.in: Re-generate.
	* aclocal.m4: Re-generate.
	* configure: Re-generate.
2018-06-19 16:55:06 -04:00
Simon Marchi
37f980dc03 config: Sync with GCC
... and re-generate all possible configure files, since they may depend
on things in config/.

config/ChangeLog:

	Sync with GCC
	2018-06-08  Martin Liska  <mliska@suse.cz>

	* bootstrap-mpx.mk: Remove.

	2018-05-10  Martin Liska  <mliska@suse.cz>

	PR bootstrap/64914
	* bootstrap-ubsan.mk: Define UBSAN_BOOTSTRAP.

	2018-05-09  Joshua Watt <jpewhacker@gmail.com>

        * ax_pthread.m4: Add file.

	2018-05-08  Richard Biener  <rguenther@suse.de>

	PR bootstrap/85571
	* bootstrap-lto-noplugin.mk: Disable compare.
	* bootstrap-lto.mk: Supply contrib/compare-lto for do-compare.

	2018-04-24  H.J. Lu  <hongjiu.lu@intel.com>

	PR bootstrap/85490
	* bootstrap-cet.mk (STAGE4_CFLAGS): New.

	2018-04-24  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/85485
	* bootstrap-cet.mk (STAGE2_CFLAGS): Remove -mcet.
	(STAGE3_CFLAGS): Likewise.

	2018-04-24  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/85485
	* cet.m4 (GCC_CET_FLAGS): Replace -mcet with -mshstk.

	2018-04-19  Jakub Jelinek  <jakub@redhat.com>

	* cet.m4 (GCC_CET_FLAGS): Default to --disable-cet, replace
	--enable-cet=default with --enable-cet=auto.

	2018-04-18  David Malcolm  <dmalcolm@redhat.com>

	PR jit/85384
	* acx.m4 (GCC_BASE_VER): Remove \$\$ from sed expression.
2018-06-18 09:33:48 -04:00
Alan Modra
84f9f8c330 PR22069, Several instances of register accidentally spelled as regsiter
PR 22069
binutils/
	* od-macho.c (dump_unwind_encoding_x86): Adjust for macro renaming.
cpu/ChangeLog
	* or1kcommon.cpu (spr-reg-info): Typo fix.
include/ChangeLog
	* mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
	Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
	(MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
	MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
opcodes/ChangeLog
	* cr16-opc.c (cr16_instruction): Comment typo fix.
	* hppa-dis.c (print_insn_hppa): Likewise.
sim/ppc/ChangeLog
	* e500_registers.h: Comment typo fix.
	* ppc-instructions (ppc_insn_mfcr): Likewise.
2018-05-09 15:55:28 +09:30
Maciej W. Rozycki
d65ce302ab MAINTAINERS: Update my company e-mail address
Following my recent transition from Imagination Technologies to the
reincarnated MIPS company update MAINTAINERS entries accordingly.

	binutils/
	* MAINTAINERS: Update my company e-mail address.

	gdb/
	* MAINTAINERS: Update my company e-mail address.

	sim/
	* MAINTAINERS: Update my company e-mail address.
2018-01-22 15:39:18 +00:00
Nick Clifton
43724d16be Fix compile time warning (in the ARM simulator) about a print statement with insufficient arguments.
PR 22663
	* maverick.c (DSPCDP4): Add missing parameter to debug print
	statement.
2018-01-02 17:15:16 +00:00
Joel Brobecker
e2882c8578 Update copyright year range in all GDB files
gdb/ChangeLog:

        Update copyright year range in all GDB files
2018-01-02 07:38:06 +04:00
Peter Gavin
702d582e2c sim: testsuite: add testsuite for or1k sim
This is the testsuite for the or1k sim, it tests running many of the
basic architecture instructions on the openrisc sim.

sim/testsuite/sim/or1k/ChangeLog:

2017-12-12  Peter Gavin  <pgavin@gmail.com>
	    Stafford Horne <shorne@gmail.com>

	* add.S: New file.
	* alltests.exp: New file.
	* and.S: New file.
	* basic.S: New file.
	* div.S: New file.
	* ext.S: New file.
	* find.S: New file.
	* flag.S: New file.
	* fpu.S: New file.
	* jump.S: New file.
	* load.S: New file.
	* mac.S: New file.
	* mfspr.S: New file.
	* mul.S: New file.
	* or.S: New file.
	* or1k-asm-test-env.h: New file.
	* or1k-asm-test-helpers.h: New file.
	* or1k-asm-test.h: New file.
	* or1k-asm.h: New file.
	* or1k-test.ld: New file.
	* ror.S: New file.
	* shift.S: New file.
	* spr-defs.h: New file.
	* sub.S: New file.
	* xor.S: New file.

sim/testsuite/ChangeLog:

2017-12-12  Stafford Horne  <shorne@gmail.com>
	    Peter Gavin  <pgavin@gmail.com>

	* configure: Regenerated.
2017-12-12 23:49:57 +09:00
Stafford Horne
0cd7970733 sim: or1k: add autoconf generated files
These are separted out to make the patch easier to read and smaller.

sim/ChangeLog:

2017-12-12  Stafford Horne  <shorne@gmail.com>
	    Peter Gavin  <pgavin@gmail.com>

	* configure: Regenerated.
	* or1k/aclocal.m4: Generated.
	* or1k/config.in: Generated.
	* or1k/configure: Generated.
2017-12-12 23:46:53 +09:00
Stafford Horne
6e51bfa755 sim: or1k: add cgen generated files
These are the simulator files generated by cgen.  These are split out
from the main sim patch to make the patch easier to review and smaller.

sim/ChangeLog:

2017-12-12  Stafford Horne  <shorne@gmail.com>
	    Peter Gavin  <pgavin@gmail.com>

	* or1k/arch.c: Generated.
	* or1k/arch.h: Generated.
	* or1k/cpu.c: Generated.
	* or1k/cpu.h: Generated.
	* or1k/cpuall.h: Generated.
	* or1k/decode.c: Generated.
	* or1k/decode.h: Generated.
	* or1k/model.c: Generated.
	* or1k/sem-switch.c: Generated.
	* or1k/sem.c: Generated.
2017-12-12 23:45:45 +09:00
Stafford Horne
fa8b7c2128 sim: or1k: add or1k target to sim
This adds the OpenRISC 32-bit sim target.  The OpenRISC sim is a CGEN
based sim so the bulk of the code is generated from the .cpu files by
CGEN.  The engine decode and execute logic in mloop uses scache with
pseudo-basic-block extraction and supports both full and fast (switch)
modes.

The sim does not implement an mmu at the moment.  The sim does implement
fpu instructions via the common sim-fpu implementation.

sim/ChangeLog:

2017-12-12  Stafford Horne  <shorne@gmail.com>
	    Peter Gavin  <pgavin@gmail.com>

	* configure.tgt: Add or1k sim.
	* or1k/README: New file.
	* or1k/Makefile.in: New file.
	* or1k/configure.ac: New file.
	* or1k/mloop.in: New file.
	* or1k/or1k-sim.h: New file.
	* or1k/or1k.c: New file.
	* or1k/sim-if.c: New file.
	* or1k/sim-main.h: New file.
	* or1k/traps.c: New file.
2017-12-12 23:44:14 +09:00
Peter Gavin
58884b0e45 sim: cgen: add MUL2OFSI and MUL1OFSI functions (needed for OR1K l.mul[u])
sim/common/ChangeLog:

2017-12-12  Peter Gavin  <pgavin@gmail.com>
	    Stafford Horne  <shorne@gmail.com>

	* cgen-ops.h (MUL2OFSI): New function, 2's complement overflow
	flag.
	(MUL1OFSI): New function, 1's complement overflow flag.
2017-12-12 23:43:02 +09:00
Peter Gavin
07b95864f3 sim: cgen: add remainder functions (needed for OR1K lf.rem.[sd])
* sim/common/ChangeLog:

2017-12-12  Peter Gavin  <pgavin@gmail.com>
	    Stafford Horne <shorne@gmail.com>

	* cgen-accfp.c (remsf, remdf): New function.
	(cgen_init_accurate_fpu): Add remsf and remdf.
	* cgen-fpu.h (cgen_fp_ops): Add remsf, remdf, remxf and remtf.
	* sim-fpu.c (sim_fpu_rem): New function.
	* sim-fpu.h (sim_fpu_status_invalid_irx): New enum.
	(sim_fpu_rem): New function.
	(sim_fpu_print_status): Add case for sim_fpu_status_invalid_irx.
2017-12-12 23:41:43 +09:00
James Bowman
dcc31d286a FT32: support for FT32B processor - part 2/2
FT32B is a new FT32 family member.
This patch adds support for the compressed instructions to gdb and sim.

gdb/ChangeLog:
        * ft32-tdep.c (ft32_fetch_instruction): New function.
        (ft32_analyze_prologue): Use ft32_fetch_instruction().

sim/ChangeLog:
        * ft32/interp.c (step_once): Add ft32 shortcode decoder.
2017-11-01 18:36:51 -07:00
James Bowman
3b4b0a629a FT32: support for FT32B processor - part 1
FT32B is a new FT32 family member. It has a code
compression scheme, which requires the use of linker
relaxations. The change is quite large, so submission
is in several parts.

Part 1 adds a 15-bit instruction field, and CPU-specific functions for
the code compression that are used in binutils and GDB.

bfd/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-ft32.c: Add HOWTO R_FT32_15.
	* reloc.c: Add BFD_RELOC_FT32_15.

gas/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with
	K15.
	(md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15.

include/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* elf/ft32.h: Add R_FT32_15.
	* opcode/ft32.h: Replace FT32_FLD_K8 with K15.
	(ft32_shortcode, sc_compar, ft32_split_shortcode,
	ft32_merge_shortcode, ft32_merge_shortcode): New functions.

opcodes/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* opcodes/ft32-dis.c (print_insn_ft32): Replace FT32_FLD_K8 with K15.
	* opcodes/ft32-opc.c (ft32_opc_info): Replace FT32_FLD_K8 with
	K15. Add jmpix pattern.

sim/ChangeLog:

2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* sim/ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15.
2017-10-12 18:41:29 -07:00
James Bowman
d268bbaff7 Add myself as ft32 maintainer for sim.
sim/ChangeLog:
2017-10-12  James Bowman  <james.bowman@ftdichip.com>

	* MAINTAINERS (ft32): Add myself.
2017-10-12 18:12:42 -07:00
Jim Wilson
c0107b0f57 Update my email address.
sim/
	* MAINTAINERS (aarch64): Update my email address.
2017-10-03 14:23:56 -07:00
Yao Qi
88240b186d [SIM, ARM] Fix build failure
This patch fixes the build failure by using disassembler to get
disassemble function pointer, and do the disassembly, because
print_insn_little_arm is no longer visible outside opcodes/

binutils-gdb/sim/arm/wrapper.c:98:10: error: implicit declaration of function 'print_insn_little_arm' [-Werror=implicit-function-declaration]
   size = print_insn_little_arm (0, & info);
          ^

sim/arm:

2017-09-21  Yao Qi  <yao.qi@linaro.org>

	* wrapper.c (print_insn): Use disassembler instead of
	print_insn_little_arm.
2017-09-21 09:02:25 +01:00
John Baldwin
5c887dd5f6 Honor an existing CC_FOR_BUILD in the environment for sim.
This matches the equivalent bits in bfd/acinclude.m4

sim/ChangeLog:

	* configure.ac: Honor existing CC_FOR_BUILD in environment.
	* configure: Regenerate.

sim/aarch64/ChangeLog:

	* configure: Regenerate.

sim/arm/ChangeLog:

	* configure: Regenerate.

sim/avr/ChangeLog:

	* configure: Regenerate.

sim/bfin/ChangeLog:

	* configure: Regenerate.

sim/common/ChangeLog:

	* acinclude.m4 (SIM_AC_COMMON) Honor existing CC_FOR_BUILD in
	environment.

sim/cr16/ChangeLog:

	* configure: Regenerate.

sim/cris/ChangeLog:

	* configure: Regenerate.

sim/d10v/ChangeLog:

	* configure: Regenerate.

sim/erc32/ChangeLog:

	* configure: Regenerate.

sim/frv/ChangeLog:

	* configure: Regenerate.

sim/ft32/ChangeLog:

	* configure: Regenerate.

sim/h8300/ChangeLog:

	* configure: Regenerate.

sim/iq2000/ChangeLog:

	* configure: Regenerate.

sim/lm32/ChangeLog:

	* configure: Regenerate.

sim/m32c/ChangeLog:

	* configure: Regenerate.

sim/m32r/ChangeLog:

	* configure: Regenerate.

sim/m68hc11/ChangeLog:

	* configure: Regenerate.

sim/mcore/ChangeLog:

	* configure: Regenerate.

sim/microblaze/ChangeLog:

	* configure: Regenerate.

sim/mips/ChangeLog:

	* configure: Regenerate.

sim/mn10300/ChangeLog:

	* configure: Regenerate.

sim/moxie/ChangeLog:

	* configure: Regenerate.

sim/msp430/ChangeLog:

	* configure: Regenerate.

sim/rl78/ChangeLog:

	* configure: Regenerate.

sim/rx/ChangeLog:

	* configure: Regenerate.

sim/sh/ChangeLog:

	* configure: Regenerate.

sim/sh64/ChangeLog:

	* configure: Regenerate.

sim/v850/ChangeLog:

	* configure: Regenerate.
2017-09-06 10:16:12 -07:00
John Baldwin
625ce09c1c Define an error function in the PPC simulator library.
Previously this used the error function from GDB directly when linked
against GDB instead of the error method in the host callbacks
structure.  This was exposed via a link error when GDB was converted
to C++.  The error function invokes the error callback similar to
sim_io_error.

Note that there are also error functions in sim/ppc/main.c and
sim/ppc/misc.c.  The ppc libsim.a expects each consumer to provide
several symbols used by the library including "error".  sim-calls.c
provides these symbols when the library is linked into gdb.  The dgen,
igen, tmp-filter, tmp-ld-decode, tmp-ld-cache, and tmp-ld-insn programs
use the functions from misc.c.  psim uses the functions from main.c.

sim/ppc/ChangeLog:

	PR sim/20863
	* sim_calls.c (error): New function.
2017-09-04 19:56:00 -07:00
Anthony Green
6c869779da Fix simulator 2017-09-04 10:00:37 -04:00
Jozef Lawrynowicz
3819af136d Fix simulation of MSP430's open system call.
* sim/msp430/msp430-sim.c (maybe_perform_syscall): Fix passing of
	arguments for variadic syscall "open".
2017-08-29 14:09:58 +01:00
Michael Eager
e7cd2680e0 Correct check for endianness
* interp.c: (target_big_endian): target endianess recognition fix.
2017-06-02 08:04:59 -07:00
Yao Qi
003ca0fd22 Refactor disassembler selection
Nowadays, opcodes/disassemble.c:disassembler selects the proper
disassembler according to ABFD only.  However, it actually
selects disassemblers according to arch, mach, endianess, and
abfd.  This patch adds them to the parameters of disassembler,
so that its caller can still select disassemblers in case that
abfd is NULL (a typical case in GDB).

There isn't any functionality change.

binutils:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* objdump.c (disassemble_data): Caller update.

include:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* dis-asm.h (disassembler): Update declaration.

opcodes:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* disassemble.c (disassembler): Add arguments a, big and mach.
	Use them.

sim/common:

2017-05-24  Yao Qi  <yao.qi@linaro.org>

	* sim-trace.c (trace_disasm): Caller update.
2017-05-24 17:23:52 +01:00
Jim Wilson
bf1554384b Fix ldn/stn multiple instructions. Fix testcases with unaligned data.
sim/aarch64/
	* simulator.c (vec_load): Add M argument.  Rewrite to iterate over
	registers based on structure size.
	(LD4, LD3, LD2, LD1_2, LD1_3, LD1_4): Pass new arg to vec_load.
	(LD1_1): Replace with call to vec_load.
	(vec_store): Add new M argument.  Rewrite to iterate over registers
	based on structure size.
	(ST4, ST3, ST2, ST1_2, ST1_3, ST1_4): Pass new arg to vec_store.
	(ST1_1): Replace with call to vec_store.

	sim/testsuite/sim/aarch64/
	* fcvtz.s, fstur.s, ldn_single.s, ldnr.s, mla.s, mls.s, uzp.s: Align
	data.
	* sumulh.s: Delete unnecessary data alignment.
	* stn_single.s: Align data.  Fix unaligned ldr insns.  Adjust cmp
	arguments to match change.
	* ldn_multiple.s, stn_multiple.s: New.
2017-04-22 16:36:01 -07:00
Jim Wilson
b630840c9c Add support for fcvtl and fcvtl2.
sim/aarch64/
	* simulator.c (do_vec_FCVTL): New.
	(do_vec_op1): Call do_vec_FCVTL.

	sim/testsuite/sim/aarch64/
	* fcvtl.s: New.
2017-04-08 12:08:20 -07:00
Jim Wilson
ae27d3fe76 Support the fcmXX zero instructions.
sim/aarch64/
	* simulator.c (do_scalar_FCMGE_zero): New.
	(do_scalar_FCMLE_zero, do_scalar_FCMGT_zero, do_scalar_FCMEQ_zero)
	(do_scalar_FCMLT_zero): Likewise.
	(do_scalar_vec): Add calls to new functions.

	sim/testsuite/sim/aarch64/
	* fcmXX.s: New.
2017-04-08 07:10:38 -07:00
Jim Wilson
f124168208 Fix bug with cmn/adds where C flag was incorrectly set.
sim/aarch64/
	* simulator.c (set_flags_for_add32): Cast result to uint32_t in carry
	flag check.

	sim/testsuite/sim/aarch64/
	* adds.s: Add checks for values -2 and 1, where C is not set.
2017-03-25 20:32:02 -07:00
Jim Wilson
8ecbe595e6 Fix umulh and smulh bugs. Fix bugs in last week's sumov.s testsuite.
sim/aarch64/
	* simulator.c (mul64hi): Shift carry left by 32.
	(smulh): Change signum to negate.  If negate, invert result, and add
	carry bit if low part of multiply result is zero.

	sim/testsuite/sim/aarch64/
	* sumov.s: Correct compare test values.
	* sumulh.s: New.
2017-03-03 13:10:45 -08:00
Jim Wilson
152e1e1bc9 Add missing smov support, and clean up existing umov support.
sim/aarch64/
	* simulator.c (do_vec_SMOV_into_scalar): New.
	(do_vec_UMOV_into_scalar): Renamed from do_vec_MOV_into_scalar.
	Rewritten.
	(do_vec_UMOV): Merged into do_vec_UMOV_into_scalar and deleted.
	(do_vec_op1): Move do_vec_TRN call and do_vec_UZP call.  Add
	do_vec_SMOV_into_scalar call.  Delete do_vec_MOV_into_scalar and
	do_vec_UMOV calls.  Add do_vec_UMOV_into_scalar call.

	sim/testsuite/sim/aarch64/
	* sumov.s: New.
2017-02-25 20:06:36 -08:00
Jim Wilson
ac189e7bf8 Add missing cnt (popcount) instruction support.
sim/aarch64/
	* simulator.c (popcount): New.
	(do_vec_CNT): New.
	(do_vec_op1): Add do_vec_CNT call.

	sim/testsuite/sim/aarch64/
	* cnt.s: New.
2017-02-25 20:04:09 -08:00
Jim Wilson
2e7e5e2890 Fix for aarch64 sim sxtl/uxtl insns, plus another fix for addv.
sim/aarch64/
	* simulator.c (do_vec_ADDV): Mov val declaration inside each case,
	with type set to input type size.
	(do_vec_xtl): Change bias from 3 to 4 for byte case.

	sim/testsuite/sim/aarch64/
	* bit.s: Change cmp immediates to account for addv bug fix.
	* cmtst.s, ldn_single.s, stn_single.s: Likewise.
	* xtl.s: New.
2017-02-19 13:16:56 -08:00
Jim Wilson
742e3a7781 Add self to aarch64 maintainers. Fix mla instruction.
sim/
	* MAINTAINTERS (aarch64): Add myself.

	sim/aarch64/
	* simulator.c (do_vec_MLA): Rewrite switch body.

	sim/testsuite/sim/aarch64/
	* mla.s: New.
2017-02-14 15:23:12 -08:00
Jim Wilson
bf25e9a0f1 Fix bit/bif instructions.
sim/aarch64/
	* simulator.c (do_vec_bit): Change loop limits from 16 and 8 to 4 and
	2.  Move test_false if inside loop.  Fix logic for computing result
	stored to vd.

	sim/testsuite/sim/aarch64
	* bit.s: New.
2017-02-14 14:35:57 -08:00
Jim Wilson
e8f42b5e36 Add ldn/stn single support, fix ldnr support.
sim/aarch64/
	* simulator.c: (LDn_STn_SINGLE_LANE_AND_SIZE): New.
	(do_vec_LDn_single, do_vec_STn_single): New.
	(do_vec_LDnR): Add and set new nregs var.  Replace switch on nregs with
	loop over nregs using new var n.  Add n times size to address in loop.
	Add n to vd in loop.
	(do_vec_load_store): Add comment for instruction bit 24.  New var
	single to hold instruction bit 24.  Add new code to use single.  Move
	ldnr support inside single if statements.  Fix ldnr register counts
	inside post if statement.  Change HALT_NYI calls to HALT_UNALLOC.

	sim/testsuite/sim/aarch64/
	* ldn_single.s: New.
	* ldnr.s: New.
	* stn_single.s: New.
2017-02-14 14:31:03 -08:00
Mike Frysinger
13a590ca65 sim: use ARRAY_SIZE instead of ad-hoc sizeof calculations 2017-02-13 01:26:21 -05:00
Jim Wilson
fbf32f638c Add support for cmtst.
sim/aarch64/
	* simulator.c (do_vec_compare): Add case 0x23 for CMTST.

	sim/testsuite/sim/aarch64/
	* cmtst.s: New.
2017-01-23 17:26:53 -08:00
Jim Wilson
05b3d79d26 Fixes for addv and xtn2 instructions.
sim/aarch64/
	* simulator.c (do_vec_ADDV): Call aarch64_set_vec_u64 instead of
	aarch64_set_reg_u64.  In case 2, call HALT_UNALLOC if not full.  In
	case 3, call HALT_UNALLOC unconditionally.
	(do_vec_XTN): Delete shifts.  In case 2, change index from i + 4 to
	i + 2.  Delete if on bias, change index to i + bias * X.

	sim/testsuite/sim/aarch64/
	* addv.s: New.
	* xtn.s: New.
2017-01-17 16:11:09 -08:00
Jim Wilson
a4fb5981b7 Fix problems with the implementation of the uzp1 and uzp2 instructions.
sim/aarch64/
	* simulator.c (do_vec_UZP): Rewrite.
	sim/testsuite/sim/aarch64/
	* uzp.s: New.
2017-01-09 15:44:57 -08:00
Jim Wilson
c0386d4d54 Five fixes, for fcsel, fcvtz, fminnm, mls, and non-widening mul.
sim/aarch64/
	* cpustate.c: Include math.h.
	(aarch64_set_FP_float): Use signbit to check for signed zero.
	(aarch64_set_FP_double): Likewise.
	* simulator.c (do_vec_MOV_immediate, case 0x8): Add missing break.
	(do_vec_mul): In all DO_VEC_WIDENING_MUL calls, make second and fourth
	args same size as third arg.
	(fmaxnm): Use isnan instead of fpclassify.
	(fminnm, dmaxnm, dminnm): Likewise.
	(do_vec_MLS): Reverse order of subtraction operands.
	(dexSimpleFPCondSelect): Call aarch64_get_FP_double or
	aarch64_get_FP_float to get source register contents.
	(UINT_MIN, ULONG_MIN, FLOAT_UINT_MAX, FLOAT_UINT_MIN,
	DOUBLE_UINT_MAX, DOUBLE_UINT_MIN, FLOAT_ULONG_MAX, FLOAT_ULONG_MIN,
	DOUBLE_ULONG_MAX, DOUBLE_ULONG_MIN): New.
	(do_fcvtzu): Use ULONG instead of LONG, and UINT instead of INT in
	raise_exception calls.

	sim/testsuite/sim/aarch64/
	* fcsel.s: New.
	* fcvtz.s: New.
	* fminnm.s: New.
	* mls.s: New.
	* mul.s: New.
2017-01-04 16:07:50 -08:00
Joel Brobecker
61baf725ec update copyright year range in GDB files
This applies the second part of GDB's End of Year Procedure, which
updates the copyright year range in all of GDB's files.

gdb/ChangeLog:

        Update copyright year range in all GDB files.
2017-01-01 10:52:34 +04:00
Jim Wilson
87903eafb0 Fix bugs with float compare and Inf operands.
sim/aarch64/
	* simulator.c (set_flags_for_float_compare): Add code to handle Inf.
	Add comment to document NaN issue.
	(set_flags_for_double_compare): Likewise.

	sim/testsuite/sim/aarch64/
	* fcmp.s: New.
2016-12-21 12:33:12 -08:00
Maciej W. Rozycki
cadf97cf20 MAINTAINERS: Add myself as a MIPS maintainer
* MAINTAINERS (Maintainers for particular sims): Add myself as
	a MIPS maintainer.
2016-12-14 22:19:08 +00:00
Jim Wilson
963201cf5d Fix aarch64 sim bug with adds64, and add testcases for last 3 bug fixes.
sim/aarch64
	* simulator.c (NEG, POS): Move before set_flags_for_add64.
	(set_flags_for_add64): Replace with a modified copy of
	set_flags_for_sub64.

	sim/testsuite/sim/aarch64
	* testutils.inc (pass): Move .Lpass to start.
	(fail): Move .Lfail to start.  Return 1 instead of 0.
	(start): Moved .Lpass and .Lfail to here.
	* adds.s: New.
	* fstur.s: New.
	* tbnz.s: New.
2016-12-13 08:44:31 -08:00
Jim Wilson
668650d58d Fix bugs with tbnz/tbz instructions.
sim/aarch64
	* simulator.c (tbnz, tbz): Cast 1 to uint64_t before shifting.
	(dexTestBranchImmediate): Shift high bit of pos by 5 not 4.
2016-12-03 17:29:44 -08:00
Jim Wilson
88256e713c Fix typo in ChangeLog entry. 2016-12-01 09:07:55 -08:00
Jim Wilson
88ddd4a1ef Fix bug with FP stur instructions.
sim/aarch64
	* simulator.c (fsturs): Switch use of rn and st variables.
	(fsturd, fsturq): Likewise
2016-12-01 09:06:07 -08:00
Mike Frysinger
6cb2202baa sim: mips: add PR info to ChangeLog 2016-11-12 01:02:23 -05:00