Commit Graph

796 Commits

Author SHA1 Message Date
Trevor Saunders 3d207518c1 tic54x: rename typedef of struct symbol_
generic gas code has a struct symbol, and tic54x typedefs a struct to symbol.
This seems at least rather confusing, and it seems like target specific headers
shouldn't  put such generic names in the global namespace preventing other
generic code from using them.

opcodes/ChangeLog:

2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* tic54x-dis.c (sprint_mmr): Adjust.
	* tic54x-opc.c: Likewise.

gas/ChangeLog:

2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* config/tc-tic54x.c (tic54x_mmregs): Adjust.
	(md_begin): Likewise.
	(encode_condition): Likewise.
	(encode_cc3): Likewise.
	(encode_cc2): Likewise.
	(encode_operand): Likewise.
	(tic54x_undefined_symbol): Likewise.

include/ChangeLog:

2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
	plain symbol.
2016-05-23 01:17:12 -04:00
Tom Tromey 5ff087ac18 Add DW_LANG_Rust
include/
	* dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
	DW_LANG_Rust_old>: New constants.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@235643 138bc75d-0d04-0410-961f-82ee72b054a4
2016-05-17 11:11:20 -06:00
Matthew Fortune 8f4f9071ad Add MIPS32 DSPr3 support.
bfd/

	* elfxx-mips.c (print_mips_ases): Add DSPR3.

binutils/

	* readelf.c (print_mips_ases): Add DSPR3.

gas/

	* config/tc-mips.c (options): Add OPTION_DSPR3 and
	OPTION_NO_DSPR3.
	(md_longopts): Likewise.
	(md_show_usage): Add help for -mdspr3 and -mno-dspr3.
	(mips_ases): Define availability for DSPr3.
	(mips_ase_groups): Add ASE_DSPR3 to the DSP group.
	(mips_convert_ase_flags): Map ASE_DSPR3 to AFL_ASE_DSPR3.
	* doc/as.texinfo: Document -mdspr3, -mno-dspr3.  Fix -mdspr2
	formatting.
	* doc/c-mips.texi: Document -mdspr3, -mno-dspr3, .set dspr3 and
	.set nodspr3.  Fix -mdspr2 formatting.
	* testsuite/gas/mips/mips32-dspr3.d: New file.
	* testsuite/gas/mips/mips32-dspr3.s: Likewise.
	* testsuite/gas/mips/mips.exp: Run mips32-dspr3 test.

include/

	* elf/mips.h (AFL_ASE_DSPR3): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
	* opcode/mips.h (ASE_DSPR3): New macro.

opcodes/

	* mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
	mips64r6.
	* mips-opc.c (D34): New macro.
	(mips_builtin_opcodes): Define bposge32c for DSPr3.
2016-05-11 17:06:13 +01:00
Thomas Preud'homme 39d911fc3c Use getters/setters to access ARM branch type
2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	* elf32-arm.c (elf32_arm_size_stubs): Use new macros
	ARM_GET_SYM_BRANCH_TYPE and ARM_SET_SYM_BRANCH_TYPE to respectively get
	and set branch type of a symbol.
	(bfd_elf32_arm_process_before_allocation): Likewise.
	(elf32_arm_relocate_section): Likewise and fix identation along the
	way.
	(allocate_dynrelocs_for_symbol): Likewise.
	(elf32_arm_finish_dynamic_symbol): Likewise.
	(elf32_arm_swap_symbol_in): Likewise.
	(elf32_arm_swap_symbol_out): Likewise.

gas/
	* config/tc-arm.c (arm_adjust_symtab): Use ARM_SET_SYM_BRANCH_TYPE to
	set branch type of a symbol.

gdb/
	* arm-tdep.c (arm_elf_make_msymbol_special): Use
	ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.

include/
	* arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
	enumerator.
	(NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
	(ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
	(ARM_SYM_BRANCH_TYPE): Replace by ...
	(ARM_GET_SYM_BRANCH_TYPE): This and ...
	(ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
	BFD_ASSERT is defined or not.

ld/
	* emultempl/armelf.em (gld${EMULATION_NAME}_finish): Use
	ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.

opcodes/
	* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
	branch type of a symbol.
	(print_insn): Likewise.
2016-05-10 16:17:04 +01:00
Thomas Preud'homme 15afaa63f3 Add support for ARMv8-M Mainline with DSP extension
2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

bfd/
	(elf32_arm_merge_eabi_attributes): Add merging logic for
	Tag_DSP_extension.

binutils/
	* readelf.c (display_arm_attribute): Add output for Tag_DSP_extension.
	(arm_attr_public_tags): Define DSP_extension attribute.

gas/
	* NEWS: Document ARMv8-M and ARMv8-M Security and DSP Extensions.
	* config/tc-arm.c (arm_ext_dsp): New feature for Thumb DSP
	instructions.
	(arm_extensions): Add dsp extension for ARMv8-M Mainline.
	(aeabi_set_public_attributes): Memorize the feature bits of the
	architecture selected for Tag_CPU_arch.  Use it to set
	Tag_DSP_extension to 1 for ARMv8-M Mainline with DSP extension.
	(arm_convert_symbolic_attribute): Define Tag_DSP_extension.
	* testsuite/gas/arm/arch7em-bad.d: Rename to ...
	* testsuite/gas/arm/arch7em-bad-1.d: This.
	* testsuite/gas/arm/arch7em-bad-2.d: New file.
	* testsuite/gas/arm/arch7em-bad-3.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-2.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-3.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-4.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-5.d: Likewise.
	* testsuite/gas/arm/attr-march-armv8m.main.dsp.d: Likewise.

include/
	* elf/arm.h (Tag_DSP_extension): Define.

ld/
	* testsuite/ld-arm/arm-elf.exp (EABI attribute merging 10 (DSP)): New
	test.
	* testsuite/ld-arm/attr-merge-10b-dsp.s: New file.
	* testsuite/ld-arm/attr-merge-10-dsp.attr: Likewise.
2016-05-10 15:24:10 +01:00
Thomas Preud'homme d942732e82 Allow extension availability to depend on several architecture bits
2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

gas/
	* config/tc-arm.c (struct arm_option_extension_value_table): Make
	allowed_archs an array with 2 entries.
	(ARM_EXT_OPT): Adapt to only fill the first entry of allowed_archs.
	(ARM_EXT_OPT2): New macro filling the two entries of allowed_archs.
	(arm_extensions): Use separate entries in allowed_archs when several
	archs are allowed to use an extension and change ARCH_ANY in
	ARM_ARCH_NONE in allowed_archs.
	(arm_parse_extension): Check that, for each allowed_archs entry, all
	bits are set in the current architecture, ignoring ARM_ANY entries.
	(s_arm_arch_extension): Likewise.

include/
	* arm.h (ARM_FSET_CPU_SUBSET): Define macro.
2016-05-10 15:12:11 +01:00
Thomas Preud'homme 16a1fa25be Add support for ARMv8-M security extensions instructions
2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>

gas/
	* config/tc-arm.c (arm_ext_m): Add feature bit ARM_EXT2_V8M_MAIN.
	(arm_ext_v8m_main): New feature set for bit ARM_EXT2_V8M_MAIN.
	(arm_ext_v8m_m_only): New feature set for instructions in ARMv8-M not
	shared with a non M profile architecture.
	(do_rn): New function.
	(known_t32_only_insn): Check opcode against arm_ext_v8m_m_only rather
	than arm_ext_v8m.
	(v7m_psrs): Add ARMv8-M security extensions new special registers.
	(insns): Add ARMv8-M Security Extensions instructions.
	(aeabi_set_public_attributes): Use arm_ext_v8m_m_only instead of
	arm_ext_v8m_m to decide the profile and the Thumb ISA.
	* testsuite/gas/arm/archv8m-cmse.s: New file.
	* testsuite/gas/arm/archv8m-cmse-main.s: Likewise..
	* testsuite/gas/arm/archv8m-cmse-msr.s: Likewise.
	* testsuite/gas/arm/any-cmse.d: Likewise.
	* testsuite/gas/arm/any-cmse-main.d: Likewise.
	* testsuite/gas/arm/archv8m-cmse-base.d: Likewise.
	* testsuite/gas/arm/archv8m-cmse-msr-base.d: Likewise.
	* testsuite/gas/arm/archv8m-cmse-main-1.d: Likewise.
	* testsuite/gas/arm/archv8m-cmse-main-2.d: Likewise.
	* testsuite/gas/arm/archv8m-cmse-msr-main.d: Likewise.

include/
	* opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
	(ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
	(ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
	for the high core bits.

opcodes/
	* arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
	Mainline Security Extensions instructions.
	(thumb_opcodes): Add entries for narrow ARMv8-M Security
	Extensions instructions.
	(thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
	instructions.
	(psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
	special registers.
2016-05-10 15:03:38 +01:00
Claudiu Zissulescu 945e0f82da [ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instructions
gas/
2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/tc-arc.c (syntaxclass): Add SYNTAX_NOP and SYNTAX_1OP.
	(arc_extinsn): Handle new introduced syntax.
	* testsuite/gas/arc/textinsn1op.d: New file.
	* testsuite/gas/arc/textinsn1op.s: Likewise.
	* doc/c-arc.texi: Document SYNTAX_NOP and SYNTAX_1OP.

opcodes/
2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
	(arcExtMap_genOpcode): Likewise.
	* arc-opc.c (arg_32bit_rc): Define new variable.
	(arg_32bit_u6): Likewise.
	(arg_32bit_limm): Likewise.

include/
2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>

	* opcode/arc.h (ARC_SYNTAX_1OP): Declare
	(ARC_SYNTAX_NOP): Likewsie.
	(ARC_OP1_MUST_BE_IMM): Update defined value.
	(ARC_OP1_IMM_IMPLIED): Likewise.
	(arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
2016-05-04 16:18:32 +02:00
Nick Clifton 4bd13cde17 Add support to AArch64 disassembler for verifying instructions. Add verifier for LDPSW.
PR target/19722
opcodes	* aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
	* aarch64-opc.c (verify_ldpsw): New function.
	* aarch64-opc.h (verify_ldpsw): New prototype.
	* aarch64-tbl.h: Add initialiser for verifier field.
	(LDPSW): Set verifier to verify_ldpsw.

binutils* testsuite/binutils-all/aarch64/illegal.s: New test.
	* testsuite/binutils-all/aarch64/illegal.d: New test driver.

include	* opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
2016-04-28 09:11:03 +01:00
Alan Modra a6a4679fc0 Cache result of scan for __start_* and __stop_* sections
include/
	* bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
	undef.  Formatting.
bfd/
	* elflink.c (_bfd_elf_is_start_stop): New function.
	(_bfd_elf_gc_mark_rsec): Use it.
	* elf-bfd.h (_bfd_elf_is_start_stop): Declare.
2016-04-27 17:05:26 +09:30
Nick Clifton 4f3b23b390 Add support for non-ELF targets to check their relocs.
bfd	* aout-adobe.c: Use _bfd_generic_link_check_relocs.
	* aout-target.h: Likewise.
	* aout-tic30.c: Likewise.
	* binary.c: Likewise.
	* bout.c: Likewise.
	* coff-alpha.c: Likewise.
	* coff-rs6000.c: Likewise.
	* coff64-rs6000.c: Likewise.
	* coffcode.h: Likewise.
	* i386msdos.c: Likewise.
	* i386os9k.c: Likewise.
	* ieee.c: Likewise.
	* ihex.c: Likewise.
	* libbfd-in.h: Likewise.
	* libecoff.h: Likewise.
	* mach-o-target.c: Likewise.
	* mmo.c: Likewise.
	* nlm-target.h: Likewise.
	* oasys.c: Likewise.
	* pef.c: Likewise.
	* plugin.c: Likewise.
	* ppcboot.c: Likewise.
	* som.c: Likewise.
	* srec.c: Likewise.
	* tekhex.c: Likewise.
	* versados.c: Likewise.
	* vms-alpha.c: Likewise.
	* xsym.c: Likewise.
	* elfxx-target.h: Use _bfd_elf_link_check_relocs.
	* linker.c (bfd_link_check_relocs): New function.
	(_bfd_generic_link_check_relocs): New function.
	* targets.c (BFD_JUMP_TABLE_LINK): Add initialization of
	_bfd_link_check_relocs field.
	(struct bfd_target)L Add _bfd_link_check_relocs field.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.

ld	* ldlang.c (lang_check_relocs): Use bfd_link_check_relocs in
	prefernce to _bfd_elf_link_check_relocs.  Drop test for ELF
	targets.  Do not stop the checks when problems are encountered.

include	* bfdlink.h: Add prototype for bfd_link_check_relocs.
2016-04-21 15:43:00 +01:00
H.J. Lu d968975277 Check ELF relocs after opening all input files
Delaying checking ELF relocations until opening all input files so
that symbol information is final when relocations are checked.  This
is only enabled for x86 targets.

bfd/

	* elf-bfd.h (_bfd_elf_link_check_relocs): New.
	* elflink.c (_bfd_elf_link_check_relocs): New function.
	(elf_link_add_object_symbols): Call _bfd_elf_link_check_relocs
	if check_relocs_after_open_input is FALSE.

include/

	* bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.

ld/

	* emulparams/elf32_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	New.
	* emulparams/elf_i386.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emulparams/elf_i386_be.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emulparams/elf_i386_chaos.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emulparams/elf_i386_ldso.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emulparams/elf_i386_vxworks.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emulparams/elf_x86_64.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emulparams/i386nto.sh (CHECK_RELOCS_AFTER_OPEN_INPUT):
	Likewise.
	* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse):
	Set check_relocs_after_open_input to TRUE if
	CHECK_RELOCS_AFTER_OPEN_INPUT is yes.
	(gld${EMULATION_NAME}_after_open): Call
	_bfd_elf_link_check_relocs on all inputs if
	check_relocs_after_open_input is TRUE.
2016-04-20 05:26:51 -07:00
Andrew Burgess 52176c676d arc: Fix relocation formula for ARC_NPS_CMEM16 relocation
The ME modifier was missing from the relocation formula for the
ARC_NPS_CMEM16 relocation, and as such the relocation would not patch
correctly on little endian targets.

include/ChangeLog:

	* elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
2016-04-20 11:45:24 +01:00
Andrew Burgess 537aefaf18 opcodes/arc: Add yet more nps instructions
Add some more arc/nps400 instructions and the associated operands.
There's also a test added into the assembler.

gas/ChangeLog:

	* testsuite/gas/arc/nps400-6.d: New file.
	* testsuite/gas/arc/nps400-6.s: New file.

include/ChangeLog:

	* opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.

opcodes/ChangeLog:

	* arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
	fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, and qcmp
	instructions.
	* arc-opc.c (insert_nps_bitop_size): Delete.
	(extract_nps_bitop_size): Delete.
	(MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
	(extract_nps_qcmp_m3): Define.
	(extract_nps_qcmp_m2): Define.
	(extract_nps_qcmp_m1): Define.
	(arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
	(arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
	(arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
	NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
	NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
	NPS_QCMP_M3.
2016-04-19 22:51:27 +01:00
Andrew Burgess c8f785f220 opcodes/arc: Add more nps instructions
Add dctcp, dcip, dcet, and dcacl instructions.

gas/ChangeLog:

	* testsuite/gas/arc/nps400-4.d: New file.
	* testsuite/gas/arc/nps400-4.s: New file.
	* testsuite/gas/arc/nps400-5.d: New file.
	* testsuite/gas/arc/nps400-5.s: New file.

include/ChangeLog:

	* opcode/arc.h (insn_class_t): Add NET and ACL class.

opcodes/ChangeLog:

	* arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
2016-04-19 22:50:33 +01:00
Andrew Burgess 4b0c052e45 arc/nps400 : New cmem instructions and associated relocation
Add support for arc/nps400 cmem instructions, these load and store
instructions are hard-wired to access "0x57f00000 + 16-bit-offset".

Supporting this relocation required some additions to the arc relocation
handling in the bfd library, as well as the standard changes required to
add a new relocation type.

There's a test of the new instructions in the assembler, and a test of
the relocation in the linker.

bfd/ChangeLog:

	* reloc.c: Add BFD_RELOC_ARC_NPS_CMEM16 entry.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* elf32-arc.c: Add 'opcode/arc.h' include.
	(struct arc_relocation_data): Add symbol_name.
	(arc_special_overflow_checks): New function.
	(arc_do_relocation): Use arc_special_overflow_checks, reindent as
	required, add an extra comment.
	(elf_arc_relocate_section): Setup symbol_name in reloc_data.

gas/ChangeLog:

	* testsuite/gas/arc/nps400-3.d: New file.
	* testsuite/gas/arc/nps400-3.s: New file.

include/ChangeLog:

	* elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
	* opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.

ld/ChangeLog:

	* testsuite/ld-arc/arc.exp: New file.
	* testsuite/ld-arc/nps-1.s: New file.
	* testsuite/ld-arc/nps-1a.d: New file.
	* testsuite/ld-arc/nps-1b.d: New file.
	* testsuite/ld-arc/nps-1b.err: New file.

opcodes/ChangeLog:

	* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
	instructions.
	* arc-opc.c (insert_nps_cmem_uimm16): New function.
	(extract_nps_cmem_uimm16): New function.
	(arc_operands): Add NPS_XLDST_UIMM16 operand.
2016-04-14 17:16:46 +01:00
Claudiu Zissulescu f36e33dac1 Add support for .extCondCode, .extCoreRegister and .extAuxRegister.
gas/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/textauxregister.d: New file.
	* testsuite/gas/arc/textauxregister.s: Likewise.
	* testsuite/gas/arc/textcondcode.d: Likewise.
	* testsuite/gas/arc/textcondcode.s: Likewise.
	* testsuite/gas/arc/textcoreregister.d: Likewise.
	* testsuite/gas/arc/textcoreregister.s: Likewise.
	* testsuite/gas/arc/textpseudoop.d: Likewise.
	* testsuite/gas/arc/textpseudoop.s: Likewise.
	* testsuite/gas/arc/ld2.d: Update test.
	* testsuite/gas/arc/st.d: Likewise.
	* testsuite/gas/arc/taux.d: Likewise.
	* doc/c-arc.texi (ARC Directives): Add .extCondCode,
	.extCoreRegister and .extAuxRegister documentation.
	* config/tc-arc.c (arc_extcorereg): New function.
	(md_pseudo_table): Add .extCondCode, .extCoreRegister and
	.extAuxRegister pseudo-ops.
	(extRegister_t): New type.
	(ext_condcode, arc_aux_hash): New global variable.
	(find_opcode_match): Check for extensions.
	(preprocess_operands): Likewise.
	(md_begin): Add aux registers in a hash.
	(assemble_insn): Update use arc_flags member.
	(tokenize_extregister): New function.
	(create_extcore_section): Likewise.
	* config/tc-arc.h (MAX_FLAG_NAME_LENGHT): Increase to 10.
	(arc_flags): Delete code, add flgp.

include/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* opcode/arc.h (flag_class_t): Update.
	(ARC_OPCODE_NONE): Define.
	(ARC_OPCODE_ARCALL): Likewise.
	(ARC_OPCODE_ARCFPX): Likewise.
	(ARC_REGISTER_READONLY): Likewise.
	(ARC_REGISTER_WRITEONLY): Likewise.
	(ARC_REGISTER_NOSHORT_CUT): Likewise.
	(arc_aux_reg): Add cpu.

opcodes/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-dis.c (find_format): Check for extension flags.
	(print_flags): New function.
	(print_insn_arc): Update for .extCondCode, .extCoreRegister and
	.extAuxRegister.
	* arc-ext.c (arcExtMap_coreRegName): Use
	LAST_EXTENSION_CORE_REGISTER.
	(arcExtMap_coreReadWrite): Likewise.
	(dump_ARC_extmap): Update printing.
	* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
	(arc_aux_regs): Add cpu field.
	* arc-regs.h: Add cpu field, lower case name aux registers.

Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
2016-04-12 10:21:06 +02:00
Claudiu Zissulescu b99747aeed Add support for .extInstruction pseudo-op.
gas/
2016-04-04  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/textinsn-errors.d: New File.
	* testsuite/gas/arc/textinsn-errors.err: Likewise.
	* testsuite/gas/arc/textinsn-errors.s: Likewise.
	* testsuite/gas/arc/textinsn2op.d: Likewise.
	* testsuite/gas/arc/textinsn2op.s: Likewise.
	* testsuite/gas/arc/textinsn2op01.d: Likewise.
	* testsuite/gas/arc/textinsn2op01.s: Likewise.
	* testsuite/gas/arc/textinsn3op.d: Likewise.
	* testsuite/gas/arc/textinsn3op.s: Likewise.
	* doc/c-arc.texi (ARC Directives): Add .extInstruction
	documentation.
	* config/tc-arc.c (arcext_section): New variable.
	(arc_extinsn): New function.
	(md_pseudo_table): Add .extInstruction pseudo op.
	(attributes_t): New type.
	(suffixclass, syntaxclass, syntaxclassmod): New constant
	structures.
	(find_opcode_match): Remove arc_num_opcodes.
	(md_begin): Likewise.
	(tokenize_extinsn): New function.
	(arc_set_ext_seg): Likewise.
	(create_extinst_section): Likewise.

include/
2016-04-04  Claudiu Zissulescu  <claziss@synopsys.com>

	* opcode/arc.h (arc_num_opcodes): Remove.
	(ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
	(ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
	(ARC_SUFFIX_FLAG): Define.
	(flags_none, flags_f, flags_cc, flags_ccf): Declare.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.

opcodes/
2016-04-04  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
	Initialize.
	(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
	(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
	(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
	(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
	(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
	(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
	(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
	(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
	(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
	(arc_opcode arc_opcodes): Null terminate the array.
	(arc_num_opcodes): Remove.
	* arc-ext.h (INSERT_XOP): Define.
	(extInstruction_t): Likewise.
	(arcExtMap_instName): Delete.
	(arcExtMap_insn): New function.
	(arcExtMap_genOpcode): Likewise.
	* arc-ext.c (ExtInstruction): Remove.
	(create_map): Zero initialize instruction fields.
	(arcExtMap_instName): Remove.
	(arcExtMap_insn): New function.
	(dump_ARC_extmap): More info while debuging.
	(arcExtMap_genOpcode): New function.
	* arc-dis.c (find_format): New function.
	(print_insn_arc): Use find_format.
	(arc_get_disassembler): Enable dump_ARC_extmap only when
	debugging.

Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
2016-04-12 10:06:07 +02:00
Claudiu Zissulescu 8ddf6b2a13 [ARC] Fix support for double assist instructions.
opcodes/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

        * arc-regs.h: Add a new subclass field.  Add double assist
        accumulator register values.
        * arc-tbl.h: Use DPA subclass to mark the double assist
        instructions.  Use DPX/SPX subclas to mark the FPX instructions.
        * arc-opc.c (RSP): Define instead of SP.
        (arc_aux_regs): Add the subclass field.

include/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

        * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
        (ARC_FPUDA): Define.
        (arc_aux_reg): Add new field.

gas/
2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>

        * config/tc-arc.c (is_code_density_p): Compare directly the
        subclass field.
        (is_spfp_p, is_dpfp_p, is_spfp_p): Define.
        (check_cpu_feature): New function.
        (find_opcode_match): Use check_cpu_feature function.
        (preprocess_operands): Likewise.
        (md_parse_option): Use mfpuda, mdpfp, mspfp options.
        * testsuite/gas/arc/tdpfp.d: New file.
        * testsuite/gas/arc/tfpuda.d: Likewise.
        * testsuite/gas/arc/tfpx.s: Likewise.
2016-04-05 17:37:45 +02:00
Claudiu Zissulescu 094fb06395 [ARC] 24 bit reloc and overflow detection fix.
bfd/
2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>

	* elf32-arc.c (name_for_global_symbol): Changed assert.
	(get_replace_function): Created.:
	(struct arc_relocation_data): Changed to signed types.
	(defines S, L, P, PDATA): Casted to signed type.
	(defines SECTSTART, _SDA_BASE_, TLS_REL): Likewise.
	(PRINT_DEBUG_RELOC_INFO_BEFORE): Changed.
	(arc_do_relocation): Changed.

include/
2016-04-05  Cupertino Miranda  <cmiranda@synopsys.com>

	* opcode/arc-func.h (replace_bits24): Changed.
	(replace_bits24_be): Created.
2016-04-05 17:05:09 +02:00
Claudiu Zissulescu f2dd88387a [ARC] Add support for Quarkse opcodes.
gas/
2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

        * testsuite/gas/arc/ext2op.d: New file.
        * testsuite/gas/arc/ext2op.s: Likewise.
        * testsuite/gas/arc/ext3op.d: Likewise.
        * testsuite/gas/arc/ext3op.s: Likewise.

opcodes/
2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

        * arc-tbl.h (invld07): Remove.
        * arc-ext-tbl.h: New file.
        * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
        * arc-opc.c (arc_opcodes): Add ext-tbl include.

include/
2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

        * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
        (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
        (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
        (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
        (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
        (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
        (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
        (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
        (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
        (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
        (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
        (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
        (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
        (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
2016-03-29 14:49:22 +02:00
Trevor Saunders b9bb4a9356 make more variables const
gas/ChangeLog:

2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* config/tc-h8300.c (h8300_elf_section): Add const qualifiers.
	* config/tc-ia64.c (obj_elf_vms_common): Likewise.
	* config/tc-m68hc11.c (md_begin): Likewise.
	(print_opcode_list): Likewise.
	* config/tc-msp430.c (msp430_section): Likewise.
	* config/tc-score.c (struct s3_insn_to_dependency): Likewise.
	(s3_build_dependency_insn_hsh): Likewise.
	* config/tc-score7.c (struct s7_insn_to_dependency): Likewise.
	(s7_build_dependency_insn_hsh): Likewise.
	* config/tc-tic4x.c: Likewise.
	* config/tc-tic54x.c (tic54x_set_default_include): Likewise.
	(subsym_get_arg): Likewise.
	* config/tc-xtensa.c (struct suffix_reloc_map): Likewise.
	(get_directive): Likewise.
	(cache_literal_section): Likewise.
	* config/xtensa-relax.c: Likewise.
	* symbols.c (symbol_create): Likewise.
	(local_symbol_make): Likewise.
	(symbol_relc_make_expr): Likewise.

include/ChangeLog:

2016-03-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>

	* opcode/i960.h: Add const qualifiers.
	* opcode/tic4x.h (struct tic4x_inst): Likewise.
2016-03-22 19:16:06 -04:00
Andrew Burgess e23e8ebee3 arc/nps400: Add first nps400 instructions
Adds the first few nps400 instructions.

gas/ChangeLog:

	* testsuite/gas/arc/nps400-0.d: New file.
	* testsuite/gas/arc/nps400-0.s: New file.
	* testsuite/gas/arc/nps400-1.d: New file.
	* testsuite/gas/arc/nps400-1.s: New file.

include/ChangeLog:

	* opcodes/arc.h (insn_class_t): Add BITOP type.

opcodes/ChangeLog:

	* arc-nps400-tbl.h: New file.
	* arc-opc.c: Add top level comment.
	(insert_nps_3bit_dst): New function.
	(extract_nps_3bit_dst): New function.
	(insert_nps_3bit_src2): New function.
	(extract_nps_3bit_src2): New function.
	(insert_nps_bitop_size): New function.
	(extract_nps_bitop_size): New function.
	(arc_flag_operands): Add nps400 entries.
	(arc_flag_classes): Add nps400 entries.
	(arc_operands): Add nps400 entries.
	(arc_opcodes): Add nps400 include.
2016-03-21 16:44:50 +00:00
Andrew Burgess 1ae8ab4714 arc/opcodes: Use flag operand class to handle multiple flag matches
When parsing the operand instruction flags we don't currently detect the
case where multiple flags are provided from the same class set, these
will be accepted and the bit values merged together, resulting in the
wrong instruction being assembled.  For example:

    adc.n.eq r0,r0,r2

Will assemble without error, yet, upon disassembly, the instruction will
actually be:

    adc.c r0,r0,r2

In a later commit the concept of required flags will be introduced.
Required flags are just like normal instruction flags, except that they
must be present for the instruction to match.  Adding this will allow
for simpler instructions in the instruction table, and allow for more
sharing of operand extraction and insertion functions.

To solve both of the above issues (multiple flags being invalid, and
required flags), this commit reworks the flag class mechanism.
Currently the flag class is never used.  Each instruction can reference
multiple flag classes, each flag class has a class type and a set of
flags.  However, at present, the class type is never used.  The current
values identify the type of instruction that the flag will be used in,
but this is not required information.

Instead, this commit discards the old flag classes, and introduces 3 new
classes.  The first F_CLASS_NONE, is just a NULL marker value, and is
only used in the NULL marker flag class.  The other two flag classes are
F_FLAG_OPTIONAL, and F_FLAG_REQUIRED.

The class F_FLAG_OPTIONAL has the property that at most one of the flags
in the flag set for that class must be present in the instruction.  The
"at most" one means that no flags being present is fine.

The class F_FLAG_REQUIRED is not currently used, but will be soon.  With
this class, exactly one of the flags from this class must be present in
the instruction.  If the flag class contains a single flag, then of
course that flag must be present.  However, if the flag class contained
two or more, then one, and only one of them must be present.

gas/ChangeLog:

	* config/tc-arc.c (find_opcode_match): Move lnflg, and i
	declarations to start of block.  Reset code on all flags before
	attempting to match them.  Handle multiple hits on the same flag.
	Handle flag class.
	* testsuite/gas/arc/asm-errors.d: New file.
	* testsuite/gas/arc/asm-errors.err: New file.
	* testsuite/gas/arc/asm-errors.s: New file.

include/ChangeLog:

	* opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
	new classes instead.

opcodes/ChangeLog:

	* arc-opc.c (arc_flag_classes): Convert all flag classes to use
	the new class enum values.
2016-03-21 16:44:50 +00:00
Andrew Burgess 8699fc3e88 arc: Add nps400 machine type, and assembler flag.
This commit introduces the nps400 machine type as a variant of arc.
There's a new flag in the assembler to select this machine type.  All
other changes are just adding handling of the new machine type into the
relevant places.

The nps400 is an arc700 variant with some vendor specific instructions
added into the instruction set.  This commit does not add any of the new
instructions, this is just laying the groundwork for future commits.
However, in preparation for these new instructions a new opcode define for
nps400 has been added to include/opcode/arc.h, this new opcode define is
used in the assembler and disassembler along with the existing define
for arc700 such that when assembling and disassembling for nps400 the
user will have access to all arc700 instructions and all the nps400
vendor extension instructions.

bfd/ChangeLog:

	* archures.c (bfd_mach_arc_nps400): Define.
	* bfd-in2.h: Regenerate.
	* cpu-arc.c (arch_info_struct): New entry for nps400, renumber
	some existing entries to make space.
	* elf32-arc.c (arc_elf_object_p): Add nps400 case.
	(arc_elf_final_write_processing): Likewise.

binutils/ChangeLog:

	* readelf.c (decode_ARC_machine_flags): Handle nps400.

gas/ChangeLog:

	* config/tc-arc.c (cpu_types): Add nps400 entry.
	(check_zol): Handle nps400.

include/ChangeLog:

	* elf/arc.h (E_ARC_MACH_NPS400): Define.
	* opcode/arc.h (ARC_OPCODE_NPS400): Define.

opcodes/ChangeLog:

	* arc-dis.c (print_insn_arc): Handle nps400.
2016-03-21 16:44:49 +00:00
Andrew Burgess a9522a2168 arc: Remove EF_ARC_CPU_GENERIC constant.
The constant EF_ARC_CPU_GENERIC is defined in the include/elf/arc.h
file, and is used in a few places in binutils, however, this constant
should never make it into the elf header flags; we always set a valid
cpu type in the assembler, which should then be copied over during
linking.

There are some non-gnu arc compilers that don't write an architecture
type into the e_flags field, instead leaving the field as 0, which is
the EF_ARC_CPU_GENERIC value.  This non-gnu compiler uses the machine
type to distinguish between the old and newer arc architectures, setting
the machine type to EM_ARC_COMPACT for old arc600, arc601, and arc700
architectures, while using EM_ARC_COMPACT2 for newer arcem and archs
architectures.

Previously when displaying the machine flags for an older EM_ARC_COMPACT
machine, if the e_flags had not been filled in, then we relied on the
default case statement to display the message "Generic ARCompact", while
in the EM_ARC_COMPACT2 case we specifically handled EF_ARC_CPU_GENERIC
to print "ARC Generic", leaving the default case to print a message
about unrecognised cpu flag.

After this commit EF_ARC_CPU_GENERIC has been removed, for both machine
types EM_ARC_COMPACT and EM_ARC_COMPACT2 we now rely on the default case
statement to handle the situation where the e_flags has not been filled
in.  The message displayed is now "Unknown ARCompact" (for older arc
architectures) and "Unknown ARC" (for the newer architectures).  The
switch from "Generic" to "Unknown" in the message string is for clarity,
calling the file "Generic" can give the impression that the file is
compiled for a common sub-set of the architectures, and would therefore
run on any type of machine (or at least any type of new or old machine
depending on if the machine type is ARC or ARCv2).  However, this was
not what "Generic" meant, it really meant "Unknown", so that's what we
now say.

As part of the merging of the readelf flag reading code, I have unified
the strings used in displaying the ELF ABI.  This means that for older
arc machines (arc600, arc601, and arc700) the string used for the
original ABI, and ABIv2 have changed, the current ABIv3 remains the
same.  For the newer architectures (arcem and archs) the abi strings
remain unchanged in all cases.

bfd/ChangeLog:

	* elf32-arc.c (arc_elf_print_private_bfd_data): Remove use of
	EF_ARC_CPU_GENERIC.
	(arc_elf_final_write_processing): Don't bother setting cpu field
	in e_flags, this will have been set elsewhere.

binutils/ChangeLog:

	* readelf.c (get_machine_flags): Move arc processing into...
	(decode_ARC_machine_flags): ... new function.  Remove use of
	EF_ARC_CPU_GENERIC, change default case from "generic arc" to
	"unknown arc".  Merged ABI printing between two machine types.

gas/ChangeLog:

	* config/tc-arc.c (arc_select_cpu): Remove use of
	EF_ARC_CPU_GENERIC.

include/ChangeLog:

	* elf/arc.h (EF_ARC_CPU_GENERIC): Delete.  Update related comment.
2016-03-21 16:44:49 +00:00
Andrew Burgess c033458051 arc: Remove duplicated constant in include/elf/arc.h
In the include/elf/arc.h there are two constants that mask out the
machine architecture field.  One is used lots (EF_ARC_MACH_MSK), the
other is used only once (EF_ARC_MACH).  Remove EF_ARC_MACH.

bfd/ChangeLog:

	* elf32-arc.c (arc_elf_final_write_processing): Switch to using
	EF_ARC_MACH_MSK.

include/ChangeLog:

	* elf/arc.h (EF_ARC_MACH): Delete.
	(EF_ARC_MACH_MSK): Remove out of date comment.
2016-03-21 16:44:49 +00:00
Andrew Burgess 24740d83e4 arc/gas: default mach is arc700, initialised in md_begin
This commit restructures the selection of the default cpu/mach so that
the choice is made from md_begin (if the user has not provided a command
line choice).  This will reduce the amount of change needed in a later
patch.

At the request of Synopsys, the default architecture changes to ARC700
from this commit, previously the default was a non-existent
super-architecture that contained all instructions from all arc
variants.  There's some clean up associated with removing the default
merged architecture, and a small test fix now that the default is
ARC700.

binutils/ChangeLog:

	* testsuite/binutils-all/objdump.exp (cpus_expected): Add ARC700
	to the architecture list.

gas/ChangeLog:

	* config/tc-arc.c (arc_target): Delay initialisation until
	arc_select_cpu.
	(arc_target_name): Likewise.
	(arc_features): Likewise.
	(arc_mach_type): Likewise.
	(cpu_types): Remove "all" entry.
	(arc_select_cpu): New function, most of the content is from...
	(md_parse_option): ... here.  Call new arc_select_cpu.
	(md_begin): Call arc_select_cpu if needed, default is now arc700.

include/ChangeLog:

	* opcode/arc.h (ARC_OPCODE_BASE): Delete.

opcodes/ChangeLog:

	* arc-opc.c (BASE): Delete.
2016-03-21 16:44:49 +00:00
H.J. Lu 4c10bbaa09 Add -z noreloc-overflow option to x86-64 ld
Add -z noreloc-overflow command-line option to the x86-64 ELF linker to
disable relocation overflow check.  This can be used to avoid relocation
overflow check if there will be no dynamic relocation overflow at
run-time.

bfd/

	PR ld/19807
	* elf64-x86-64.c (elf_x86_64_relocate_section): Check
	no_reloc_overflow_check to diable R_X86_64_32/R_X86_64_32S
	relocation overflow check.

include/

	PR ld/19807
	* bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.

ld/

	PR ld/19807
	* Makefile.am (ELF_X86_DEPS): Add
	$(srcdir)/emulparams/reloc_overflow.sh.
	* Makefile.in: Regenerated.
	* NEWS: Mention -z noreloc-overflow.
	* ld.texinfo: Document -z noreloc-overflow.
	* emulparams/elf32_x86_64.sh: Source
	${srcdir}/emulparams/reloc_overflow.sh.
	* emulparams/elf_x86_64.sh: Likewise.
	* emulparams/reloc_overflow.sh: New file.
	* testsuite/ld-x86-64/pr19807-1.s: New file.
	* testsuite/ld-x86-64/pr19807-1a.d: Likewise.
	* testsuite/ld-x86-64/pr19807-1b.d: Likewise.
	* testsuite/ld-x86-64/pr19807-2.s: Likewise.
	* testsuite/ld-x86-64/pr19807-2a.d: Likewise.
	* testsuite/ld-x86-64/pr19807-2b.d: Likewise.
	* testsuite/ld-x86-64/pr19807-2c.d: Likewise.
	* testsuite/ld-x86-64/pr19807-2d.d: Likewise.
	* testsuite/ld-x86-64/pr19807-2e.d: Likewise.
	* testsuite/ld-x86-64/x86-64.exp: Run PR ld/19807 tests.
2016-03-15 11:07:54 -07:00
Claudiu Zissulescu 72f3b6aae7 [ARC] Allow non-instruction relocations within .text sections
bfd/
2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
	    Andrew Burgess  <andrew.burgess@embecosm.com>

	* elf32-arc.c (arc_bfd_get_32): Becomes an alias for bfd_get_32.
	(arc_bfd_put_32): Becomes an alias for bfd_put_32.
	(arc_elf_howto_init): Added assert to validate relocations.
	(get_middle_endian_relocation): Delete.
	(middle_endian_convert): New function.
	(ME): Redefine, now does nothing.
	(IS_ME): New define.
	(arc_do_relocation): Extend the attached 'ARC_RELOC_HOWTO'
	definition to call middle_endian_convert.  Add a new local
	variable and make use of this throughout. Added call to
	arc_bfd_get_8 and arc_bfd_put_8 for 8 bit relocations.

gas/
2016-03-08  Andrew Burgess  <andrew.burgess@embecosm.com>

	* testsuite/gas/arc/inline-data-1.d: New file.
	* testsuite/gas/arc/inline-data-1.s: New file.

include/
2016-03-08  Cupertino Miranda  <Cupertino.Miranda@synopsys.com>
	    Andrew Burgess  <andrew.burgess@embecosm.com>

	* elf/arc-reloc.def: Add a call to ME within the formula for each
	relocation that requires middle-endian correction.
2016-03-08 14:19:52 +01:00
Trevor Saunders f86f586366 Add const qualifiers at various places.
opcodes	* mcore-opc.h: Add const qualifiers.
	* microblaze-opc.h (struct op_code_struct): Likewise.
	* sh-opc.h: Likewise.
	* tic4x-dis.c (tic4x_print_indirect): Likewise.
	(tic4x_print_op): Likewise.

include	* opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
	* opcode/h8300.h (struct h8_opcode): Likewise.
	* opcode/hppa.h (struct pa_opcode): Likewise.
	* opcode/msp430.h: Likewise.
	* opcode/spu.h (struct spu_opcode): Likewise.
	* opcode/tic30.h (struct _register): Likewise.
	* opcode/tic4x.h (struct tic4x_register): Likewise.
	(struct tic4x_cond): Likewise.
	(struct tic4x_indirect): Likewise.
	(struct tic4x_inst): Likewise.
	* opcode/visium.h (struct reg_entry): Likewise.

gas	* config/tc-arc.c: Add const qualifiers.
	* config/tc-h8300.c (md_begin): Likewise.
	* config/tc-ia64.c (print_prmask): Likewise.
	* config/tc-msp430.c (msp430_operands): Likewise.
	* config/tc-nds32.c (struct suffix_name): Likewise.
	(struct nds32_parse_option_table): Likewise.
	(struct nds32_set_option_table): Likewise.
	(do_pseudo_pushpopm): Likewise.
	(do_pseudo_pushpop_stack): Likewise.
	(nds32_relax_relocs): Likewise.
	(nds32_flag): Likewise.
	(struct nds32_hint_map): Likewise.
	(nds32_find_reloc_table): Likewise.
	(nds32_match_hint_insn): Likewise.
	* config/tc-s390.c: Likewise.
	* config/tc-sh.c (get_specific): Likewise.
	* config/tc-tic30.c: Likewise.
	* config/tc-tic4x.c (tic4x_inst_add): Likewise.
	(tic4x_indirect_parse): Likewise.
	* config/tc-vax.c (vax_cons): Likewise.
	* config/tc-z80.c (struct reg_entry): Likewise.
	* config/tc-epiphany.c (md_assemble): Adjust.
	(epiphany_assemble): New function.
	(epiphany_elf_section_rtn): Call do_align directly.
	(epiphany_elf_section_text): Likewise.
	* config/tc-ip2k.c (ip2k_elf_section_rtn): Likewise.
	(ip2k_elf_section_text): Likewise.
	* read.c (do_align): Make it not static.
	* read.h (do_align): New prototype.
2016-03-07 15:16:28 +00:00
Cary Coutant 9b738e36e6 Fix datestamps on ChangeLog entries to read 2015 instead of 2016. 2016-03-04 14:19:12 -08:00
H.J. Lu 3f1f41f55f Add missing ChangeLog entries for commit 82838
Fix gold/testsuite/plugin_layout_with_alignment.sh permission.
2016-03-04 08:28:12 -08:00
Matthew Wahab 643afb90da [ARM] Add feature check for ARMv8.1 AdvSIMD instructions.
gas/
2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>

	* config/gas/tc-arm.c (fpu_neon_ext_v8_1): Restrict to the ARMv8.1 RDMA
	feature.
	(record_feature_use): New.
	(mark_feature_used): Use record_feature_use.
	(do_neon_qrdmlah): New.
	(insns): Use do_neon_qrdmlah for vqrdmlah and vqrdmlsh and
	variants.
	(arm_extensions): Put into alphabetical order.  Re-indent "simd"
	and "rdma" entries.  Fix the incorrect merge value for "+rdma".
	* testsuite/gas/arm/armv8-a+rdma-warning.d: New.
	* testsuite/gas/arm/armv8-a+rdma.d: Add assembler command line options.
	Make source file explicit.
	* testsuite/gas/arm/armv8-a+rdma.l: New.
	* testsuite/gas/arm/armv8-a+rdma.s: Remove .arch and .arch_extension
	directives.  Fix white-space.
	* testsuite/gas/arm/armv8_1-a+simd.d: New.

include/opcode
2016-03-04  Matthew Wahab  <matthew.wahab@arm.com>

	* arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
	(ARM_CPU_HAS_FEATURE): Add comment.

Change-Id: Ie19250e8fa50aed44e44ab40ff30b04b38bc1a3d
2016-03-04 11:32:04 +00:00
Evgenii Stepanov 95ecdfbfcb get_symbols() plugin API tweak to support --start-lib/--end-lib.
Let the plugin know that a file is not being included in the link by
returning LDPS_NO_SYMS from get_symbols().

include/
	* plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.

gold/
	* plugin.h (Pluginobj::get_symbol_resolution_info): Add version
	parameter.
	* plugin.cc (get_symbols_v3): New function.
	(Plugin::load): Add LDPT_GET_SYMBOLS_V3.
	(Pluginobj::get_symbol_resolution_info): Return LDPS_NO_SYMS when using
	new version.
2016-03-03 11:42:13 -08:00
H.J. Lu 11e5f1ec54 Add ChangeLog entries for PR ld/19645 2016-02-26 06:44:03 -08:00
H.J. Lu aec6b87e0b [x86] Resolve non-PIC undefweak symbols in executable
For i386 and x86-64, non-PIC references to undefined weak symbols are
resolved without dynamic relocation when creating executable.  Resolved
undefined weak symbols are removed from the dynamic symbol table in
executable.  One exception is on i386, we need resolved undefined weak
symbols in the dynamic symbol table in PIE if input relocatable files
contain branchs without PLT so that we can branch to 0 with dynamic
relocation in text section.

This makes behaviors of dynamic executable and position independent
executable predictable with mixed PIC and non-PIC references to undefined
weak symbols.  If all references to undefined weak symbols are PIC,
dynamic relocations against undefined weak symbols will be generated
in executable unless -z nodynamic-undefined-weak is passed to linker.

bfd/

	PR ld/19636
	PR ld/19704
	PR ld/19719
	* elf32-i386.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): New.
	(elf_i386_link_hash_entry): Add has_got_reloc and
	has_non_got_reloc.
	(elf_i386_link_hash_table): Add interp.
	(elf_i386_link_hash_newfunc): Initialize has_got_reloc and
	has_non_got_reloc.
	(elf_i386_copy_indirect_symbol): Copy has_got_reloc and
	has_non_got_reloc.
	(elf_i386_check_relocs): Set has_got_reloc and has_non_got_reloc.
	(elf_i386_fixup_symbol): New function.
	(elf_i386_pie_finish_undefweak_symbol): Likewise.
	(elf_i386_allocate_dynrelocs): Don't allocate space for dynamic
	relocations and discard relocations against resolved undefined
	weak symbols in executable.  Don't make resolved undefined weak
	symbols in executable dynamic.  Keep dynamic non-GOT/non-PLT
	relocation against undefined weak symbols in PIE.
	(elf_i386_size_dynamic_sections): Set interp to .interp section.
	(elf_i386_relocate_section): Don't generate dynamic relocations
	against resolved undefined weak symbols in PIE, except for
	R_386_PC32.
	(elf_i386_finish_dynamic_symbol): Keep PLT/GOT entries without
	dynamic PLT/GOT relocations for resolved undefined weak symbols.
	Don't generate dynamic relocation against resolved undefined weak
	symbol in executable.
	(elf_i386_finish_dynamic_sections): Call
	elf_i386_pie_finish_undefweak_symbol on all symbols in PIE.
	(elf_backend_fixup_symbol): New.
	* elf64-x86-64.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): New.
	(elf_x86_64_link_hash_entry): Add has_got_reloc and
	has_non_got_reloc.
	(elf_x86_64_link_hash_table): Add interp.
	(elf_x86_64_link_hash_newfunc): Initialize has_got_reloc and
	has_non_got_reloc.
	(elf_x86_64_copy_indirect_symbol): Copy has_got_reloc and
	has_non_got_reloc.
	(elf_x86_64_check_relocs): Set has_got_reloc and
	has_non_got_reloc.
	(elf_x86_64_fixup_symbol): New function.
	(elf_x86_64_pie_finish_undefweak_symbol): Likewise.
	(elf_x86_64_allocate_dynrelocs): Don't allocate space for dynamic
	relocations and discard relocations against resolved undefined
	weak symbols in executable.  Don't make resolved undefined weak
	symbols in executable dynamic.
	(elf_x86_64_size_dynamic_sections): Set interp to .interp section.
	(elf_x86_64_relocate_section): Check relocation overflow for
	dynamic relocations against unresolved weak undefined symbols.
	Don't generate dynamic relocations against resolved weak
	undefined symbols in PIE.
	(elf_x86_64_finish_dynamic_symbol): Keep PLT/GOT entries without
	dynamic PLT/GOT relocations for resolved undefined weak symbols.
	Don't generate dynamic relocation against resolved undefined weak
	symbol in executable.
	(elf_x86_64_finish_dynamic_sections): Call
	elf_x86_64_pie_finish_undefweak_symbol on all symbols in PIE.
	(elf_backend_fixup_symbol): New.

include/

	PR ld/19636
	PR ld/19704
	PR ld/19719
	* bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.

ld/

	PR ld/19636
	PR ld/19704
	PR ld/19719
	* Makefile.am (ELF_X86_DEPS): Add dynamic_undefined_weak.sh.
	* Makefile.in: Regenerated.
	* NEWS: Mention -z nodynamic-undefined-weak.
	* ld.texinfo: Document -z nodynamic-undefined-weak.
	* ldmain.c (main): Initialize dynamic_undefined_weak to -1.
	* emulparams/dynamic_undefined_weak.sh: New file.
	* emulparams/elf32_x86_64.sh: Source dynamic_undefined_weak.sh.
	* emulparams/elf_i386.sh: Likewise.
	* emulparams/elf_i386_be.sh: Likewise.
	* emulparams/elf_i386_chaos.sh: Likewise.
	* emulparams/elf_i386_ldso.sh: Likewise.
	* emulparams/elf_i386_vxworks.sh: Likewise.
	* emulparams/elf_iamcu.sh: Likewise.
	* emulparams/elf_k1om.sh: Likewise.
	* emulparams/elf_l1om.sh: Likewise.
	* emulparams/elf_x86_64.sh: Likewise.
	* emulparams/extern_protected_data.sh (PARSE_AND_LIST_OPTIONS):
	Append.
	(PARSE_AND_LIST_ARGS_CASE_Z): Likewise.
	* testsuite/ld-elf/pr19719a.c: New file.
	* testsuite/ld-elf/pr19719b.c: Likewise.
	* testsuite/ld-elf/pr19719c.c: Likewise.
	* testsuite/ld-elf/pr19719d.c: Likewise.
	* testsuite/ld-i386/pr19636-1.s: Likewise.
	* testsuite/ld-i386/pr19636-1a.d: Likewise.
	* testsuite/ld-i386/pr19636-1b.d: Likewise.
	* testsuite/ld-i386/pr19636-1c.d: Likewise.
	* testsuite/ld-i386/pr19636-1d-nacl.d: Likewise.
	* testsuite/ld-i386/pr19636-1d.d: Likewise.
	* testsuite/ld-i386/pr19636-1e.d: Likewise.
	* testsuite/ld-i386/pr19636-1f.d: Likewise.
	* testsuite/ld-i386/pr19636-1g.d: Likewise.
	* testsuite/ld-i386/pr19636-1h.d: Likewise.
	* testsuite/ld-i386/pr19636-1i.d: Likewise.
	* testsuite/ld-i386/pr19636-2.s: Likewise.
	* testsuite/ld-i386/pr19636-2a.d: Likewise.
	* testsuite/ld-i386/pr19636-2b.d: Likewise.
	* testsuite/ld-i386/pr19636-2c-nacl.d: Likewise.
	* testsuite/ld-i386/pr19636-2c.d: Likewise.
	* testsuite/ld-i386/pr19636-2d-nacl.d: Likewise.
	* testsuite/ld-i386/pr19636-2d.d: Likewise.
	* testsuite/ld-i386/pr19636-2e-nacl.d: Likewise.
	* testsuite/ld-i386/pr19636-2e.d: Likewise.
	* testsuite/ld-i386/pr19636-3.s: Likewise.
	* testsuite/ld-i386/pr19636-3a.d: Likewise.
	* testsuite/ld-i386/pr19636-3b.d: Likewise.
	* testsuite/ld-i386/pr19636-3c.d: Likewise.
	* testsuite/ld-i386/pr19636-3d.d: Likewise.
	* testsuite/ld-i386/pr19636-3e.d: Likewise.
	* testsuite/ld-i386/pr19636-3f.d: Likewise.
	* testsuite/ld-i386/pr19636-3g.d: Likewise.
	* testsuite/ld-i386/pr19636-4.s: Likewise.
	* testsuite/ld-i386/pr19636-4a.d: Likewise.
	* testsuite/ld-i386/pr19636-4b.d: Likewise.
	* testsuite/ld-i386/pr19636-4c.d: Likewise.
	* testsuite/ld-i386/pr19636-4d.d: Likewise.
	* testsuite/ld-i386/pr19704.out: Likewise.
	* testsuite/ld-i386/pr19704a.c: Likewise.
	* testsuite/ld-i386/pr19704b.c: Likewise.
	* testsuite/ld-x86-64/pr19636-1.s: Likewise.
	* testsuite/ld-x86-64/pr19636-1a.d: Likewise.
	* testsuite/ld-x86-64/pr19636-1b.d: Likewise.
	* testsuite/ld-x86-64/pr19636-1c.d: Likewise.
	* testsuite/ld-x86-64/pr19636-1d.d: Likewise.
	* testsuite/ld-x86-64/pr19636-1e.d: Likewise.
	* testsuite/ld-x86-64/pr19636-1f.d: Likewise.
	* testsuite/ld-x86-64/pr19636-1g.d: Likewise.
	* testsuite/ld-x86-64/pr19636-2.s: Likewise.
	* testsuite/ld-x86-64/pr19636-2a.d: Likewise.
	* testsuite/ld-x86-64/pr19636-2b.d: Likewise.
	* testsuite/ld-x86-64/pr19636-2c.d: Likewise.
	* testsuite/ld-x86-64/pr19636-2d-nacl.d: Likewise.
	* testsuite/ld-x86-64/pr19636-2d.d: Likewise.
	* testsuite/ld-x86-64/pr19636-2e.d: Likewise.
	* testsuite/ld-x86-64/pr19636-2f.d: Likewise.
	* testsuite/ld-x86-64/pr19636-2g.d: Likewise.
	* testsuite/ld-x86-64/pr19636-2h.d: Likewise.
	* testsuite/ld-x86-64/pr19636-2i.d: Likewise.
	* testsuite/ld-x86-64/pr19636-3.s: Likewise.
	* testsuite/ld-x86-64/pr19636-3a.d: Likewise.
	* testsuite/ld-x86-64/pr19636-3b.d: Likewise.
	* testsuite/ld-x86-64/pr19636-3c.d: Likewise.
	* testsuite/ld-x86-64/pr19636-3d.d: Likewise.
	* testsuite/ld-x86-64/pr19704.out: Likewise.
	* testsuite/ld-x86-64/pr19704a.c: Likewise.
	* testsuite/ld-x86-64/pr19704b.c: Likewise.
	* testsuite/ld-elf/shared.exp (mix_pic_and_non_pic): New.
	Run mix_pic_and_non_pic.
	* testsuite/ld-i386/i386.exp (undefined_weak): New.
	Run undefined_weak and PR ld/19636 tests.
	* testsuite/ld-x86-64/x86-64.exp: Likewise.
	* testsuite/ld-x86-64/pr13082-3b.d: Updated.
	* testsuite/ld-x86-64/pr13082-4b.d: Likewise.
2016-02-26 04:55:57 -08:00
Jiong Wang b8ec4e871e [ARM] Add FP16 feature extension for ARMv8.2 architecture
include/
  * opcode/arm.h (ARM_EXT2_FP16_INSN): New.

gas/
  * config/tc-arm.c (arm_ext_fp16): New.
  (arm_extensions): New entry for "fp16".
2016-02-19 14:27:23 +00:00
Claudiu Zissulescu 4670103e86 Add support for ARC instruction relaxation in the assembler.
gas/
2016-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot <jvanoirs@synopsys.com>

        * config/tc-arc.h (TC_FRAG_TYPE, TC_PCREL_ADJUST, MAX_INSN_ARGS)
        (MAX_INSN_FLGS, MAX_FLAG_NAME_LENGHT, TC_GENERIC_RELAX_TABLE):
        Define.
        (arc_flags, arc_relax_type): New structure.
        * config/tc-arc.c (FRAG_MAX_GROWTH, RELAX_TABLE_ENTRY)
	(RELAX_TABLE_ENTRY_MAX): New define.
        (relaxation_state, md_relax_table, arc_relaxable_insns)
	(arc_num_relaxable_ins): New variable.
	(rlx_operand_type, arc_rlx_types): New enums.
	(arc_relaxable_ins): New structure.
        (OPTION_RELAX): New option.
        (arc_insn): New relax member.
        (arc_flags): Remove.
        (relax_insn_p): New function.
        (apply_fixups): Likewise.
        (relaxable_operand): Likewise.
        (may_relax_expr): Likewise.
        (relaxable_flag): Likewise.
        (arc_pcrel_adjust): Likewise.
        (md_estimate_size_before_relax): Implement.
        (md_convert_frag): Likewise.
        (md_parse_option): Handle new mrelax option.
        (md_show_usage): Likewise.
        (assemble_insn): Set relax member.
        (emit_insn0): New function.
        (emit_insn1): Likewise.
        (emit_insn): Handle relaxation case.
	* NEWS: Mention the new relaxation option.
	* doc/c-arc.texi (ARC Options): Document new mrelax option.

gas/testsuite
2016-01-26  Claudiu Zissulescu  <claziss@synopsys.com>

        * gas/arc/relax-avoid1.d: New file.
        * gas/arc/relax-avoid1.s: Likewise.
        * gas/arc/relax-avoid2.d: Likewise.
        * gas/arc/relax-avoid2.s: Likewise.
        * gas/arc/relax-avoid3.d: Likewise.
        * gas/arc/relax-avoid3.s: Likewise.
	* gas/arc/relax-b.d: Likewise.
        * gas/arc/relax-b.s: Likewise.

include/opcode/
2016-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

        * arc.h (arc_opcode arc_relax_opcodes, arc_num_relax_opcodes):
        Declare.

opcodes/
2016-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
	    Janek van Oirschot  <jvanoirs@synopsys.com>

        * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
        variable.
2016-02-10 12:09:01 +00:00
Nick Clifton 609332f15c Fix compile time warnings building the binutils with a gcc6 compiler.
include	* opcode/metag.h (metag_scondtab): Mark as possibly unused.
	* opcode/nds32.h (nds32_r45map): Likewise.
	(nds32_r54map): Likewise.
	* opcode/visium.h (gen_reg_table): Likewise.
	(fp_reg_table, cc_table, opcode_table): Likewise.

bfd	* oasys.c (oasys_archive_p): Fix indentation.
	* elf32-nds32.c (nds32_elf_relax_section): Use an unsigned
	constant for left shifting.
2016-02-09 16:34:24 +00:00
Alan Modra 24f5f69a8a Fix macro redefinition error on Solaris
PR 16583
	* elf/common.h (AT_SUN_HWCAP): Undef before defining.
2016-02-09 13:11:16 +10:30
Nick Clifton c1d9289fef Fix the encoding of the MSP430's RRUX instruction.
PR target/19561
opcdoe	* msp430-dis.c (print_insn_msp430): Add a special case for
	decoding an RRC instruction with the ZC bit set in the extension
	word.

include	* opcode/msp430.h (IGNORE_CARRY_BIT): New define.
	(RRUX): Synthesise using case 2 rather than 7.

gas	* config/tc-msp430.c (msp430_operands): Remove case 7.  Use case 2
	to handle encoding of RRUX instruction.
	* testsuite/gas/msp430/msp430x.s: Add more tests of the extended
	shift instructions.
	* testsuite/gas/msp430/msp430x.d: Update expected disassembly.
2016-02-04 09:55:10 +00:00
John Baldwin f4ddf30f11 Add support to readelf for reading FreeBSD ELF core notes.
binutils/ChangeLog:

	* readelf.c (get_freebsd_elfcore_note_type): New
	(process_note): Add support for FreeBSD core notes.

include/ChangeLog:

	* elf/common.h (NT_FREEBSD_THRMISC): Define.
	(NT_FREEBSD_PROCSTAT_PROC): Define.
	(NT_FREEBSD_PROCSTAT_FILES): Define.
	(NT_FREEBSD_PROCSTAT_VMMAP): Define.
	(NT_FREEBSD_PROCSTAT_GROUPS): Define.
	(NT_FREEBSD_PROCSTAT_UMASK): Define.
	(NT_FREEBSD_PROCSTAT_RLIMIT): Define.
	(NT_FREEBSD_PROCSTAT_OSREL): Define.
	(NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
	(NT_FREEBSD_PROCSTAT_AUXV): Define.
2016-01-19 08:15:08 -08:00
Miranda Cupertino 34e967a5f3 Add PIC and TLS support to the ARC target.
bfd/ChangeLog:
	* arc-plt.def: New file.
	* arc-plt.h: Likewise.
	* elf32-arc.c (elf_arc_abs_plt0_entry, elf_arc_abs_pltn_entry,
		       elf_arcV2_abs_plt0_entry, elf_arcV2_abs_pltn_entry,
		       elf_arc_pic_plt0_entry, elf_arc_pic_pltn_entry,
		       elf_arcV2_pic_plt0_entry, elf_arcV2_pic_pltn_entry): Remove.
	(name_for_global_symbol): Added.
	(ADD_RELA): Helper to create dynamic relocs.
	(new_got_entry_to_list): Create a new got entry in linked list.
	(symbol_has_entry_of_type): Search for specific type of entry in
	list.
	(is_reloc_for_GOT): return FALSE for any TLS related relocs.
	(is_reloc_for_TLS, arc_elf_set_private_flags)
	(arc_elf_print_private_bfd_data, arc_elf_copy_private_bfd_data)
	(arc_elf_merge_private_bfd_data): New functions.
	(debug_arc_reloc): Cleaned debug info printing.
	(PDATA reloc): Changed not to perform address alignment.
	(reverse_me): Added. Fix for ARC_32 relocs.
	(arc_do_relocation): Return bfd_reloc_of when no relocation should
	occur.
	(arc_get_local_got_ents): Renamed from arc_get_local_got_offsets.
	Changed function to access an array of list of GOT entries instead
	of just an array of offsets.
	(elf_arc_relocate_section): Added support for PIC and TLS related relocations.
	(elf_arc_check_relocs): Likewise.
	(elf_arc_adjust_dynamic_symbol, elf_arc_finish_dynamic_symbol,
	(elf_arc_finish_dynamic_sections): Likewise
	(arc_create_dynamic_sections): Modified conditions to create
	dynamic sections.
	(ADD_SYMBOL_REF_SEC_AND_RELOC): New macro.
	(plt_do_relocs_for_symbol, relocate_plt_for_symbol)
	(relocate_plt_for_entry): Changed to support new way to define PLT
	related code.
	(add_symbol_to_plt): Likewise.
	(arc_elf_link_hash_table_create): New function.

include/ChangeLog:
	* elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
	(ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
	(ARC_TLS_LE_32): Fixed formula.
	(ARC_TLS_GD_LD): Use new special function.
	* opcode/arc-func.h: Changed all the replacement
	functions to clear the patching bits before doing an or it with the value
	argument.
2016-01-19 15:25:58 +00:00
Nick Clifton 9ae678af99 Use a 32-bit value to hold the section number in the internal COFF symbol structure.
PR ld/19440
inc	* coff/internal.h (internal_syment): Use int to hold section
	number.
	(N_UNDEF): Cast to int not short.
	(N_ABS): Likewise.
	(N_DEBUG): Likewise.
	(N_TV): Likewise.
	(P_TV): Likewise.

bfd	PR ld/19440
	* coff-rs6000.c (_bfd_xcoff_swap_sym_in): Sign extend external
	section number into internal section number.
	* coff64-rs6000.c (_bfd_xcoff64_swap_sym_in): Likewise.
	* coffswap.h (coff_swap_sym_in): Likewise.
	* peXXigen.c (_bfd_XXi_swap_sym_in): Likewise.
	* coffcode.h (_coff_bigobj_swap_sym_in): Make sure that internal
	section number field is big enough to hold the external value.
2016-01-18 15:58:47 +00:00
Nick Clifton 4849dfd8f4 Import changes made to files shared with the FSF GCC project.
Import the following changes from the GCC mainline:

	2015-11-13  Tsvetkova Alexandra  <aleksandra.tsvetkova@intel.com>

	* configure.ac: Enable libmpx by default.
	* configure: Regenerated.

	2015-11-19  Martin Liska  <mliska@suse.cz>

	* .gitignore: Add .clang-format to ignored files.
	* Makefile.tpl: Add clang-format.
	* Makefile.in: Regenerate.

	2015-12-01  Andreas Tobler  <andreast@gcc.gnu.org>

	PR libffi/65726
	* Makefile.def (lang_env_dependencies): Make libffi depend
	on cxx.
	* Makefile.in: Regenerate.

	2015-12-02  Ian Lance Taylor  <iant@google.com>

	PR go/66147
	* Makefile.tpl (HOST_EXPORTS): Add XGCC_FLAGS_FOR_TARGET.
	* Makefile.in: Regenerate.

	2015-12-17  Nathan Sidwell  <nathan@acm.org>

	* config/isl.m4 (ISL_CHECK_VERSION): Add gmp libs.
	* configure: Regenerate.

	2015-12-17  Sebastian Pop  <s.pop@samsung.com>

	* Makefile.in: Replace ISL with isl.
	* Makefile.tpl: Same.
	* config/isl.m4: Same.
	* configure.ac: Same.
	* contrib/download_prerequisites: Same.
	* configure: Regenerate.

	2016-01-01  Ben Elliston  <bje@gnu.org>

	* config.guess: Import version 2016-01-01.
	* config.sub: Likewise.

include	2016-01-07  Mike Frysinger  <vapier@gentoo.org>

	* longlong.h: Change !__SHMEDIA__ to
	(!defined (__SHMEDIA__) || !__SHMEDIA__).
	Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
2016-01-11 11:06:56 +00:00
Maciej W. Rozycki b31e480331 MIPS/include: opcode/mips.h: Add a summary of MIPS16 operand codes
include/
	* opcode/mips.h: Add a summary of MIPS16 operand codes.
2016-01-06 18:37:58 +00:00
Mike Frysinger b36c1ccb1f libiberty: {count,dup,write}argv: constify argv input slightly
Would be more useful if we could use "const char * const *", but there's
a long standing bug where gcc warns about incompatible pointers when you
try to pass in "char **".  We can at least constify the array itself as
gcc will not warn in that case.
2016-01-05 15:25:13 -05:00
Alan Modra 6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
Alan Modra 3499769a6a New 2016 binutils ChangeLog files
Note that this does not create bfd/doc/ChangeLog, */testsuite/ChangeLog
and include/*/ChangeLog files.
2016-01-01 22:59:42 +10:30
Alan Modra 4120fa118f binutils ChangeLog rotation 2016-01-01 22:59:17 +10:30
Alan Modra 331e61312e Fix assorted ChangeLog errors 2015-12-30 11:44:35 +10:30
Mickael Guene ac4c9b0459 Add support for ARM's NOREAD section flag.
include/elf
     * arm.h: Add arm SHF_ARM_NOREAD section flag.

bfd  * bfd-in2.h: Regenerate.
     * section.c: Add SEC_ELF_NOREAD.
     * elf32-arm.c (elf32_arm_post_process_headers): Only set
     PF_X attribute if a segment only contains section with
     SHF_ARM_NOREAD flag.
     (elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
     (elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
     to bfd flag.
     (elf32_arm_lookup_section_flags): New function to allow
     INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
     (elf32_arm_special_sections): Add special sections array
     to catch section prefix by '.text.noread' pattern.

ld/testsuite
     * ld-arm/arm-elf.exp: New tests.
     * ld-arm/thumb1-input-section-flag-match.d: New
     * ld-arm/thumb1-input-section-flag-match.s: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
     * ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
     * ld-arm/thumb1-noread-present-one-section.d: New
     * ld-arm/thumb1-noread-present-one-section.s: New
     * ld-arm/thumb1-noread-present-two-section.d: New
     * ld-arm/thumb1-noread-present-two-section.s: New

binutils
	* readelf.c (get_elf_section_flags): Add support for ARM specific
	section flags.
2015-12-22 14:12:35 +00:00
Christophe Lyon 0bef041426 Add forgotten ChangeLog updates for 72d98d16ed09584660d0cbb759d90f8dfeef2343:
2015-12-16  Mickael Guene <mickael.guene@st.com>

	bfd/
	* bfd-in2.h: Regenerate.
	* reloc.c: Add new relocations.
	* libbfd.h (bfd_reloc_code_real_names): Add new relocations
	display names.
	* elf32-arm.c (elf32_arm_howto_table_1): Add HOWTO for new
	relocations.
	(elf32_arm_reloc_map): Add bfd/arm mapping for new relocations.
	(elf32_arm_final_link_relocate): Implement new relocations
	resolution.

	gas/
	* doc/c-arm.texi: Add documentation about new directives
	* config/tc-arm.c (group_reloc_table): Add mapping between gas
	syntax and new relocations.
	(do_t_add_sub): Keep new relocations for add operand.
	(do_t_mov_cmp): Keep new relocations for mov operand.
	(insns): Use 'shifter operand with possible group relocation'
	operand parse code for movs operand.
	(md_apply_fix): Implement mov and add encoding when new
	relocations on them.
	(tc_gen_reloc): Add new relocations.
	(arm_fix_adjustable): Since offset has a limited range ([0:255])
	we disable adjust_reloc_syms() for new relocations.

	gas/testsuite/
	* gas/arm/adds-thumb1-reloc-local.d: New
	* gas/arm/adds-thumb1-reloc-local.s: New
	* gas/arm/movs-thumb1-reloc-local.d: New
	* gas/arm/movs-thumb1-reloc-local.s: New

	include/
	* elf/arm.h: Add new arm relocations.

	ld/testsuite/
	* ld-arm/arm-elf.exp (armelftests_common): Add new relocations
	tests.
	* ld-arm/thumb1-adds.d: New
	* ld-arm/thumb1-adds.s: New
	* ld-arm/thumb1-movs.d: New
	* ld-arm/thumb1-movs.s: New
2015-12-17 11:14:37 +01:00
Alan Modra bbb1afc89b Invoke aout N_* macros with pointer to struct internal_exec
No functional changes here.

BTW, some of these headers don't seem to be used anywhere:
include/aout/dynix3.h, include/aout/encap.h, include/aout/hp.h,
gas/config/aout_gnu.h

bfd/
	* aout-adobe.c: Invoke aout N_* macros with pointer to
	struct internal_exec.
	* aout-arm.c: Likewise.
	* aout-cris.c: Likewise.
	* aout-target.h: Likewise.
	* aout-tic30.c: Likewise.
	* aoutf1.h: Likewise.
	* aoutx.h: Likewise.
	* bout.c: Likewise.
	* freebsd.h: Likewise.
	* gen-aout.c: Likewise.
	* hp300hpux.c: Likewise.
	* i386aout.c: Likewise.
	* i386linux.c: Likewise.
	* i386lynx.c: Likewise.
	* i386mach3.c: Likewise.
	* i386os9k.c: Likewise.
	* libaout.h: Likewise.
	* m68klinux.c: Likewise.
	* m88kmach3.c: Likewise.
	* mipsbsd.c: Likewise.
	* netbsd.h: Likewise.
	* pc532-mach.c: Likewise.
	* pdp11.c: Likewise.
	* riscix.c: Likewise.
	* sparclinux.c: Likewise.
	* sparclynx.c: Likewise.
gas/
	* config/aout_gnu.h: Invoke aout N_* macros with pointer to
	struct internal_exec.
include/
	* bout.h: Invoke aout N_* macros with pointer to
	struct internal_exec.
	* os9k.h: Likewise.
include/aout/
	* adobe.h: Invoke aout N_* macros with pointer to
	struct internal_exec.
	* aout64.h: Likewise.
	* dynix3.h: Likewise.
	* encap.h: Likewise.
	* hp.h: Likewise.
	* hp300hpux.h: Likewise.
	* sun4.h: Likewise.
2015-12-01 13:40:05 +10:30
Rainer Orth 87746c154a Port libvtv to Solaris
libstdc++-v3:
	* acinclude.m4 (GLIBCXX_ENABLE_VTABLE_VERIFY) <solaris2*>: Use
	-Wl,-R in VTV_CXXLINKFLAGS.
	* configure: Regenerate.

	* testsuite/18_support/bad_exception/23591_thread-1.c: Use
	-fvtable-verify=none on Solaris 12+.

	libgcc:
	* Makefile.in (VTV_CFLAGS): New variable.
	(vtv_start$(objext), vtv_end$(objext), vtv_end$(objext))
	(vtv_start_preinit$(objext), vtv_end_preinit$(objext)): Use it.
	* config.host (*-*-solaris2*): Add t-crtstuff-pic to tmake_file.
	Add vtv_start.o, vtv_end.o, vtv_start_preinit.o, vtv_end_preinit.o
	to extra_parts if $enable_vtable_verify = yes.

	libvtv:
	* configure.tgt (*-*-solaris2.[1-9]*): Declare supported.
	* configure.ac: Call AC_USE_SYSTEM_EXTENSIONS.
	<*-*-solaris2*>: Check for init priority support.
	Check for getexecname, __fortify_fail, _obstack_begin.
	(VTV_NO_OBSTACK): New conditional.
	* configure: Regenerate.
	* Makefile.am [VTV_NO_OBSTACK] (obstack.c): Use new condition.
	Create empty config.h
	* Makefile.in: Regenerate.

	* vtv_rts.cc [HAVE_GETEXECNAME] (program_invocation_name): New
	variable.
	(read_section_offset_and_length) [HAVE_GETEXECNAME]: Set it.
	(dl_iterate_phdr_callback) [HAVE_GETEXECNAME]: Set it.

	(__fortify_fail): Wrap in HAVE___FORTIFY_FAIL
	[!HAVE___FORTIFY_FAIL]: Provide non-Cygwin implementation.

	(read_section_offset_and_length): Assert sh_size >= VTV_PAGE_SIZE.
	(iterate_modules): Fix typo.
	Use VTV_PAGE_SIZE.
	(dl_iterate_phdr_callback): Fix typo.
	Use VTV_PAGE_SIZE.
	(__VLTChangePermission): Fix typos.

	include:
	* vtv-change-permission.h (VTV_PAGE_SIZE) [__sun__ && __svr4__ &&
	__sparc__]: Define.

	gcc:
	* config/sol2.h (SUPPORTS_INIT_PRIORITY): Move up.
	(STARTFILE_VTV_SPEC, ENDFILE_VTV_SPEC): Define.
	(STARTFILE_SPEC): Use %(startfile_vtv).
	(ENDFILE_SPEC): Use %(endfile_vtv).
	(SUBTARGET_EXTRA_SPECS): Handle STARTFILE_VTV_SPEC,
	ENDFILE_VTV_SPEC.

	* gcc.c (LINK_COMMAND_SPEC): Move VTABLE_VERIFICATION_SPEC after %{L*}.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@230865 138bc75d-0d04-0410-961f-82ee72b054a4
2015-11-28 16:39:32 +00:00
Rich Felker f4936735c5 SH FDPIC backend support
gcc/ChangeLog
	* config.gcc: Handle --enable-fdpic.
	* config/sh/constraints.md (Ccl): New constraint.
	* config/sh/linux.h (SUBTARGET_LINK_EMUL_SUFFIX): Handle -mfdpic.
	* config/sh/sh-c.c (sh_cpu_cpp_builtins): Add __FDPIC__ and
	__SH_FDPIC__.
	* config/sh/sh-mem.cc (expand_block_move): Support FDPIC for calls
	to library functions.
	* config/sh/sh-protos.h (function_symbol_result): New struct.
	(function_symbol): Return function_symbol_result.
	(sh_get_fdpic_reg_initial_val, sh_load_function_descriptor): New
	declarations.
	* config/sh/sh.c (TARGET_ASM_INTEGER, sh_assemble_integer):
	Implement target hook.
 	(TARGET_CANNOT_FORCE_CONST_MEM, sh_cannot_force_const_mem_p):
	Likewise.
	(sh_option_override): Force -fPIC if FDPIC is in effect.
 	(sh_asm_output_addr_const_extra): Add UNSPEC_GOTFUNCDESC and
	UNSPEC_GOTOFFFUNCDESC cases.
	(prepare_move_operands): Use FDPIC initial GOT register for
	TLS-related GOT access; inhibit cross-section address offset
	constants for FDPIC.
	(sh_assemble_integer): New function.
	(sh_cannot_copy_insn_p): Inhibit copying insns that are FDPIC
	PC-relative call sites.
	(expand_ashiftrt): Adapt invocation of function_symbol.
	(sh_expand_prologue): Inhibit PC-relative GOT address load for
	FDPIC.
	(nonpic_symbol_mentioned_p): Add cases for UNSPEC_GOTFUNCDESC and
	UNSPEC_GOTOFFFUNCDESC.
	(legitimize_pic_address): Resolve function symbols to function
	descriptors for FDPIC.  Do not use GOT-relative addressing for
	local data that may be read-only on FDPIC.
	(sh_emit_storesi, sh_emit_storehi): New functions.
	(sh_trampoline_init): Generate FDPIC trampolines.
	(sh_function_ok_for_sibcall): Add TARGET_FDPIC check.
	(sh_expand_sym_label2reg): Don't assume sibcalls are local.
	(sh_output_mi_thunk): Generate FDPIC call.
	(function_symbol): Return function_symbol_result.  For
	SFUNC_STATIC on FDPIC, generate call site labels to use
	PC-relative addressing rather than GOT-relative addressing.
	(sh_conditional_register_usage): Make PIC register fixed and call used
	when FDPIC is in effect.
	(sh_legitimate_constant_p): Impose FDPIC
	constant constraints.
	(sh_cannot_force_const_mem_p, sh_load_function_descriptor)
	(sh_get_fdpic_reg_initial_val): New functions.
	* config/sh/sh.h (SUBTARGET_ASM_SPEC, SUBTARGET_LINK_EMUL_SUFFIX):
	Handle -mfdpic.
	(FDPIC_SELF_SPECS, SUBTARGET_DRIVER_SELF_SPECS)
	(PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
	(SH_OFFSETS_MUST_BE_WITHIN_SECTIONS_P): New macros.
	(DRIVER_SELF_SPECS): Add SUBTARGET_DRIVER_SELF_SPECS and
	FDPIC_SELF_SPECS.
	(TRAMPOLINE_SIZE): Select trampoline size for FDPIC.
	(ASM_PREFERRED_EH_DATA_FORMAT): Add EH format constraints for
	FDPIC.
	(ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): Handle FDPIC case.
	* config/sh/sh.md (UNSPEC_GOTFUNCDESC, UNSPEC_GOTOFFFUNCDESC): New
	constants.
	(calli_fdpic, call_valuei_fdpic, sibcalli_fdpic)
	(sibcalli_pcrel_fdpic, sibcall_pcrel_fdpic, sibcall_valuei_fdpic)
	(sibcall_valuei_pcrel_fdpic, sibcall_value_pcrel_fdpic)
	(sym2GOTFUNCDESC, symGOTFUNCDESC2reg, sym2GOTOFFFUNCDESC)
	(symGOTOFFFUNCDESC2reg): New patterns.
	(udivsi3_i1, udivsi3_i4, udivsi3_i4_single, udivsi3,
	*divsi_inv_call_combine, divsi3_i4, divsi3_i4_single, divsi3)
	(ashlsi3, ashlsi3_d_call, ashrsi3_n, lshrsi3, lshrsi3_d_call)
	(calli, call_valuei, call, call_value, sibcalli, sibcalli_pcrel)
	(sibcall_pcrel, sibcall, sibcall_valuei, sibcall_valuei_pcrel)
	(sibcall_value_pcrel, sibcall_value, GOTaddr2picreg, symGOT_load)
	(symGOTOFF2reg, block_move_real, block_lump_real)
	(block_move_real_i4, block_lump_real_i4): Add support for FDPIC
	calls.
	(mulsi3, ic_invalidate_line, initialize_trampoline, call_pop,
	call_value_pop): Adjust for new function_symbol signature.
	* config/sh/sh.opt (-mfdpic): New option.
	* doc/install.texi (Options specification): Document
	--enable-fdpic.
	* doc/invoke.texi (SH Options): Document -mfdpic.

include/ChangeLog:
	* longlong.h (udiv_qrnnd): Add FDPIC compatible version for SH.

libitm/ChangeLog:
	* config/sh/sjlj.S (_ITM_beginTransaction): Bypass PLT calling
	GTM_begin_transaction for compatibility with FDPIC.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@229438 138bc75d-0d04-0410-961f-82ee72b054a4
2015-11-28 16:39:31 +00:00
Iain Sandoe 35a88fa501 Fix PR63758 by using the _NSGetEnviron() API on Darwin
include/

	Roland McGrath  <roland@gnu.org>

	PR other/63758
	* environ.h: New file.

libiberty/

	Roland McGrath  <roland@gnu.org>
	Iain Sandoe  <iain@codesourcery.com>

	PR other/63758
	* pex-unix.c: Obtain the environment interface from settings in environ.h
	rather than in-line code.  Update copyright date.
	* setenv.c: Likewise.
	* xmalloc.c: Likewise.




git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228942 138bc75d-0d04-0410-961f-82ee72b054a4
2015-11-28 16:39:30 +00:00
Alan Modra e9f40d7d68 Modify obstack.[hc] to avoid having to include other gnulib files
Using the standard gnulib obstack source requires importing quite a
lot of other files from gnulib, and requires build changes.

include/
	PR gdb/17133
	* obstack.h (__attribute_pure__): Expand _GL_ATTRIBUTE_PURE.
libiberty/
	PR gdb/17133
	* obstack.c (__alignof__): Expand alignof_type from alignof.h.
	(obstack_exit_failure): Don't use exitfail.h.
	(_): Include libintl.h when HAVE_LIBINTL_H and nls enabled.
	Provide default.  Don't include gettext.h.
	(_Noreturn): Define.
	* obstacks.texi: Adjust node references to external libc info files.
2015-11-09 15:18:35 +10:30
Alan Modra 314dee8ea9 Copy gnulib obstack files
This copies obstack.[ch] from gnulib, and updates the docs.  The next
patch should be applied if someone repeats the import at a later date.

include/
	PR gdb/17133
	* obstack.h: Import current gnulib file.
libiberty/
	PR gdb/17133
	* obstack.c: Import current gnulib file.
	* obstacks.texi: Updated doc, from glibc's manual/memory.texi.
2015-11-09 15:12:45 +10:30
H.J. Lu caa65211bb Add "-z call-nop=PADDING" option to ld
The ld linker can transform indirect call to a locally defined function,
foo, via its GOT slot, to either "NOP call foo" or "call foo NOP" where
NOP is a 1-byte NOP padding.  This patch adds a "-z call-nop=PADDING"
option to x86 ld to control 1-byte NOP padding for x86 call instruction.
PADDING is one of prefix-addr, prefix-nop, suffix-nop, prefix-NUMBER or
suffix-NUMBER.

bfd/

	* elf32-i386.c (elf_i386_convert_load): Use call_nop_byte and
	check call_nop_as_suffix for 1-byte NOP padding to pad call.
	* elf64-x86-64.c (elf_x86_64_convert_load): Likewise.

include/

	* bfdlink.h (bfd_link_info): Add call_nop_as_suffix and
	call_nop_byte.

ld/

	* ld/ld.texinfo: Document "-z call-nop=PADDING" option.
	* emulparams/call_nop.sh: New file.
	* emulparams/elf_i386_be.sh: Source
	${srcdir}/emulparams/call_nop.sh.
	* emulparams/elf_i386_chaos.sh: Likewise.
	* emulparams/elf_i386_ldso.sh: Likewise.
	* emulparams/elf_i386_vxworks.sh: Likewise.
	* emulparams/elf_iamcu.sh: Likewise.
	* emulparams/elf_k1om.sh: Likewise.
	* emulparams/elf_l1om.sh: Likewise.
	* emulparams/elf_x86_64.sh: Likewise.
	* emultempl/elf32.em (gld${EMULATION_NAME}_before_parse): Set
	link_info.call_nop_byte if $CALL_NOP_BYTE isn't empty.

ld/testsuite/

	* ld-i386/call3.s: New file.
	* ld-i386/call3a.d: Likewise.
	* ld-i386/call3b.d: Likewise.
	* ld-i386/call3c.d: Likewise.
	* ld-i386/call3d.d: Likewise.
	* ld-i386/call3e.d: Likewise.
	* ld-i386/call3f.d: Likewise.
	* ld-i386/call3g.d: Likewise.
	* ld-i386/call3h.d: Likewise.
	* ld-i386/load1-nacl.d: Likewise.
	* ld-x86-64/call1.s: Likewise.
	* ld-x86-64/call1a.d: Likewise.
	* ld-x86-64/call1b.d: Likewise.
	* ld-x86-64/call1c.d: Likewise.
	* ld-x86-64/call1d.d: Likewise.
	* ld-x86-64/call1e.d: Likewise.
	* ld-x86-64/call1f.d: Likewise.
	* ld-x86-64/call1g.d: Likewise.
	* ld-x86-64/call1h.d: Likewise.
	* ld-x86-64/call1i.d: Likewise.
	* ld-x86-64/load1a-nacl.d: Likewise.
	* ld-x86-64/load1b-nacl.d: Likewise.
	* ld-x86-64/load1c-nacl.d: Likewise.
	* ld-x86-64/load1d-nacl.d: Likewise.
2015-10-22 04:56:39 -07:00
Nick Clifton 886a250647 New ARC implementation.
bfd	* archures.c: Remove support for older ARC. Added support for new
	ARC cpus (ARC600, ARC601, ARC700, ARCV2).
	* bfd-in2.h: Likewise.
	* config.bfd: Likewise.
	* cpu-arc.c: Likewise.
	* elf32-arc.c: Totally changed file with a refactored
	inplementation of the ARC port.
	* libbfd.h: Added ARC specific relocation types.
	* reloc.c: Likewise.

gas     * config/tc-arc.c: Revamped file for ARC support.
        * config/tc-arc.h: Likewise.
        * doc/as.texinfo: Add new ARC options.
        * doc/c-arc.texi: Likewise.

ld	* configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
	* emulparams/arcebelf_prof.sh: New file
	* emulparams/arcebelf.sh: Likewise.
	* emulparams/arceblinux_prof.sh: Likewise.
	* emulparams/arceblinux.sh: Likewise.
	* emulparams/arcelf_prof.sh: Likewise.
	* emulparams/arcelf.sh: Likewise.
	* emulparams/arclinux_prof.sh: Likewise.
	* emulparams/arclinux.sh: Likewise.
	* emulparams/arcv2elfx.sh: Likewise.
	* emulparams/arcv2elf.sh: Likewise.
	* emultempl/arclinux.em: Likewise.
	* scripttempl/arclinux.sc: Likewise.
	* scripttempl/elfarc.sc: Likewise.
	* scripttempl/elfarcv2.sc: Likewise
	* Makefile.am: Add new ARC emulations.
	* Makefile.in: Regenerate.
	* NEWS: Mention the new feature.

opcodes * arc-dis.c: Revamped file for ARC support
	* arc-dis.h: Likewise.
	* arc-ext.c: Likewise.
	* arc-ext.h: Likewise.
	* arc-opc.c: Likewise.
	* arc-fxi.h: New file.
	* arc-regs.h: Likewise.
	* arc-tbl.h: Likewise.

binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
	and ARCv2.
	(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
	(guess_is_rela): Likewise.
	(dump_relocations): Likewise.
	(is_32bit_abs_reloc): Likewise.
	(is_16bit_abs_reloc): Likewise.
	(is_none_reloc): Likewise.
	* NEWS: Mention the new feature.

include	* dis-asm.h (arc_get_disassembler): Correct declaration.
	* arc-reloc.def: Macro file with definition of all relocation
	types.
	* arc.h: Changed macros for the newly supported ARC cpus.  Altered
	enum defining the supported relocations.
	* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
	macro for EM_ARC_COMPACT2.
        * arc-func.h: New file.
        * arc.h: Likewise.
2015-10-07 14:20:19 +01:00
Nick Clifton 6899683948 Resync files in the binutils repository that are maintained in the gcc repository.
.	2015-08-23  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>

	PR libfortran/54572
	* Makefile.def: Make libgfortran depend on libbacktrace.
	* Makefile.in: Regenerate.

	2015-08-12  Tom de Vries  <tom@codesourcery.com>

	PR other/67092
	PR other/67098
	* configure.ac: Remove --with_host_libstdcxx support.
	* configure: Regenerate.

	2015-08-10  Thomas Schwinge  <thomas@codesourcery.com>
	    Jakub Jelinek  <jakub@redhat.com>

	* configure.ac (noconfigdirs): Don't add "target-libgomp" for target
	nvptx*-*-*.
	* configure: Regenerate.

include	2015-08-14  Pierre-Marie de Rodat  <derodat@adacore.com>

	* dwarf2.def (DW_AT_GNU_bias): New attribute.

	2015-08-14  Pierre-Marie de Rodat  <derodat@adacore.com>

	* dwarf2.def (DW_AT_GNU_numerator, DW_AT_GNU_denominator): New
	attributes.

libiberty  2015-08-15  Ian Lance Taylor  <iant@google.com>

	* cp-demangle.c (d_abi_tags): Preserve di->last_name across any
	ABI tags.
2015-09-30 17:55:16 +01:00
jamesbowman 71f4ed30fe FT32: define macros for instruction recognition.
Other places (e.g. the gdb stack unwinder) can use these instead of
hard-coded patterns.

[include/Changelog]

2015-09-26  James Bowman  <james.bowman@ftdichip.com>

	* opcode/ft32.h: Add instruction macros FT32_*()
2015-09-28 11:23:54 -07:00
Rich Felker 9b8b325a1f Add --no-dynamic-linker option to ld, for static PIE use
Inhibits output of .interp section in ELF executables.

include/
	* bfdlink.h (struct bfd_link_info): Add "nointerp" field.
bfd/
	* elflink.c (_bfd_elf_link_create_dynamic_sections): Don't create
	.interp when info->nointerp.
	(bfd_elf_size_dynamic_sections): Adjust assert.
	* elf32-arm.c (elf32_arm_size_dynamic_sections): Don't size .interp
	when info->nointerp.
	* elf32-bfin.c (elf32_bfinfdpic_size_dynamic_sections): Likewise.
	* elf32-cr16.c (_bfd_cr16_elf_size_dynamic_sections): Likewise.
	* elf32-cris.c (elf_cris_size_dynamic_sections): Likewise.
	* elf32-frv.c (elf32_frvfdpic_size_dynamic_sections): Likewise.
	* elf32-hppa.c (elf32_hppa_size_dynamic_sections): Likewise.
	* elf32-i370.c (i370_elf_size_dynamic_sections): Likewise.
	* elf32-i386.c (elf_i386_size_dynamic_sections): Likewise.
	* elf32-lm32.c (lm32_elf_size_dynamic_sections): Likewise.
	* elf32-m32r.c (m32r_elf_size_dynamic_sections): Likewise.
	* elf32-m68k.c (elf_m68k_size_dynamic_sections): Likewise.
	* elf32-metag.c (elf_metag_size_dynamic_sections): Likewise.
	* elf32-nds32.c (nds32_elf_size_dynamic_sections): Likewise.
	* elf32-nios2.c (nios2_elf32_size_dynamic_sections): Likewise.
	* elf32-or1k.c (or1k_elf_size_dynamic_sections): Likewise.
	* elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise.
	* elf32-s390.c (elf_s390_size_dynamic_sections): Likewise.
	* elf32-score.c (s3_bfd_score_elf_size_dynamic_sections): Likewise.
	* elf32-score7.c (s7_bfd_score_elf_size_dynamic_sections): Likewise.
	* elf32-sh.c (sh_elf_size_dynamic_sections): Likewise.
	* elf32-tic6x.c (elf32_tic6x_size_dynamic_sections): Likewise.
	* elf32-tilepro.c (tilepro_elf_size_dynamic_sections): Likewise.
	* elf32-vax.c (elf_vax_size_dynamic_sections): Likewise.
	* elf32-xtensa.c (elf_xtensa_size_dynamic_sections): Likewise.
	* elf64-alpha.c (elf64_alpha_size_dynamic_sections): Likewise.
	* elf64-hppa.c (elf64_hppa_size_dynamic_sections): Likewise.
	* elf64-ppc.c (ppc64_elf_size_dynamic_sections): Likewise.
	* elf64-s390.c (elf_s390_size_dynamic_sections): Likewise.
	* elf64-sh64.c (sh64_elf64_size_dynamic_sections): Likewise.
	* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Likewise.
	* elfnn-aarch64.c (elfNN_aarch64_size_dynamic_sections): Likewise.
	* elfnn-ia64.c (elfNN_ia64_size_dynamic_sections): Likewise.
	* elfxx-mips.c (_bfd_mips_elf_size_dynamic_sections): Likewise.
	* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Likewise.
	* elfxx-tilegx.c (tilegx_elf_size_dynamic_sections): Likewise.
ld/
	* ld.texinfo (--no-dynamic-linker): Document.
	* ldlex.h (enum option_values): Add OPTION_NO_DYNAMIC_LINKER.
	* lexsup.c (ld_options, parse_args): Handle --no-dynamic-linker.
2015-09-20 15:52:27 +09:30
Alan Modra 5f329d5b14 Reorder enum output_type for better code generation
Works around a gcc bug #67328 for the most commonly used of bfd_link_pic
and bfd_link_executable.

	* bfdlink.h (enum output_type): Reorder enum.
2015-08-23 23:21:48 +09:30
Alan Modra 64d94ba01a Remove link_info.pic
Adding type_pie to output_type allows us to remove link_info.pic and
with some reordering of the enum, produces better code.

include/
	* bfdlink.h (enum output_type): Delete type_executable, add type_pde
	and type_pie.  Reorder.
	(struct bfd_link_info): Delete pic field.
	(bfd_link_executable, bfd_link_pde, bfd_link_pie, bfd_link_pic): Adjust.
ld/
	* emultempl/aix.em: Don't set link_info.pic.
	* emultempl/pe.em: Likewise.
	* emultempl/pep.em: Likewise.
	* emultempl/sunos.em: Likewise.
	* lexsup.c (parse_args): Likewise.  Set type_pie for -pie.
	* plugin.c (set_tv_header <LDPT_LINKER_OUTPUT>): Simplify.
2015-08-19 12:53:54 +09:30
Alan Modra 3cbc1e5e68 Add bfd_link_pde, and simplify some tests of link_info.type
include/
	* bfdlink.h (bfd_link_pde): Define.
bfd/
	* elf-s390-common.c: Simplify expressions using
	bfd_linke_executable, bfd_link_pie and bfd_link_pic.
	* elf32-arm.c: Likewise.
	* elf32-bfin.c: Likewise.
	* elf32-frv.c: Likewise.
	* elf32-m68k.c: Likewise.
	* elf32-nios2.c: Likewise.
	* elf32-ppc.c: Likewise.
	* elf32-s390.c: Likewise.
	* elf32-sh.c: Likewise.
	* elf64-alpha.c: Likewise.
	* elf64-ppc.c: Likewise.
	* elf64-s390.c: Likewise.
	* elflink.c: Likewise.
2015-08-19 12:51:06 +09:30
H.J. Lu 0e1862bb40 Add output_type to bfd_link_info
The "shared" field in bfd_link_info is set for both DSO and and PIE.
There are separate fields for executable and relocatable outputs.  This
patch adds an "output_type" field:

enum output_type
{
  type_unknown = 0,
  type_executable,
  type_dll,
  type_relocatable
};

and a "pic" field to bfd_link_info to replace shared, executable and
relocatable fields so that we can use the "output_type" field to check
for output type and the "pic" field check if output is PIC.  Macros,
bfd_link_executable, bfd_link_dll, bfd_link_relocatable, bfd_link_pic
and bfd_link_pie, are provided to check for output features.

bfd/

	* bfd/aoutx.h: Replace shared, executable, relocatable and pie
	fields with bfd_link_executable, bfd_link_dll,
	bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
	* bfd/bout.c: Likewise.
	* bfd/coff-alpha.c: Likewise.
	* bfd/coff-arm.c: Likewise.
	* bfd/coff-i386.c: Likewise.
	* bfd/coff-i960.c: Likewise.
	* bfd/coff-m68k.c: Likewise.
	* bfd/coff-mcore.c: Likewise.
	* bfd/coff-mips.c: Likewise.
	* bfd/coff-ppc.c: Likewise.
	* bfd/coff-rs6000.c: Likewise.
	* bfd/coff-sh.c: Likewise.
	* bfd/coff-tic80.c: Likewise.
	* bfd/coff-x86_64.c: Likewise.
	* bfd/coff64-rs6000.c: Likewise.
	* bfd/coffgen.c: Likewise.
	* bfd/cofflink.c: Likewise.
	* bfd/ecoff.c: Likewise.
	* bfd/ecofflink.c: Likewise.
	* bfd/elf-bfd.h: Likewise.
	* bfd/elf-eh-frame.c: Likewise.
	* bfd/elf-ifunc.c: Likewise.
	* bfd/elf-m10200.c: Likewise.
	* bfd/elf-m10300.c: Likewise.
	* bfd/elf-s390-common.c: Likewise.
	* bfd/elf-vxworks.c: Likewise.
	* bfd/elf.c: Likewise.
	* bfd/elf32-arm.c: Likewise.
	* bfd/elf32-avr.c: Likewise.
	* bfd/elf32-bfin.c: Likewise.
	* bfd/elf32-cr16.c: Likewise.
	* bfd/elf32-cr16c.c: Likewise.
	* bfd/elf32-cris.c: Likewise.
	* bfd/elf32-crx.c: Likewise.
	* bfd/elf32-d10v.c: Likewise.
	* bfd/elf32-dlx.c: Likewise.
	* bfd/elf32-epiphany.c: Likewise.
	* bfd/elf32-fr30.c: Likewise.
	* bfd/elf32-frv.c: Likewise.
	* bfd/elf32-ft32.c: Likewise.
	* bfd/elf32-h8300.c: Likewise.
	* bfd/elf32-hppa.c: Likewise.
	* bfd/elf32-i370.c: Likewise.
	* bfd/elf32-i386.c: Likewise.
	* bfd/elf32-i860.c: Likewise.
	* bfd/elf32-ip2k.c: Likewise.
	* bfd/elf32-iq2000.c: Likewise.
	* bfd/elf32-lm32.c: Likewise.
	* bfd/elf32-m32c.c: Likewise.
	* bfd/elf32-m32r.c: Likewise.
	* bfd/elf32-m68hc11.c: Likewise.
	* bfd/elf32-m68hc1x.c: Likewise.
	* bfd/elf32-m68k.c: Likewise.
	* bfd/elf32-mcore.c: Likewise.
	* bfd/elf32-mep.c: Likewise.
	* bfd/elf32-metag.c: Likewise.
	* bfd/elf32-microblaze.c: Likewise.
	* bfd/elf32-moxie.c: Likewise.
	* bfd/elf32-msp430.c: Likewise.
	* bfd/elf32-mt.c: Likewise.
	* bfd/elf32-nds32.c: Likewise.
	* bfd/elf32-nios2.c: Likewise.
	* bfd/elf32-or1k.c: Likewise.
	* bfd/elf32-ppc.c: Likewise.
	* bfd/elf32-rl78.c: Likewise.
	* bfd/elf32-rx.c: Likewise.
	* bfd/elf32-s390.c: Likewise.
	* bfd/elf32-score.c: Likewise.
	* bfd/elf32-score7.c: Likewise.
	* bfd/elf32-sh-symbian.c: Likewise.
	* bfd/elf32-sh.c: Likewise.
	* bfd/elf32-sh64.c: Likewise.
	* bfd/elf32-spu.c: Likewise.
	* bfd/elf32-tic6x.c: Likewise.
	* bfd/elf32-tilepro.c: Likewise.
	* bfd/elf32-v850.c: Likewise.
	* bfd/elf32-vax.c: Likewise.
	* bfd/elf32-visium.c: Likewise.
	* bfd/elf32-xc16x.c: Likewise.
	* bfd/elf32-xstormy16.c: Likewise.
	* bfd/elf32-xtensa.c: Likewise.
	* bfd/elf64-alpha.c: Likewise.
	* bfd/elf64-hppa.c: Likewise.
	* bfd/elf64-ia64-vms.c: Likewise.
	* bfd/elf64-mmix.c: Likewise.
	* bfd/elf64-ppc.c: Likewise.
	* bfd/elf64-s390.c: Likewise.
	* bfd/elf64-sh64.c: Likewise.
	* bfd/elf64-x86-64.c: Likewise.
	* bfd/elflink.c: Likewise.
	* bfd/elfnn-aarch64.c: Likewise.
	* bfd/elfnn-ia64.c: Likewise.
	* bfd/elfxx-mips.c: Likewise.
	* bfd/elfxx-sparc.c: Likewise.
	* bfd/elfxx-tilegx.c: Likewise.
	* bfd/i386linux.c: Likewise.
	* bfd/linker.c: Likewise.
	* bfd/m68klinux.c: Likewise.
	* bfd/pdp11.c: Likewise.
	* bfd/pe-mips.c: Likewise.
	* bfd/peXXigen.c: Likewise.
	* bfd/reloc.c: Likewise.
	* bfd/reloc16.c: Likewise.
	* bfd/sparclinux.c: Likewise.
	* bfd/sunos.c: Likewise.
	* bfd/vms-alpha.c: Likewise.
	* bfd/xcofflink.c: Likewise.

include/

	* include/bfdlink.h (output_type): New enum.
	(bfd_link_executable): New macro.
	(bfd_link_dll): Likewise.
	(bfd_link_relocatable): Likewise.
	(bfd_link_pic): Likewise.
	(bfd_link_pie): Likewise.
	(bfd_link_info): Remove shared, executable, pie and relocatable.
	Add output_type and pic.

ld/

	* ld/ldctor.c: Replace shared, executable, relocatable and pie
	fields with bfd_link_executable, bfd_link_dll,
	bfd_link_relocatable, bfd_link_pic and bfd_link_pie.
	* ld/ldemul.c: Likewise.
	* ld/ldfile.c: Likewise.
	* ld/ldlang.c: Likewise.
	* ld/ldmain.c: Likewise.
	* ld/ldwrite.c: Likewise.
	* ld/lexsup.c: Likewise.
	* ld/pe-dll.c: Likewise.
	* ld/plugin.c: Likewise.
	* ld/emultempl/aarch64elf.em: Likewise.
	* ld/emultempl/aix.em: Likewise.
	* ld/emultempl/alphaelf.em: Likewise.
	* ld/emultempl/armcoff.em: Likewise.
	* ld/emultempl/armelf.em: Likewise.
	* ld/emultempl/avrelf.em: Likewise.
	* ld/emultempl/beos.em: Likewise.
	* ld/emultempl/cr16elf.em: Likewise.
	* ld/emultempl/elf-generic.em: Likewise.
	* ld/emultempl/elf32.em: Likewise.
	* ld/emultempl/genelf.em: Likewise.
	* ld/emultempl/generic.em: Likewise.
	* ld/emultempl/gld960.em: Likewise.
	* ld/emultempl/gld960c.em: Likewise.
	* ld/emultempl/hppaelf.em: Likewise.
	* ld/emultempl/irix.em: Likewise.
	* ld/emultempl/linux.em: Likewise.
	* ld/emultempl/lnk960.em: Likewise.
	* ld/emultempl/m68hc1xelf.em: Likewise.
	* ld/emultempl/m68kcoff.em: Likewise.
	* ld/emultempl/m68kelf.em: Likewise.
	* ld/emultempl/metagelf.em: Likewise.
	* ld/emultempl/mipself.em: Likewise.
	* ld/emultempl/mmo.em: Likewise.
	* ld/emultempl/msp430.em: Likewise.
	* ld/emultempl/nds32elf.em: Likewise.
	* ld/emultempl/needrelax.em: Likewise.
	* ld/emultempl/nios2elf.em: Likewise.
	* ld/emultempl/pe.em: Likewise.
	* ld/emultempl/pep.em: Likewise.
	* ld/emultempl/ppc32elf.em: Likewise.
	* ld/emultempl/ppc64elf.em: Likewise.
	* ld/emultempl/sh64elf.em: Likewise.
	* ld/emultempl/solaris2.em: Likewise.
	* ld/emultempl/spuelf.em: Likewise.
	* ld/emultempl/sunos.em: Likewise.
	* ld/emultempl/tic6xdsbt.em: Likewise.
	* ld/emultempl/ticoff.em: Likewise.
	* ld/emultempl/v850elf.em: Likewise.
	* ld/emultempl/vms.em: Likewise.
	* ld/emultempl/vxworks.em: Likewise.
2015-08-18 05:51:19 -07:00
H.J. Lu dd419f3aac Sync ansidecl.h with GCC
Sync with GCC
	2015-08-11  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* ansidecl.h (GCC_FINAL): New macro.
2015-08-12 05:02:21 -07:00
H.J. Lu 72f4393d8c Remove leading/trailing white spaces in ChangeLog 2015-07-24 04:16:47 -07:00
Jiong Wang 53e8fd0f07 [AArch64][1/3] Add R_AARCH64_P32_TLSLD_ADR_PREL21 in elf header 2015-07-16 15:38:32 +01:00
H.J. Lu dc2edb520a Sync longlong.h with GCC
Sync with GCC
	2014-10-28  Richard Henderson  <rth@redhat.com>

	* longlong.h [__alpha] (umul_ppmm): Disable for c++.
2015-07-14 09:18:16 -07:00
H.J. Lu d0270d8cb9 Sync hashtab.h, splay-tree.h with GCC
Sync with GCC
	2014-12-09  Trevor Saunders  <tsaunders@mozilla.com>

	* hashtab.h, splay-tree.h: Remove GTY markers.
2015-07-14 09:18:16 -07:00
H.J. Lu 4d6404f01d Sync ansidecl.h with GCC
Sync with GCC
	2015-03-02  Markus Trippelsdorf  <markus@trippelsdorf.de>

	PR target/65261
	* ansidecl.h (ATTRIBUTE_NO_SANITIZE_UNDEFINED): New macro.
2015-07-14 09:18:16 -07:00
Catherine Moore 3350cc01de 2015-07-09 Catherine Moore <clm@codesourcery.com>
include/
        * elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New.

        gas/
        * config/tc-mips.c (check_fpabi):  Handle
        VAL_GNU_MIPS_ABI_FP_NAN2008.

        binutils/
        * readelf.c (print_mips_fp_abi_value): Handle
        Val_GNU_MIPS_ABI_FP_NAN2008.

        ld/testsuite/
        * ld-mips-elf/attr-gnu-4-08.d: Update expected output.
        * ld-mips-elf/attr-gnu-4-09.d: New.
        * ld-mips-elf/attr-gnu-4-19.d: New.
        * ld-mips-elf/attr-gnu-4-29.d: New.
        * ld-mips-elf/attr-gnu-4-39.d: New.
        * ld-mips-elf/attr-gnu-4-49.d: New.
        * ld-mips-elf/attr-gnu-4-59.d: New.
        * ld-mips-elf/attr-gnu-4-69.d: New.
        * ld-mips-elf/attr-gnu-4-79.d: New.
        * ld-mips-elf/attr-gnu-4-89.d: New.
        * ld-mips-elf/attr-gnu-4-9.s: New.
        * ld-mips-elf/mips-elf.exp: Run new tests.
2015-07-09 08:26:10 -07:00
Denis Chertykov 328e7bfdde Define DIFF_EXPR_OK for avr target to allow PC relative difference relocation.
When generating relocation (tc_gen_reloc) 32 bit relocation fixup
is changed to new 32 bit PC relative relocation if the fixup has pc-relative
flag set.

bfd/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * elf32-avr.c: Add 32 bit PC relative relocation for AVR target.

gas/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * config/tc-avr.c (tc_gen_reloc): Change 32 bit relocation to
    32 bit PC relative and update offset if the fixup is pc-relative.
    * config/tc-avr.h (DIFF_EXPR_OK): Define to enable PC relative diff
    relocs.

gas/testsuite/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * gas/avr/pc-relative-reloc.d: New test for 32 bit pc relative reloc.
    * gas/avr/per-function-debugline.s: New test source.

include/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * elf/avr.h: Add new 32 bit PC relative relocation.

ld/testsuite/ChangeLog

2015-07-06  Pitchumani Sivanupandi <pitchumani.s@atmel.com>

    * ld-avr/gc-section-debugline.d: New test.
    * ld-avr/per-function-debugline.s: Source for new test.
2015-07-08 21:41:52 +03:00
Matthew Fortune a5499fa464 Add support for DT_MIPS_RLD_MAP_REL.
This tag makes it possible to access the debug map when debugging position
independent executables.

bfd/

	* elfxx-mips.c (_bfd_mips_elf_create_dynamic_sections): Use executable
	instead of !shared to indicate an application vs shared library.
	(_bfd_mips_elf_size_dynamic_sections): Likewise.
	(_bfd_mips_elf_finish_dynamic_sections): Handle DT_MIPS_RLD_MAP_REL.
	(_bfd_mips_elf_get_target_dtag): Likewise.

binutils/

	* readelf.c (get_mips_dynamic_type): Handle DT_MIPS_RLD_MAP_REL.

include/

	* elf/mips.h (DT_MIPS_RLD_MAP_REL): New macro.

ld/testsuite/

	* ld-mips-elf/pic-and-nonpic-3b.ad: Adjust for extra dynamic tag.
	* ld-mips-elf/pic-and-nonpic-4b.ad: Likewise.
	* ld-mips-elf/pic-and-nonpic-5b.ad: Likewise.
	* ld-mips-elf/pic-and-nonpic-6-n32.ad: Likewise.
	* ld-mips-elf/pic-and-nonpic-6-n64.ad: Likewise.
	* ld-mips-elf/pic-and-nonpic-6-o32.ad: Likewise.
	* ld-mips-elf/tlsdyn-o32-1.d: Likewise.
	* ld-mips-elf/tlsdyn-o32-1.got: Likewise.
	* ld-mips-elf/tlsdyn-o32-2.d: Likewise.
	* ld-mips-elf/tlsdyn-o32-2.got: Likewise.
	* ld-mips-elf/tlsdyn-o32-3.d: Likewise.
	* ld-mips-elf/tlsdyn-o32-3.got: Likewise.
	* ld-mips-elf/tlsdyn-o32.d: Likewise.
	* ld-mips-elf/tlsdyn-o32.got: Likewise.
	* ld-mips-elf/pie-n32.d: New file.
	* ld-mips-elf/pie-n64.d: Likewise.
	* ld-mips-elf/pie-o32.d: Likewise.
	* ld-mips-elf/pie.s: Likewise.
	* ld-mips-elf/mips-elf.exp: Add new tests.
2015-06-26 11:53:33 +01:00
Iain Buclaw f91ca6bc00 Sync libiberty from GCC, replaying updates to configure scripts 2015-06-24 21:43:02 +02:00
Nick Clifton bdc4de1b24 Stop "objdump -d" from disassembling past a symbolic address.
include	* dis-asm.h (struct disassemble_info): Add stop_vma field.

binuti  * objdump.c (disassemble_bytes): Set the stop_vma field in the
	disassemble_info structure when disassembling code sections with
	-d.
	* doc/binutils.texi (objdump): Document the discrepancy between -d
	and -D.

opcodes	* dis-buf.c (buffer_read_memory): Fail is stop_vma is set and the
	requested region lies beyond it.
	* bfin-dis.c (print_insn_bfin): Ignore sysop instructions when
	looking for 32-bit insns.
	* mcore-dis.c (print_insn_mcore): Disable stop_vma when reading
	data.
	* sh-dis.c (print_insn_sh): Likewise.
	* tic6x-dis.c (print_insn_tic6x): Disable stop_vma when reading
	blocks of instructions.
	* vax-dis.c (print_insn_vax): Check that the requested address
	does not clash with the stop_vma.

tests	* gas/arm/backslash-at.s: Add extra .byte directives so that the
	foo symbol does not appear to point half way through an
	instruction.
	* gas/arm/backslash-at.d: Update expected disassembly.
	* gas/i386/ilp32/x86-64-opcode-inval-intel.d: Likewise.
	* gas/i386/ilp32/x86-64-opcode-inval.d: Likewise.
	* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
	* gas/i386/x86-64-opcode-inval.d: Likewise.
2015-06-22 16:53:27 +01:00
Catherine Moore 2f0c68f23b Compact EH Support
The specification for the Compact EH format is available at:
https://github.com/MentorEmbedded/cxx-abi/blob/master/MIPSCompactEH.pdf

2015-05-28  Catherine Moore  <clm@codesourcery.com>
	    Bernd Schmidt <bernds@codesourcery.com>
	    Paul Brook <paul@codesourcery.com>

	bfd/
	* bfd-in2.h: Regenerated.
	* elf-bfd.h (DWARF2_EH_HDR, COMPACT_EH_HDR): Define.
	(COMPACT_EH_CANT_UNWIND_OPCODE): Define.
	(dwarf_eh_frame_hdr_info): Move dwarf-specific fields from
	eh_frame_hdr_info.
	(compact_eh_frame_hdr_info): Declare.
	(eh_frame_hdr_info):  Redeclare with union for dwarf-specific
	fields and compact-eh fields.
	(elf_backend_data): Add cant_unwind_opcode and compact_eh_encoding.
	(bfd_elf_section_data): Add eh_frame_entry_field.
	(elf_section_eh_frame_entry): Define.
	(bfd_elf_parse_eh_frame_entries): Declare.
	(_bfd_elf_parse_eh_frame_entry): Declare.
	(_bfd_elf_end_eh_frame_parsing): Declare.
	(_bfd_elf_write_section_eh_frame_entry): Declare.
	(_bfd_elf_eh_frame_entry_present): Declare.
	(_bfd_elf_section_for_symbol): Declare.
	* elf-eh-frame.c (bfd_elf_discard_eh_frame_entry): New function.
	(bfd_elf_record_eh_frame_entry): New function.
	(_bfd_elf_parse_eh_frame_entry): New function.
	(_bfd_elf_parse_eh_frame): Update hdr_info field references.
	(cmp_eh_frame_hdr): New function.
	(add_eh_frame_hdr_terminator): New function.
	(_bfd_elf_end_eh_frame_parsing): New function.
	(find_merged_cie): Update hdr_info field references.
	(_bfd_elf_discard_section_eh_frame): Likewise.
	(_bfd_elf_discard_section_eh_frame_hdr): Add Compact EH support.
	(_bfd_elf_eh_frame_entry_present): New function.
	(_bfd_elf_maybe_strip_eh_frame_hdr): Add Compact EH support.
	(_bfd_elf_write_section_eh_frame_entry): New function.
	(_bfd_elf_write_section_eh_frame): Update hdr_info field references.
	(_bfd_elf_fixup_eh_frame_hdr): New function.
	(write_compact_eh_frame_hdr): New function.
	(write_dwarf_eh_frame_hdr): New function.
	(_bfd_elf_write_section_eh_frame_hdr): Add Compact EH support.
	* elflink.c (_bfd_elf_section_for_symbol): New function.
	(elf_section_ignore_discarded_relocs): Add Compact EH support.
	(elf_link_input_bfd): Likewise.
	(bfd_elf_final_link): Likewise.
	(_bfd_elf_gc_mark): Likewise.
	(bfd_elf_parse_eh_frame_entries): New function.
	(bfd_elf_gc_sections): Add Compact EH support.
	(bfd_elf_discard_info): Likewise.
	* elfxx-mips.c: Include dwarf2.h.
	(_bfd_mips_elf_compact_eh_encoding): New function.
	(_bfd_mips_elf_cant_unwind_opcode): New function.
	* elfxx-mips.h (_bfd_mips_elf_compact_eh_encoding): Declare.
	(_bfd_mips_elf_cant_unwind_opcode): Declare.
	(elf_backend_compact_eh_encoding): Define.
	(elf_backend_cant_unwind_opcode): Define.
	* elfxx-target.h (elf_backend_compact_eh_encoding): Provide default.
	(elf_backend_cant_unwind_opcode): Provide default.
	(elf_backend_data elfNN_bed): Add elf_backend_compact_eh_encoding and
	elf_backend_cant_unwind_opcode.
	* section.c (SEC_INFO_TYPE_EH_FRAME_ENTRY): Add definition.

	gas/
	* config/tc-alpha.c (all_cfi_sections): Declare.
	(s_alpha_ent): Initialize all_cfi_sections.
	(alpha_elf_md_end): Invoke cfi_set_sections.
	* config/tc-mips.c (md_apply_fix):  Handle BFD_RELOC_NONE.
	(s_ehword): Use BFD_RELOC_32_PCREL.
	(mips_fix_adjustable): Handle BFD_RELOC_32_PCREL.
	(mips_cfi_reloc_for_encoding): New function.
	* tc-mips.h (DWARF2_FDE_RELOC_SIZE): Redefine.
	(DWARF2_FDE_RELOC_ENCODING): Define.
	(tc_cfi_reloc_for_encoding): Define.
	(mips_cfi_reloc_for_encoding): Define.
	(tc_compact_eh_opcode_stop): Define.
	(tc_compact_eh_opcode_pad): Define.
	* doc/as.texinfo: Document Compact EH extensions.
	* doc/internals.texi: Likewise.
	* dw2gencfi.c (EH_FRAME_LINKONCE): Redefine.
	(tc_cfi_reloc_for_encoding): Provide default.
	(compact_eh): Declare.
	(emit_expr_encoded): New function.
	(get_debugseg_name): Add Compact EH support.
	(alloc_debugseg_item): Likewise.
	(cfi_set_sections): New function.
	(dot_cfi_fde_data): New function.
	(dot_cfi_personality_id): New function.
	(dot_cfi_inline_lsda): New function.
	(cfi_pseudo_table): Add cfi_fde_data, cfi_personality_id,
	and cfi_inline_lsda.
	(dot_cfi_personality): Add Compact EH support.
	(dot_cfi_lsda): Likewise.
	(dot_cfi_sections): Likewise.
	(dot_cfi_startproc): Likewise.
	(get_cfi_seg): Likewise.
	(output_compact_unwind_data): New function.
	(output_cfi_insn): Add Compact EH support.
	(output_cie): Likewise.
	(output_fde): Likewise.
	(cfi_finish): Likewise.
	(cfi_emit_eh_header): New function.
	(output_eh_header): New function.
	* dw2gencfi.h (cfi_set_sections): Declare.
	(SUPPORT_COMPACT_EH): Define.
	(MULTIPLE_FRAME_SECTIONS): Define.
	New enumeration to describe the Compact EH header format.
	(fde_entry): Add new fields personality_id, eh_header_type, eh_data_size,
	eh_data, eh_loc and sections.
	(CFI_EMIT_eh_frame, CFI_EMIT_debug_frame, CFI_EMIT_target,
	CFI_EMIT_eh_frame_compact): Define.

2015-05-22  Catherine Moore  <clm@codesourcery.com>
	    Bernd Schmidt <bernds@codesourcery.com>

	gas/testsuite/
	* gas/mips/mips.exp: Run new tests.

	* gas/mips/compact-eh-1.s: New file.
	* gas/mips/compact-eh-2.s: New file.
	* gas/mips/compact-eh-3.s: New file.
	* gas/mips/compact-eh-4.s: New file.
	* gas/mips/compact-eh-5.s: New file.
	* gas/mips/compact-eh-6.s: New file.
	* gas/mips/compact-eh-7.s: New file.
	* gas/mips/compact-eh-eb-1.d: New file.
	* gas/mips/compact-eh-eb-2.d: New file.
	* gas/mips/compact-eh-eb-3.d: New file.
	* gas/mips/compact-eh-eb-4.d: New file.
	* gas/mips/compact-eh-eb-5.d: New file.
	* gas/mips/compact-eh-eb-6.d: New file.
	* gas/mips/compact-eh-eb-7.d: New file.
	* gas/mips/compact-eh-el-1.d: New file.
	* gas/mips/compact-eh-el-2.d: New file.
	* gas/mips/compact-eh-el-3.d: New file.
	* gas/mips/compact-eh-el-4.d: New file.
	* gas/mips/compact-eh-el-5.d: New file.
	* gas/mips/compact-eh-el-6.d: New file.
	* gas/mips/compact-eh-el-7.d: New file.
	* gas/mips/compact-eh-err1.l: New file.
	* gas/mips/compact-eh-err1.s: New file.
	* gas/mips/compact-eh-err2.l: New file.
	* gas/mips/compact-eh-err2.s: New file.

2015-05-22  Catherine Moore  <clm@codesourcery.com>

	include/
	* bfdlink.h: Rename eh_frame_hdr to eh_frame_hdr_type.

2015-05-22  Catherine Moore  <clm@codesourcery.com>
	    Paul Brook <paul@codesourcery.com>

	ld/
	* emultempl/elf32.em (gld${EMULATION_NAME}_after_open):
	Add Compact EH support.
	* scripttempl/elf.sc: Handle .eh_frame_entry and .gnu_extab
	sections.

2015-05-22  Catherine Moore  <clm@codesourcery.com>

	ld/testsuite/
	* ld-mips-elf/compact-eh.ld: New linker script.
	* ld-mips-elf/compact-eh1.d: New.
	* ld-mips-elf/compact-eh1.s: New.
	* ld-mips-elf/compact-eh1a.s: New.
	* ld-mips-elf/compact-eh1b.s: New.
	* ld-mips-elf/compact-eh2.d: New.
	* ld-mips-elf/compact-eh2.s: New.
	* ld-mips-elf/compact-eh3.d: New.
	* ld-mips-elf/compact-eh3.s: New.
	* ld-mips-elf/compact-eh3a.s: New.
	* ld-mips-elf/compact-eh4.d: New.
	* ld-mips-elf/compact-eh5.d: New.
	* ld-mips-elf/compact-eh6.d: New.
	* ld-mips-elf/mips-elf.exp: Run new tests.
2015-05-28 15:21:17 -07:00
Jiong Wang 15eddee17f [AArch64] Add R_AARCH64_P32_LD32_GOTPAGE_LO14 to elf header
2015-05-12  Jiong. Wang  <jiong.wang@arm.com>

include/
  * elf/aarch64.h (R_AARCH64_P32_LD32_GOTPAGE_LO14): New enumeration.
2015-05-12 13:47:15 +01:00
H.J. Lu f7d1355102 Sync filenames.h with gcc
Merge with gcc:
	2014-11-11  Anthony Brandon  <anthony.brandon@gmail.com>
		    Manuel López-Ibáñez  <manu@gcc.gnu.org>

	PR driver/36312
	* filenames.h: Add prototype for canonical_filename_eq.
2015-05-01 09:11:15 -07:00
DJ Delorie 0952813b0b Make RL78 disassembler and simulator respect ISA for mul/div
[gas]
	* config/rl78-defs.h (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.
	* config/rl78-parse.y (ISA_G10): New.
	(ISA_G13): New.
	(ISA_G14): New.
	(MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
	* config/tc-rl78.c (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.

[gdb]
	* rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to
	rl78_decode_opcode

[include]
	* dis-asm.h (print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.
	* opcode/rl78.h (RL78_Dis_Isa): New.
	(rl78_decode_opcode): Add ISA parameter.

[opcodes]
	* disassemble.c (disassembler): Choose suitable disassembler based
	on E_ABI.
	* rl78-decode.opc (rl78_decode_opcode): Take ISA parameter.  Use
	it to decode mul/div insns.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c (print_insn_rl78): Rename to...
	(print_insn_rl78_common): ...this, take ISA parameter.
	(print_insn_rl78): New.
	(print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.

[sim]
	* rl78/cpu.c (g14_multiply): New.
	* rl78/cpu.h (g14_multiply): New.
	* rl78/load.c (rl78_load): Decode ISA completely.
	* rl78/main.c (main): Expand -M to include other ISAs.
	* rl78/rl78.c (decode_opcode): Decode based on ISA.
	* rl78/trace.c (rl78_disasm_fn): New.
	(sim_disasm_init): Reset it.
	(sim_disasm_one): Get correct disassembler for ISA.
2015-04-30 15:25:49 -04:00
Richard Earnshaw a4ea36c6cb Merge include/partition.h from GCC.
2015-03-19  Richard Biener  <rguenther@suse.de>

		* partition.h (struct partition_elem): Re-order elements to
		avoid padding.
2015-04-17 16:13:43 +01:00
H.J. Lu 0ce398f106 Add --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]
This patch adds --compress-debug-sections=[none|zlib|zlib-gnu|zlib-gabi]
to ld for ELF targets to support generating compressed DWARF debug
sections.  We always generate .zdebug_* section since section names have
been finalized and they can't be changed easily when compression is
being performed.

bfd/

	* bfd-in.h (compressed_debug_section_type): New.
	* compress.c (bfd_compress_section_contents): Add an argument
	for linker write compression and always generate .zdebug_*
	section when linking.
	(bfd_init_section_compress_status): Pass FALSE to
	bfd_compress_section_contents.
	(bfd_compress_section): New function.
	* elf.c (elf_fake_sections): For linking, set SEC_ELF_COMPRESS
	on DWARF debug sections if COMPRESS_DEBUG is set and rename
	section if COMPRESS_DEBUG_GABI_ZLIB isn't set.
	(assign_file_positions_for_non_load_sections): Set sh_offset
	to -1 if SEC_ELF_COMPRESS is set.
	(assign_file_positions_except_relocs): Likwise.
	(_bfd_elf_assign_file_positions_for_relocs): Renamed to ...
	(_bfd_elf_assign_file_positions_for_non_load): This.  Change
	return time to bfd_boolean.  Compress the section if
	SEC_ELF_COMPRESS is set.
	(_bfd_elf_write_object_contents): Updated.
	(_bfd_elf_set_section_contents): Write section contents to
	the buffer if SEC_ELF_COMPRESS is set.
	* merge.c: Include "elf-bfd.h".
	(sec_merge_emit): Add arguments for contents and offset.  Write
	to contents with offset if contents isn't NULL.
	(_bfd_write_merged_section): Write section contents to the
	buffer if SEC_ELF_COMPRESS is set.  Pass contents and
	output_offset to sec_merge_emit.
	* elflink.c (bfd_elf_final_link): Allocate the buffer for
	output section contents if SEC_ELF_COMPRESS is set.
	* section.c (SEC_ELF_COMPRESS): New.
	* bfd-in2.h: Regenerated.

gas/

	* as.h (compressed_debug_section_type): Removed.

include/

	* bfdlink.h (bfd_link_info): Add compress_debug.

ld/

	* ld.texinfo: Document --compress-debug-sections=.
	* ldmain.c (main): Set BFD_COMPRESS on output_bfd if
	COMPRESS_DEBUG is set.  Set BFD_COMPRESS_GABI on output_bfd
	for COMPRESS_DEBUG_GABI_ZLIB.
	* lexsup.c (elf_static_list_options): Add
	--compress-debug-sections=.
	* emultempl/elf32.em (OPTION_COMPRESS_DEBUG): New.
	(xtra_long): Add "compress-debug-sections".
	(gld${EMULATION_NAME}_handle_option): Handle
	OPTION_COMPRESS_DEBUG.

ld/testsuite/

	* ld-elf/compress.exp (build_tests): Add tests for
	--compress-debug-sections=.
	(run_tests): Likewise.
	Add additonal tests for --compress-debug-sections=.
	* ld-elf/gabiend.rt: New file.
	* ld-elf/gabinormal.rt: Likewise.
	* ld-elf/gnubegin.rS: Likewise.
	* ld-elf/gnunormal.rS: Likewise.
	* ld-elf/zlibbegin.rS: Likewise.
	* ld-elf/zlibnormal.rS: Likewise.
2015-04-14 22:01:38 -07:00
H.J. Lu 889c2a6796 Add -z noextern-protected-data to ld for ELF/x86
Address of protected data defined in the shared library may be external,
i.e., due to copy relocation.  By default, linker backend checks if
relocations against protected data symbols are valid for building shared
library and issues an error if relocation isn't allowed.  The new option
override linker backend default.  When -z noextern-protected-data is used,
updates on protected data symbols by another module won't be visibile
to the resulting shared library.  This option is specific to ELF/i386
and ELF/x86-64.

bfd/

	PR ld/pr17709
	* elflink.c (_bfd_elf_adjust_dynamic_copy): Check
	info->extern_protected_data when warning copy relocs against
	protected symbols.
	(_bfd_elf_symbol_refs_local_p): Check info->extern_protected_data
	when checking protected non-function symbols.

include/

	PR ld/pr17709
	* bfdlink.h (bfd_link_info): Add extern_protected_data.

ld/

	PR ld/pr17709
	* ld.texinfo: Document "-z noextern-protected-data".
	* ldmain.c (main): Initialize link_info.extern_protected_data
	to -1.
	* lexsup.c (elf_shlib_list_options): Add
	"-z [no]extern-protected-data".
	* emulparams/elf32_x86_64.sh: Source extern_protected_data.sh.
	* emulparams/elf_i386.sh: Likewise.
	* emulparams/elf_i386_be.sh: Likewise.
	* emulparams/elf_i386_chaos.sh: Likewise.
	* emulparams/elf_i386_ldso.sh: Likewise.
	* emulparams/elf_i386_vxworks.sh: Likewise.
	* emulparams/elf_k1om.sh: Likewise.
	* emulparams/elf_l1om.sh: Likewise.
	* emulparams/elf_x86_64.sh: Source extern_protected_data.sh.
	(PARSE_AND_LIST_OPTIONS): Renamed to ...
	(PARSE_AND_LIST_OPTIONS_BNDPLT): This.
	(PARSE_AND_LIST_ARGS_CASE_Z): Renamed to ...
	(PARSE_AND_LIST_ARGS_CASE_Z_BNDPLT): This.
	(PARSE_AND_LIST_OPTIONS): Append $PARSE_AND_LIST_OPTIONS_BNDPLT.
	(PARSE_AND_LIST_ARGS_CASE_Z): Append
	$PARSE_AND_LIST_ARGS_CASE_Z_BNDPLT.
	* emulparams/extern_protected_data.sh: New file.

ld/testsuite/

	PR ld/pr17709
	* ld-i386/i386.exp: Run protected6b.
	* ld-i386/protected6b.d: New file.
	* ld-x86-64/protected6b.d: Likewise.
	* ld-x86-64/x86-64.exp:  Run protected6b.
2015-04-14 04:13:11 -07:00
Jiong Wang a5721eddd1 [ARM] PR ld/16572: Remove EF_ARM_HASENTRY flag
bfd/
2015-03-10  Yuri Gribov  <y.gribov@samsung.arm>

	PR ld/16572
	* elf32-arm.c (elf32_arm_final_link_relocate): Remove
	support for ELF_ARM_HASENTRY.
	(elf32_arm_print_private_bfd_data): Likewise.

binutils/
2015-03-10  Yuri Gribov  <y.gribov@samsung.arm>

	PR ld/16572
	* readelf.c: Remove support for ELF_ARM_HASENTRY.

include/
2015-03-10  Matthew Wahab  <matthew.wahab@arm.com>

	PR ld/16572
	* elf/arm.h (EF_ARM_HASENTRY): Remove.
2015-03-10 11:15:13 +00:00
Pedro Alves 07df97c857 floatformat.h: Wrap in extern "C"
Just like libiberty.h.  So that C++ programs, such as GDB when built
as a C++ program, can use it.

include/ChangeLog:
2015-02-19  Pedro Alves  <palves@redhat.com>

	* floatformat.h [__cplusplus]: Wrap in extern "C".
2015-02-19 22:44:44 +00:00
Alan Modra ce875075f9 PR ld/17973 LTO file syms
LTO output objects have an STT_FILE symbol using the name of the file,
a temporary file.  This results in executables that can't be exactly
reproduced, so the file name needs to be dropped.  We don't want to
lose all file symbols when linking a mix of lto and non-lto objects as
a file symbol can be used to figure which source file generated a
given local symbol.  So lto output objects need to be marked.

I chose to mark lto output objects with a new bfd flag.  This flag is
also used to fix a bug in the link-once handling;  An object being
loaded after "loading_lto_outputs" is set might be one extracted from
an archive to satisfy new references from lto objects, not an lto
object itself.

The new flag is copied from archive to elements, and the same done
for no_export.  This fixes a bug in that --exclude-libs doesn't work
with thin archives.  I'm not completely happy with this part of the
patch and may revist this to avoid the hack in
_bfd_look_for_bfd_in_cache.

	PR ld/17973
include/
	* bfdlink.h (struct bfd_link_info): Delete loading_lto_outputs.
bfd/
	* bfd.c (struct bfd): Add lto_output.
	* linker.c (_bfd_handle_already_linked): Explicitly test for
	objects added by the lto plugin.
	* opncls.c (_bfd_new_bfd_contained_in): Copy lto_output and
	no_export flags from archive.
	* archive.c (open_nested_file): New function, setting lto_output
	and no_export, extracted from..
	(find_nested_archive): ..here.  Flip params.  Rename from
	_bfd_find_nested_archive.
	(_bfd_get_elt_at_filepos): Correct var typo.  Use open_nested_file.
	(_bfd_look_for_bfd_in_cache): Copy no_export.
	* elflink.c (elf_link_add_object_symbols): Remove now unnecessary
	my_archive->no_export test.
	(elf_link_input_bfd): Drop existing lto_output STT_FILE syms.
	Don't use the file name when adding lto_output STT_FILE sym.
	* bfd-in2.h: Regenerate.
ld/
	* ldlang.h (struct lang_input_statement_flags): Add lto_output.
	* ldlang.c (lang_process): Don't set loading_lto_outputs.
	* ldfile.c (ldfile_try_open_bfd): Transfer entry flags.lto_output
	to bfd.
	* plugin.c (add_input_file, add_input_library): Set flags.lto_output.
2015-02-14 23:41:54 +10:30
Mark Wielaard 5a19504458 Recognize new DWARF5/GCC5 DW_LANG constants for Fortran 03 and Fortran 08.
DWARFv5 defines and GCC5 may output two new DW_LANG constants for the
Fortran 2003 and Fortran 2008 standards. Handle and display both in
binutils.

binutils/ChangeLog:

	* dwarf.c (read_and_display_attr_value): Handle DW_LANG_Fortran03
	and DW_LANG_Fortran08.

include/ChangeLog:

	* dwarf2.h: Add DW_LANG_Fortran03 and DW_LANG_Fortran08.

http://dwarfstd.org/ShowIssue.php?issue=141121.1
2015-02-10 09:07:25 +01:00
Mark Wielaard a2c2acaf15 GCC5/DWARFv5 Handle DW_TAG_atomic_type for C11 _Atomic type qualifier.
gdb/ChangeLog

	* c-typeprint.c (cp_type_print_method_args): Handle '_Atomic'.
	(c_type_print_modifier): Likewise.
	* dwarf2read.c (read_tag_atomic_type): New function.
	(read_type_die_1): Handle DW_TAG_atomic_type.
	* gdbtypes.c (make_atomic_type): New function.
	(recursive_dump_type): Handle TYPE_ATOMIC.
	* gdbtypes.h (enum type_flag_values): Renumber.
	(enum type_instance_flag_value): Add TYPE_INSTANCE_FLAG_ATOMIC.
	(TYPE_ATOMIC): New macro.
	(make_atomic_type): Declare.

gdb/testsuite/ChangeLog

	* gdb.dwarf2/atomic.c: New file.
	* gdb.dwarf2/atomic-type.exp: Likewise.

include/ChangeLog

	* dwarf2.def: Add DW_TAG_atomic_type.
2015-02-09 15:09:22 +01:00
Alan Modra 3f8107ab38 FT32 initial support
FT32 is a new 32-bit RISC core developed by FTDI for embedded applications.

	* configure.ac: Add FT32 support.
	* configure: Regenerate.
bfd/
	* Makefile.am: Add FT32 files.
	* archures.c (enum bfd_architecture): Add bfd_arch_ft32.
	(bfd_mach_ft32): Define.
	(bfd_ft32_arch): Declare.
	(bfd_archures_list): Add bfd_ft32_arch.
	* config.bfd: Handle FT32.
	* configure.ac: Likewise.
	* cpu-ft32.c: New file.
	* elf32-ft32.c: New file.
	* reloc.c (BFD_RELOC_FT32_10, BFD_RELOC_FT32_20, BFD_RELOC_FT32_17,
	BFD_RELOC_FT32_18): Define.
	* targets.c (_bfd_target_vector): Add ft32_elf32_vec.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
binutils/
	* readelf.c: Add FT32 support.
gas/
	* Makefile.am: Add FT32 files.
	* config/tc-ft32.c: New file.
	* config/tc-ft32.h: New file.
	* configure.tgt: Add FT32 support.
	* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
gas/testsuite/
	* gas/ft32/ft32.exp: New file.
	* gas/ft32/insn.d: New file.
	* gas/ft32/insn.s: New file.
include/
	* dis-asm.h (print_insn_ft32): Declare.
include/elf/
	* common.h (EM_FT32): Define.
	* ft32.h: New file.
include/opcode/
	* ft32.h: New file.
ld/
	* Makefile.am: Add FT32 files.
	* configure.tgt: Handle FT32 target.
	* emulparams/elf32ft32.sh: New file.
	* scripttempl/ft32.sc: New file.
	* Makefile.in: Regenerate.
opcodes/
	* Makefile.am: Add FT32 files.
	* configure.ac: Handle FT32.
	* disassemble.c (disassembler): Call print_insn_ft32.
	* ft32-dis.c: New file.
	* ft32-opc.c: New file.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/POTFILES.in: Regenerate.
2015-01-28 16:25:18 +10:30
Mark Wielaard 743649fd80 Use GCC5/DWARF5 DW_AT_noreturn to mark functions that don't return normally.
Add a flag field is_noreturn to struct func_type. Make calling_convention
a small bit field to not increase the size of the struct. Set is_noreturn
if the new GCC5/DWARF5 DW_AT_noreturn is set on a DW_TAG_subprogram.
Use this information to warn the user before doing a finish or return from
a function that does not return normally to its caller.

(gdb) finish
warning: Function endless does not return normally.
Try to finish anyway? (y or n)

(gdb) return
warning: Function does not return normally to caller.
Make endless return now? (y or n)

gdb/ChangeLog

	* dwarf2read.c (read_subroutine_type): Set TYPE_NO_RETURN from
	DW_AT_noreturn.
	* gdbtypes.h (struct func_type): Add is_noreturn field flag. Make
	calling_convention an 8 bit bit field.
	(TYPE_NO_RETURN): New macro.
	* infcmd.c (finish_command): Query if function does not return
	normally.
	* stack.c (return_command): Likewise.

gdb/testsuite/ChangeLog

	* gdb.base/noreturn-return.c: New file.
	* gdb.base/noreturn-return.exp: New file.
	* gdb.base/noreturn-finish.c: New file.
	* gdb.base/noreturn-finish.exp: New file.

include/ChangeLog

	* dwarf2.def (DW_AT_noreturn): New DWARF5 attribute.

The dwarf2.h addition and the code to emit the new attribute is already in
the gcc tree.
2015-01-23 17:29:19 +01:00
Jan-Benedict Glaw edabaaee81 Merge include/libiberty.h from GCC
This pulls in some missing prototypes and also adds corresponding entries
to the ChangeLog file. Please note that for one function, strverscmp(),
the ChangeLog entry was already there, but the actual prototype wasn't.

  These ChangeLog entries are added:

	2014-10-28  Yury Gribov  <y.gribov@samsung.com>

	       * libiberty.h (strtol, strtoul, strtoll, strtoull): New prototypes.

	2014-10-15  David Malcolm  <dmalcolm@redhat.com>

	       * libiberty.h (choose_tmpdir): New prototype.
2015-01-14 22:15:02 +01:00
Richard Earnshaw 7c89917ffa Sync with gcc/libiberty. 2015-01-07 17:34:29 +00:00
Alan Modra b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
Alan Modra 12b2843a6b Use a symbol flag bit to mark linker defined symbols
Trying to use the SEC_LINKER_CREATED section flag to determine whether
a symbol is linker defined fails to work on targets like alpha that
define special SEC_COMMON sections.  These might contain symbols that
originated in an object file.

include/
	* bfdlink.h (struct bfd_link_hash_entry): Comment non_ir_ref.  Add
	linker_def.
bfd/
	* elflink.c (_bfd_elf_define_linkage_sym): Set linker_def.
	* linker.c (_bfd_generic_link_add_one_symbol): Clear linker_def
	for CDEF, DEF, DEFW, COM.
ld/
	* ldexp.c (exp_fold_tree_1 <etree_provide>): Test linker_def.
ld/testsuite/
	* ld-powerpc/sdabase.s,
	* ld-powerpc/sdabase.t,
	* ld-powerpc/sdabase.d: New test.
	* ld-powerpc/sdabase2.t,
	* ld-powerpc/sdabase2.d: New test.
	* ld-powerpc/powerpc.exp: Run them.
2014-12-23 23:36:50 +10:30
Tom Tromey a92a2e3435 add gcc/gdb interface files
The gcc plugin is split into two parts.  One part is an ordinary gcc
plugin.  The other part is a shared library that is loaded by gdb.

This patch adds some files that define the interface exported by this
shared library to gdb.  These files also define the internal API by
which the gdb- and gcc-sides communicate.

These files will be kept in sync between gcc and gdb like much of
include/.

The exported API has been intentionally kept very simple.  In
particular only a single function is exported from the gdb-side
library; symbol visibility is used to hide everything else.  This
exported symbol is a function which is called to return a structure
holding function pointers that gdb then uses.  This structure is
versioned so that changes can be made without necessarily requiring a
simultaneous gdb upgrade.

Note that the C compiler API is broken out separately.  This lets us
extend it to other GCC front ends as desired.  We plan to investigate
C++ in the future.

include/ChangeLog
2014-12-12  Phil Muldoon  <pmuldoon@redhat.com>
	    Jan Kratochvil  <jan.kratochvil@redhat.com>
	    Tom Tromey  <tromey@redhat.com>

	* gcc-c-fe.def: New file.
	* gcc-c-interface.h: New file.
	* gcc-interface.h: New file.
2014-12-12 22:23:53 +01:00
Eric Botcazou 1945cfa59d Add Visium support to opcodes
include/
	* dis-asm.h (print_insn_visium): Declare.
include/opcode/
	* visium.h: New file.
opcodes/
	* configure.ac: Add Visium support.
	* configure: Regenerate.
	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add visium-dis.c and
	visium-opc.c.
	* Makefile.in: Regenerate.
	* disassemble.c (ARCH_visium): Define if ARCH_all.
	(disassembler): Deal with bfd_arch_visium if ARCH_visium.
	* visium-dis.c: New file.
	* visium-opc.c: Likewise.
	* po/POTFILES.in: Regenerate.
2014-12-06 16:25:55 +01:00