5f40e14d76
Fix the partial disassembly of a broken three byte instruction at the end of a function.
...
opcodes * i386-dis.c (print_insn): Fix decoding of three byte operands.
tests * gas/i386/intel.s: Add test of disassembly of a potential
three byte instuction at the end of a function.
* gas/i386/intel.d: Update expected disassembly.
2015-08-24 14:50:15 +01:00
d02603dc20
Allow symbol and label names to be enclosed in double quotes.
...
gas PR gas/18581
* expr.c (get_symbol_end): Rename to get_symbol_name. Add a
return parameter pointing to the start of the symbol. Allow
symbol names enclosed in double quotes.
(restore_line_pointer): New function. Replace the NUL character
inserted into the input stream with the given character. If the
character was a double quote, advance the input pointer.
* expr.h (get_symbol_end): Delete.
(get_symbol_name): Add prototype.
(restore_line_pointer): Prototype.
* read.h (SKIP_WHITESPACE_AFTER_NAME): New macro.
* doc/as.texinfo (Symbol Intro): Document that symbol names can
now be enclosed in double quotes.
* cond.c (s_ifdef): Replace get_symbol_end with get_symbol_name.
Use restore_line_pointer to replace the NUL in the input stream.
Use SKIP_WHITESPACE_AFTER_NAME to skip past the end of a symbol.
Check for the use of double quoted symbol names.
* expr.c: Likewise.
* config/obj-aout.c: Likewise.
* config/obj-coff-seh.c: Likewise.
* config/obj-coff.c: Likewise.
* config/obj-elf.c: Likewise.
* config/obj-evax.c: Likewise.
* config/obj-macho.c: Likewise.
* config/obj-som.c: Likewise.
* config/tc-alpha.c: Likewise.
* config/tc-arc.c: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-dlx.c: Likewise.
* config/tc-h8300.c: Likewise.
* config/tc-hppa.c: Likewise.
* config/tc-i370.c: Likewise.
* config/tc-i386-intel.c: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-iq2000.c: Likewise.
* config/tc-m32r.c: Likewise.
* config/tc-m68hc11.c: Likewise.
* config/tc-m68k.c: Likewise.
* config/tc-microblaze.c: Likewise.
* config/tc-mips.c: Likewise.
* config/tc-mmix.c: Likewise.
* config/tc-mn10200.c: Likewise.
* config/tc-mn10300.c: Likewise.
* config/tc-nios2.c: Likewise.
* config/tc-ppc.c: Likewise.
* config/tc-s390.c: Likewise.
* config/tc-score.c: Likewise.
* config/tc-score7.c: Likewise.
* config/tc-sparc.c: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-tic54x.c: Likewise.
* config/tc-tic6x.c: Likewise.
* config/tc-tilegx.c: Likewise.
* config/tc-tilepro.c: Likewise.
* config/tc-v850.c: Likewise.
* config/tc-xtensa.c: Likewise.
* config/tc-z80.c: Likewise.
* dw2gencfi.c: Likewise.
* dwarf2dbgc.: Likewise.
* ecoff.c: Likewise.
* read.c: Likewise.
* stabs.c: Likewise.
tests PR gas/18581
* gas/all/byte.d: Disable this test. Quoted expressions
are now allowed in .byte directives.
* gas/all/quoted-sym-names.s: New test.
* gas/all/quoted-sym-names.d: Expected output.
* gas/all/gas.exp: Run the new test.
2015-08-21 16:42:14 +01:00
ab4e4ed5da
PR binutils/18257: Properly decode x86/Intel mask instructions.
...
opcodes/
PR binutils/18257
* i386-dis.c: Use MOD_TABLE for most of mask instructions.
(MOD enum): Add MOD_VEX_W_0_0F41_P_0_LEN_1, MOD_VEX_W_1_0F41_P_0_LEN_1,
MOD_VEX_W_0_0F41_P_2_LEN_1, MOD_VEX_W_1_0F41_P_2_LEN_1,
MOD_VEX_W_0_0F42_P_0_LEN_1, MOD_VEX_W_1_0F42_P_0_LEN_1,
MOD_VEX_W_0_0F42_P_2_LEN_1, MOD_VEX_W_1_0F42_P_2_LEN_1,
MOD_VEX_W_0_0F44_P_0_LEN_1, MOD_VEX_W_1_0F44_P_0_LEN_1,
MOD_VEX_W_0_0F44_P_2_LEN_1, MOD_VEX_W_1_0F44_P_2_LEN_1,
MOD_VEX_W_0_0F45_P_0_LEN_1, MOD_VEX_W_1_0F45_P_0_LEN_1,
MOD_VEX_W_0_0F45_P_2_LEN_1, MOD_VEX_W_1_0F45_P_2_LEN_1,
MOD_VEX_W_0_0F46_P_0_LEN_1, MOD_VEX_W_1_0F46_P_0_LEN_1,
MOD_VEX_W_0_0F46_P_2_LEN_1, MOD_VEX_W_1_0F46_P_2_LEN_1,
MOD_VEX_W_0_0F47_P_0_LEN_1, MOD_VEX_W_1_0F47_P_0_LEN_1,
MOD_VEX_W_0_0F47_P_2_LEN_1, MOD_VEX_W_1_0F47_P_2_LEN_1,
MOD_VEX_W_0_0F4A_P_0_LEN_1, MOD_VEX_W_1_0F4A_P_0_LEN_1,
MOD_VEX_W_0_0F4A_P_2_LEN_1, MOD_VEX_W_1_0F4A_P_2_LEN_1,
MOD_VEX_W_0_0F4B_P_0_LEN_1, MOD_VEX_W_1_0F4B_P_0_LEN_1,
MOD_VEX_W_0_0F4B_P_2_LEN_1, MOD_VEX_W_0_0F91_P_0_LEN_0,
MOD_VEX_W_1_0F91_P_0_LEN_0, MOD_VEX_W_0_0F91_P_2_LEN_0,
MOD_VEX_W_1_0F91_P_2_LEN_0, MOD_VEX_W_0_0F92_P_0_LEN_0,
MOD_VEX_W_0_0F92_P_2_LEN_0, MOD_VEX_W_0_0F92_P_3_LEN_0,
MOD_VEX_W_1_0F92_P_3_LEN_0, MOD_VEX_W_0_0F93_P_0_LEN_0,
MOD_VEX_W_0_0F93_P_2_LEN_0, MOD_VEX_W_0_0F93_P_3_LEN_0,
MOD_VEX_W_1_0F93_P_3_LEN_0, MOD_VEX_W_0_0F98_P_0_LEN_0,
MOD_VEX_W_1_0F98_P_0_LEN_0, MOD_VEX_W_0_0F98_P_2_LEN_0,
MOD_VEX_W_1_0F98_P_2_LEN_0, MOD_VEX_W_0_0F99_P_0_LEN_0,
MOD_VEX_W_1_0F99_P_0_LEN_0, MOD_VEX_W_0_0F99_P_2_LEN_0,
MOD_VEX_W_1_0F99_P_2_LEN_0, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
MOD_VEX_W_1_0F3A33_P_2_LEN_0.
(vex_w_table): Replace terminals with MOD_TABLE entries for
most of mask instructions.
gas/testsuite
PR binutils/18257
* gas/i386/disassem.s: Add mask instructions with invalid ModR/M byte.
* gas/i386/x86-64-disassem.s: Likewise.
* gas/i386/disassem.d: Updated.
* gas/i386/x86-64-disassem.d: Likewise.
2015-08-21 14:48:05 +03:00
4c5625238c
[AArch64][5/6] GAS support TLSLD load/store relocation types
...
2015-08-19 Jiong Wang <jiong.wang@arm.com>
bfd/
* reloc.c: New entries, including
BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC.
BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-aarch64.c (reloc_table): New relocation types support for
dtprel_lo12.
(ldst_lo12_determine_real_reloc_type): Support
BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12,
BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12,
BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12,
BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12,
BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC.
(parse_operands): Likewise.
(md_apply_fix): Likewise
(aarch64_force_relocation): Likewise.
(process_movw_reloc_info): Likewise.
gas/testsuite/
* gas/aarch64/reloc-dtprel_lo12-ldst8.s: New testcase.
* gas/aarch64/reloc-dtprel_lo12_nc-ldstc.s: Likewise.
* gas/aarch64/reloc-dtprel_lo12-ldst16.s: Likewise.
* gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s: Likewise.
* gas/aarch64/reloc-dtprel_lo12-ldst32.s: Likewise.
* gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s: Likewise.
* gas/aarch64/reloc-dtprel_lo12-ldst64.s: Likewise.
* gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s: Likewise.
* gas/aarch64/reloc-dtprel_lo12-ldst8.d: New expectation file.
* gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise.
* gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise.
* gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise.
* gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise.
* gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise.
* gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise.
* gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
2015-08-19 16:54:39 +01:00
49df5539f9
[AArch64][3/6] GAS support TLSLD move/add relocation types
...
2015-08-19 Jiong Wang <jiong.wang@arm.com>
bfd/
* reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-aarch64.c (reloc_table): New relocation modifiers,
"dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
"dtprel_g1_nc", "dtprel_g2".
(md_apply_fix): Support new relocation types.
(aarch64_force_relocation): Likewise.
(process_movw_reloc_info): Likewise.
gas/testsuite/
* gas/aarch64/reloc-dtprel_g0.s: New testcase.
* gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
* gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
* gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
* gas/aarch64/reloc-dtprel_g1.s: Likewise.
* gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
* gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
* gas/aarch64/reloc-dtprel_g2.s: Likewise.
* gas/aarch64/reloc-dtprel_hi12.s: Likewise.
* gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
* gas/aarch64/reloc-dtprel_g0.d: New expectation file.
* gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
* gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
* gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
* gas/aarch64/reloc-dtprel_g1.d: Likewise.
* gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.
* gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
* gas/aarch64/reloc-dtprel_g2.d: Likewise.
* gas/aarch64/reloc-dtprel_hi12.d: Likewise.
* gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
2015-08-19 16:36:22 +01:00
13289c10e2
[AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
...
2015-08-19 Jiong Wang <jiong.wang@arm.com>
bfd/
* reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
gas/
* config/tc-aarch64.c (reloc_table): New relocation modifiers.
(md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
(aarch64_force_relocation): Likewise.
gas/testsuite/
* gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
* gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
* gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
* gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
2015-08-19 16:28:08 +01:00
db2ed2e0b9
Rationalize ARM .align
...
* gas/config/tc-arm.c (s_align): Delete.
(md_pseudo_table): Use s_align_ptwo for "align".
* gas/config/tc-arm.h (TC_ALIGN_ZERO_IS_DEFAULT): Define.
* read.c (s_align): Modify for TC_ALIGN_ZERO_IS_DEFAULT.
2015-08-17 09:05:54 +09:30
4ab90a7a90
Fixes for unpredictable nops and 26-bit versions of teq,tst,cmn,cmp.
...
opcodes * arm-dis.c (print_insn_arm): Disassembling for all targets V6
and higher with ARM instruction set will now mark the 26-bit
versions of teq,tst,cmn and cmp as UNPREDICTABLE.
(arm_opcodes): Fix for unpredictable nop being recognized as a teq.
test * gas/arm/nops.d: New.
* gas/arm/nops.s: New.
* gas/arm/inst.d: Changed expectation file for 26-bit teq,
tst, cmn and cmp.
2015-08-13 11:39:08 +01:00
19c2883a9b
gas 0f handling
...
_start:
.byte 0f-_start
0:
Fixes
..:2: Error: floating point number invalid
..:2: Error: junk at end of line, first unrecognized character is `_'
* expr.c (operand): Rewrite handling of operands starting with "0f".
If atof_generic only parses "-" or "+", treat as expression.
2015-08-13 16:06:20 +09:30
c14c7a8a61
gas 0b vs 0b0 vs 00b
...
* expr.c (integer_constant): Return O_absent expression if eol.
(operand): For targets with both LOCAL_LABELS_FB and
NUMBERS_WITH_SUFFIX set, treat "0b" not followed by binary
digits as a local label reference. Correct handling of 0b prefix.
If a suffix is not allowed, error on 0B.
2015-08-13 15:59:40 +09:30
9791c25049
Correct local label doc
...
* doc/as.texinfo (Local Labels): Allowed range of N in local
labels is non-negative integers, not positive integers.
2015-08-13 15:53:49 +09:30
b46824bd49
xtensa: add --auto-litpools option
...
Auto-litpools is the automated version of text-section-literals: literal
pool candidate frags are planted every N frags and during relaxation
they are turned into actual literal pools where literals are moved to
become reachable for their first reference by L32R instruction.
2015-08-12 David Weatherford <weath@cadence.com>
gas/
* config/tc-xtensa.c (struct litpool_frag, struct litpool_seg):
New structures.
(xtensa_maybe_create_literal_pool_frag): New function.
(litpool_seg_list, auto_litpools, auto_litpool_limit)
(litpool_buf, litpool_slotbuf): New static variables.
(option_auto_litpools, option_no_auto_litpools)
(option_auto_litpool_limit): New enum identifiers.
(md_longopts): Add entries for auto-litpools, no-auto-litpools
and auto-litpool-limit.
(md_parse_option): Handle option_auto_litpools,
option_no_auto_litpools and option_auto_litpool_limit.
(md_show_usage): Add help for --[no-]auto-litpools and
--auto-litpool-limit.
(xtensa_mark_literal_pool_location): Record a place for literal
pool with a call to xtensa_maybe_create_literal_pool_frag.
(get_literal_pool_location): Find highest priority literal pool
or convert candidate to literal pool when auto-litpools are used.
(xg_assemble_vliw_tokens): Create literal pool after jump
instruction.
(xtensa_check_frag_count): Create candidate literal pool every
auto_litpool_limit frags.
(xtensa_relax_frag): Add jump around literals to non-empty
literal pool.
(xtensa_move_literals): Estimate literal pool addresses and move
unreachable literals closer to their users, converting candidate
to literal pool if needed.
(xtensa_switch_to_non_abs_literal_fragment): Only emit error
about missing .literal_position in case auto-litpools are not
used.
* config/tc-xtensa.h (xtensa_relax_statesE): New relaxation
state: RELAX_LITERAL_POOL_CANDIDATE_BEGIN.
* doc/as.texinfo (Xtensa options): Document --auto-litpools and
--no-auto-litpools options.
* doc/c-xtensa.texi (Xtensa options): Likewise.
2015-08-12 Max Filippov <jcmvbkbc@gmail.com>
gas/testsuite/
* gas/xtensa/all.exp: Add auto-litpools to the list of xtensa
tests.
* gas/xtensa/auto-litpools.s: New file: auto-litpools test.
* gas/xtensa/auto-litpools.s: New file: auto-litpools test
result pattern.
2015-08-12 20:19:58 +03:00
40fc1451c6
[MIPS] Map 'move' to 'or'.
...
The MIPS assembly idiom 'move' now maps to the 'or' machine instruction. This
change affects microMIPS, MIPS32, MIPS64.
2015-08-12 Simon Dardis <simon.dardis@imgtec.com>
opcodes/
* micromips-opc.c (micromips_opcodes): Re-order table so that move
based on 'or' is first.
* mips-opc.c (mips_builtin_opcodes): Ditto.
bfd/
* elfxx-mips.c (STUB_MOVE): Change to use 'or' only.
(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry,
mips_n64_exec_plt0_entry, micromips_insn32_o32_exec_plt0_entry):
Update to use 'or' instead of 'addu/daddu'.
(_bfd_mips_elf_finish_dynamic_symbol): Update usage of STUB_MOVE.
(move_insns_32): Reorder table.
gas/
* config/tc-mips.c (move_register): Change to use 'or' only.
(s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Update to
use or for move.
gas/testsuite/
* gas/mips/elf-rel23.d: Update test.
* gas/mips/elf-rel23.d: Ditto.
* gas/mips/elf-rel23a.d: Ditto.
* gas/mips/elf-rel23b.d: Ditto.
* gas/mips/elf_e_flags1.d: Ditto.
* gas/mips/elf_e_flags2.d: Ditto.
* gas/mips/elf_e_flags3.d: Ditto.
* gas/mips/elf_e_flags4.d: Ditto.
* gas/mips/loc-swap-dis.d: Ditto.
* gas/mips/micromips-insn32.d: Ditto.
* gas/mips/micromips-noinsn32.d: Ditto.
* gas/mips/micromips-trap.d: Ditto.
* gas/mips/micromips.d: Ditto.
* gas/mips/mips-abi32-pic.d: Ditto.
* gas/mips/mips-abi32.d: Ditto.
* gas/mips/mips-gp32-fp32-pic.d: Ditto.
* gas/mips/mips-gp32-fp32.d: Ditto.
* gas/mips/mips-gp32-fp64-pic.d: Ditto.
* gas/mips/mips-gp32-fp64.d: Ditto.
* gas/mips/mips-gp64-fp32-pic.d: Ditto.
* gas/mips/mips-gp64-fp32.d: Ditto.
* gas/mips/mips-gp64-fp64-pic.d: Ditto.
* gas/mips/mips-gp64-fp64.d: Ditto.
* gas/mips/mipsr6@loc-swap-dis.d: Ditto.
* gas/mips/tls-o32.d: Ditto.
* gas/mips/uld2-eb.d: Ditto.
* gas/mips/uld2-el.d: Ditto.
* gas/mips/ulw2-eb-ilocks.d: Ditto.
* gas/mips/ulw2-eb.d: Ditto.
* gas/mips/ulw2-el-ilocks.d: Ditto.
* gas/mips/ulw2-el.d: Ditto.
* gas/mips/move.d: New test.
* gas/mips/move.s: Ditto.
* gas/mips/micromips32-move.d: Ditto.
* gas/mips/micromips32-move.s: Ditto.
* gas/mips/mips.exp: Run the new tests.
gold/
* mips.cc (plt0_entry_o32, plt0_entry_n32, plt0_entry_n64,
lazy_stub_normal_1, lazy_stub_normal_1_n64,
lazy_stub_normal_2, lazy_stub_normal_2_n64, lazy_stub_big,
lazy_stub_big_n64, lazy_stub_micromips32_normal_1_n64,
lazy_stub_micromips32_normal_2_n64, lazy_stub_micromips32_big,
lazy_stub_micromips32_big_n64): Update to use 'or' for move instead
of 'addu/daddu'.
ld/testsuite/
* ld-mips-elf/compressed-plt-1-n32-mips16.od: Update test.
* ld-mips-elf/compressed-plt-1-n32-umips.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-mips16-got.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-mips16-only.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-mips16-word.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-mips16.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-se.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-umips-got.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-umips-word.od: Ditto.
* ld-mips-elf/compressed-plt-1-o32-umips.od: Ditto.
* ld-mips-elf/jalx-2.dd: Ditto.
* ld-mips-elf/mips16-pic-3.dd: Ditto.
* ld-mips-elf/pic-and-nonpic-3a.dd: Ditto.
* ld-mips-elf/pic-and-nonpic-3b.dd: Ditto.
* ld-mips-elf/pic-and-nonpic-5b.dd: Ditto.
* ld-mips-elf/pic-and-nonpic-6-n32.dd: Ditto.
* ld-mips-elf/pic-and-nonpic-6-o32.dd: Ditto.
* ld-mips-elf/stub-dynsym-1-10000.d: Ditto.
* ld-mips-elf/stub-dynsym-1-2fe80.d: Ditto.
* ld-mips-elf/stub-dynsym-1-7fff.d: Ditto.
* ld-mips-elf/stub-dynsym-1-8000.d: Ditto.
* ld-mips-elf/stub-dynsym-1-fff0.d: Ditto.
* ld-mips-elf/tlsbin-o32.d: Ditto.
* ld-mips-elf/tlsdyn-o32-1.d: Ditto.
* ld-mips-elf/tlsdyn-o32-2.d: Ditto.
* ld-mips-elf/tlsdyn-o32-3.d: Ditto.
* ld-mips-elf/tlsdyn-o32.d: Ditto.
* ld-mips-elf/tlslib-o32.d: Ditto.
2015-08-12 17:10:22 +01:00
3739860c11
Remove trailing spaces in gas
2015-08-12 04:40:42 -07:00
70151fb54a
[AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
...
2015-08-11 Jiong Wang <jiong.wang@arm.com>
include/elf/
* aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define.
bfd/
* reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
gas/
* config/tc-aarch64.c (reloc_table): New relocation modifiers
"dtprel_lo12".
(md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
(aarch64_force_relocation): Likewise.
gas/testsuite/
* gas/aarch64/reloc-dtprel_lo12-1.s: New testcase.
* gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise.
* gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file.
* gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11 21:26:31 +01:00
a12fad50d2
[AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
...
2015-08-11 Jiong Wang <jiong.wang@arm.com>
bfd/
* reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC): New entry.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
gas/
* config/tc-aarch64.c (reloc_table): New relocation modifiers.
(md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
(aarch64_force_relocation): Likewise.
gas/testsuite/
* gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase.
* gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise.
* gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file.
* gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d: Likewise.
2015-08-11 21:25:51 +01:00
1107e076cf
[AArch64][2/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
...
2015-08-11 Jiong Wang <jiong.wang@arm.com>
bfd/
* reloc.c (BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21): New entry.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
gas/
* config/tc-aarch64.c (reloc_table): New relocation modifiers.
(md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
(aarch64_force_relocation): Likewise.
gas/testsuite/
* gas/aarch64/reloc-tlsldm-page-1.s: New testcase.
* gas/aarch64/reloc-tlsldm-page-ilp32-1.s: Likewise.
* gas/aarch64/reloc-tlsldm-page-1.d: New expectation file.
* gas/aarch64/reloc-tlsldm-page-ilp32-1.d: Likewise.
2015-08-11 21:24:38 +01:00
eff0bc54a3
Fix compile time warning messages about constant expressions where a value is being shifted into bit 31.
...
PR gas/18765
* config/tc-arm.c (move_or_literal_pool): Use U suffix to remove
compile time warnings about constant expressions being shifted
into bit 31.
(do_iwmmxt_wldstd): Likewise.
(do_iwmmxt_wrwrwr_or_imm5): Likewise.
(md_assemble): Likewise.
2015-08-11 10:07:21 +01:00
e66c3c2568
Convert 'A && (!A || B)' to 'A || B' in various places.
...
PR gas/18574
* config/tc-msp430.c (msp430_operands): Rewrite if statements to
remove redundant checks.
(md_apply_fix): Likewise.
2015-08-11 09:49:18 +01:00
d29b2a1ece
Fix typo checking MMIX operands.
...
PR gas/18677
* config/tc-mmix.c (md_assemble): Fix typo checking operands with
a numeric constant value.
2015-08-11 09:43:16 +01:00
88fd0449a3
Fix typo checking number of operands.
...
PR gas/18678
* config/tc-tic4x.c (tic4x_insn_check): Fix typo.
2015-08-11 09:40:02 +01:00
2b29bb41d5
Fix a typo where the same name was checked twice.
...
PR gas/18679
* config/xtensa-relax.c (same_operand_name): Fix typo.
2015-08-11 09:36:57 +01:00
75fb7498c2
Add SIGRIE instruction for MIPS R6
...
opcodes/
* mips-opc.c (mips_builtin_opcodes): Add "sigrie".
gas/testsuite/
* gas/mips/r6.s: Add tests for "sigrie".
* gas/mips/r6.d: Check for "sigrie".
* gas/mips/r6-n32.d: Likewise.
* gas/mips/r6-n64.d: Likewise.
2015-08-10 09:14:07 +01:00
8fe3f3d6af
tc-arm.c: Append ULL to 0xFFFFFFFFFFFFF to avoid errors on 32-bit hosts.
2015-08-08 22:44:37 +02:00
edc66de9a5
2015-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
...
* doc/c-aarch64.texi (.xword): Document directive.
2015-08-04 09:39:42 +08:00
d60646b958
Fix thinkos in the description of the --hash-size command line option for GAS.
...
* doc/as.texinfo (Overview): Add --hash-size to the synopsis and
fix typo in its entry: @kindex -> @item.
2015-08-03 09:19:00 +01:00
a8484f9612
Properly disassemble movnti in Intel mode
...
gas/testsuite/
PR binutils/13571
* gas/i386/i386.exp: Run i386-intel and x86_64-intel.
* gas/i386/i386-intel.d: New file.
* gas/i386/x86_64-intel.d: Likewise.
opcodes/
PR binutils/13571
* i386-dis.c (MOD_0FC3): New.
(PREFIX_0FC3): Renamed to ...
(PREFIX_MOD_0_0FC3): This.
(dis386_twobyte): Replace PREFIX_0FC3 with MOD_0FC3.
(prefix_table): Replace Ma with Ev on movntiS.
(mod_table): Add MOD_0FC3.
2015-07-30 04:17:02 -07:00
c6e5c03a2c
Add cores for M5100 series
...
gas/
* config/tc-mips.c (mips_cpu_info_table): Add m5100 and m5101 entries.
* doc/c-mips.texi: Document m5100 and m5101 for -march=.
2015-07-28 11:26:39 +01:00
77403ce966
Add -march=interaptiv
...
gas/
* config/tc-mips.c (mips_cpu_info_table): Add interaptiv entry.
* doc/c-mips.text: Document -march=interaptiv.
2015-07-28 11:26:31 +01:00
37a42ee9ad
Regenerate configure files
...
bfd/
* configure: Regenerated.
binutils/
* configure: Regenerated.
gas/
* configure: Regenerated.
gold/
* configure: Regenerated.
gprof/
* configure: Regenerated.
ld/
* configure: Regenerated.
opcodes/
* configure: Regenerated.
2015-07-27 07:56:32 -07:00
aff1a65ecb
Fix the evaluation of RL78 complex relocs, by making immediate values be computed relative to a new absolute symbol.
...
gas * config/tc-rl78.c (rl78_abs_sym): New local variable.
(md_begin): Initialise the new symbol.
(OPIMM): Define the value to be relative to the new symbol and not
the absolute section symbol.
ld * emulparams/elf32rl78.sh (OTHER_SECTIONS): Provide a value for
the _-rl78_abs__ symbol.
tests * gas/all/struct.d: Allow for extra symbols in the output.
* gas/macros/test1.d: Likewise.
* gas/elf/elf.exp: Add an rl78 machine.
* gas/elf/sections2e-rl78: New file.
tests * binutils-all/localize-hidden-1.d: Allow for extra symbols in the
output.
* binutils-all/strip-11.d: Skip for the RL78.
2015-07-24 16:44:27 +01:00
72f4393d8c
Remove leading/trailing white spaces in ChangeLog
2015-07-24 04:16:47 -07:00
20c2a61587
Fix memory operand size for vcvtt?ps2u?qq instructions
...
When disassembling AVX512 vcvtt?ps2u?q instructions with data
broadcasting enabled, memory operand size should be DWORD.
gas/testsuite/
PR binutils/18631
* gas/i386avx512dq-intel.d: Replace "QWORD" with "DWORD" in
vcvtt?ps2u?qq instructions disassembly regexes.
Add disassembly regex for new test.
* gas/i386/avx512dq.d: Likewise.
* gas/i386/avx512dq_vl-intel.d: Likewise.
* gas/i386/avx512dq_vl.d: Likewise.
* gas/i386/x86-64-avx512dq-intel.d: Likewise.
* gas/i386/x86-64-avx512dq.d: Likewise.
* gas/i386/x86-64-avx512dq_vl-intel.d: Likewise.
* gas/i386/x86-64-avx512dq_vl.d: Likewise.
* gas/i386/avx512dq.s: Add new test for Intel syntax with memory
operand and broadcasting enabled.
* gas/i386/avx512dq_vl.s: Likewise.
* gas/i386/x86-64-avx512dq.s: Likewise.
* gas/i386/x86-64-avx512dq_vl.s: Likewise.
opcodes/
PR binutils/18631
* i386-dis-evex.h (EVEX_W_0F78_P_2): Replace "EXxmmq" with
"EXEvexHalfBcstXmmq" for the second operand.
(EVEX_W_0F79_P_2): Likewise.
(EVEX_W_0F7A_P_2): Likewise.
(EVEX_W_0F7B_P_2): Likewise.
2015-07-22 13:26:21 -07:00
511b1657d2
gas line buffer handling
...
This fixes a segfault when macro definitions end on the last line of a
file, and that line isn't properly terminated with a newline. gas
used to throw away the last line in cases like this, whereas in other
cases gas added the missing newline. So I've also made gas
consistently provide a missing newline.
PR gas/18687
* input-scrub.c (input_scrub_next_buffer): Rearrange and simplify
loop. Don't drop lines at end of file lacking a newline, add a
newline instead. Ensure partial_size is zero whenever
partial_where is NULL. Adjust buffer size for extra char.
(input_scrub_push, input_scrub_begin): Adjust buffer size here too.
2015-07-22 22:04:28 +09:30
f33026a965
[ARM] Support correctly spelled ARMv6KZ architecture names
...
2015-07-20 Matthew Wahab <matthew.wahab@arm.com>
gas/
* NEWS: Mention corrected spelling of armv6kz.
* config/tc-arm.c (arm_cpus): Replace ARM_ARCH_V6ZK with
ARM_ARCH_V6KZ.
(arm_archs): Likewise. Also add "armv6kz" and "armv6kzt2".
* doc/c-arm.texi: Replace "armv6zk" with "armv6kz".
gas/testsuite
* gas/arm/attr-march-armv6kz.d: New.
* gas/arm/attr-march-armv6kzt2.d: New.
include/opcode
* arm.h (ARM_AEXT_V6ZK): Rename to ARM_AEXT_V6KZ.
(ARM_AEXT_V6ZKT2): Rename to ARM_AEXT_V6KZT2.
(ARM_ARCH_V6ZK): Rename to ARM_ARCH_V6KZ.
(ARM_ARCH_V6ZKT2): Rename to ARM_ARCH_V6KZT2.
2015-07-21 09:43:35 +01:00
7ac018954b
Make binutils abort message GDB friendly
...
We used to generate abort messages like:
internal error, aborting at .../bfd/elf64-x86-64.c line 1554 in elf_x86_64_check_relocs
We can't cut and paste "file line ???" to GDB. This patch changes those
abort messages to
internal error, aborting at .../bfd/elf64-x86-64.c:1554 in elf_x86_64_check_relocs
so that we can cut and paste "file:???" to GDB.
bfd/
* bfd.c (_bfd_abort): Replace " line " with ":" in output
message.
gas/
* messages.c (as_assert): Replace " line " with ":" in output
message.
(as_abort): Likewise.
ld/
* ldmisc.c (ld_abort): Replace " line " with ":" in output
message.
2015-07-20 05:53:31 -07:00
6f1c214259
Updates the ARM disassembler's output of floating point constants to include the actual floating point value.
...
opcodes * arm-dis.c (print_insn_coprocessor): Added support for quarter
float bitfield format.
(coprocessor_opcodes): Changed VFP vmov reg,immediate to use new
quarter float bitfield format.
tests * gas/arm/vfpv3-const-conv.d: Update expected result due to change
of comment for vmov reg,immediate with VFP coprocessor.
2015-07-16 16:43:16 +01:00
6c37fedc41
[AArch64][2/3] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
2015-07-16 15:43:21 +01:00
081e4c7d67
[ARM] Add crypto-neon-fp-armv8.1 as an fpu option
...
2015-07-16 Matthew Wahab <matthew.wahab@arm.com>
gas/
* config/tc-arm.c (arm_fpus): Add crypto-neon-fp-armv8.1.
* doc/c-arm.texi (-mfpu=): Likewise. Correct the entry for
neon-fp-armv8.1.
2015-07-16 15:11:30 +01:00
84b52b6651
[ARM] Make human parsing of "processor does not support instruction in mode" error messages easier
...
2015-07-16 James Greenhalgh <james.greenhalgh@arm.com>
gas/
* config/tc-arm.c (md_assemble): Rephrase the "selected processor does
not support ARM mode" error messages.
gas/testsuite/
* gas/arm/arch7em-bad.l: Update expected errors.
* gas/arm/arch7m-bad.l: Likewise.
* gas/arm/arm-idiv-bad.l: Likewise.
* gas/arm/arm7-bad.l: Likewise.
* gas/arm/armv1-bad.l: Likewise.
* gas/arm/thumb-w-bad.l: Likewise.
2015-07-16 14:43:00 +01:00
189ebcf915
Make x86 Linux assembler default to gABI compliant
...
The default compression is gABI compliant now. This patch makes the
x86 Linux assembler default to gABI compliant.
* config/tc-i386.c (flag_compress_debug): Replace
COMPRESS_DEBUG_GNU_ZLIB with COMPRESS_DEBUG_GABI_ZLIB.
2015-07-15 07:31:55 -07:00
19a7fe52ae
Make default compression gABI compliant
...
All programs in binutils+gdb git repo now support gABI compression
with the SHF_COMPRESSED bit. This patch makes the zlib-gabi option
as compression default for gas, gold, ld and objcopy, instead of the
zlib-gnu option whose outputs are incompatible with gABI.
binutils/
* objcopy.c (copy_file): Set BFD_COMPRESS_GABI if not
zlib-gnu.
* doc/binutils.texi: Change --compress-debug-sections and
--compress-debug-sections=zlib to zlib-gabi.
binutils/testsuite/
* binutils-all/compress.exp: Update.
gas/
* as.c (parse_args): Make --compress-debug-sections and
--compress-debug-sections=zlib the same as
--compress-debug-sections=zlib-gabi.
* doc/as.texinfo: Change --compress-debug-sections and
--compress-debug-sections=zlib to zlib-gabi.
gold/
* compressed_output.cc (Output_compressed_section::set_final_data_size):
Make --compress-debug-sections=zlib the same as
--compress-debug-sections=zlib-gabi.
* testsuite/Makefile.am (flagstest_compress_debug_sections.check):
Expect ".debug_.*" with the SHF_COMPRESSED bit, instead of
".zdebug_".
* testsuite/Makefile.in: Regenerated.
ld/
* emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Make
--compress-debug-sections=zlib the same as
--compress-debug-sections=zlib-gabi.
* ld.texinfo: Change --compress-debug-sections=zlib to zlib-gabi.
ld/testsuite/
* ld-elf/zlibbegin.rS: Updated to .debug_.* with the
SHF_COMPRESSED bit.
* ld-elf/zlibnormal.rS: Likewise.
2015-07-14 10:26:23 -07:00
209ce4c2de
Updated to accept .debug_* sections
...
* gas/i386/dw2-compress-1.d: Updated to accept .debug_* sections.
2015-07-10 08:41:10 -07:00
40f77f827b
Add missing changelog entries
2015-07-10 20:08:55 +09:30
3350cc01de
2015-07-09 Catherine Moore <clm@codesourcery.com>
...
include/
* elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New.
gas/
* config/tc-mips.c (check_fpabi): Handle
VAL_GNU_MIPS_ABI_FP_NAN2008.
binutils/
* readelf.c (print_mips_fp_abi_value): Handle
Val_GNU_MIPS_ABI_FP_NAN2008.
ld/testsuite/
* ld-mips-elf/attr-gnu-4-08.d: Update expected output.
* ld-mips-elf/attr-gnu-4-09.d: New.
* ld-mips-elf/attr-gnu-4-19.d: New.
* ld-mips-elf/attr-gnu-4-29.d: New.
* ld-mips-elf/attr-gnu-4-39.d: New.
* ld-mips-elf/attr-gnu-4-49.d: New.
* ld-mips-elf/attr-gnu-4-59.d: New.
* ld-mips-elf/attr-gnu-4-69.d: New.
* ld-mips-elf/attr-gnu-4-79.d: New.
* ld-mips-elf/attr-gnu-4-89.d: New.
* ld-mips-elf/attr-gnu-4-9.s: New.
* ld-mips-elf/mips-elf.exp: Run new tests.
2015-07-09 08:26:10 -07:00
7e30235281
Clarify case requirements for gas pseudo-ops
...
gas/
2015-07-08 Ciro Santilli <ciro.santilli@gmail.com>
* doc/as.texinfo: Clarify case requirements for pseudo ops.
2015-07-08 20:11:06 +01:00
328e7bfdde
Define DIFF_EXPR_OK for avr target to allow PC relative difference relocation.
...
When generating relocation (tc_gen_reloc) 32 bit relocation fixup
is changed to new 32 bit PC relative relocation if the fixup has pc-relative
flag set.
bfd/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* elf32-avr.c: Add 32 bit PC relative relocation for AVR target.
gas/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* config/tc-avr.c (tc_gen_reloc): Change 32 bit relocation to
32 bit PC relative and update offset if the fixup is pc-relative.
* config/tc-avr.h (DIFF_EXPR_OK): Define to enable PC relative diff
relocs.
gas/testsuite/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* gas/avr/pc-relative-reloc.d: New test for 32 bit pc relative reloc.
* gas/avr/per-function-debugline.s: New test source.
include/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* elf/avr.h: Add new 32 bit PC relative relocation.
ld/testsuite/ChangeLog
2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
* ld-avr/gc-section-debugline.d: New test.
* ld-avr/per-function-debugline.s: Source for new test.
2015-07-08 21:41:52 +03:00
ef5a96d564
Remove ppc860, ppc750cl, ppc7450 insns from common ppc.
...
Back in the day support for these processors was added, we probably
didn't want to waste PPC_OPCODE bits on minor variations. I've had a
complaint that disassembly of mfspr/mtspr was wrong for power8. This
patch fixes that problem.
Note that since -m860/-m850/-m821 are new gas options enabling the
mpc8xx specific mfspr/mtspr variants it is possible that this change
will break some mpc8xx assembly code. ie. you might need to modify
makefiles to pass -m860 to gas.
include/opcode/
* ppc.h (PPC_OPCODE_750, PPC_OPCODE_7450, PPC_OPCODE_860): Define.
opcodes/
* ppc-opc.c (PPC750, PPC7450, PPC860): Define using PPC_OPCODE_*.
* ppc-dis.c (ppc_opts): Add 821, 850 and 860 entries. Add
PPC_OPCODE_7450 to 7450 entry. Add PPC_OPCODE_750 to 750cl entry.
gas/
* config/tc-ppc.c (md_show_usage): Add -m821, -m850, -m860.
* doc/c-ppc.texi (PowerPC-Opts): Likewise.
gas/testsuite/
* gas/ppc/titan.d: Correct mfmcsrr0 disassembly.
2015-07-03 10:57:14 +09:30
0cb5a38a5b
Assembler tests for Nios II R2
...
2015-07-01 Sandra Loosemore <sandra@codesourcery.com>
Cesar Philippidis <cesar@codesourcery.com>
gas/testsuite/
* gas/nios2/add-r2.d: New.
* gas/nios2/align_fill-r2.d: New.
* gas/nios2/align_text-r2.d: New.
* gas/nios2/aligned_text-r2.d: New.
* gas/nios2/and-r2.d: New.
* gas/nios2/andc.d: New.
* gas/nios2/andc.s: New.
* gas/nios2/bmx.d: New.
* gas/nios2/bmx.s: New.
* gas/nios2/branch-r2.d: New.
* gas/nios2/break-r2.d: New.
* gas/nios2/bret-r2.d: New.
* gas/nios2/cache-r2.d: New.
* gas/nios2/cache-r2.s: New.
* gas/nios2/call-r2.d: New.
* gas/nios2/call26-r2.d: New.
* gas/nios2/call26_noat-r2.d: New.
* gas/nios2/call_noat-r2.d: New.
* gas/nios2/cdx_add.d: New.
* gas/nios2/cdx_add.s: New.
* gas/nios2/cdx_and.d: New.
* gas/nios2/cdx_and.s: New.
* gas/nios2/cdx_break.d: New.
* gas/nios2/cdx_break.s: New.
* gas/nios2/cdx_callr.d: New.
* gas/nios2/cdx_callr.s: New.
* gas/nios2/cdx_jmpr.d: New.
* gas/nios2/cdx_jmpr.s: New.
* gas/nios2/cdx_ldbu.d: New.
* gas/nios2/cdx_ldbu.s: New.
* gas/nios2/cdx_ldhu.d: New.
* gas/nios2/cdx_ldhu.s: New.
* gas/nios2/cdx_ldw.d: New.
* gas/nios2/cdx_ldw.s: New.
* gas/nios2/cdx_ldwsp.d: New.
* gas/nios2/cdx_ldwsp.s: New.
* gas/nios2/cdx_mov.d: New.
* gas/nios2/cdx_mov.s: New.
* gas/nios2/cdx_neg.d: New.
* gas/nios2/cdx_neg.s: New.
* gas/nios2/cdx_not.d: New.
* gas/nios2/cdx_not.s: New.
* gas/nios2/cdx_or.d: New.
* gas/nios2/cdx_or.s: New.
* gas/nios2/cdx_pop.d: New.
* gas/nios2/cdx_pop.s: New.
* gas/nios2/cdx_push.d: New.
* gas/nios2/cdx_push.s: New.
* gas/nios2/cdx_relax.d: New.
* gas/nios2/cdx_relax.s: New.
* gas/nios2/cdx_ret.d: New.
* gas/nios2/cdx_ret.s: New.
* gas/nios2/cdx_sll.d: New.
* gas/nios2/cdx_sll.s: New.
* gas/nios2/cdx_spaddi.d: New.
* gas/nios2/cdx_spaddi.s: New.
* gas/nios2/cdx_spdeci.d: New.
* gas/nios2/cdx_spdeci.s: New.
* gas/nios2/cdx_srl.d: New.
* gas/nios2/cdx_srl.s: New.
* gas/nios2/cdx_stb.d: New.
* gas/nios2/cdx_stb.s: New.
* gas/nios2/cdx_sth.d: New.
* gas/nios2/cdx_sth.s: New.
* gas/nios2/cdx_stw.d: New.
* gas/nios2/cdx_stw.s: New.
* gas/nios2/cdx_stwsp.d: New.
* gas/nios2/cdx_stwsp.s: New.
* gas/nios2/cdx_sub.d: New.
* gas/nios2/cdx_sub.s: New.
* gas/nios2/cdx_trap.d: New.
* gas/nios2/cdx_trap.s: New.
* gas/nios2/cdx_xor.d: New.
* gas/nios2/cdx_xor.s: New.
* gas/nios2/cmp-r2.d: New.
* gas/nios2/comments-r2.d: New.
* gas/nios2/complex-r2.d: New.
* gas/nios2/ctl-r2.d: New.
* gas/nios2/custom-r2.d: New.
* gas/nios2/eni.d: New.
* gas/nios2/eni.s: New.
* gas/nios2/etbt-r2.d: New.
* gas/nios2/flushda-r2.d: New.
* gas/nios2/jmp-r2.d: New.
* gas/nios2/ldb-r2.d: New.
* gas/nios2/ldb-r2.s: New.
* gas/nios2/ldh-r2.d: New.
* gas/nios2/ldh-r2.s: New.
* gas/nios2/ldw-r2.d: New.
* gas/nios2/ldw-r2.s: New.
* gas/nios2/ldwm.d: New.
* gas/nios2/ldwm.s: New.
* gas/nios2/lineseparator-r2.d: New.
* gas/nios2/movia-r2.d: New.
* gas/nios2/mpx.d: New.
* gas/nios2/mpx.s: New.
* gas/nios2/mul-r2.d: New.
* gas/nios2/nop-r2.d: New.
* gas/nios2/nop-r2.s: New.
* gas/nios2/nor-r2.d: New.
* gas/nios2/or-r2.d: New.
* gas/nios2/rdprs-r2.d: New.
* gas/nios2/rdprs-r2.s: New.
* gas/nios2/registers-r2.d: New.
* gas/nios2/ret-r2.d: New.
* gas/nios2/rotate-r2.d: New.
* gas/nios2/stb-r2.d: New.
* gas/nios2/stb-r2.s: New.
* gas/nios2/sth-r2.d: New.
* gas/nios2/sth-r2.s: New.
* gas/nios2/stw-r2.d: New.
* gas/nios2/stw-r2.s: New.
* gas/nios2/stwm.d: New.
* gas/nios2/stwm.s: New.
* gas/nios2/sub-r2.d: New.
* gas/nios2/sync-r2.d: New.
* gas/nios2/trap-r2.d: New.
* gas/nios2/tret-r2.d: New.
* gas/nios2/wrpie.d: New.
* gas/nios2/wrpie.s: New.
* gas/nios2/wrprs-r2.d: New.
* gas/nios2/xor-r2.d: New.
2015-07-01 16:11:47 -07:00
c8c8175b62
Opcodes and assembler support for Nios II R2
...
2015-07-01 Sandra Loosemore <sandra@codesourcery.com>
Cesar Philippidis <cesar@codesourcery.com>
gas/
* config/tc-nios2.c (nios2_min_align): New.
(nop): Replace with....
(nop_r1, nop_r2, nop_r2_cdx, nop32, nop16): New.
(nios2_align): Handle alignment on 2-byte boundaries when CDX
instructions may be present.
(s_nios2_align): Adjust reference to nop.
(CDXBRANCH, IS_CDXBRANCH): New.
(CDX_UBRANCH_SUBTYPE, CDX_CBRANCH_SUBTYPE): New.
(nios2_relax_subtype_size): Handle 2-byte CDX branches.
(nios2_relax_frag): Likewise.
(md_convert_frag): Handle R2 encodings.
(nios2_check_overflow): Check that low-order bits are zero
before applying rightshift from howto.
(nios2_check_overflow): Correct negative overflow calculation.
(nios2_diagnose_overflow): Handle signed_immed12_overflow. Issue
generic overflow messages for miscellaneous instruction formats.
(md_apply_fix): Recognize new R2 relocations. For pc_relative
relocations, store fixup in *valP.
(nios2_reglist_mask, nios2_reglist_dir): New.
(nios2_parse_reglist): New.
(nios2_parse_base_register): New.
(nios2_assemble_expression): Handle constant expressions designated
by BFD_RELOC_NONE.
(nios2_assemble_reg3): New.
(nios2_assemble_arg_c): Handle R2 instruction formats.
(nios2_assemble_arg_d): Likewise.
(nios2_assemble_arg_s): Likewise.
(nios2_assemble_arg_t): Likewise.
(nios2_assemble_arg_D): New.
(nios2_assemble_arg_S): New.
(nios2_assemble_arg_T): New.
(nios2_assemble_arg_i): Handle R2 instruction formats.
(nios2_assemble_arg_I): New.
(nios2_assemble_arg_u): Handle R2 instruction formats.
(nios2_assemble_arg_U): New.
(nios2_assemble_arg_V): New.
(nios2_assemble_arg_W): New.
(nios2_assemble_arg_X): New.
(nios2_assemble_arg_Y): New.
(nios2_assemble_arg_o): Handle R2 instruction formats.
(nios2_assemble_arg_O): New.
(nios2_assemble_arg_P): New.
(nios2_assemble_arg_j): Handle R2 instruction formats.
(nios2_assemble_arg_k): New.
(nios2_assemble_arg_l): Handle R2 instruction formats.
(nios2_assemble_arg_m): Likewise.
(nios2_assemble_arg_M): New.
(nios2_assemble_arg_N): New.
(nios2_assemble_arg_e): New.
(nios2_assemble_arg_f): New.
(nios2_assemble_arg_g): New.
(nios2_assemble_arg_h): New.
(nios2_assemble_arg_R): New.
(nios2_assemble_arg_B): New.
(nios2_assemble_args): Handle new argument letters.
(nios2_consume_arg): Likewise.
(nios2_translate_pseudo_insn): Avoid dereferencing null pointer
in error message.
(nios2_ps_insn_info_structs): Add nop.n.
(output_ubranch): Handle CDX branches.
(output_cbranch): Likewise.
(output_call): Handle R2 encodings.
(output_movia): Likewise.
(md_begin): Initialize nios2_min_align.
(md_assemble): Align to nios2_min_align. Adjust nios2_min_align
if a 16-bit instruction is seen.
(nios2_cons_align): Use appropriate nop pattern.
include/opcode/
* nios2.h (enum iw_format_type): Add R2 formats.
(enum overflow_type): Add signed_immed12_overflow and
enumeration_overflow for R2.
(struct nios2_opcode): Document new argument letters for R2.
(REG_3BIT, REG_LDWM, REG_POP): Define.
(includes): Include nios2r2.h.
(nios2_r2_opcodes, nios2_num_r2_opcodes): Declare.
(nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): Declare.
(nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): Declare.
(nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): Declare.
(nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): Declare.
(nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings):
Declare.
* nios2r2.h: New file.
opcodes/
* nios2-dis.c (nios2_extract_opcode): New.
(nios2_disassembler_state): New.
(nios2_find_opcode_hash): Use mach parameter to select correct
disassembler state.
(nios2_print_insn_arg): Extend to support new R2 argument letters
and formats.
(print_insn_nios2): Check for 16-bit instruction at end of memory.
* nios2-opc.c (nios2_builtin_regs): Add R2 register attributes.
(NIOS2_NUM_OPCODES): Rename to...
(NIOS2_NUM_R1_OPCODES): This.
(nios2_r2_opcodes): New.
(NIOS2_NUM_R2_OPCODES): New.
(nios2_num_r2_opcodes): New.
(nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): New.
(nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): New.
(nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): New.
(nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): New.
(nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings): New.
2015-07-01 16:08:03 -07:00
Jan Stancek
Nick Clifton
Alexander Fomin
Jiong Wang
Alan Modra
Andre Vieira
Max Filippov
Simon Dardis
H.J. Lu
Robert Suchanek
Hans-Peter Nilsson
Thomas Preud'homme
Matthew Wahab
Alessandro Marzocchi
James Greenhalgh
Catherine Moore
Richard Sandiford
Denis Chertykov
Sandra Loosemore