Commit Graph

95869 Commits

Author SHA1 Message Date
Tom Tromey 780942fc24 Change dwarf2_frame_state_reg_info::reg to be std::vector
This changes dwarf2_frame_state_reg_info::reg to be a std::vector.
This avoids passing NULL to memcpy in the copy constructor when the
original object does not have any registers.

gdb/ChangeLog
2018-10-03  Tom Tromey  <tom@tromey.com>

	* dwarf2-frame.h (dwarf2_frame_state_reg_info)
	<~dwarf2_frame_state_reg_info>: Update.
	<dwarf2_frame_state_reg_info>: Update.
	<alloc_regs>: Add assertion.  Update.
	<reg>: Now a std::vector.
	<num_regs>: Remove.
	<swap>: Update.
	* dwarf2-frame.c (dwarf2_restore_rule, execute_cfa_program)
	(execute_cfa_program_test, dwarf2_frame_cache): Update.
2018-10-03 15:19:06 -06:00
Tom Tromey 10657c047e Do not pass NULL to memcpy
-fsanitize=undefined pointed out a spot that passes NULL to memcpy,
which is undefined behavior according to the C standard.

gdb/ChangeLog
2018-10-03  Tom Tromey  <tom@tromey.com>

	* namespace.c (add_using_directive): Don't pass NULL to memcpy.
2018-10-03 15:19:06 -06:00
H.J. Lu fb9bbfd7f2 ELF: Add testcases for PR ld/23658
Add testcases to verify that all SHT_NOTE sections with the same section
alignment are placed in a single PT_NOTE segment.

	PR ld/23658
	* testsuite/ld-elf/pr23658-1.d: New file.
	* testsuite/ld-elf/pr23658-1a.s: Likewise.
	* testsuite/ld-elf/pr23658-1b.s: Likewise.
	* testsuite/ld-elf/pr23658-1c.s: Likewise.
	* testsuite/ld-elf/pr23658-1d.s: Likewise.
	* testsuite/ld-elf/pr23658-2.rd: Likewise.
	* testsuite/ld-elf/pr23658-3.d: Likewise.
	* testsuite/ld-elf/pr23658-3.s: Likewise.
	* testsuite/ld-elf/pr23658-3.t: Likewise.
	* testsuite/ld-elf/shared.exp: Run PR ld/23658 tests.
2018-10-03 14:11:53 -07:00
Philippe Waroquiers 34c0fc000f tid-parse.c tid_is_in_list correct 'See' comment.
Refer to tid-parse.h and tid_is_in_list is explained there.
2018-10-03 22:34:33 +02:00
H.J. Lu 1887ae7304 ELF: Group and sort output note sections by section alignments
To support putting all adjacent SHT_NOTE sections with the same section
alignment into a single PT_NOTE segment, lang_insert_orphan must group
and sort output note sections by section alignments in both output
section list as well as output section statement list.

	PR ld/23658
	* ldlang.c (lang_insert_orphan): Group and sort output note
	sections by section alignments.
2018-10-03 13:25:30 -07:00
H.J. Lu 23e463ed7c ELF: Group PT_NOTE segments by section alignments
Alignments of SHT_NOTE sections can be 8 bytes for 64-bit ELF files.  We
should put all adjacent SHT_NOTE sections with the same section alignment
into a single PT_NOTE segment even when the section alignment != 4 bytes.
Also check SHT_NOTE section type instead of section name.

	PR ld/23658
	* elf.c (get_program_header_size): Put all adjacent SHT_NOTE
	sections with the same section alignment into a single PT_NOTE
	segment.  Check SHT_NOTE section type instead of section name.
	(_bfd_elf_map_sections_to_segments): Likewise.
2018-10-03 13:22:40 -07:00
Tamar Christina e66cfcef72 AArch64: Add MOVPRFX tests and update testsuite
This patch adds the tests and expected output for each of the conditions where
the MOVPRFX constraint should apply.

The specific test cases are all documented to indicate what the expected
behavior should be.

gas/

        * testsuite/gas/aarch64/sve-movprfx_1.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_1.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_10.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_10.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_10.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_11.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_11.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_12.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_12.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_13.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_13.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_13.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_14.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_14.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_14.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_15.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_15.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_15.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_16.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_16.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_17.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_17.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_17.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_18.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_18.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_18.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_19.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_19.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_2.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_2.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_2.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_20.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_20.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_20.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_21.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_21.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_22.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_22.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_22.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_23.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_23.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_23.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_24.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_24.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_24.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_25.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_25.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_25.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_26.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_26.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_26.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_3.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_3.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_3.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_4.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_4.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_4.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_5.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_5.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_6.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_6.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_6.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_7.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_7.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_7.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_8.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_8.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_8.s: New test.
        * testsuite/gas/aarch64/sve-movprfx_9.d: New test.
        * testsuite/gas/aarch64/sve-movprfx_9.l: New test.
        * testsuite/gas/aarch64/sve-movprfx_9.s: New test.
2018-10-03 18:53:49 +01:00
Tamar Christina bde90be2cd AArch64: Constraint disassembler and assembler changes.
This patch wires in the new constraint verifiers into the assembler and
disassembler.  Because of this the MOVPRFX tests have to be split out from the
generic SVE tests into their own tests so warnings can be ignored.

These tests are only intended to test the encoding correctness and not the
constraints.

gas/

	* testsuite/gas/aarch64/sve-movprfx.d: New test.
	* testsuite/gas/aarch64/sve-movprfx.s: New test.
	* testsuite/gas/aarch64/sve.d: Refactor.
	* testsuite/gas/aarch64/sve.s: Refactor.
        * testsuite/gas/aarch64/sysreg-diagnostic.d: Update.

opcodes/

	* aarch64-asm.c (aarch64_opcode_encode): Apply constraint verifier.
	* aarch64-dis.c (print_operands): Refactor to take notes.
	(print_verifier_notes): New.
	(print_aarch64_insn): Apply constraint verifier.
	(print_insn_aarch64_word): Update call to print_aarch64_insn.
	* aarch64-opc.c (aarch64_print_operand): Remove attribute, update notes format.
2018-10-03 18:51:58 +01:00
Tamar Christina 4f5d253628 AArch64: Close sequences at the end of sections
Any open sequence at the end of a section or assembly is considered an error.
This patch adds a check at the end to ensure that all sequences have been closed
and if not reports a warning.

During disassembly it's not possible to detect this condition in the back-end so
the warning is only emitted from the assembler for now.

gas/

	* config/tc-aarch64.c (force_automatic_sequence_close,
	aarch64_frob_section): New.
	* config/tc-aarch64.h (tc_frob_section, aarch64_frob_section): New.
2018-10-03 18:50:40 +01:00
Tamar Christina a68f4cd235 AArch64: Add SVE constraints verifier.
This patch adds the verification rules for move prefix constraints.

The Arm SVE instruction MOVPRFX introduces[1] constraints on the instruction at
PC+4. Particularly the following constraints are handled by this patch

* MOVPRFX must be followed by an instruction.
* MOVPRFX can only be followed by non-layout altering directives.
* MOVPRFX destination register MUST be used as the destination register in the
  instruction at PC+4, and is not allowed to be used in any other position other than
  destructive input.  This includes registers that architecturally overlap. e.g. x1
  should be treated as z1.
* MOVPRFX must be followed by a restricted set of SVE instructions.
* The size of the destination register of MOVPRFX must be equal to that of
  the operation at PC+4.
* The predicate register and operation of MOVPRFX must match that of the instruction
  at PC+4
* The predicated instruction at PC+4 must use the merging predicate.
* Architectural aliases and pseudo-instructions need to be supported as well.
* MOVPRFX cannot be the last instruction in a sequence

Any failure to adhere to any of these constrains will emit an assembly warning
and a disassembly note.

[1] https://developer.arm.com/docs/ddi0584/latest/arm-architecture-reference-manual-supplement-the-scalable-vector-extension-sve-for-armv8-a

include/

	* opcode/aarch64.h (aarch64_inst): Remove.
	(enum err_type): Add ERR_VFI.
	(aarch64_is_destructive_by_operands): New.
	(init_insn_sequence): New.
	(aarch64_decode_insn): Remove param name.

opcodes/

	* aarch64-opc.c (init_insn_block): New.
	(verify_constraints, aarch64_is_destructive_by_operands): New.
	* aarch64-opc.h (verify_constraints): New.

gas/

        * config/tc-aarch64.c (output_operand_error_report): Order warnings.
2018-10-03 18:49:37 +01:00
Tamar Christina 755b748fd9 AArch64: Refactor verifiers to make more general.
The current verifiers only take an instruction description and encoded value as
arguments.  This was enough when the verifiers only needed to do simple checking
but it's insufficient for the purposes of validating instruction sequences.

This patch adds the required arguments and also a flag to allow a verifier to
distinguish between whether it's being run during encoding or decoding.  It also
allows for errors and warnings to be returned by a verifier instead of a simple
pass/fail.

include/

	* opcode/aarch64.h (struct aarch64_opcode): Expand verifiers to take
	more arguments.

opcodes/

	* aarch64-dis.c (aarch64_opcode_decode): Update verifier call.
	* aarch64-opc.c (verify_ldpsw): Update arguments.
2018-10-03 18:40:48 +01:00
Tamar Christina 1d4823943d AArch64: Refactor err_type.
Previously the ERR_ values were defined as different constants, to make this a
bit more type safe and so they can be more easily re-used I'm changing them into
an actual enum and updating any usages.

include/

	* opcode/aarch64.h (enum err_type): New.
	(aarch64_decode_insn): Use it.

opcodes/

	* aarch64-dis.c (ERR_OK, ERR_UND, ERR_UNP, ERR_NYI): Remove.
	(aarch64_decode_insn, print_insn_aarch64_word): Use err_type.
2018-10-03 18:36:30 +01:00
Tamar Christina 7e84b55d8f AArch64: Wire through instr_sequence
This patch introduces aarch64_instr_sequence which is a structure similar to IT
blocks on Arm in order to track instructions that introduce a constraint or
dependency on instruction 1..N positions away from the instruction that opened
the block.

The struct is also wired through to the locations that require it.

gas/

	* config/tc-aarch64.c (now_instr_sequence):
	(*insn_sequence, now_instr_sequence): New.
	(output_operand_error_record, do_encode): Add insn_sequence.
	(md_assemble): Update insn_sequence.
	(try_to_encode_as_unscaled_ldst, fix_mov_imm_insn, fix_insn):
	Pass insn_sequence.
	* config/tc-aarch64.h (struct aarch64_segment_info_type):
	Add insn_sequence.

include/

	* opcode/aarch64.h (struct aarch64_instr_sequence): New.
	(aarch64_opcode_encode): Use it.

opcodes/

	* aarch64-asm.c (aarch64_opcode_encode): Add insn_sequence.
	* aarch64-dis.c (insn_sequence): New.
2018-10-03 18:33:33 +01:00
Tamar Christina eae424aef0 AArch64: Mark sve instructions that require MOVPRFX constraints
This patch series is to allow certain instructions such as the SVE MOVPRFX
instruction to apply a constraint/dependency on the instruction at PC+4.

This patch starts this off by marking which instructions impose the constraint
and which instructions must adhere to the constraint.  This is done in a
generic way by extending the verifiers.

* The constraint F_SCAN indicates that an instruction opens a sequence and imposes
a constraint on an instructions following it.  The length of the sequence depends
on the instruction itself and it handled in the verifier code.

* The C_SCAN_MOVPRFX flag is used to indicate which constrain the instruction is
checked against.  An instruction with both F_SCAN and C_SCAN_MOVPRFX starts a
block for the C_SCAN_MOVPRFX instruction, and one with only C_SCAN_MOVPRFX must
adhere to a previous block constraint is applicable.

The SVE instructions in this list have been marked according to the SVE
specification[1].

[1] https://developer.arm.com/docs/ddi0584/latest/arm-architecture-reference-manual-supplement-the-scalable-vector-extension-sve-for-armv8-a

include/

	* opcode/aarch64.h (struct aarch64_opcode): Add constraints,
	extend flags field size.
	(F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.

opcodes/

	* aarch64-tbl.h (CORE_INSN, __FP_INSN, SIMD_INSN, CRYP_INSN, _CRC_INSN,
	_LSE_INSN, _LOR_INSN, RDMA_INSN, FF16_INSN, SF16_INSN, V8_2_INSN,
	_SVE_INSN, V8_3_INSN, CNUM_INSN, RCPC_INSN, SHA2_INSN, AES_INSN,
	V8_4_INSN, SHA3_INSN, SM4_INSN, FP16_V8_2_INSN, DOT_INSN): Initialize
	constraints.
	(_SVE_INSNC): New.
	(struct aarch64_opcode): (fjcvtzs, ldpsw, ldpsw, esb, psb): Initialize
	constraints.
	(movprfx): Change _SVE_INSN into _SVE_INSNC, add C_SCAN_MOVPRFX and
	F_SCAN flags.
	(msb, mul, neg, not, orr, rbit, revb, revh, revw, sabd, scvtf,
	sdiv, sdivr, sdot, smax, smin, smulh, splice, sqadd, sqdecd, sqdech,
	sqdecp, sqdecw, sqincd, sqinch, sqincp, sqincw, sqsub, sub, subr, sxtb,
	sxth, sxtw, uabd, ucvtf, udiv, udivr, udot, umax, umin, umulh, uqadd,
	uqdecd, uqdech, uqdecp, uqdecw, uqincd, uqinch, uqincp, uqincw, uqsub,
	uxtb, uxth, uxtw, bic, eon, orn, mov, fmov): Change _SVE_INSN into _SVE_INSNC and add
	C_SCAN_MOVPRFX and C_MAX_ELEM constraints.
2018-10-03 18:24:17 +01:00
Sandra Loosemore ca98345e0b Skip gdb ifunc tests on targets that don't support this feature.
2018-10-03  Sandra Loosemore  <sandra@codesourcery.com>

	* lib/gdb.exp (skip_ifunc_tests): New.
	* gdb.base/gnu-ifunc.exp: Skip if no ifunc support.  Handle
	other compile failures.
	* gdb.compile/compile-ifunc.exp: Skip if no ifunc support.
2018-10-03 09:16:53 -07:00
Millan Wolff c8d3f93237 Fix the handling of inlined frames in DWARF debug info.
PR 23715
	* dwarf2.c (find_abstract_instance): Allow recursive invocations
	of find_abstract_instance to override the name variable.
2018-10-03 12:06:09 +01:00
Nick Clifton 527b9e87ac Updated French translation for the binutils/ subdirectory. 2018-10-03 11:36:11 +01:00
Nick Clifton 8e90d6d2c2 Updated Portuguese translations for the bfd/ and binutils/ subdirectories. 2018-10-03 10:58:49 +01:00
John Darrington 007d2fe43e Make print_insn_s12z public.
Gdb can use this function in its stack unwinder.

* include/dis-asm.h (print_insn_s12z): Add declaration.
2018-10-03 10:43:02 +02:00
Tom Tromey 2398abf8bc Use pulongest in aarch64-linux-tdep.c
I tried a build on macOS today and it failed due to a mismatch between
the printf format and the type in aarch64-linux-tdep.c.  This patch
fixes the problem by using pulongest and %s rather than %ld.

gdb/ChangeLog
2018-10-02  Tom Tromey  <tom@tromey.com>

	* aarch64-linux-tdep.c (aarch64_linux_sigframe_init): Use pulongest.
2018-10-02 19:30:19 -06:00
GDB Administrator 53c30c89d1 Automatic date update in version.in 2018-10-03 00:00:33 +00:00
Palmer Dabbelt 64a336ac13
RISC-V: Add fence.tso instruction
The RISC-V memory model has been ratified, and it includes an additional
fence: "fence.tso".  This pseudo instruction extends one of the
previously reserved full fence patterns to be less restrictive, and
therefor will execute correctly on all existing microarchitectures.
Thus there is no reason to allow this instruction to be disabled (or
unconverted to a full fence), so it's just unconditionally allowed.

I've added a test case for GAS to check that "fence.tso" correctly
assembles on rv32i-based targets.  I checked to see that "fence.tso"
appears in "gas.log", but that's the only testing I've done.

gas/ChangeLog

2018-10-02  Palmer Dabbelt  <palmer@sifive.com>

        * testsuite/gas/riscv/fence-tso.d: New file.
        * testsuite/gas/riscv/fence-tso.s: Likewise.

include/ChangeLog

2018-10-02  Palmer Dabbelt  <palmer@sifive.com>

        * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
        (MASK_FENCE_TSO): Likewise.

opcodes/ChangeLog

2018-10-02  Palmer Dabbelt  <palmer@sifive.com>

        * riscv-opc.c (riscv_opcodes) <fence.tso>: New opcode.
2018-10-02 08:26:32 -07:00
John Darrington c1168a2f66 Allow remote debugging over a Unix local domain socket.
Extend the "target remote" and "target extended-remote" commands
such that if the filename provided is a Unix local domain (AF_UNIX)
socket, then it'll be treated as such, instead of trying to open
it as if it were a character device.

gdb/ChangeLog:
	* NEWS: Mention changed commands.
	* ser-uds.c: New file.
	* configure.ac (SER_HARDWIRE): Add ser-uds.o.
	* configure: Regenerate.
	* Makefile.in: Add new file.
	* serial.c (serial_open): Check if filename is a socket
	  and lookup the appropriate interface accordingly.

gdb/doc/ChangeLog:
	* gdb.texinfo (Remote Connection Commands): Describe
	  the changes to target remote and target extended-remote
	  relating to Unix domain sockets.
2018-10-02 16:10:57 +02:00
Cupertino Miranda eb528ad18b [ARC] Entries to Changelog for previous commits. 2018-10-02 09:20:11 +01:00
GDB Administrator 3d5b1c0abe Automatic date update in version.in 2018-10-02 00:00:44 +00:00
Nick Clifton a0389de085 Fix typo setting user_specified variable when parsing -Z option.
PR 23698
	* gprof.c (main): Fix typo setting user_specified variable when
	parsing -Z option.
2018-10-01 17:18:20 +01:00
Simon Marchi ff34e6ae38 Fix is_amd64_regs_target check in i386-avx512.exp
As reported by Jan here:

  https://sourceware.org/ml/gdb-patches/2018-09/msg00831.html

the check that sets the number of available registers is backwards.

gdb/testsuite/ChangeLog:

	* gdb.arch/i386-avx512.exp: Fix setting of nr_regs based on
	is_amd64_regs_target.
2018-10-01 12:02:57 -04:00
Alan Hayward 6bb8890e2c Add aarch64-sighandler-regs.exp test
Add Aarch64 test to check register values of a previous frame
can be shown correctly across a signal.

gdb/testsuite/ChangeLog:

	* gdb.arch/aarch64-sighandler-regs.c: New test.
	* gdb.arch/aarch64-sighandler-regs.exp: New file.
	* lib/gdb.exp (skip_aarch64_sve_tests): New proc.
2018-10-01 14:51:09 +01:00
Alan Hayward 05c71722fc Aarch64: Detect FP regs in signal frame
Both the VFP and SVE registers may be contained within the reserved space of
the sigcontext and can be found by seraching for MAGIC values. Detect these
and add the registers (including pseudos) to the trad frame cache.

gdb/
	* aarch64-linux-tdep.c (AARCH64_SIGCONTEXT_RESERVED_OFFSET): Add
	define.
	(AARCH64_EXTRA_MAGIC): Likewise.
	(AARCH64_FPSIMD_MAGIC): Likewise.
	(AARCH64_SVE_MAGIC): Likewise.
	(AARCH64_EXTRA_DATAP_OFFSET): Likewise.
	(AARCH64_FPSIMD_FPSR_OFFSET): Likewise.
	(AARCH64_FPSIMD_FPCR_OFFSET): Likewise.
	(AARCH64_FPSIMD_V0_OFFSET): Likewise.
	(AARCH64_FPSIMD_VREG_SIZE): Likewise.
	(AARCH64_SVE_CONTEXT_VL_OFFSET): Likewise.
	(AARCH64_SVE_CONTEXT_REGS_OFFSET): Likewise.
	(AARCH64_SVE_CONTEXT_P_REGS_OFFSET): Likewise.
	(AARCH64_SVE_CONTEXT_FFR_OFFSET): Likewise.
	(AARCH64_SVE_CONTEXT_SIZE): Likewise.
	(read_aarch64_ctx): Add function.
	(aarch64_linux_sigframe_init): Detect FP registers.
2018-10-01 14:21:38 +01:00
Alan Hayward c74e7cb96f Aarch64: Move pseudo defines to header
gdb/
	* aarch64-tdep.c (AARCH64_Q0_REGNUM): Move to here.
	(AARCH64_D0_REGNUM): Likewise.
	(AARCH64_S0_REGNUM): Likewise.
	(AARCH64_H0_REGNUM): Likewise.
	(AARCH64_B0_REGNUM): Likewise.
	(AARCH64_SVE_V0_REGNUM): Likewise.
	* arch/aarch64.h (AARCH64_Q0_REGNUM): Move from here.
	(AARCH64_D0_REGNUM): Likewise.
	(AARCH64_S0_REGNUM): Likewise.
	(AARCH64_H0_REGNUM): Likewise.
	(AARCH64_B0_REGNUM): Likewise.
	(AARCH64_SVE_V0_REGNUM): Likewise.
2018-10-01 14:00:14 +01:00
Cupertino Miranda 714e9a954a [ARC] Fixed issue with DTSOFF relocs.
Inserted offset in final section in the GOT entry of type DTSOFF soon to be
relocated by the dynamic loader.

bfd/
2018-09-06  Cupertino Miranda <cmiranda@synopsys.com>

	* arc-got.h (relocate_fix_got_relocs_for_got_info): Changed. Take TLS
	    section alignment in consideration for this relocation.
	* elf32-arc.c (FINAL_SECTSTART): Added this formula macro.
	  (ARC_TLS_DTPOFF) Updated reloc to use new created macro instead.
2018-10-01 12:42:11 +01:00
Cupertino Miranda 0411fca5ec [ARC] Fixes TLS failures related to tls-align.
This patch fixes glibc testcase in nptl/tls-align.

bfd/
2018-08-01  Cupertino Miranda <cmiranda@synopsys.com>

	* arc-got.h (relocate_fix_got_relocs_for_got_info): Changed, fixed
	    TCB_SIZE offsize to include section alignment.
	* elf32-arc.c (arc_special_overflow_checks): Likewise.

include/
2018-08-01  Cupertino Miranda <cmiranda@synopsys.com>

	* arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
2018-10-01 12:42:11 +01:00
Cupertino Miranda ab16fcd743 [ARC] PLT information was still being generated when symbol was forced_local.
A change upstream reveiled this issue, triggering an assert when linking glibc.

bfd/
2018-03-01  Cupertino Miranda <cmiranda@synopsys.com>

	* elf32-arc.c (elf_arc_check_relocs): Changed.
2018-10-01 12:42:11 +01:00
Cupertino Miranda 2936af9015 [ARC] Make sure global symbol is not an indirect or warning.
Problem identified in the context of glibc with latest upstream binutils.
Dynamic symbol space was being reserved but, no actual information for the
symbol was being set. Data for the symbol was kept initialized with -1.
No easy test case was possible to be created.

bfd/
2018-03-01  Cupertino Miranda <cmiranda@synopsys.com>

	* elf32-arc.c (elf_arc_check_relocs): Changed.
2018-10-01 12:42:11 +01:00
Cupertino Miranda c834917fda [ARC] Improved robustness. Return FALSE in case of NULL pointer.
bfd/
2018-03-01  Cupertino Miranda <cmiranda@synopsys.com>

	* elf32-arc.c (elf_arc_finish_dynamic_symbol) Return FALSE in case
	arc_htab is NULL.
2018-10-01 12:42:11 +01:00
Cupertino Miranda 854b850681 [ARC] Refactored location where GOT information is collected.
Change location where GOT information is collected for ARC target, avoiding
posible use conflicts of the previous .got field in the symbols hash_entry.

bfd/
2018-03-01  Cupertino Miranda  <cmiranda@synopsys.com>

	* arc-got.h (get_got_entry_list_for_symbol): Changed.
	* ef32-arc.c (struct elf_arc_link_hash_entry): Moved and changed.
	(elf_arc_link_hash_newfunc): Changed.
	(arc_elf_link_hash_table_create): Removed old initializations.
	(elf_arc_relocate_section, elf_arc_finish_dynamic_symbol): Changed.
2018-10-01 12:42:11 +01:00
Gary Benson 12b164e9a9 Remove ancient workaround
This commit removes a workaround for a bug in glibc 2.1.3, which
was released 2000-02-24 and superseded 2000-11-09.

gdb/ChangeLog:

	* gdb_proc_service.h (gdb_prfpregset_t): Remove typedef.
	* proc-service.c (ps_lgetfpregs, ps_lsetfpregs): Use
	prfpregset_t instead of gdb_prfpregset_t.
	* configure.ac (PRFPREGSET_T_BROKEN): Remove check.
	* configure, config.in: Rebuild.
2018-10-01 10:37:39 +01:00
Gary Benson 7c619dbdae Move duplicated code to common/gdb_proc_service.h
This commit moves now-identical code from gdb/gdb_proc_service.h
and gdb/gdbserver/gdb_proc_service.h into the new shared file
gdb/common/gdb_proc_service.h.

gdb/ChangeLog:

	* common/gdb_proc_service.h: New file, factored out from...
	* gdb_proc_service.h: Moved common code to the above file.
	* Makefile.in (HFILES_NO_SRCDIR): Add the above new file.

gdb/gdbserver/ChangeLog:

	* gdb_proc_service.h: Moved common code to
	common/gdb_proc_service.h.
2018-10-01 10:37:39 +01:00
Gary Benson 358ffcf28c Update GDB gdb_proc_service.h workaround to match gdbserver
This commit updates GDB's gdb_proc_service.h to use elf_{g,fp}regset_t
instead of gdb_{g,fp}regset_t if pr{g,fp}regset_t are undefined.
The types have been equivalent on GNU/Linux since at least 2005.

gdb/ChangeLog:

	* gdb_proc_service.h: Use elf_gregset_t if prgregset_t is
	undefined.  Use elf_fpregset_t if prfpregset_t is undefined.
2018-10-01 10:37:39 +01:00
Gary Benson 43b7e92b0c Add workaround from gdbserver's gdb_proc_service.h to GDB
This commit adds a workaround from gdbserver's gdb_proc_service.h
to GDB's.  It doesn't seem to have been needed on any glibc as far
back as 2001, but it's possibly required for other C libraries so
I've retained it.

gdb/ChangeLog:

	* configure.ac: Check if sys/procfs.h defines elf_fpregset_t.
	(AC_CHECK_HEADERS): Check for linux/elf.h.
	* configure, config.in: Rebuild.
	* gdb_proc_service.h: Include linux/elf.h if sys/procfs.h
	doesn't define elf_fpregset_t.
2018-10-01 10:37:39 +01:00
Gary Benson 3795e81442 gdb_proc_service.h comment and whitespace synchronization
This commit updates comments and whitespace in GDB's and gdbserver's
gdb_proc_service.h.

gdb/ChangeLog:

	* gdb_proc_service.h: Whitespace change.

gdb/gdbserver/ChangeLog:

	* gdb_proc_service.h: Synchronize comments and whitespace with
	GDB's version of this file.
2018-10-01 10:37:39 +01:00
Tom Tromey 4176f14d9c Don't check HAVE_UNISTD_H
I noticed some spots that were checking HAVE_UNISTD_H.  There is no
need to do this, as <unistd.h> is unconditionally included in many
places in gdb.  This sort of cleanup was done once before, in 2013:

    2013-07-01  Pedro Alves  <palves@redhat.com>

	    * defs.h: Don't check HAVE_UNISTD_H before including <unistd.h>.
	    (STDIN_FILENO, STDOUT_FILENO, STDERR_FILENO): Delete.
	    * tracepoint.c: Don't check HAVE_UNISTD_H before including
	    <unistd.h>.

HAVE_UNISTD_H seems to come from gnulib, so there are still mentions
of it in the source.

gdb/ChangeLog
2018-10-01  Tom Tromey  <tom@tromey.com>

	* unittests/scoped_mmap-selftests.c: Don't check HAVE_UNISTD_H.
	* unittests/scoped_fd-selftests.c: Don't check HAVE_UNISTD_H.
	* common/scoped_fd.h: Don't check HAVE_UNISTD_H.
2018-10-01 02:58:23 -06:00
Tom Tromey a95746f917 Copy configure option documentation to gdb.texinfo
I realized that while I'd updated the README, I didn't update
gdb.texinfo to document the options to configure.

This patch copies the text from README into gdb.texinfo, adding
Texinfo markup.

gdb/ChangeLog
2018-10-01  Tom Tromey  <tom@tromey.com>

	* README: Minor change.

gdb/doc/ChangeLog
2018-10-01  Tom Tromey  <tom@tromey.com>

	* gdb.texinfo (Configure Options): Document configure options.
2018-10-01 02:55:26 -06:00
Markus Metzger 224d30d393 testsuite: fix is_amd64_regs_target
Commit

    c221b2f Testsuite: Add gdb_can_simple_compile

changed the source file name extension of the test program from .s to .c
resulting in compile fails.  This, in turn, causes is_amd64_regs_target
checks to fail.  In gdb.btrace/tailcall.exp and others, this causes the
wrong source file to be picked and the test to fail on 64-bit targets.

Change the test source from an assembly program to a C program using
inline assembly.

testsuite/
	* lib/gdb.exp (is_amd64_regs_target): Change assembly to C inline
	assembly.
2018-10-01 10:06:56 +02:00
GDB Administrator 15ec67475f Automatic date update in version.in 2018-10-01 00:01:09 +00:00
Pedro Alves dd20378271 Darwin: Remove unused variables [-Werror=unused-variable]
Building GDB with --host=x86_64-apple-darwin15 using G++ 5.3.0 runs
into a number of -Werror=unused-variable warnings/errors:

  ../../src/gdb/i386-darwin-nat.c: In function 'void i386_darwin_dr_set(int, CORE_ADDR)':
  ../../src/gdb/i386-darwin-nat.c:283:7: error: unused variable 'current_pid' [-Werror=unused-variable]
     int current_pid;
	 ^
  [etc, etc.]

This commit fixes all such warnings.

gdb/ChangeLog:
2018-09-30  Pedro Alves  <palves@redhat.com>

	* darwin-nat-info.c (darwin_debug_regions_recurse)
	(info_mach_exceptions_command): Remove unused local variables.
	* darwin-nat.c (darwin_decode_notify_message)
	(darwin_nat_target::resume, darwin_nat_target::mourn_inferior)
	(darwin_stop_inferior, darwin_setup_exceptions)
	(darwin_nat_target::kill, darwin_attach_pid, darwin_ptrace_him)
	(darwin_nat_target::attach, darwin_nat_target::detach)
	(darwin_read_write_inferior, darwin_read_dyld_info): Remove unused
	local variables.
	* i386-darwin-nat.c (i386_darwin_dr_set): Remove unused local
	variables.
2018-09-30 17:17:52 +01:00
GDB Administrator 105cd1d7a6 Automatic date update in version.in 2018-09-30 00:01:07 +00:00
Tom Tromey c82a2e6ff6 Remove some leftover text in gdb/README
I accidentally left some stray text in gdb/README.
This removes it.  I'm checking this in as obvious.

gdb/ChangeLog
2018-09-29  Tom Tromey  <tom@tromey.com>

	* README: Remove some leftover text.
2018-09-29 07:32:10 -06:00
Tom Tromey 7f0bd4202c Update gdb's configure instructions
gdb's README and configure instructions in the manual are quite out of
date.  They mention options that haven't existed for many years, among
other things.

This patch attempts to modernize the instructions somewhat.  It is not
exhaustive, just an improvement -- more could be done.  Perhaps even a
couple of the nodes should simply be removed and replaced by
references to the Autoconf manual.

The README file seems to have been generated from the Texinfo at some
point in the past.  I did not continue this, but instead edited it
separately.

gdb/ChangeLog
2018-09-29  Tom Tromey  <tom@tromey.com>

	* PROBLEMS: Rewrite.
	* README: Update.

gdb/doc/ChangeLog
2018-09-29  Tom Tromey  <tom@tromey.com>

	* gdb.texinfo (Requirements): Mention C++, GNU make.
	(Requirements): Sort the table.  Add more libraries.
	(Running Configure): Remove obsolete text.
	(Separate Objdir): Likewise.
	(Configure Options): Likewise.
2018-09-29 07:07:33 -06:00
GDB Administrator 6424bdfcfc Automatic date update in version.in 2018-09-29 00:00:44 +00:00