The size of the stack segment defaults to 32KB, and can be overridden
by defining the __stacksize symbol.
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
bfd/
* elf32-arm.c (DEFAULT_STACK_SIZE): New.
(elf32_arm_always_size_sections): Create stack segment.
Define and handle TLS relocations for FDPIC in BFD and gas.
In gas, the new relocations are rejected if the --fdpic option was not
specified.
We also define the __tdata_start symbol to mark the start of the
.tdata section. This allows FDPIC static binaries to find the start of
.tdata section, since phdr->p_vaddr of TLS segment is not a valid
value for FDPIC.
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
bfd/:
* bfd-in2.h (BFD_RELOC_ARM_TLS_GD32_FDPIC)
(BFD_RELOC_ARM_TLS_LDM32_FDPIC, BFD_RELOC_ARM_TLS_IE32_FDPIC): New
relocations.
* elf32-arm.c (elf32_arm_howto_table_2): Add R_ARM_TLS_GD32_FDPIC,
R_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_IE32_FDPIC relocations.
(elf32_arm_reloc_map): Add R_ARM_TLS_GD32_FDPIC,
R_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_IE32_FDPIC.
(struct elf32_arm_link_hash_table): Update comment.
(elf32_arm_final_link_relocate): Handle TLS FDPIC relocations.
(IS_ARM_TLS_RELOC): Likewise.
(elf32_arm_check_relocs): Likewise.
(allocate_dynrelocs_for_symbol): Likewise.
(elf32_arm_size_dynamic_sections): Update comment.
* reloc.c: Add BFD_RELOC_ARM_TLS_GD32_FDPIC,
BFD_RELOC_ARM_TLS_LDM32_FDPIC, BFD_RELOC_ARM_TLS_IE32_FDPIC.
gas/
* config/tc-arm.c (reloc_names): Add TLSGD_FDPIC, TLSLDM_FDPIC,
GOTTPOFF_FDIC relocations.
(md_apply_fix): Handle the new TLS FDPIC relocations.
(tc_gen_reloc): Likewise.
(arm_fix_adjustable): Likewise.
include/
* elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
R_ARM_TLS_IE32_FDPIC.
ld/
* scripttempl/elf.sc: Define __tdata_start for .tdata section.
FDPIC requires special PLT entries, defined in this patch.
Note that lazy binding is not supported because of a race condition
for lack of an atomic 64-bits load instruction.
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
bfd/
* elf32-arm.c (elf32_arm_fdpic_plt_entry): New.
(elf32_arm_create_dynamic_sections): Handle FDPIC.
(elf32_arm_allocate_plt_entry): Likewise.
(elf32_arm_populate_plt_entry): Likewise.
(elf32_arm_output_plt_map_1): Likewise.
ELF files targetting ARM FDPIC use the ELFOSABI_ARM_FDPIC flag.
Set it appropriately in file generators (eg. gas), and handle it in
readers (eg. readelf).
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
bfd/
* elf32-arm.c (elf32_arm_print_private_bfd_data): Support
EF_ARM_PIC and ELFOSABI_ARM_FDPIC.
(elf32_arm_post_process_headers): Support ELFOSABI_ARM_FDPIC.
(ELF_OSABI): Define to ELFOSABI_ARM_FDPIC.
binutils/
* readelf.c (decode_ARM_machine_flags): Support EF_ARM_PIC.
(get_osabi_name): Support ELFOSABI_ARM_FDPIC.
gas/
* config/tc-arm.c (arm_fdpic): New.
(elf32_arm_target_format): Support FDPIC.
(OPTION_FDPIC): New.
(md_longopts): Support FDPIC.
(md_parse_option): Likewise.
(md_show_usage): Likewise.
include/
* elf/arm.h (EF_ARM_FDPIC): New.
More standarization of error/warning messages. The ARM backend has
some multi-line error messages, which don't fit particularly well with
the GNU coding standard insistence that error messages shouldn't be
capitalized or have a full-stop. I've replaced the line breaks with
semicolons.
So for instance the following
system/path/to/ld: myobject.o: invalid special symbol `foo'.
system/path/to/ld: It must be a global or weak function symbol.
becomes
system/path/to/ld: myobject.o: invalid special symbol `foo'; it must be a global or weak function symbol
bfd/
* elf32-arm.c, * elfnn-aarch64.c: Standardize error/warning messages.
ld/
* testsuite/ld-aarch64/reloc-overflow-bad.d,
* testsuite/ld-arm/attr-merge-9.out,
* testsuite/ld-arm/attr-merge-arch-2.d,
* testsuite/ld-arm/attr-merge-unknown-1.d,
* testsuite/ld-arm/attr-merge-unknown-2.d,
* testsuite/ld-arm/attr-merge-unknown-2r.d,
* testsuite/ld-arm/attr-merge-unknown-3.d,
* testsuite/ld-arm/cmse-implib-errors.out,
* testsuite/ld-arm/cmse-new-earlier-later-implib.out,
* testsuite/ld-arm/cmse-new-implib-no-output.out,
* testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out,
* testsuite/ld-arm/cmse-new-implib.out,
* testsuite/ld-arm/cmse-new-wrong-implib.out,
* testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out,
* testsuite/ld-arm/cmse-veneers-wrong-entryfct.out,
* testsuite/ld-arm/group-relocs-alu-bad-2.d,
* testsuite/ld-arm/group-relocs-alu-bad.d,
* testsuite/ld-arm/group-relocs-ldc-bad-2.d,
* testsuite/ld-arm/group-relocs-ldc-bad.d,
* testsuite/ld-arm/group-relocs-ldr-bad-2.d,
* testsuite/ld-arm/group-relocs-ldr-bad.d,
* testsuite/ld-arm/group-relocs-ldrs-bad-2.d,
* testsuite/ld-arm/group-relocs-ldrs-bad.d,
* testsuite/ld-arm/stm32l4xx-cannot-fix-far-ldm.d: Update.
In early October, HJ Lu added support for a number of targets to "Dump
dynamic relocation in read-only section with minfo". This extends
that support to more targets, displays the symbol involved, and splits
the existing function that sets TEXTREL into a "readonly_dynrelocs"
and "maybe_set_textrel" function. I'll need "readonly_dynrelocs" if I
ever get around to fixing "pr22374 function pointer initialization"
fails.
am33_2.0, arc, bfin, hppa64, mn10300, and nios2 fail to mark a binary
needing text relocations with DT_TEXTREL. That's not good. xtensa also
fails to do so but complains about "dangerous relocation: dynamic
relocation in read-only section" so I reckon that is fine and have
marked the test as an xfail. The other targets need maintainer
attention.
Curiously, the map file dump wasn't added for x86, so the map test
currently fail on x86. It also fails on alpha, am33_2.0, arc, bfin,
hppa64, ia64, m68k, mips, mn10300, nios2, score and vax. cris
complains with "tmpdir/textrel.o, section .rodata: relocation
R_CRIS_32 should not be used in a shared object; recompile with -fPIC"
so I've marked it as an xfail.
bfd/
* elf32-hppa.c (maybe_set_textrel): Print symbol for map file output.
* elf32-ppc.c (maybe_set_textrel): Likewise.
* elf64-ppc.c (maybe_set_textrel): Likewise.
* elf32-arm.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing..
(elf32_arm_readonly_dynrelocs): ..this.
* elf32-lm32.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing old version of..
(readonly_dynrelocs): ..this.
* elf32-m32r.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing old version of..
(readonly_dynrelocs): ..this.
* elf32-metag.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing old version of..
(readonly_dynrelocs): ..this.
* elf32-nds32.c: Delete unnecessary forward declarations.
(readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing old version of..
(readonly_dynrelocs): ..this.
* elf32-or1k.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing old version of..
(readonly_dynrelocs): ..this.
* elf32-s390.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing old version of..
(readonly_dynrelocs): ..this.
* elf32-sh.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing old version of..
(readonly_dynrelocs): ..this.
* elf32-tic6x.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing..
(elf32_tic6x_readonly_dynrelocs): ..this.
* elf32-tilepro.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing old version of..
(readonly_dynrelocs): ..this.
* elf64-s390.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing old version of..
(readonly_dynrelocs): ..this.
* elfnn-aarch64.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing..
(aarch64_readonly_readonly_dynrelocs): ..this.
* elfnn-riscv.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing old version of..
(readonly_dynrelocs): ..this.
* elfxx-sparc.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing old version of..
(readonly_dynrelocs): ..this.
* elfxx-tilegx.c (readonly_dynrelocs): New function.
(maybe_set_textrel): New function, replacing old version of..
(readonly_dynrelocs): ..this.
ld/
* testsuite/ld-elf/shared.exp: Run new textrel tests.
* testsuite/ld-elf/textrel.map: New file.
* testsuite/ld-elf/textrel.rd: New file.
* testsuite/ld-elf/textrel.s: New file.
* testsuite/ld-elf/textrel.warn: New file.
This makes the elf_link_hash_entry weakdef field, currently used to
point from a weak symbol to a strong alias, a circular list so that
all aliases can be found from any of them. A new flag, is_weakalias,
distinguishes the weak symbol from a strong alias, and is used in all
places where we currently test u.weakdef != NULL.
With the original u.weakdef handling it was possible to have two or
more weak symbols pointing via u.weakdef to a strong definition.
Obviously that situation can't map to a circular list; One or more of
the weak symbols must point at another weak alias rather than the
strong definition. To handle that, I've added an accessor function to
return the strong definition.
* elf-bfd.h (struct elf_link_hash_entry): Add is_weakalias.
Rename u.weakdef to u.alias and update comment.
(weakdef): New static inline function.
* elflink.c (bfd_elf_record_link_assignment) Test is_weakalias
rather than u.weakdef != NULL, and use weakdef function.
(_bfd_elf_adjust_dynamic_symbol): Likewise.
(_bfd_elf_fix_symbol_flags): Likewise. Clear is_weakalias on
all aliases if def has been overridden in a regular object, not
u.weakdef.
(elf_link_add_object_symbols): Delete new_weakdef flag. Test
is_weakalias and use weakdef. Set is_weakalias and circular
u.alias. Update comments.
(_bfd_elf_gc_mark_rsec): Test is_weakalias rather than
u.weakdef != NULL and use weakdef function.
* elf-m10300.c (_bfd_mn10300_elf_adjust_dynamic_symbol): Test
is_weakalias rather than u.weakdef != NULL and use weakdef
function. Assert that def is strong defined.
* elf32-arc.c (elf_arc_adjust_dynamic_symbol): Likewise.
* elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Likewise.
* elf32-bfin.c (elf32_bfinfdpic_adjust_dynamic_symbol): Likewise.
(bfin_adjust_dynamic_symbol): Likewise.
* elf32-cr16.c (_bfd_cr16_elf_adjust_dynamic_symbol): Likewise.
* elf32-cris.c (elf_cris_adjust_dynamic_symbol): Likewise.
* elf32-frv.c (elf32_frvfdpic_adjust_dynamic_symbol): Likewise.
* elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol): Likewise.
* elf32-i370.c (i370_elf_adjust_dynamic_symbol): Likewise.
* elf32-lm32.c (lm32_elf_adjust_dynamic_symbol): Likewise.
* elf32-m32r.c (m32r_elf_adjust_dynamic_symbol): Likewise.
* elf32-m68k.c (elf_m68k_adjust_dynamic_symbol): Likewise.
* elf32-metag.c (elf_metag_adjust_dynamic_symbol): Likewise.
* elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Likewise.
* elf32-nds32.c (nds32_elf_adjust_dynamic_symbol): Likewise.
* elf32-nios2.c (nios2_elf32_adjust_dynamic_symbol): Likewise.
* elf32-or1k.c (or1k_elf_adjust_dynamic_symbol): Likewise.
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol): Likewise.
* elf32-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
* elf32-score.c (s3_bfd_score_elf_adjust_dynamic_symbol): Likewise.
* elf32-score7.c (s7_bfd_score_elf_adjust_dynamic_symbol): Likewise.
* elf32-sh.c (sh_elf_adjust_dynamic_symbol): Likewise.
* elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol): Likewise.
* elf32-tilepro.c (tilepro_elf_gc_mark_hook): Likewise.
(tilepro_elf_adjust_dynamic_symbol): Likewise.
* elf32-vax.c (elf_vax_adjust_dynamic_symbol): Likewise.
* elf32-xtensa.c (elf_xtensa_adjust_dynamic_symbol): Likewise.
* elf64-alpha.c (elf64_alpha_adjust_dynamic_symbol): Likewise.
* elf64-hppa.c (elf64_hppa_adjust_dynamic_symbol): Likewise.
* elf64-ia64-vms.c (elf64_ia64_adjust_dynamic_symbol): Likewise.
* elf64-ppc.c (ppc64_elf_gc_mark_hook): Likewise.
(ppc64_elf_adjust_dynamic_symbol): Likewise.
* elf64-s390.c (elf_s390_adjust_dynamic_symbol): Likewise.
* elf64-sh64.c (sh64_elf64_adjust_dynamic_symbol): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol): Likewise.
* elfnn-ia64.c (elfNN_ia64_adjust_dynamic_symbol): Likewise.
* elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol): Likewise.
* elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_gc_mark_hook): Likewise.
(_bfd_sparc_elf_adjust_dynamic_symbol): Likewise.
* elfxx-tilegx.c (tilegx_elf_gc_mark_hook): Likewise.
(tilegx_elf_adjust_dynamic_symbol): Likewise.
* elfxx-x86.c (_bfd_x86_elf_adjust_dynamic_symbol): Likewise.
Don't generate dynamic relocation against weak undefined symbol if it
is resolved to zero. FIXME: UNDEFWEAK_NO_DYNAMIC_RELOC may need to be
checked in more places.
PR ld/22269
* elf32-arm.c (elf32_arm_final_link_relocate): Don't generate
dynamic relocation if UNDEFWEAK_NO_DYNAMIC_RELOC is true.
(allocate_dynrelocs_for_symbol): Discard dynamic relocations
if UNDEFWEAK_NO_DYNAMIC_RELOC is true.
Fix commit 70a38d42c5 ("New entry points for writing Linux NT_PRPSINFO
notes."), <https://sourceware.org/ml/binutils/2013-02/msg00023.html>,
and commit b3ac9c7756 ("Put more info in NT_PRPSINFO Linux notes"),
<https://sourceware.org/ml/binutils/2013-02/msg00024.html>, and handle
both variants of the 32-bit Linux core PRPSINFO note across all targets.
The 32-bit Linux core PRPSINFO note matches the 32-bit kernel structure,
defined as follows:
(gdb) ptype struct elf_prpsinfo
type = struct elf_prpsinfo {
char pr_state;
char pr_sname;
char pr_zomb;
char pr_nice;
unsigned long pr_flag;
__kernel_uid_t pr_uid;
__kernel_gid_t pr_gid;
pid_t pr_pid;
pid_t pr_ppid;
pid_t pr_pgrp;
pid_t pr_sid;
char pr_fname[16];
char pr_psargs[80];
}
(gdb)
where the individual data types of most members are the same across all
32-bit Linux ports, with the exception of `__kernel_uid_t' and
`__kernel_gid_t'. These are defined in <asm-generic/posix_types.h> as
32-bit `unsigned int' by default, however overridden as 16-bit `unsigned
short' in port-specific <asm/posix_types.h> for a few targets, mostly
earlier ports of Linux, specifically: ARM, CRIS, FR-V, M32R, m68k,
MN10300/AM33, s390, SuperH, SPARC and i386.
The default is the same as the PowerPC variant already handled, as from
the commits referred. Make the special PowerPC case generic then,
removing the GDB part, and provide a backend flag to switch between the
two cases possible, with the 32-bit one being the default and the 16-bit
one explicitly selected. Set the flag in the target backends affected.
bfd/
* elf-bfd.h (elf_backend_data): Add `linux_prpsinfo32_ugid16'
member.
(elfcore_write_ppc_linux_prpsinfo32): Remove prototype.
* elf32-ppc.c (elfcore_write_ppc_linux_prpsinfo32): Remove.
(elf_external_ppc_linux_prpsinfo32)
(swap_ppc_linux_prpsinfo32_out): Move to...
* elf-linux-core.h (elf_external_linux_prpsinfo32_ugid32)
(swap_linux_prpsinfo32_ugid32_out): ... these.
(elf_external_linux_prpsinfo32): Rename to...
(elf_external_linux_prpsinfo32_ugid16): ... this.
(swap_linux_prpsinfo32_out): Rename to...
(swap_linux_prpsinfo32_ugid16_out): ... this.
* elfxx-target.h [!elf_backend_linux_prpsinfo32_ugid16]
(elf_backend_linux_prpsinfo32_ugid16): Define.
(elfNN_bed): Initialize `linux_prpsinfo32_ugid16' member.
* elf.c (elfcore_write_linux_prpsinfo32): Handle both variants
of the 32-bit Linux core PRPSINFO note.
* elf32-am33lin.c (elf_backend_linux_prpsinfo32_ugid16): Define.
* elf32-arm.c (elf_backend_linux_prpsinfo32_ugid16): Define.
* elf32-cris.c (elf_backend_linux_prpsinfo32_ugid16): Define.
* elf32-frv.c (elf_backend_linux_prpsinfo32_ugid16): Define.
* elf32-i386.c (elf_backend_linux_prpsinfo32_ugid16): Define.
* elf32-m32r.c (elf_backend_linux_prpsinfo32_ugid16): Define.
* elf32-m68k.c (elf_backend_linux_prpsinfo32_ugid16): Define.
* elf32-s390.c (elf_backend_linux_prpsinfo32_ugid16): Define.
* elf32-sh.c (elf_backend_linux_prpsinfo32_ugid16): Define.
* elf32-sparc.c (elf_backend_linux_prpsinfo32_ugid16): Define.
gdb/
* ppc-linux-tdep.c (ppc_linux_init_abi): Remove call to
`set_gdbarch_elfcore_write_linux_prpsinfo'.
Similar as aarch64 backend, arm backend only overrides the decision on undefined
weak symbols. arm backend part already emits necessary relative relocation for
this case.
bfd/
PR ld/21402
* elf32-arm.c (allocate_dynrelocs_for_symbol): Only make undefined weak
symbols into dynamic.
ld/
PR ld/21402
* testsuite/ld-arm/tls-app.d: Update address.
* testsuite/ld-arm/tls-app.r: Remove relocations.
* testsuite/ld-arm/unresolved-1-dyn.d: Update.
=== Context ===
This patch is part of a patch series to add support for ARMv8-R
architecture. Its purpose is to add support for ARMv8-R in the linker.
=== Patch description ===
This patch is composed of 3 changes:
1) The main change is the addition of the logic for merging a file whose
Tag_CPU_arch build attribute is 15 (ARMv8-R). Namely, all pre-ARMv8 are
merged into ARMv8-R as well as ARMv8-R itself. ARMv8-A (14) merges into
ARMv8-A. ARMv8-M Baseline (16) and Mainline (17) are not allowed to
merge merge with ARMv8-R. Note that merging only occurs if the two
profiles are identical or one is S (Application or Realtime) and the
other is R.
2) using_thumb_only, using_thumb2_bl, using_thumb2 and arch_has_arm_nop
are updated according to capabilities of ARMv8-R and their BFD_ASSERT
updated to reflect that the logic is valid for ARMv8-R.
3) 2 build attribute merging tests are added to test the first change.
2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (using_thumb_only): Update list of architectures in
BFD_ASSERT for which the logic is valid.
(using_thumb2_bl): Likewise.
(using_thumb2): Likewise and return true for ARMv8-R.
(arch_has_arm_nop): Likewise.
(tag_cpu_arch_combine): New v8r table for ARMv8-R Tag_CPU_arch
merging logic. Update commentis for value 15 of v8m_baseline,
v8m_mainline and v4t_plus_v6_m arrays. Use v8r array to decide
merging of value 15 of Tag_CPU_arch.
ld/
* testsuite/ld-arm/arm-elf.exp (EABI attribute merging 11): New test.
(EABI attribute merging 12): Likewise.
* testsuite/ld-arm/attr-merge-11a.s: New file.
* testsuite/ld-arm/attr-merge-11b.s: New file.
* testsuite/ld-arm/attr-merge-11.attr: New file.
* testsuite/ld-arm/attr-merge-12a.s: New file.
* testsuite/ld-arm/attr-merge-12b.s: New file.
* testsuite/ld-arm/attr-merge-12.attr: New file.
It's generally a bad idea to use assertions to validate our idea of
what an input file looks like. We need to be as liberal as possible
in what we accept with respect to standards and conservative with what
we produce.
Currently, if gcc is used to produce an assembler file which contains
only data, but the FPU is set to fpv4-sp-d16 and mfloat-abi=hard, then
the following attributes will be set in the output:
.cpu arm7tdmi
.eabi_attribute 27, 1 @ Tag_ABI_HardFP_use
.eabi_attribute 28, 1 @ Tag_ABI_VFP_args
.eabi_attribute 20, 1 @ Tag_ABI_FP_denormal
.eabi_attribute 21, 1 @ Tag_ABI_FP_exceptions
.eabi_attribute 23, 3 @ Tag_ABI_FP_number_model
.eabi_attribute 24, 1 @ Tag_ABI_align8_needed
.eabi_attribute 25, 1 @ Tag_ABI_align8_preserved
.eabi_attribute 26, 2 @ Tag_ABI_enum_size
.eabi_attribute 30, 6 @ Tag_ABI_optimization_goals
.eabi_attribute 34, 0 @ Tag_CPU_unaligned_access
.eabi_attribute 18, 4 @ Tag_ABI_PCS_wchar_t
There is then no .fpu directive to cause Tag_FP_arch to be set,
because there are no functions containing code in the object file. If
this object file is assembled by hand, but without -mfpu on the
invocation of the assembler, then the build attributes produced will
trigger an assertion during linking.
Thinking about the build attributes, the combination of a
single-precision only implementation of no floating-point architecture
is still no floating-point architecture. Hence the assertion on the
input BFD in the linker makes no real sense.
We should, however, be more conservative in what we generate, so I've
left the assertion on the output bfd in place; I don't think we can
trigger it with this change since we never merge the problematic tags
from a perversely generated input file.
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Remove assertion
that the input bfd has Tag_FP_ARCH non-zero if Tag_ABI_HardFP_use
is non-zero. Add clarifying comments.
PR ld/21458
* elf32-arm.c (elf32_arm_final_link_relocate): Set the bottom bit
of the value when resolving a R_ARM_THM_ALU_PREL_11_0 relocation
and the destination is a Thumb symbol.
For ELF targets --out-implib currently generates an executable file
(e_type is ET_EXEC) despite the file being expected to be linked against
some other object file to make an executable later. It seems therefore
more sensible to make the import library a relocatable object file
(e_type set to ET_REL).
Incidentally, as dicted by requirement 8 of
"ARM v8-M Security Extensions: Requirements on Development Tools"
(document ARM-ECM-0359818) version 1.0, import libraries generated when
using --cmse-implib *must* be relocatable object file so this commit
also adds an assert there in case the type of ELF import library is
changed again in the future.
2017-05-08 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elflink.c (elf_output_implib): Remove executable flag from import
library bfd.
* elf32-arm.c (elf32_arm_filter_implib_symbols): Assert that the import
library is a relocatable object file.
ld/
* testsuite/ld-arm/arm-elf.exp
(Secure gateway import library generation): Check e_type field
of import library and executable produced.
* testsuite/ld-arm/cmse-implib.type: Expectations for e_type field.
Not a comprehensive change, just some split out from fixes made for
the %A and %B changes.
* coffcode.h: Wrap some overly long _bfd_error_handler args.
* elf.c: Likewise.
* elf32-arm.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-mep.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfxx-mips.c: Likewise.
This steals _doprnt from libiberty, extended to handle %A and %B.
Which lets us do away with the current horrible %A and %B handling
that requires all %A and %B arguments to be passed first, rather than
in the natural order.
* bfd.c (PRINT_TYPE): Define.
(_doprnt): New function.
(error_handler_internal): Use _doprnt.
* coff-arm.c: Put %A and %B arguments to _bfd_error_handler
calls in their natural order, throughout file.
* coff-mcore.c: Likewise.
* coff-ppc.c: Likewise.
* coff-tic80.c: Likewise.
* cofflink.c: Likewise.
* elf-s390-common.c: Likewise.
* elf.c: Likewise.
* elf32-arm.c: Likewise.
* elf32-i386.c: Likewise.
* elf32-m32r.c: Likewise.
* elf32-msp430.c: Likewise.
* elf32-spu.c: Likewise.
* elf64-ia64-vms.c: Likewise.
* elf64-sparc.c: Likewise.
* elf64-x86-64.c: Likewise.
* elflink.c: Likewise.
* elfnn-aarch64.c: Likewise.
* elfnn-ia64.c: Likewise.
* elfxx-mips.c: Likewise.
* elf32-arm.c (arm_type_of_stub): Supply missing args to "long
branch veneers" error. Fix double space and format message.
* elf32-avr.c (avr_add_stub): Do not pass NULL as %B arg.
* elf64-ppc.c (tocsave_find): Supply missing %B arg.
I'd made this dynamic section read-only so a flag test distinguished
it from .dynbss, but like any other .data.rel.ro section it really
should be marked read-write. (It is read-only after relocation, not
before.) When using the standard linker scripts this usually doesn't
matter since the output section is among other read-write sections and
not page aligned. However, it might matter in the extraordinary case
of the dynamic section being the only .data.rel.ro section with the
output section just happening to be page aligned and a multiple of a
page in size. In that case the output section would be read-only, and
live it its own read-only PT_LOAD segment, which is incorrect.
* elflink.c (_bfd_elf_create_dynamic_sections): Don't make
dynamic .data.rel.ro read-only.
* elf32-arm.c (elf32_arm_finish_dynamic_symbol): Compare section
rather than section flags when deciding where copy reloc goes.
* elf32-cris.c (elf_cris_finish_dynamic_symbol): Likewise.
* elf32-hppa.c (elf32_hppa_finish_dynamic_symbol): Likewise.
* elf32-i386.c (elf_i386_finish_dynamic_symbol): Likewise.
* elf32-metag.c (elf_metag_finish_dynamic_symbol): Likewise.
* elf32-microblaze.c (microblaze_elf_finish_dynamic_symbol): Likewise.
* elf32-nios2.c (nios2_elf32_finish_dynamic_symbol): Likewise.
* elf32-or1k.c (or1k_elf_finish_dynamic_symbol): Likewise.
* elf32-ppc.c (ppc_elf_finish_dynamic_symbol): Likewise.
* elf32-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
* elf32-tic6x.c (elf32_tic6x_finish_dynamic_symbol): Likewise.
* elf32-tilepro.c (tilepro_elf_finish_dynamic_symbol): Likewise.
* elf64-ppc.c (ppc64_elf_finish_dynamic_symbol): Likewise.
* elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise.
* elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol): Likewise.
* elfnn-riscv.c (riscv_elf_finish_dynamic_symbol): Likewise.
* elfxx-mips.c (_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_finish_dynamic_symbol): Likewise.
* elfxx-tilegx.c (tilegx_elf_finish_dynamic_symbol): Likewise.
Variables defined in shared libraries are copied into an executable's
.bss section when code in the executable is non-PIC and thus would
require dynamic text relocations to access the variable directly in
the shared library. Recent x86 toolchains also copy variables into
the executable to gain a small speed improvement.
The problem is that if the variable was originally read-only, the copy
in .bss is writable, potentially opening a security hole. This patch
cures that problem by putting the copy in a section that becomes
read-only after ld.so relocation, provided -z relro is in force.
The patch also fixes a microblaze linker segfault on attempting to
use dynamic bss variables.
bfd/
PR ld/20995
* elf-bfd.h (struct elf_link_hash_table): Add sdynrelro and
sreldynrelro.
(struct elf_backend_data): Add want_dynrelro.
* elfxx-target.h (elf_backend_want_dynrelro): Define.
(elfNN_bed): Update initializer.
* elflink.c (_bfd_elf_create_dynamic_sections): Create
sdynrelro and sreldynrelro sections.
* elf32-arm.c (elf32_arm_adjust_dynamic_symbol): Place variables
copied into the executable from read-only sections into sdynrelro.
(elf32_arm_size_dynamic_sections): Handle sdynrelro.
(elf32_arm_finish_dynamic_symbol): Select sreldynrelro for
dynamic relocs in sdynrelro.
(elf_backend_want_dynrelro): Define.
* elf32-hppa.c (elf32_hppa_adjust_dynamic_symbol)
(elf32_hppa_size_dynamic_sections, elf32_hppa_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-i386.c (elf_i386_adjust_dynamic_symbol)
(elf_i386_size_dynamic_sections, elf_i386_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-metag.c (elf_metag_adjust_dynamic_symbol)
(elf_metag_size_dynamic_sections, elf_metag_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol)
(microblaze_elf_size_dynamic_sections)
(microblaze_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-nios2.c (nios2_elf32_finish_dynamic_symbol)
(nios2_elf32_adjust_dynamic_symbol)
(nios2_elf32_size_dynamic_sections)
(elf_backend_want_dynrelro): As above.
* elf32-or1k.c (or1k_elf_finish_dynamic_symbol)
(or1k_elf_adjust_dynamic_symbol, or1k_elf_size_dynamic_sections)
(elf_backend_want_dynrelro): As above.
* elf32-ppc.c (ppc_elf_adjust_dynamic_symbol)
(ppc_elf_size_dynamic_sections, ppc_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-s390.c (elf_s390_adjust_dynamic_symbol)
(elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-tic6x.c (elf32_tic6x_adjust_dynamic_symbol)
(elf32_tic6x_size_dynamic_sections)
(elf32_tic6x_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf32-tilepro.c (tilepro_elf_adjust_dynamic_symbol)
(tilepro_elf_size_dynamic_sections)
(tilepro_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf64-ppc.c (ppc64_elf_adjust_dynamic_symbol)
(ppc64_elf_size_dynamic_sections, ppc64_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf64-s390.c (elf_s390_adjust_dynamic_symbol)
(elf_s390_size_dynamic_sections, elf_s390_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elf64-x86-64.c (elf_x86_64_adjust_dynamic_symbol)
(elf_x86_64_size_dynamic_sections)
(elf_x86_64_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elfnn-aarch64.c (elfNN_aarch64_adjust_dynamic_symbol)
(elfNN_aarch64_size_dynamic_sections)
(elfNN_aarch64_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol)
(riscv_elf_size_dynamic_sections, riscv_elf_finish_dynamic_symbol)
(elf_backend_want_dynrelro): As above.
* elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol)
(_bfd_mips_elf_size_dynamic_sections)
(_bfd_mips_vxworks_finish_dynamic_symbol): As above.
* elfxx-sparc.c (_bfd_sparc_elf_adjust_dynamic_symbol)
(_bfd_sparc_elf_size_dynamic_sections)
(_bfd_sparc_elf_finish_dynamic_symbol): As above.
* elfxx-tilegx.c (tilegx_elf_adjust_dynamic_symbol)
(tilegx_elf_size_dynamic_sections)
(tilegx_elf_finish_dynamic_symbol): As above.
* elf32-mips.c (elf_backend_want_dynrelro): Define.
* elf64-mips.c (elf_backend_want_dynrelro): Define.
* elf32-sparc.c (elf_backend_want_dynrelro): Define.
* elf64-sparc.c (elf_backend_want_dynrelro): Define.
* elf32-tilegx.c (elf_backend_want_dynrelro): Define.
* elf64-tilegx.c (elf_backend_want_dynrelro): Define.
* elf32-microblaze.c (microblaze_elf_adjust_dynamic_symbol): Tidy.
(microblaze_elf_size_dynamic_sections): Handle sdynbss.
* elf32-nios2.c (nios2_elf32_size_dynamic_sections): Make use
of linker shortcuts to dynamic sections rather than comparing
names. Correctly set "got" flag.
ld/
PR ld/20995
* testsuite/ld-arm/farcall-mixed-app-v5.d: Update to suit changed
stub hash table traversal caused by section id increment. Accept
the previous output too.
* testsuite/ld-arm/farcall-mixed-app.d: Likewise.
* testsuite/ld-arm/farcall-mixed-lib-v4t.d: Likewise.
* testsuite/ld-arm/farcall-mixed-lib.d: Likewise.
* testsuite/ld-elf/pr20995a.s, * testsuite/ld-elf/pr20995b.s,
* testsuite/ld-elf/pr20995.r: New test.
* testsuite/ld-elf/elf.exp: Run it.
bfd/elf32_arm.c contains a function 'popcount' which conflicts
with a function of the same name in NetBSD's libc.
This change also changes popcount's 'sum' variable to signed
since the function returns a signed integer.
bfd/
* elf32-arm.c (elf32_arm_popcount): Rename from 'popcount'. Make
'sum' local variable signed.
bfd/
PR target/20737
* elf32-arm.c (elf32_arm_final_link_relocate): Bind defined symbol
locally in PIE.
ld/
* testsuite/ld-arm/pie-bind-locally-a.s: New test source.
* testsuite/ld-arm/pie-bind-locally-b.s: Likewise.
* testsuite/ld-arm/pie-bind-locally.d: New testcase.
* testsuite/ld-arm/arm-elf.exp: Run new testcase.
Fix a commit 5025eb7c0d ("Delete relocations associatesd with deleted
exidx entries.") build regression:
cc1: warnings being treated as errors
.../bfd/elf32-arm.c: In function 'elf32_arm_update_relocs':
.../bfd/elf32-arm.c:14951: warning: declaration of 'index' shadows a global declaration
/usr/include/string.h:304: warning: shadowed declaration is here
make[3]: *** [elf32-arm.lo] Error 1
in a way following commit 91d6fa6a03 ("Add -Wshadow to the gcc command
line options used when compiling the binutils.").
bfd/
* elf32-arm.c (elf32_arm_update_relocs): Rename `index' local
variable to `reloc_index'.
PR ld/20636
* elf-bfd.h (struct elf_backend_data): Delete
elf_backend_count_output_relocs callback and add
elf_backend_update_relocs.
* elf32-arm.c (elf32_arm_count_output_relocs): Deleted.
(emit_relocs): Deleted.
(elf32_arm_emit_relocs): Deleted.
(elf_backend_emit_relocs): Updated not to use the old functions.
(elf32_arm_update_relocs): New function.
(elf_backend_update_relocs): New define.
* elflink.c (bfd_elf_final_link): Add additional_reloc_count to the
relocation count. Call elf_backend_emit_relocs.
(_bfd_elf_size_reloc_section): Do not call
elf_backend_count_output_relocs.
* elfxx-target.h (elf_backend_count_output_relocs): Deleted.
(elf_backend_update_relocs): New define.
2016-09-28 Christophe Lyon <christophe.lyon@linaro.org>
PR ld/20608
bfd/
* elf32-arm.c (arm_type_of_stub): Handle the case when the pre-PLT
Thumb-ARM stub is too far.
ld
* testsuite/ld-arm/arm-elf.exp: Handle new testcase.
* testsuite/ld-arm/farcall-mixed-app2.d: New file.
* testsuite/ld-arm/farcall-mixed-app2.r: Likewise.
* testsuite/ld-arm/farcall-mixed-app2.s: Likewise.
* testsuite/ld-arm/farcall-mixed-app2.sym: Likewise.
PR ld/20595
ld * testsuite/ld-arm/unwind-4.d: Add -q option to linker command
line and -r option to objdump command line. Match emitted relocs
to make sure that superflous relocs are not generated.
bfd * elf-bfd.h (struct elf_backend_data): Add
elf_backend_count_output_relocs callback to count relocations in
the final output.
* elf-arm.c (elf32_arm_add_relocation): Deleted.
(elf32_arm_write_section): Move additional relocation to emit_relocs.
(elf32_arm_count_output_relocs): New function.
(emit_relocs): New function.
(elf32_arm_emit_relocs): New function.
(elf32_arm_vxworks_emit_relocs): New function.
(elf_backend_emit_relocs): Updated to use the new functions.
(elf_backend_count_output_relocs): New define.
* bfd/elflink.c (bfd_elf_final_link): Do not add additional_reloc_count
to the relocation count.
(_bfd_elf_link_size_reloc_section): Use callback to count the
relocations which will be in output.
(_bfd_elf_default_count_output_relocs): New function.
* bfd/elfxx-target.h (elf_backend_count_output_relocs): New define.
bfd/
2016-09-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* elf32-arm.c (elf32_arm_gc_mark_extra_sections): Only mark section
not already marked.
ld/
2016-09-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* testsuite/ld-arm/cmse-veneers.s: Add a test for ARMv8-M Security
Extensions entry functions in absolute section.
* testsuite/ld-arm/cmse-veneers.rd: Adapt expected output accordingly.
bfd/
* elf32-arm.c (cmse_entry_fct_p): Store instruction encoding in an
array of bytes and use bfd_get_16 to interpret its encoding according
to endianness of target.
2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd-in.h (struct elf32_arm_params): Define.
(bfd_elf32_arm_set_target_relocs): Rename into ...
(bfd_elf32_arm_set_target_params): This. Use a struct
elf32_arm_params to pass all parameters but the bfd and bfd_link_info.
* bfd-in2.h: Regenerate.
* elf32-arm.c (bfd_elf32_arm_set_target_relocs): Rename into ...
(bfd_elf32_arm_set_target_params): This. Pass all values via a struct
elf32_arm_params rather than as individual parameters.
ld/
* emultempl/armelf.em (params): New static variable.
(thumb_entry_symbol, byteswap_code, target1_is_rel, target2_type,
fix_v4bx, use_blx, vfp11_denorm_fix, stm32l4xx_fix, fix_cortex_a8,
no_enum_size_warning, no_wchar_size_warning, pic_veneer,
merge_exidx_entries, fix_arm1176, cmse_implib): move as part of the
above new structure.
(arm_elf_before_allocation): Access static variable from the params
structure.
(gld${EMULATION_NAME}_finish): Likewise.
(arm_elf_create_output_section_statements): Likewise and pass the
address of that structure to bfd_elf32_arm_set_target_relocs instead
of the static variables.
(PARSE_AND_LIST_ARGS_CASES): Access static variable from the params
structure.
bfd/
* elf32-arm.c (elf32_arm_get_stub_entry): Assert that we don't access
passed the end of htab->stub_group array.
(elf32_arm_create_or_find_stub_sec): Likewise.
(elf32_arm_create_stub): Likewise.
2016-08-26 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd-in.h (bfd_elf32_arm_set_target_relocs): Add a new parameter for
the input import library bfd.
* bfd-in2.h: Regenerate.
* elf32-arm.c (struct elf32_arm_link_hash_table): New in_implib_bfd
and new_cmse_stub_offset fields.
(stub_hash_newfunc): Initialize stub_offset and stub_template_size to
-1.
(elf32_arm_add_stub): Likewise for stub_offset.
(arm_new_stubs_start_offset_ptr): New function.
(arm_build_one_stub): Only allocate a stub_offset if it is -1. Allow
empty SG veneers to have zero relocations.
(arm_size_one_stub): Only initialize stub size and template
information for non empty veneers. Do not update veneer section size
if veneer already has an offset.
(elf32_arm_create_stub): Return the stub entry pointer or NULL instead
of a boolean indicating success or failure.
(cmse_scan): Change stub_changed parameter into an integer pointer
parameter cmse_stub_created to count the number of stub created and
adapt to change of return value in elf32_arm_create_stub.
(cmse_entry_fct_p): New function.
(arm_list_new_cmse_stub): Likewise.
(set_cmse_veneer_addr_from_implib): Likewise.
(elf32_arm_size_stubs): Define cmse_stub_created, pass its address to
cmse_scan instead of that of cmse_stub_changed to compute the number
of stub created and use it to initialize stub_changed. Call
set_cmse_veneer_addr_from_implib after all cmse_scan. Adapt to change
of return value in elf32_arm_create_stub. Use
arm_stub_section_start_offset () if not NULL to initialize size of
secure gateway veneers section. Initialize stub_offset of Cortex-A8
erratum fix to -1. Use ret to hold return value.
(elf32_arm_build_stubs): Use arm_stub_section_start_offset () if not
NULL to initialize size of secure gateway veneers section. Adapt
comment to stress the importance of zeroing veneer section content.
(bfd_elf32_arm_set_target_relocs): Add new in_implib_bfd parameter to
initialize eponymous field in struct elf32_arm_link_hash_table.
ld/
* emultempl/armelf.em (in_implib_filename): Declare and initialize new
variable.
(arm_elf_create_output_section_statements): Open import input library
file for writing and pass resulting in_implib_bfd to
bfd_elf32_arm_set_target_relocs.
(PARSE_AND_LIST_PROLOGUE): Define OPTION_IN_IMPLIB option.
(PARSE_AND_LIST_LONGOPTS): Define --in-implib option.
(PARSE_AND_LIST_OPTIONS): Add help message for --in-implib option.
(PARSE_AND_LIST_ARGS_CASES): Handle new OPTION_IN_IMPLIB case.
* ld.texinfo (--cmse-implib): Update to mention --in-implib.
(--in-implib): Document new option.
* NEWS: Likewise.
* testsuite/ld-arm/arm-elf.exp
(Secure gateway import library generation): add --defsym VER=1 to gas
CLI.
(Secure gateway import library generation: errors): Likewise.
(Input secure gateway import library): New test.
(Input secure gateway import library: no output import library):
Likewise.
(Input secure gateway import library: not an SG input import library):
Likewise.
(Input secure gateway import library: earlier stub section base):
Likewise.
(Input secure gateway import library: later stub section base):
Likewise.
(Input secure gateway import library: veneer comeback): Likewise.
(Input secure gateway import library: entry function change):
Likewise.
* testsuite/ld-arm/cmse-implib.s: Add input import library testing.
* testsuite/ld-arm/cmse-implib.rd: Update accordingly.
* testsuite/ld-arm/cmse-new-implib.out: New file.
* testsuite/ld-arm/cmse-new-implib.rd: Likewise.
* testsuite/ld-arm/cmse-new-implib-no-output.out: Likewise.
* testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out: Likewise.
* testsuite/ld-arm/cmse-new-earlier-later-implib.out: Likewise.
* testsuite/ld-arm/cmse-new-comeback-implib.rd: Likewise.
* testsuite/ld-arm/cmse-new-wrong-implib.out: Likewise.
bfd/
* elf32-arm.c (CMSE_PREFIX): Define macro.
(elf32_arm_stub_cmse_branch_thumb_only): Define stub sequence.
(cmse_branch_thumb_only): Declare stub.
(struct elf32_arm_link_hash_table): Define cmse_stub_sec field.
(elf32_arm_get_plt_info): Add globals parameter. Use it to return
FALSE if there is no PLT.
(arm_type_of_stub): Adapt to new elf32_arm_get_plt_info signature.
(elf32_arm_final_link_relocate): Likewise.
(elf32_arm_gc_sweep_hook): Likewise.
(elf32_arm_gc_mark_extra_sections): Mark sections holding ARMv8-M
secure entry functions.
(arm_stub_is_thumb): Add case for arm_stub_cmse_branch_thumb_only.
(arm_dedicated_stub_output_section_required): Change to a switch case
and add a case for arm_stub_cmse_branch_thumb_only.
(arm_dedicated_stub_output_section_required_alignment): Likewise.
(arm_stub_dedicated_output_section_name): Likewise.
(arm_stub_dedicated_input_section_ptr): Likewise and remove
ATTRIBUTE_UNUSED for htab parameter.
(arm_stub_required_alignment): Likewise.
(arm_stub_sym_claimed): Likewise.
(arm_dedicated_stub_section_padding): Likewise.
(cmse_scan): New function.
(elf32_arm_size_stubs): Call cmse_scan for ARM M profile targets.
Set stub_changed to TRUE if such veneers were created.
(elf32_arm_swap_symbol_in): Add detection code for CMSE special
symbols.
include/
* arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
(ARM_SET_SYM_CMSE_SPCL): Likewise.
ld/
* ld.texinfo (Placement of SG veneers): New concept entry.
* testsuite/ld-arm/arm-elf.exp
(Secure gateway veneers: no .gnu.sgstubs section): New test.
(Secure gateway veneers: wrong entry functions): Likewise.
(Secure gateway veneers (ARMv8-M Baseline)): Likewise.
(Secure gateway veneers (ARMv8-M Mainline)): Likewise.
* testsuite/ld-arm/cmse-veneers.s: New file.
* testsuite/ld-arm/cmse-veneers.d: Likewise.
* testsuite/ld-arm/cmse-veneers.rd: Likewise.
* testsuite/ld-arm/cmse-veneers.sd: Likewise.
* testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out: Likewise.
* testsuite/ld-arm/cmse-veneers-wrong-entryfct.out: Likewise.
2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
* elf32-arm.c (THUMB32_MOVT): New veneer macro.
(THUMB32_MOVW): Likewise.
(elf32_arm_stub_long_branch_thumb2_only_pure): New.
(DEF_STUBS): Define long_branch_thumb2_only_pure.
(arm_stub_is_thumb): Add new veneer stub.
(arm_type_of_stub): Use new veneer.
(arm_stub_required_alignment): Add new veneer.
2016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
* testsuite/ld-arm/farcall-thumb2-purecode.d: New test result.
* testsuite/ld-arm/farcall-thumb2-purecode.s: New test.
* testsuite/ld-arm/arm-elf.exp: Run it.
2016-07-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (using_thumb2_bl): New function.
(arm_type_of_stub): Declare thumb2 variable together and change type
to bfd_boolean. Use using_thumb2_bl () to determine whether
THM_MAX_FWD_BRANCH_OFFSET or THM2_MAX_FWD_BRANCH_OFFSET should be
checked for BL range.
(elf32_arm_final_link_relocate): Use using_thumb2_bl () to determine
the bit size of BL offset.
ld/
* testsuite/ld-arm/arm-elf.exp (Thumb-2 BL): Assemble for ARMv7.
(Thumb-2 BL on ARMv6-M): New testcase.
* testsuite/ld-arm/thumb2-bl.d: Do not try to match testcase filename.
* testsuite/ld-arm/thumb2-bl.s: Do not select architecture.
bfd * elfnn-aarch64.c (is_aarch64_mapping_symbol): New function.
Returns TRUE for AArch64 mapping symbols.
(elfNN_aarch64_backend_symbol_processing): New function. Marks
mapping symbols as precious in object files so that they will not
be stripped.
(elf_backend_symbol_processing): Define.
* elf32-arm.c (is_arm_mapping_symbol): New function. Returns TRUE
for ARM mapping symbols.
(elf32_arm_backend_symbol_processing): Make use of the new function.
* elf32-arm.c (elf32_arm_backend_symbol_processing): New
function. Marks mapping symbols in object files as precious, so
that strip will not remove them.
(elf_backend_symbol_processing): Define.
2016-06-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
Tony Wang <tony.wang@arm.com>
bfd/
* elf32-arm.c (elf32_arm_stub_long_branch_thumb2_only): Define stub
sequence.
(stub_long_branch_thumb2_only): Define stub.
(arm_stub_is_thumb): Add case for arm_stub_long_branch_thumb2_only.
(arm_stub_long_branch_thumb2_only): Likewise.
(arm_type_of_stub): Use arm_stub_long_branch_thumb2_only for Thumb-2
capable targets.
ld/
* testsuite/ld-arm/arm-elf.exp (Thumb-Thumb farcall M profile):
Assemble for ARMv6-M.
(Thumb2-Thumb2 farcall M profile): New testcase.
* testsuite/ld-arm/farcall-thumb2-thumb2-m.d: New file.
* testsuite/ld-arm/jump-reloc-veneers-cond-long-backward.d: Update to
reflect the use of Thumb-2 veneers for Thumb-2 capable targets.
* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Likewise.
2016-06-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (using_thumb_only): Force review of arch check logic for
new architecture.
(using_thumb2): Try Tag_THUMB_ISA_use first and check
for exact arch value then. Force review of arch check logic for new
architecture.
(arch_has_arm_nop): Update and fix arch check logic. Force review of
that logic for new architecture.
(arch_has_thumb2_nop): Remove.
(elf32_arm_tls_relax): Use using_thumb2 instead of above function.
(elf32_arm_final_link_relocate): Likewise but using thumb2.
2016-05-23 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (arm_dedicated_stub_section_padding): New function.
(elf32_arm_size_stubs): Declare stub_type in a more outer scope and
account for padding for stub section requiring one.
(elf32_arm_build_stubs): Add comment to stress the importance of
zeroing veneer section content.
2016-05-23 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd-in.h (bfd_elf32_arm_keep_private_stub_output_sections): Declare
bfd hook.
* bfd-in2.h: Regenerate.
* elf32-arm.c (arm_dedicated_stub_output_section_required): New
function.
(arm_dedicated_stub_output_section_required_alignment): Likewise.
(arm_dedicated_stub_output_section_name): Likewise.
(arm_dedicated_stub_input_section_ptr): Likewise.
(elf32_arm_create_or_find_stub_sec): Add stub type parameter and
function description comment. Add support for dedicated output stub
section to given stub types.
(elf32_arm_add_stub): Add a stub type parameter and pass it down to
elf32_arm_create_or_find_stub_sec.
(elf32_arm_create_stub): Pass stub type down to elf32_arm_add_stub.
(elf32_arm_size_stubs): Pass stub type when calling
elf32_arm_create_or_find_stub_sec for Cortex-A8 erratum veneers.
(bfd_elf32_arm_keep_private_stub_output_sections): New function.
ld/
* emultempl/armelf.em (arm_elf_before_allocation): Call
bfd_elf32_arm_keep_private_stub_output_sections before generic
before_allocation function.
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (enum elf32_arm_stub_type): New max_stub_type
enumerator.
(arm_stub_sym_claimed): New function.
(elf32_arm_create_stub): Use veneered symbol name and section if
veneer needs to claim its symbol, and keep logic unchanged otherwise.
(arm_stub_claim_sym): New function.
(arm_map_one_stub): Call arm_stub_claim_sym if veneer needs to claim
veneered symbol, otherwise create local symbol as before.
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (elf32_arm_size_stubs): Use new macros
ARM_GET_SYM_BRANCH_TYPE and ARM_SET_SYM_BRANCH_TYPE to respectively get
and set branch type of a symbol.
(bfd_elf32_arm_process_before_allocation): Likewise.
(elf32_arm_relocate_section): Likewise and fix identation along the
way.
(allocate_dynrelocs_for_symbol): Likewise.
(elf32_arm_finish_dynamic_symbol): Likewise.
(elf32_arm_swap_symbol_in): Likewise.
(elf32_arm_swap_symbol_out): Likewise.
gas/
* config/tc-arm.c (arm_adjust_symtab): Use ARM_SET_SYM_BRANCH_TYPE to
set branch type of a symbol.
gdb/
* arm-tdep.c (arm_elf_make_msymbol_special): Use
ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.
include/
* arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
enumerator.
(NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
(ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
(ARM_SYM_BRANCH_TYPE): Replace by ...
(ARM_GET_SYM_BRANCH_TYPE): This and ...
(ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
BFD_ASSERT is defined or not.
ld/
* emultempl/armelf.em (gld${EMULATION_NAME}_finish): Use
ARM_GET_SYM_BRANCH_TYPE to get branch type of a symbol.
opcodes/
* arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
branch type of a symbol.
(print_insn): Likewise.
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* bfd-in.h (elf32_arm_size_stubs): Add an output section parameter.
* bfd-in2.h: Regenerated.
* elf32-arm.c (struct elf32_arm_link_hash_table): Add an output section
parameter to add_stub_section callback.
(elf32_arm_create_or_find_stub_sec): Get output section from link_sec
and pass it down to add_stub_section.
(elf32_arm_add_stub): Set section to stub_sec if NULL before using it
for error message.
(elf32_arm_size_stubs): Add output section parameter to
add_stub_section function pointer parameter.
ld/
* emultempl/armelf.em (elf32_arm_add_stub_section): Add output_section
parameter and rename input_section parameter to after_input_section.
Append input stub section to the output section if after_input_section
is NULL.
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (elf32_arm_create_stub): New function.
(elf32_arm_size_stubs): Use elf32_arm_create_stub for stub creation.
2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (enum elf32_arm_stub_type): Delete
arm_stub_a8_veneer_lwm enumerator.
(arm_stub_a8_veneer_lwm): New unsigned constant to replace
aforementioned enumerator.
(struct elf32_arm_stub_hash_entry): Delete target_addend
field and add source_value.
(struct a8_erratum_fix): Delete addend field and add target_offset.
(stub_hash_newfunc): Initialize source_value field amd remove
initialization for target_addend.
(arm_build_one_stub): Stop special casing Thumb relocations: promote
the else to being always executed, moving the
arm_stub_a8_veneer_b_cond specific code in it. Remove
stub_entry->target_addend from points_to computation.
(cortex_a8_erratum_scan): Store in a8_erratum_fix structure the offset
to target symbol from start of section rather than the offset from the
stub address.
(elf32_arm_size_stubs): Set stub_entry's source_value and target_value
fields from struct a8_erratum_fix's offset and target_offset
respectively.
(make_branch_to_a8_stub): Rename target variable to loc. Compute
veneered_insn_loc and loc using stub_entry's source_value.
PR 19938
bfd * elf-bfd.h (struct elf_backend_data): Rename
elf_backend_set_special_section_info_and_link to
elf_backend_copy_special_section_fields.
* elfxx-target.h: Likewise.
* elf.c (section_match): Ignore the SHF_INFO_LINK flag when
comparing section flags.
(copy_special_section_fields): New function.
(_bfd_elf_copy_private_bfd_data): Copy the EI_ABIVERSION field.
Perform two scans over special sections. The first one looks for
a direct mapping between the output section and an input section.
The second scan looks for a possible match based upon section
characteristics.
* elf32-arm.c (elf32_arm_copy_special_section_fields): New
function. Handle setting the sh_link field of SHT_ARM_EXIDX
sections.
* elf32-i386.c (elf32_i386_set_special_info_link): Rename to
elf32_i386_copy_solaris_special_section_fields.
* elf32-sparc.c (elf32_sparc_set_special_section_info_link):
Rename to elf32_sparc_copy_solaris_special_section_fields.
* elf64-x86-64.c (elf64_x86_64_set_special_info_link): Rename to
elf64_x86_64_copy_solaris_special_section_fields.
binutils* readelf.c (get_solaris_segment_type): New function.
(get_segment_type): Call it.
We operate on the pointer's target as a set of bytes, and this avoids doing
arithmetic on void * which is undefined in ISO C.
bfd/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* elf32-arm.c (put_thumb2_insn): Change argument type to bfd_byte *.
2016-04-06 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
* elf32-arm.c (elf32_arm_size_stubs): Move error_ret_free_local to be
a fall through from error_ret_free_internal. Free local_syms in
error_ret_free_local if allocated from bfd_elf_get_elf_syms ().
PR ld/19455
* elf32-arm.c (elf32_arm_create_dynamic_sections): Set the ELF
class of the linker stub bfd.
(elf32_arm_check_relocs): Skip check for pic format after
processing a vxWorks R_ARM_ABS12 reloc.
* elflink.c (bfd_elf_final_link): Check for ELFCLASSNONE when
reporting a class mismatch.
* testsuite/ld-arm/vxworks1-lib.dd: Update for current
disassmebler output.
* testsuite/ld-arm/vxworks1-lib.rd: Likewise.
* testsuite/ld-arm/vxworks1.dd: Likewise.
* testsuite/ld-arm/vxworks1.rd: Likewise.
* testsuite/ld-arm/vxworks1.ld: Set the output format.
bfd/ChangeLog:
* elf32-arm.c ((elf32_arm_special_sections): Remove catch of noread
section using '.text.noread' pattern.
gas/ChangeLog:
* config/obj-elf.c (obj_elf_change_section) : Allow arm section with
SHF_ARM_NOREAD section flag.
* config/tc-arm.h (md_elf_section_letter) : Implement this hook to
handle letter 'y'.
(arm_elf_section_letter) : Declare it.
* config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set
SHF_ARM_NOREAD section flag.
* doc/c-arm.texi (ARM section attribute 'y'): Document it.
gas/testsuite/ChangeLog:
* gas/arm/section-execute-only.s: New test case.
* gas/arm/section-execute-only.d: Expected output.
ld/testsuite/ChangeLog:
* ld-arm/thumb1-noread-not-present-mixing-two-section.s: Add 'y'
attribute usage.
* ld-arm/thumb1-noread-present-one-section.s: Likewise.
* ld-arm/thumb1-noread-present-two-section.s: Likewise.
* ld-arm/thumb1-input-section-flag-match.s: Likewise.
binutils/ChangeLog:
* readelf.c (get_elf_section_flags): Display y letter for section
with SHF_ARM_NOREAD section flag in readelf section output.
(process_section_headers): Add y letter in readelf section output
key mapping for ARM architecture.
bfd * elf32-arm.c (elf32_arm_fix_exidx_coverage): Insert cantunwind when
address in first unwind entry does not match start of section.
tests * ld-arm/arm-elf.exp: New test.
* ld-arm/unwind-mix.d: New file.
* ld-arm/unwind-mix1.s: New file.
* ld-arm/unwind-mix2.s: New file.
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
(tag_cpu_arch_combine): Adjust comment in v4t_plus_v6_m with regards
to merging with ARMv8-M Baseline.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Baseline Tag_CPU_arch
value.
gas/
* config/tc-arm.c (arm_ext_v6t2_v8m): New feature for instructions
shared between ARMv6T2 and ARMv8-M.
(move_or_literal_pool): Check mov.w/mvn and movw availability against
arm_ext_v6t2 and arm_ext_v6t2_v8m respectively instead of checking
arm_arch_t2.
(do_t_branch): Error out for wide conditional branch instructions if
targetting ARMv8-M Baseline.
(non_v6t2_wide_only_insn): Add the logic for new wide-only instructions
in ARMv8-M Baseline.
(wide_insn_ok): New function.
(md_assemble): Use wide_insn_ok instead of non_v6t2_wide_only_insn and
adapt error message for unsupported wide instruction to ARMv8-M
Baseline.
(insns): Reorganize instructions shared by ARMv8-M Baseline and
ARMv6t2 architecture.
(arm_cpus): Set feature bit ARM_EXT2_V6T2_V8M for marvell-pj4 and
marvell-whitney cores.
(arm_archs): Define armv8-m.base architecture.
(cpu_arch_ver): Define ARM_ARCH_V8M_BASE architecture version.
(aeabi_set_public_attributes): Add logic to set Tag_CPU_arch to 17 for
ARMv8-M Mainline. Set Tag_DIV_use for ARMv8-M Baseline as well.
gas/testsuite/
* gas/arm/archv8m-base.d: New file.
* gas/arm/attr-march-armv8m.base.d: Likewise.
* gas/arm/armv8m.base-idiv.d: Likewise.
* gas/arm/any-armv8m.d: Adapt to deal with ARMv8-M Baseline.
include/elf/
* arm.h (TAG_CPU_ARCH_V8M_BASE): Declare.
include/opcode/
* arm.h (ARM_EXT2_V6T2_V8M): New extension bit.
(ARM_AEXT2_V8A): New architecture extension bitfield.
(ARM_AEXT2_V8_1A): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
(ARM_AEXT_V8M_BASE): New architecture extension bitfield.
(ARM_AEXT2_V8M): Add extension bit ARM_EXT2_V6T2_V8M.
(ARM_ARCH_V6T2): Use ARM_EXT2_V6T2_V8M for the second extension
bitfield.
(ARM_ARCH_V6KT2): Likewise.
(ARM_ARCH_V6ZT2): Likewise.
(ARM_ARCH_V6KZT2): Likewise.
(ARM_ARCH_V7): Likewise.
(ARM_ARCH_V7A): Likewise.
(ARM_ARCH_V7VE): Likewise.
(ARM_ARCH_V7R): Likewise.
(ARM_ARCH_V7M): Likewise.
(ARM_ARCH_V7EM): Likewise.
(ARM_ARCH_V8A): Likewise.
(ARM_ARCH_V8M_BASE): New architecture bitfield.
(ARM_ARCH_THUMB2): Include instructions shared by ARMv6t2 and ARMv8-M.
(ARM_ARCH_V7A_SEC): Use ARM_EXT2_V6T2_V8M for the second extension
bitfield and reindent.
(ARM_ARCH_V7A_MP_SEC): Likewise.
(ARM_ARCH_V7R_IDIV): Likewise.
(ARM_ARCH_V8A_FP): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTOV1): Likewise.
opcodes/
* arm-dis.c (arm_opcodes): Guard movw, movt cbz, cbnz, clrex, ldrex,
ldrexb, ldrexh, strex, strexb, strexh shared by ARMv6T2 and ARMv8-M by
ARM_EXT2_V6T2_V8M instead of ARM_EXT_V6T2.
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
(tag_cpu_arch_combine): Adjust v4t_plus_v6_m and comb array to account
for new TAG_CPU_ARCH_V4T_PLUS_V6_M value. Deal with NULL values in
comb array.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Mainline Tag_CPU_arch
value.
(arm_attr_tag_THUMB_ISA_use): Add ARMv8-M Mainline Tag_THUMB_ISA_use
value.
gas/
* config/tc-arm.c (arm_ext_m): Include ARMv8-M.
(arm_ext_v8m): New feature for ARMv8-M.
(arm_ext_atomics): New feature for ARMv8 atomics.
(do_tt): New encoding function for TT* instructions.
(insns): Add new entries for ARMv8-M specific instructions and
reorganize the ones shared by ARMv8-M Mainline and ARMv8-A.
(arm_archs): Define armv8-m.main architecture.
(cpu_arch_ver): Define ARM_ARCH_V8M_MAIN architecture version and
clarify the ordering rule.
(aeabi_set_public_attributes): Use TAG_CPU_ARCH_* macro to refer to
Tag_CPU_arch values for ARMv7e-M detection. Add logic to keep setting
Tag_CPU_arch to ARMv8-A for -march=all. Also set Tag_CPU_arch_profile
to 'A' if extension bit for atomic instructions is set, unless it is
ARMv8-M. Set Tag_THUMB_ISA_use to 3 for ARMv8-M. Set Tag_DIV_use to 0
for ARMv8-M Mainline.
gas/testsuite/
* gas/arm/archv8m.s: New file.
* gas/arm/archv8m-main.d: Likewise.
* gas/arm/attr-march-armv8m.main.d: Likewise.
* gas/arm/any-armv8m.s: Likewise.
* gas/arm/any-armv8m.d: Likewise.
include/elf/
* arm.h (TAG_CPU_ARCH_V8M_MAIN): Declare.
(MAX_TAG_CPU_ARCH): Define to TAG_CPU_ARCH_V8M_MAIN.
(TAG_CPU_ARCH_V4T_PLUS_V6_M): Define to unused value 15.
include/opcode/
* arm.h (ARM_EXT2_ATOMICS): New extension bit.
(ARM_EXT2_V8M): Likewise.
(ARM_EXT_V8): Adjust comment with regards to atomics and remove
mention of legacy use for that bit.
(ARM_AEXT2_V8_1A): New architecture extension bitfield.
(ARM_AEXT2_V8_2A): Likewise.
(ARM_AEXT_V8M_MAIN): Likewise.
(ARM_AEXT2_V8M): Likewise.
(ARM_ARCH_V8A): Use ARM_EXT2_ATOMICS for features in second bitfield.
(ARM_ARCH_V8_1A): Likewise with ARM_AEXT2_V8_1A.
(ARM_ARCH_V8_2A): Likewise with ARM_AEXT2_V8_2A.
(ARM_ARCH_V8M_MAIN): New architecture feature bitfield.
(ARM_ARCH_V8A_FP): Use ARM_EXT2_ATOMICS for features in second bitfield
and reindent.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTOV1): Likewise.
(ARM_ARCH_V8_1A_FP): Use ARM_AEXT2_V8_1A to set second bitfield of
feature bits.
(ARM_ARCH_V8_1A_SIMD): Likewise.
(ARM_ARCH_V8_1A_CRYPTOV1): Likewise.
opcodes/
* arm-dis.c (arm_opcodes): Guard lda, ldab, ldaex, ldaexb, ldaexh, stl,
stlb, stlh, stlex, stlexb and stlexh by ARM_EXT2_ATOMICS instead of
ARM_EXT_V8.
(thumb32_opcodes): Add entries for wide ARMv8-M instructions.
bfd * elf-bfd.h: Add callback to count additional relocations.
* elf32-arm.c (_arm_elf_section_data): Add new counter.
(insert_cantunwind_after): Increment relocations counter.
(elf32_arm_fix_exidx_coverage): Remove exidx entries and add
terminating CANTUNWIND entry only in final builds.
(elf32_arm_add_relocation): New function.
(elf32_arm_write_section): Add relocations in relocatable builds.
(elf32_arm_count_additional_relocs): New function.
(elf_backend_count_additional_relocs): New define.
* bfd/elflink.c (bfd_elf_final_link): Use callback and adjust size of
.rel section.
* bfd/elfxx-target.h (elf_backend_count_additional_relocs): New define.
ld * emultempl/armelf.em (gld${EMULATION_NAME}_after_allocation): Call
elf32_arm_fix_exidx_coverage for relocatable builds.
ld/testsuite
* ld-arm/arm-elf.exp: New test.
* ld-arm/unwind-rel.d: New file.
* ld-arm/unwind-rel1.s: New file.
* ld-arm/unwind-rel2.s: New file.
* ld-arm/unwind-rel3.s: New file.
include/elf
* arm.h: Add arm SHF_ARM_NOREAD section flag.
bfd * bfd-in2.h: Regenerate.
* section.c: Add SEC_ELF_NOREAD.
* elf32-arm.c (elf32_arm_post_process_headers): Only set
PF_X attribute if a segment only contains section with
SHF_ARM_NOREAD flag.
(elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
(elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
to bfd flag.
(elf32_arm_lookup_section_flags): New function to allow
INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
(elf32_arm_special_sections): Add special sections array
to catch section prefix by '.text.noread' pattern.
ld/testsuite
* ld-arm/arm-elf.exp: New tests.
* ld-arm/thumb1-input-section-flag-match.d: New
* ld-arm/thumb1-input-section-flag-match.s: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
* ld-arm/thumb1-noread-present-one-section.d: New
* ld-arm/thumb1-noread-present-one-section.s: New
* ld-arm/thumb1-noread-present-two-section.d: New
* ld-arm/thumb1-noread-present-two-section.s: New
binutils
* readelf.c (get_elf_section_flags): Add support for ARM specific
section flags.
To support thumb1 execute-only code we need to support four new
relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC,
R_ARM_THM_ALU_ABS_G2_NC and R_ARM_THM_ALU_ABS_G3_NC).
These relocations allow the static linker to finalize construction
of symbol address.
Typical sequence of code to get address of the symbol foo is then
the following :
movs r3, #:upper8_15:#foo
lsls r3, #8
adds r3, #:upper0_7:#foo
lsls r3, #8
adds r3, #:lower8_15:#foo
lsls r3, #8
adds r3, #:lower0_7:#foo
This will give following sequence of text and relocations after
assembly :
4: 2300 movs r3, #0
4: R_ARM_THM_ALU_ABS_G3_NC foo
6: 021b lsls r3, r3, #8
8: 3300 adds r3, #0
8: R_ARM_THM_ALU_ABS_G2_NC foo
a: 021b lsls r3, r3, #8
c: 3300 adds r3, #0
c: R_ARM_THM_ALU_ABS_G1_NC foo
e: 021b lsls r3, r3, #8
10: 3300 adds r3, #0
10: R_ARM_THM_ALU_ABS_G0_NC foo
* elf32-arm.c (create_instruction_branch_absolute): Replace
pointer parameters with a simple integer parameter.
(stm32l4xx_create_replacing_stub_ldmia): Update calls to
create_instruction_branch_absolute.
(stm32l4xx_create_replacing_stub_ldmdb): Likewise.
(stm32l4xx_create_replacing_stub_vldm): Likewise.
(elf32_arm_write_section): Use pointer type for veneer addresses.
bfd * bfd-in2.h: Regenerate.
* bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how
STM32L4XX instruction scanning should be done.
(bfd_elf32_arm_set_stm32l4xx_fix)
(bfd_elf32_arm_stm32l4xx_erratum_scan)
(bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes.
(bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument
to prototype.
* elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME)
(STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros.
(elf32_stm32l4xx_erratum_type): New enum.
(elf32_stm32l4xx_erratum_list): New struct. List of veneers or
jumps to veneers.
(_arm_elf_section_data): Add stm32l4xx_erratumcount,
stm32l4xx_erratumlist.
(elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size,
stm32l4xx_fix and num_stm32l4xx_fixes fields.
(ctz): New function.
(popcount): New function.
(elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix.
(put_thumb2_insn): New function.
(STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for
LDM instructions.
(STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for
VLDM instructions.
(bfd_elf32_arm_allocate_interworking_sections): Initialise erratum
glue section.
(record_stm32l4xx_erratum_veneer) : New function. Create a single
veneer, and its associated symbols.
(bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue.
(bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of
erratum workaround required.
(bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find
out where veneers and branches to veneers have been placed in
virtual memory after layout.
(is_thumb2_ldmia): New function.
(is_thumb2_ldmdb): Likewise.
(is_thumb2_vldm ): Likewise.
(stm32l4xx_need_create_replacing_stub): New function. Decide if a
veneer must be emitted.
(bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an
input BFD for potential erratum-triggering insns. Record results.
(bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in
global hash table.
(elf32_arm_size_dynamic_sections): Collect glue information.
(create_instruction_branch_absolute): New function.
(create_instruction_ldmia): Likewise.
(create_instruction_ldmdb): Likewise.
(create_instruction_mov): Likewise.
(create_instruction_sub): Likewise.
(create_instruction_vldmia): Likewise.
(create_instruction_vldmdb): Likewise.
(create_instruction_udf_w): Likewise.
(create_instruction_udf): Likewise.
(push_thumb2_insn32): Likewise.
(push_thumb2_insn16): Likewise.
(stm32l4xx_fill_stub_udf): Likewise.
(stm32l4xx_create_replacing_stub_ldmia): New function. Expands the
replacing stub for ldmia instructions.
(stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb.
(stm32l4xx_create_replacing_stub_vldm): Likewise for vldm.
(stm32l4xx_create_replacing_stub): New function. Dispatches the
stub emission to the appropriate functions.
(elf32_arm_write_section): Output veneers, and branches to veneers.
ld * ld.texinfo: Description of the STM32L4xx erratum workaround.
* emultempl/armelf.em (stm32l4xx_fix): New.
(arm_elf_before_allocation): Choose the type of fix, scan for
erratum.
(gld${EMULATION_NAME}_finish): Fix veneer locations.
(arm_elf_create_output_section_statements): Propagate
stm32l4xx_fix value.
(PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX.
(PARSE_AND_LIST_LONGOPTS): Add entry for handling
--fix-stm32l4xx-629360.
(PARSE_AND_LIST_OPTION): Add entry for helping on
--fix-stm32l4xx-629360.
(PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX.
tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX
tests.
* ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New.
* ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise.
* ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise.
* ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise.
* ld-arm/stm32l4xx-fix-all.d: Likewise.
* ld-arm/stm32l4xx-fix-all.s: Likewise.
* ld-arm/stm32l4xx-fix-it-block.d: Likewise.
* ld-arm/stm32l4xx-fix-it-block.s: Likewise.
* ld-arm/stm32l4xx-fix-ldm.d: Likewise.
* ld-arm/stm32l4xx-fix-ldm.s: Likewise.
* ld-arm/stm32l4xx-fix-vldm.d: Likewise.
* ld-arm/stm32l4xx-fix-vldm.s: Likewise.
These int vars are really unsigned, so make them so.
* section.c (struct bfd_section): Make "id" and "index" unsigned.
* coff-rs6000.c (_bfd_xcoff_sizeof_headers): Adjust local var to suit.
* elf.c (elf_map_symbols): Likewise.
* elf64-ppc.c (sym_exists_at): Make "id" param unsigned.
(struct ppc_link_hash_table): Make "top_id" and "top_index" unsigned.
(ppc64_elf_setup_section_lists): Ditto for local vars.
* elf32-arm.c: Similarly to elf64-ppc.c.
* elf32-avr.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-m68hc1x.c: Likewise.
* elf32-metag.c: Likewise.
* elf32-nios2.c: Likewise.
* elfnn-aarch64.c: Likewise.
* simple.c (struct saved_offsets): Make "section_count" unsigned.
* bfd-in2.h: Regenerate.
Christophe Lyon
Nick Clifton
Alan Modra
H.J. Lu
Maciej W. Rozycki
Renlin Li
Yuri Chornovian
Thomas Preud'homme
Eric Christopher
Richard Earnshaw
Casey Smith
Andrew Goedhart
Christian Groessler
Jiong Wang
Akihiko Odaki
Christophe Lyon
Andre Vieria
Christophe Monat
Trevor Saunders
Mickael Guene
Yury Usishchev
Laurent Alfonsi
Rich Felker