7fc5b5adca
Report SIGBUS and halt simulation when ld/st detect a misaligned address.
2000-02-09 05:08:42 +00:00
c3f6f71df3
import gdb-2000-01-05 snapshot
2000-01-06 03:07:20 +00:00
c2d11a7da0
import gdb-1999-12-06 snapshot
1999-12-07 03:56:43 +00:00
4ce44c668d
import gdb-1999-11-16 snapshot
1999-11-17 02:31:06 +00:00
5c44784c11
import gdb-1999-11-01 snapshot
1999-11-02 04:44:47 +00:00
c2c6d25f0d
import gdb-1999-09-21
1999-09-22 03:28:34 +00:00
cff3e48be7
import gdb-1999-09-13 snapshot
1999-09-13 21:40:00 +00:00
d4f3574e77
import gdb-1999-09-08 snapshot
1999-09-09 00:02:17 +00:00
7a292a7adf
import gdb-19990422 snapshot
1999-04-26 18:34:20 +00:00
c906108c21
Initial creation of sourceware repository
1999-04-16 01:35:26 +00:00
071ea11e85
Initial creation of sourceware repository
1999-04-16 01:34:07 +00:00
df59058c91
1999-01-26 Jason Molenda (jsm@bugshack.cygnus.com)
...
* simops.c (OP_5605): Sign extend MIN32 and MAX32 before saturation
comparison.
(OP_5607): Ditto.
(OP_2A00): Ditto.
(OP_2800): Ditto.
PRs 18435 18436 18437 18439.
1999-01-27 01:51:26 +00:00
ac9a7d8a2c
Implement separate user (SPU) and interrupt (SPI) stack pointers.
1998-02-13 05:22:49 +00:00
b41dff6b54
Don't abort() when system call is unknown.
1998-02-11 07:11:28 +00:00
19431a0280
Ensure zero-hardwired bits in DPSW remain zero.
1998-02-11 06:34:30 +00:00
8831cb01b0
First round of d10v ABI changes
1998-01-23 16:30:08 +00:00
bc6df23d14
For "trap", IBT and RIE exceptions, mask all PSW.SM. NB: Stepping
...
through an exception may not work correctly.
For GDB reads/writes to the control registers, ensure the cpu state is
updated correctly.
1997-12-08 03:22:58 +00:00
7f48c9fe1d
Add DM (bit 4) to PSW. See 7-1 for more info.
...
Test.
1997-12-04 07:01:30 +00:00
aa49c64f3e
* d10v_sim.h (SEXT56): Define.
...
* simops.c (OP_4201): For "rac", sign extend 56 bit value before
it is shifted.
* d10v_sim.h (MAX32, MIN32, MASK32, MASK40): Re-define using
SIGNED64 macro.
1997-12-03 08:03:33 +00:00
d294a657d5
For "msbu", subtract unsigned product from ACC,
...
Test.
1997-12-02 07:18:53 +00:00
9420287ed2
For "mulxu", store unsigned product in ACC.
...
Test.
1997-12-02 06:37:09 +00:00
ae55807561
For MACU add unsigned multiply to accumulator.
...
Test.
1997-12-02 05:18:27 +00:00
51b057f27b
For sub2w, compute carry according to negated addition rules.
...
Test.
1997-12-02 00:27:27 +00:00
70ee56c585
Rework sim/common/sim-alu.h to differentiate between direcct
...
subtraction (involves borrow) and negated addition (involves carry).
Update d30v so that it uses this method. Add more tests.
1997-12-01 06:27:02 +00:00
1155e06e3f
* simops.c (OP_6A01): Change OP_POSTDEC to OP_POSTINC and move
...
exception generation code to OP_6E01.
(OP_6E01): Change OP_POSTINC to OP_POSTDEC and insert exception
generation code.
PR 13550
1997-10-13 18:26:52 +00:00
b83093ff79
* simops.c (OP_6401): postdecrement on r15 is OK, remove exception.
...
(OP_6601): Ditto.
PR 13498
1997-10-11 16:50:05 +00:00
87e43259f1
Cleanups to compile under FreeBSD
1997-04-17 06:05:19 +00:00
f4b022d37c
Fix problems in setting the carry bit
1997-03-13 20:30:50 +00:00
fd435e9f09
Fix os_printf_filtered; Flush stdout after calling printf_filtered
1997-03-13 16:04:50 +00:00
b30cdd3565
Fix -t option to work with memory mapping; Print PC in some error messages
1996-10-30 22:43:02 +00:00
c422ecc7a4
Tue Oct 29 12:13:52 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
...
* interp.c (sim_size): Now allocates unified memory for imap segments
0,1,2, and 127. Initializes imap0 and imap1 to 0x1000. Initializes dmap to 0.
(sim_write): Just call xfer_mem().
(sim_read): Just call xfer_mem().
(xfer_mem): New function. Does appropriate memory mapping and copies bytes.
(dmem_addr): New function. Reads dmap register and translates data
addresses to local addresses.
(pc_addr): New function. Reads imap register and computes local address
corresponding to contents of the PC.
(sim_resume): Change to use pc_addr().
(sim_create_inferior): Change reinitialization code. Also reinitializes
imap[01] and dmap.
(sim_fetch_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
(sim_store_register): Add fake registers 32,33,34 for imap0, imap1, and dmap.
* simops.c (MEMPTR): Redefine to use dmem_addr().
(OP_5F00): Replace references to STate.imem with dmem_addr().
* d10v-sim.h (State): Remove mem_min and mem_max. Add umem[128].
(RB,SW,RW,SLW,RLW): Redefine to use dmem_addr().
(IMAP0,IMAP1,DMAP,SET_IMAP,SET_IMAP1,SET_DMAP): Define.
1996-10-29 20:31:08 +00:00
11ec4de669
Fix tracing of accumulators
1996-10-16 17:52:31 +00:00
57bc1a721a
Better error messages when a program stops due to signal; support d10v getpid/kill
1996-10-15 15:44:10 +00:00
8918b3a72b
Fix ld2w r2,@r2 so that r3 loads the proper value
1996-10-13 02:25:01 +00:00
a18cb10038
Fix tracing for st2w
1996-09-25 20:33:21 +00:00
c12f5c678e
Make sure cmp{,eq,u}i use correct casts
1996-09-20 01:42:15 +00:00
addb61a5b2
Fix tracing info
1996-09-19 17:23:21 +00:00
f061ddf67d
Make sure there is a trailing space after the instruction
1996-09-19 15:06:37 +00:00
891513ee79
Provide macros that can be overriden for the width of the PC & line number fields
1996-09-19 15:02:27 +00:00
0535fa1aa0
Rename sim_bfd -> exec_bfd for gdb compatibility
1996-09-18 13:56:57 +00:00
a49a15ade8
Make exit/stop return correct exit value; Add line number tracing.
1996-09-18 13:23:31 +00:00
19d44375ff
For unknown traps, print contents of registers and continue execution
1996-09-14 02:36:40 +00:00
65c0d7dee9
* simops.c (OP_5F00): Fix problems with system calls.
1996-09-12 19:52:40 +00:00
a57190924d
Correct trap tracing information
1996-09-12 16:20:05 +00:00
2254cd90a9
Addi needs to set the carry
1996-09-09 21:12:46 +00:00
308f64d3ac
Fix ld2w tracing
1996-09-09 20:45:33 +00:00
60fc5b7270
Correct tracing of cpfg
1996-09-09 20:10:31 +00:00
293c76a376
Make ex{f,t}* tests agree with book
1996-09-09 18:24:18 +00:00
069398aaff
Fix accumulator shifts
1996-09-09 17:30:36 +00:00
ea2155e858
Fri Sep 6 17:56:17 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
...
* simops.c (OP_2600, OP_2601): Changed min and max comparisons
to use signed register values.
1996-09-07 00:58:25 +00:00
Andrew Cagney