Commit Graph

63 Commits

Author SHA1 Message Date
Frank Ch. Eigler a3027dd748 * autoconf correction
* merge from internal repo -> sourceware

2000-03-02  Frank Ch. Eigler  <fche@redhat.com>

	* configure: Regenerated.

Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>

	* interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
	calls, conditional on the simulator being in verbose mode.
2000-03-02 18:14:02 +00:00
Jason Molenda e514a9d642 import gdb-1999-10-25 snapshot 1999-10-26 03:43:48 +00:00
Stan Shebs d4f3574e77 import gdb-1999-09-08 snapshot 1999-09-09 00:02:17 +00:00
Jason Molenda 9846de1bb5 import gdb-1999-07-07 pre reformat 1999-07-07 17:31:57 +00:00
Stan Shebs cd0fc7c3eb import gdb-1999-05-10 1999-05-11 13:35:55 +00:00
Stan Shebs 7a292a7adf import gdb-19990422 snapshot 1999-04-26 18:34:20 +00:00
Stan Shebs c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs 071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Frank Ch. Eigler 14bbac6609 * eCos->devo merge; tx3904 sanitize tags removed
1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
	(load_word): Call SIM_CORE_SIGNAL hook on error.
	(signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
	starting.  For exception dispatching, pass PC instead of NULL_CIA.
	(decode_coproc): Use COP0_BADVADDR to store faulting address.
	* sim-main.h (COP0_BADVADDR): Define.
	(SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
	(SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
	(_sim_cpu): Add exc_* fields to store register value snapshots.
	* mips.igen (*): Replace memory-related SignalException* calls
	with references to SIM_CORE_SIGNAL hook.
	* dv-tx3904irc.c (tx3904irc_port_event): printf format warning
	fix.
	* sim-main.c (*): Minor warning cleanups.
1998-12-30 12:21:43 +00:00
Gavin Romig-Koch bff2d36890 5xxx and el 1998-12-14 15:14:24 +00:00
Gavin Romig-Koch f14397f057 for bfd:
* archures.c,bfd-in2.h (bfd_mach_mips4121): New.
	* cpu-mips.c: Added vr4121.
	* elf32-mips.c (elf_mips_mach): Same.
	(_bfd_mips_elf_final_write_processing): Same.

for gas:
	* config/tc-mips.c (mips_4121): New.
	(md_begin,mips_ip,md_longopts,md_parse_option): Add vr4121.

for gcc:
	* config/mips/mips.c (override_options): Add vr4121.
	* config/mips/t-vr4xxx (MULTILIB_MATCHES): Same.

for include/elf:
	* mips.h (E_MIPS_MACH_4121): New.

for include/opcode:
	* mips.h (INSN_4121): New.

for opcodes:
	* mips-dis.c (set_mips_isa_type): Add bfd_mach_mips4121.
	(_print_insn_mips): Same.
	* mips-opc.c: Add vr4121.

for sim/mips:
	* configure.in,mips.igen,vr.igen: Add vr4121.
	* configure: Rebuilt.
1998-12-13 16:14:24 +00:00
Gavin Romig-Koch 82aeada70c * configure.in (mips64vr4xxx): Enable TARGET_ENABLE_FR.
Set mips_fpu, and mips_fpu_bitsize.
	Set sim_gen, and sim_igen_machine.
	* configure: Rebuild.
	* mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
	* sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1998-12-12 22:43:54 +00:00
Andrew Cagney 57791952b6 Configure mips64vr4100-elf nee mips64vr41* as a 64 bit mips16 igen simulator.
Fix problems: All vr.igen instructions are 64 bit.
1998-11-23 07:16:03 +00:00
Andrew Cagney ee562da4c4 Reconize target mips-tx19-elf 1998-11-23 06:06:12 +00:00
Andrew Cagney a83d7d870f Switch mips-lsi-elf mips16 simulator to igen (from gencode). 1998-11-23 05:50:21 +00:00
Andrew Cagney d1cbd70abb Add configury for mips-lsi-elf target (32 bit MIPS16).
Fix numerous problems with PENDING_* code.
In old gencode simulator, don't double tick each cycle.
Add BREAK instruction to MIPS16 gencode simulator.
1998-11-12 06:42:34 +00:00
Andrew Cagney b9a9cde40b Unify (well almost) --enable-build-warnings configuration option
across GDB and SIM directories.
1998-10-28 02:01:32 +00:00
Frank Ch. Eigler fda83b6795 * MONSTER sky -> devo merge
* ChangeLog / ChangeLog.sky entries were merged with original time stamps;
  a few were moved between the files
1998-10-27 12:48:08 +00:00
Frank Ch. Eigler da040f2a6c * Early check-in of tx3904 timer sim implementation for ECC.
It is not yet properly tested.
Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904tmr.c: New file - implements tx3904 timer.
	* dv-tx3904{irc,cpu}.c: Mild reformatting.
	* configure.in: Include tx3904tmr in hw_device list.
	* configure: Rebuilt.
	* interp.c (sim_open): Instantiate three timer instances.
	Fix address typo of tx3904irc instance.
1998-06-04 12:43:45 +00:00
Andrew Cagney df26156d68 Match mips*tx39 not mipst*tx39. 1998-05-29 01:42:20 +00:00
Frank Ch. Eigler 3fa454e95f * Monster patch - may destablize MIPS sims for a little while.
* Followup patch for SCEI PR 15853
* First check-in of TX3904 interrupt controller devices for ECC. [sanitized]
* First implementation of MIPS hardware interrupt emulation.
Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
 	modules.  Recognize TX39 target with "mips*tx39" pattern.
	* configure: Rebuilt.
	* sim-main.h (*): Added many macros defining bits in
 	TX39 control registers.
	(SignalInterrupt): Send actual PC instead of NULL.
	(SignalNMIReset): New exception type.
	* interp.c (board): New variable for future use to identify
	a particular board being simulated.
	(mips_option_handler,mips_options): Added "--board" option.
	(interrupt_event): Send actual PC.
	(sim_open): Make memory layout conditional on board setting.
	(signal_exception): Initial implementation of hardware interrupt
 	handling.  Accept another break instruction variant for simulator
 	exit.
	(decode_coproc): Implement RFE instruction for TX39.
	(mips.igen): Decode RFE instruction as such.
start-sanitize-tx3904
	* configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
	* interp.c: Define "jmr3904" and "jmr3904debug" board types and
	bbegin to implement memory map.
	* dv-tx3904cpu.c: New file.
	* dv-tx3904irc.c: New file.
end-sanitize-tx3904
1998-05-18 15:55:05 +00:00
Tom Tromey 5da9ce07eb * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* acconfig.h: New file.
	* configure.in: Reverted change of Apr 24; use sinclude again.
1998-04-26 22:03:55 +00:00
Tom Tromey b1df34b9ed * configure: Regenerated to track ../common/aclocal.m4 changes.
* config.in: Ditto.
	* configure.in: Don't call sinclude.
1998-04-24 20:39:48 +00:00
Andrew Cagney 64ed8b6a8c aclocal.m4: Don't enable inlining when cross-compiling.
mips/*: Tune mips simulator - allow all memory transfer code to be inlined.
1998-04-05 07:16:54 +00:00
Andrew Cagney 278bda4050 Cleanup INLINE support for simulators using common framework.
Make IGEN responsible for co-ordinating inlining of generated files.
By default, aclocal.m4 disabled all inlining.
1998-04-04 12:33:11 +00:00
Gavin Romig-Koch 34f51d8723 * configure.in (mipstx39*-*-*): Use gencode simulator rather
than igen one.
	* configure : Rebuild.
1998-03-30 19:54:15 +00:00
Andrew Cagney d89fa2d80a Re-do --enable-sim-hardware so that each simulator can specify the devices
it wants built.
Generate hw-config.h.
1998-03-25 01:41:33 +00:00
Frank Ch. Eigler 9b23b76d68 * Added --with-sim-gpu2=<path> option for linking SCEI's GPU2 library with
the stand-alone executable.


[in ChangeLog.sky:]

	* sky-gpuif.c (call_gs): Call properly into GPU2 library if
 	configured --with-sim-gpu2.  Use SKY_GPU2_REFRESH symbol as
 	placeholder for future GPU2-refresh policy.

[in ChangeLog:]

	* Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 	configurable settings for stand-alone simulator.

start-sanitize-sky
	* configure.in: Added --with-sim-gpu2 option to specify path of
 	sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 	links/compiles stand-alone simulator with this library.

	* interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
end-sanitize-sky

	* configure.in: Added X11 search, just in case.

	* configure: Regenerated.
1998-03-18 00:20:40 +00:00
Andrew Cagney a48e8c8d21 sim-main.h: Re-arange r5900 registers so that they have their own
little struct.
interp.c: Update.  Also add floating point Max/Min functions.
mips.igen: Remove r5900 tag from any floating point instructions.
r5900.igen: Rewrite.  Implement *all* floating point insns (except ld/st).
r5400.igen: Tag mdmx functions as being mdmx specific.
1998-02-23 16:55:38 +00:00
Doug Evans 5759734b2c * Makefile.in (SIM_SKY_OBJS,MIPS_EXTRA_OBJS): New vars.
(SIM_OBJS): Add $(MIPS_EXTRA_OBJS).
	* configure.in: Set mips_extra_objs to sky files if mips64r59*-sky-*.
	* configure: Regenerated.
1998-02-06 03:19:56 +00:00
Andrew Cagney 37379a256b IGEN - Replace IMEM (IMEM_IMMED) macro with IMEM<insn-size> macro,
update v850, tic80 and mips simulators.
IGEN - Prepend prefix to more generated symbols and macros
(idecode_issue, instruction_word).
IGEN - Add -Wnowith option to supress warnings about word size
inflicts in input files.
MIPS - Clean up Makefile.in, m16.igen, m16.dc (new), m16run.c (new) so
that a mips16 simulator built using IGEN can be compiled.
1998-02-03 05:39:15 +00:00
Andrew Cagney a97f304b04 Add support for configuring the size of the floating point unit (fp_word).
For mips, move fp_registers into a separate array of type fp_word[].
1998-02-02 14:06:52 +00:00
Andrew Cagney 01737f42d8 mips: Add multi-processor support for r5900. Others might work.
common, igen: Fix MP related bugs.
1998-02-01 03:29:48 +00:00
Andrew Cagney 412c4e940e Add config support for the size of the target address and OF cell. 1998-01-31 14:07:23 +00:00
Andrew Cagney c4db5b04f8 mips - for r5900 generate igen simulator.
igen - stop crash when simulator isn't multi-sim'ed
1998-01-31 06:56:13 +00:00
Andrew Cagney 2d44e12a27 Use macro GPR_SET(N,VAL) to clear zero registers. 1998-01-21 22:08:37 +00:00
Doug Evans 462cfbc4eb * aclocal.m4: Recognize --enable-maintainer-mode.
*/configure: Regenerated.
1998-01-20 06:37:00 +00:00
Jeff Law 255cbbf190 * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
vr5400 with the vr5000 as the default.
1997-12-12 19:24:34 +00:00
Doug Evans 6e51f990a2 Regenerate configure files. 1997-12-04 17:26:06 +00:00
Gavin Romig-Koch 6205f37913 * gencode.c: Add tx49 configury and insns.
* configure.in: Add tx49 configury.
	* configure: Update.
1997-10-29 19:42:49 +00:00
Andrew Cagney 16bd5d6e52 Separate r5900 specifoc and mips16 instructions.
Add support for this to configure (vr5400 target only)
1997-10-27 07:55:24 +00:00
Andrew Cagney 90ad43b2de Add mips64vr5400 to configuration list
Mark mipsIV instructions as being implemented by the vr5400.
Sanitize.
1997-10-27 06:42:13 +00:00
Andrew Cagney 122edc03de Add basic igen configuration to autoconf. Disable. 1997-10-24 07:54:21 +00:00
Andrew Cagney 18c64df613 o Add support for configuring wordsize, fp hardware and target
endianness.  Provide defaults for some tier-1 mips targets.
o	Parameterize all functions with SIM_DESC.
1997-10-14 07:27:31 +00:00
Andrew Cagney 92f91d1ff0 Remove need to update <targ>/Makefile.in when adding optional options
to <targ>/configure.in.
Simplify logic used to select target [default] endianness.
1997-09-23 01:25:26 +00:00
Andrew Cagney 76a6247f07 Add memory alignment config option. 1997-09-22 09:40:57 +00:00
Andrew Cagney a2ab5e65eb Update to reflect change to sim/common/aclocal.m4 (allow sim/common
directory to specify its own unqiue config.h file).
1997-09-15 08:25:04 +00:00
David Edelsohn 6fea47635b * configure: Regenerated to track ../common/aclocal.m4 changes. 1997-09-05 00:42:05 +00:00
Andrew Cagney 8811705410 Fix doco on enable-sim-inline. 1997-08-27 22:43:18 +00:00
Andrew Cagney 247fccdeb5 Add ABFD argument to sim_open call. Pass through to sim_config so
that image properties such as endianness can be checked.

More strongly document the expected behavour of each of the sim_*
interfaces.

Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN.  Use in sim_config.
1997-08-25 23:14:25 +00:00