03ee1b7f8e
PR gas/11013
...
* arm-dis.c (thumb32_opc): Adjust disassembly of QADD, QDADD, QSUB
and QDSUB.
* gas/arm/arch7em.d: Update expected disassembly.
* gas/arm/thumb32.d: Likewise.
* config/tc-arm.c (do_t_simd2): New function.
(insns): Use do_t_simd2 for QADD, QDADD, QSUB and QDSUB.
2009-12-02 20:26:30 +00:00
974da60de1
PR gas/11032
...
* config/tc-arm.c (relax_adr): Cope with a frag with no symbol.
2009-11-30 14:36:21 +00:00
f0ae4a24b0
2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
...
gas/
* config/tc-i386.c (cpu_arch): Remove cvt16.
(md_show_usage): Same.
* doc/c-i386.texi: Same.
gas/testsuite/
* gas/i386/cvt16.d: Removed.
* gas/i386/cvt16.s: Removed.
* gas/i386/x86-64-cvt16.d: Removed.
* gas/i386/x86-64-cvt16.s: Removed.
* gas/i386/i386.exp: Remove cvt16 and x86-64-cvt16 tests.
opcodes/
* i386-dis.c (VEX_LEN_XOP_08_A0): Removed.
(VEX_LEN_XOP_08_A1): Removed.
(xop_table): Remove entries for VEX_LEN_XOP_08_A0 and
VEX_LEN_XOP_08_A1.
(vex_len_table): Same.
* i386-gen.c (CPU_CVT16_FLAGS): Removed.
(cpu_flags): Remove field for CpuCVT16.
* i386-opc.h (CpuCVT16): Removed.
(i386_cpu_flags): Remove bitfield cpucvt16.
(i386-opc.tbl): Remove CVT16 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2009-11-18 20:28:59 +00:00
ada65aa377
2009-11-18 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_fpus): Add fpv4-sp-d16.
(aeabi_set_public_attributes): Correctly mark VFPv3xD.
include/opcode/
* arm.h (FPU_VFP_V4_SP_D16, FPU_ARCH_VFP_V4_SP_D16): Define.
2009-11-18 15:48:59 +00:00
2d0f389600
bfd/
...
* bfd-in.h (_bfd_elf_ppc_at_tls_transform): Declare.
* bfd-in2.h: Regenerate.
* elf64-ppc.c (ppc64_elf_relocate_section): Move code for R_PPC64_TLS
insn optimisation to..
* elf32-ppc.c (_bfd_elf_ppc_at_tls_transform): ..here. New function.
(ppc_elf_relocate_section): Use it.
gas/
* config/tc-ppc.c (md_assemble): Report error on invalid @tls operands
and opcode.
2009-11-18 12:42:52 +00:00
5dd85c9970
2009-11-17 Sebastian Pop <sebastian.pop@amd.com>
...
Quentin Neill <quentin.neill@amd.com>
gas/
* config/tc-i386.c (cpu_arch): Added .xop and .cvt16.
(build_vex_prefix): Handle xop08.
(md_assemble): Don't special case the constant 3 for insns using MODRM.
(build_modrm_byte): Handle vex2sources.
(md_show_usage): Add xop and cvt16.
* doc/c-i386.texi: Document fma4, xop, and cvt16.
gas/testsuite/
* gas/i386/i386.exp: Run xop and cvt16 in 32-bit mode.
Run x86-64-xop and x86-64-cvt16 in 64-bit mode.
* gas/i386/lwp.d: Update name of the testcase.
* gas/i386/x86-64-xop.d: New.
* gas/i386/x86-64-xop.s: New.
* gas/i386/xop.d: New.
* gas/i386/xop.s: New.
* gas/i386/cvt16.d: New.
* gas/i386/cvt16.s: New.
opcodes/
* i386-dis.c (OP_Vex_2src_1): New.
(OP_Vex_2src_2): New.
(Vex_2src_1): New.
(Vex_2src_2): New.
(XOP_08): Added.
(VEX_LEN_XOP_08_A0): Added.
(VEX_LEN_XOP_08_A1): Added.
(VEX_LEN_XOP_09_80): Added.
(VEX_LEN_XOP_09_81): Added.
(xop_table): Added an entry for XOP_08. Handle xop instructions.
(vex_len_table): Added entries for VEX_LEN_XOP_08_A0,
VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81.
(get_valid_dis386): Handle XOP_08.
(OP_Vex_2src): New.
* i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS.
(cpu_flags): Add CpuXOP and CpuCVT16.
(opcode_modifiers): Add XOP08, Vex2Sources.
* i386-opc.h (CpuXOP): Added.
(CpuCVT16): Added.
(i386_cpu_flags): Add cpuxop and cpucvt16.
(XOP08): Added.
(Vex2Sources): Added.
(i386_opcode_modifier): Add xop08, vex2sources.
* i386-opc.tbl: Add entries for XOP and CVT16 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated.
2009-11-18 04:04:17 +00:00
9e3c6df664
2009-11-17 Paul Brook <paul@codesourcery.com>
...
Daniel Jacobowitz <dan@codesourcery.com>
gas/
* doc/c-arm.texi: Document .arch armv7e-m.
* config/tc-arm.c (arm_ext_v6_dsp, arm_ext_v7m): New.
(insns): Put Thumb versions of v5TExP instructions into
arm_ext_v5exp also. Move some Thumb variants from
arm_ext_v6_notm to arm_ext_v6_dsp.
(arm_archs): Add armv7e-m architecture.
(aeabi_set_public_attributes): Handle -march=armv7e-m.
gas/testsuite/
* gas/arm/attr-march-armv7em.d: New test.
* gas/arm/arch7em-bad.d: New test.
* gas/arm/arch7em-bad.l: New test.
* gas/arm/arch7em.d: New test.
* gas/arm/arch7em.s: New test.
include/elf/
* arm.h (TAG_CPU_ARCH_V7E_M): Define.
include/opcode/
* arm.h (ARM_EXT_V6_DSP): Define.
(ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP.
(ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add v7E-M.
bfd/
* elf32-arm.c (using_thumb_only, arch_has_arm_nop,
arch_has_thumb2_nop): Handle TAG_CPU_ARCH_V7E_M.
(tag_cpu_arch_combine): Ditto. Correct MAX_TAG_CPU_ARCH test.
2009-11-17 16:31:56 +00:00
f7c21dc7b8
* config/tc-arm.c (parse_operands): Encode APSR_nzcv as r15.
...
(do_vmrs): New function.
(do_vmsr): New function.
(insns): Add vmrs and vmsr.
* gas/arm/vfp1xD.s: Add vmrs and vmsr instructions.
* gas/arm/vfp1xD.d: Update expected disassembly.
2009-11-16 11:47:36 +00:00
c1ba026631
Check destination operand for lockable instructions.
...
gas/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Check destination operand
for lockable instructions.
gas/testsuite/
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/lock-1-intel.d: Updated.
* gas/i386/lock-1.d: Likewise.
* gas/i386/lock-1.s: Likewise.
* gas/i386/lockbad-1.l: Likewise.
* gas/i386/lockbad-1.s: Likewise.
* gas/i386/x86-64-lock-1-intel.d: Likewise.
* gas/i386/x86-64-lock-1.d: Likewise.
* gas/i386/x86-64-lock-1.s: Likewise.
* gas/i386/x86-64-lockbad-1.l: Likewise.
* gas/i386/x86-64-lockbad-1.s: Likewise.
2009-11-14 06:04:34 +00:00
4473e00469
2009-11-13 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (_i386_insn): Don't use bit field on
swap_operand.
2009-11-14 01:46:28 +00:00
c32fa91d70
gas/
...
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (LOCKREP_PREFIX): Removed.
(REP_PREFIX): New.
(LOCK_PREFIX): Likewise.
(PREFIX_GROUP): Likewise.
(REX_PREFIX): Updated.
(MAX_PREFIXES): Likewise.
(add_prefix): Updated. Return enum PREFIX_GROUP.
(md_assemble): Check for lock without a lockable instruction.
(parse_insn): Updated.
(output_insn): Likewise.
gas/testsuite/
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run lock-1, lock-1-intel, lockbad-1,
x86-64-lock-1, x86-64-lock-1-intel and x86-64-lockbad-1.
* gas/i386/lock-1-intel.d: New.
* gas/i386/lock-1.d: Likewise.
* gas/i386/lock-1.s: Likewise.
* gas/i386/lockbad-1.l: Likewise.
* gas/i386/lockbad-1.s: Likewise.
* gas/i386/x86-64-lock-1-intel.d: Likewise.
* gas/i386/x86-64-lock-1.d: Likewise.
* gas/i386/x86-64-lock-1.s: Likewise.
* gas/i386/x86-64-lockbad-1.l: Likewise.
* gas/i386/x86-64-lockbad-1.s: Likewise.
opcodes/
2009-11-12 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add IsLockable.
* i386-opc.h (IsLockable): New.
(i386_opcode_modifier): Add islockable.
* i386-opc.tbl: Add IsLockable to add, adc, and, btc, btr,
bts, cmpxchg, cmpxch8b, dec, inc, neg, not, or, sbb, sub,
xor, xadd and xchg.
* i386-tbl.h: Regenerated.
2009-11-12 18:57:14 +00:00
1b9f0c97ad
2009-11-11 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (build_modrm_byte): Don't set register
operand twice.
2009-11-12 02:21:46 +00:00
0d999f3337
* config/m68k-parse.h (enum m68k_register): Add ACR[4-7], RGPIOBAR.
...
* config/tc-m68k.c (mcf5206_ctrl): Fix whitespace.
(mcf52223_ctrl): Remove non-existent registers.
(mcf54418): Define.
(mcf54455): Remove MBAR.
(m68k_cpus): Add lines for MCF5441x family.
(m68k_ip, init_table): Handle RGPIOBAR, ACR[4-7].
* m68k-dis.c (print_insn_arg): Handle RGPIOBAR, ACR[4-7] and MBAR[01].
2009-11-10 18:05:24 +00:00
23ddb8504a
* config/obj-elf.c (obj_elf_change_section): Remove FIXME from
...
comment.
2009-11-06 11:51:04 +00:00
f88c9eb030
2009-11-05 Sebastian Pop <sebastian.pop@amd.com>
...
Quentin Neill <quentin.neill@amd.com>
* gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS.
(build_vex_prefix): Handle xop09 and xop0a.
(build_modrm_byte): Handle vexlwp.
(md_show_usage): Add lwp.
* gas/doc/c-i386.texi (i386-LWP): New section.
* gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp in 64-bit mode,
run lwp in 32-bit mode.
* gas/testsuite/gas/i386/x86-64-lwp.d: New.
* gas/testsuite/gas/i386/x86-64-lwp.s: New.
* gas/testsuite/gas/i386/lwp.d: New.
* gas/testsuite/gas/i386/lwp.s: New.
* opcodes/i386-dis.c (OP_LWPCB_E): New.
(OP_LWP_E): New.
(OP_LWP_I): New.
(USE_XOP_8F_TABLE): New.
(XOP_8F_TABLE): New.
(REG_XOP_LWPCB): New.
(REG_XOP_LWP): New.
(XOP_09): New.
(XOP_0A): New.
(reg_table): Redirect REG_8F to XOP_8F_TABLE.
Add entries for REG_XOP_LWPCB and REG_XOP_LWP.
(xop_table): New.
(get_valid_dis386): Handle USE_XOP_8F_TABLE.
Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values
to access to the vex_table.
(OP_LWPCB_E): New.
(OP_LWP_E): New.
(OP_LWP_I): New.
* opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP.
(cpu_flags): Add CpuLWP.
(opcode_modifiers): Add VexLWP, XOP09, and XOP0A.
* opcodes/i386-opc.h (CpuLWP): New.
(i386_cpu_flags): Add bit cpulwp.
(VexLWP): New.
(XOP09): New.
(XOP0A): New.
(i386_opcode_modifier): Add vexlwp, xop09, and xop0a.
* opcodes/i386-opc.tbl (llwpcb): Added.
(lwpval): Added.
(lwpins): Added.
2009-11-05 23:40:05 +00:00
0d734b5d06
[opcodes]
...
* rx-decode.opc (rx_decode_opcode) (mvtipl): Add.
(mvtcp, mvfcp, opecp): Remove.
* rx-decode.c: Regenerate.
* rx-dis.c (cpen): Remove.
[gas]
* config/rx-parse.y (MVTIPL): Update bit pattern.
(cpen): Remove.
[include/opcode]
* rx.h (rx_decode_opcode) (mvtipl): Add.
(mvtcp, mvfcp, opecp): Remove.
2009-11-05 00:38:45 +00:00
2c678708e6
2009-11-04 Daniel Jacobowitz <dan@codesourcery.com>
...
Maxim Kuvyrkov <maxim@codesourcery.com>
* config/tc-m68k.h (CF_DIFF_EXPR_OK): Define to 0 for uClinux.
(CFI_DIFF_LSDA_OK): Define.
* config/te-uclinux.h: New file.
* configure.tgt (m68k-uclinux): Define em.
* dw2gencfi.c (CFI_DIFF_LSDA_OK): New macro.
(dot_cfi_lsda, output_fde): Use instead of CFI_DIFF_EXPR_OK.
2009-11-04 09:52:00 +00:00
1ee6951580
2009-11-03 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (do_vfp_nsyn_mla_mls): Fix vmls excoding.
gas/testsuite/
* gas/arm/vfp-neon-syntax.d: Update expected results.
* gas/arm/vfp-neon-syntax_t2.d: Update expected results.
2009-11-03 12:37:45 +00:00
62f3b8c867
2009-11-02 Paul Brook <paul@codesourcery.com>
...
ld/testsuite/
* ld-arm/arm-elf.exp: Add new attr-merge-vfp tests.
* ld-arm/attr-merge-vfp-1.d: New test.
* ld-arm/attr-merge-vfp-1r.d: New test.
* ld-arm/attr-merge-vfp-2.d: New test.
* ld-arm/attr-merge-vfp-2r.d: New test.
* ld-arm/attr-merge-vfp-3.d: New test.
* ld-arm/attr-merge-vfp-3r.d: New test.
* ld-arm/attr-merge-vfp-4.d: New test.
* ld-arm/attr-merge-vfp-4r.d: New test.
* ld-arm/attr-merge-vfp-5.d: New test.
* ld-arm/attr-merge-vfp-5r.d: New test.
* ld-arm/attr-merge-vfp-2.s: New test.
* ld-arm/attr-merge-vfp-3.s: New test.
* ld-arm/attr-merge-vfp-3-d16.s: New test.
* ld-arm/attr-merge-vfp-4.s: New test.
* ld-arm/attr-merge-vfp-4-d16.s: New test.
gas/
* doc/c-arm.texi: Document new -mfpu options.
* config/tc-arm.c (fpu_vfp_ext_v3xd, fpu_vfp_fp16, fpu_neon_ext_fma,
fpu_vfp_ext_fma): New.
(NEON_ENC_TAB): Add vfma, vfms, vfnma and vfnms.
(do_vfp_nsyn_fma_fms, do_neon_fmac): New functions.
(insns): Move double precision load/store. Split out double
precision VFPv3 instrucitons. Add VFPv4 instructions.
(arm_fpus): Add VFPv3-FP16, VFPv3xD and VFPv4 variants.
(aeabi_set_public_attributes): Set VFPv4 variants
gas/testsuite/
* gas/arm/attr-mfpu-vfpv4.d: New test.
* gas/arm/attr-mfpu-vfpv4-d16.d: New test.
* gas/arm/neon-fma-cov.d: New test.
* gas/arm/neon-fma-cov.s: New test.
* gas/arm/vfp-fma-inc.s: New test.
* gas/arm/vfp-fma-arm.d: New test.
* gas/arm/vfp-fma-arm.s: New test.
* gas/arm/vfp-fma-thumb.d: New test.
* gas/arm/vfp-fma-thumb.s: New test.
* gas/arm/vfma1.d: New test.
* gas/arm/vfma1.s: New test.
* gas/arm/vfpv3xd.d: New test.
* gas/arm/vfpv3xd.s: New test.
include/opcode/
* arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA,
FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define.
(FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD,
FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16,
FPU_ARCH_NEON_VFP_V4): Define.
binutils/
* readelf.c (arm_attr_tag_VFP_arch): Add VFPv4 and VFPv4-D16.
bfd/
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle VFPv4
attributes.
opcodes/
* arm-dis.c (coprocessor_opcodes): Update to use new feature flags.
Add VFPv4 instructions.
2009-11-02 13:44:05 +00:00
4cae74aaa2
* ecoff.c (ecoff_symbol_clone_hook): New function.
...
* ecoff.h (ecoff_symbol_clone_hook): Declare.
* obj.h (struct format_ops): Add symbol_clone_hook.
* config/obj-aout.c (aout_format_ops): Init new field.
* config/obj-coff.c (coff_format_ops): Likewise.
* config/obj-ecoff.c (ecoff_format_ops): Likewise.
* config/obj-elf.c (elf_format_ops): Likewise.
* config/obj-ecoff.h (obj_symbol_clone_hook): Define.
* config/obj-multi.h (obj_symbol_clone_hook): Define.
2009-11-02 11:49:48 +00:00
b6cdf8aeed
* config/tc-hppa.c (pa_build_unwind_subspace): Replace start symbol
...
with local symbol.
2009-10-30 17:05:58 +00:00
206c2556c2
gas/
...
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* config/tc-i386.c (build_modrm_byte): Do not swap REG and
NDS operands for FMA4.
gas/testsuite/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* gas/i386/fma4.d: Updated patterns.
* gas/i386/x86-64-fma4.d: Same.
opcodes/
2009-10-29 Sebastian Pop <sebastian.pop@amd.com>
* i386-dis.c (OP_VEX_FMA): Removed.
(VexFMA): Removed.
(Vex128FMA): Removed.
(prefix_table): First source operand of FMA4 insns is decoded
with Vex not with VexFMA.
(OP_EX_VexW): Second source operand is decoded with get_vex_imm8
when vex.w is set. Third source operand is decoded with
get_vex_imm8 when vex.w is cleared.
(OP_VEX_FMA): Removed.
2009-10-29 22:22:59 +00:00
e6655fdab4
2009-10-29 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (neon_tab_entry): Fix VNMLA/VNMLS opcodes.
gas/testsuite/
* gas/arm/vfp-neon-syntax.d: Update expected results.
* gas/arm/vfp-neon-syntax_t2.d: Update expected results.
2009-10-29 18:01:13 +00:00
b38f9f31ea
2009-10-29 Paul Brook <paul@codesourcery.com>
...
gas/
* doc/c-arm.texi: Document ARM -mcpu=cortex-a5.
* config/arm/tc-arm.c (arm_cpu_option_table): Add cortex-a5.
2009-10-29 15:37:53 +00:00
1b31b9e34a
2009-10-29 Tristan Gingold <gingold@adacore.com>
...
* config/tc-mep.c (md_pseudo_table): Remove dwarf2 pseudo
as they are already defined in obj-elf.c
* config/tc-m32c.c (md_pseudo_table): Ditto.
* config/tc-spu.c (md_pseudo_table): Ditto.
* config/tc-avr.c (md_pseudo_table): Ditto.
2009-10-29 09:43:18 +00:00
721a818646
2009-10-28 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (opcode_lookup): Allow VFP/NEON type suffixes
unconditionally.
2009-10-28 16:50:44 +00:00
66b4202f30
2009-10-27 Tristan Gingold <gingold@adacore.com>
...
* config/tc-avr.c (md_pseudo_table): Add dwarf2 debug pseudo.
* config/tc-avr.h (DWARF2_LINE_MIN_INSN_LENGTH): Define.
(DWARF2_ADDR_SIZE): Define.
2009-10-27 15:39:27 +00:00
3c45a255a8
* config/tc-z80.c (z80_start_line_hook): Fix parsing of 'equ' or
...
'defl' in cases where the space between the keyword and the
expression has been scrubbed away.
Do not check whether a symbol is redefined with 'equ' here;
the function equals takes an argument indicating whether
redefinitions are allowed.
Only call LISTING_NEWLINE if needed, and then after the call to
bump_line_counters.
2009-10-25 16:15:19 +00:00
d71f39f5cf
* config/tc-lm32.c (md_begin): Add missing call to bfd_set_arch_mach.
2009-10-19 15:30:06 +00:00
23f5dfcb86
* config/tc-xc16x.c (md_cgen_lookup_reloc): Ensure fix_size is set
...
correctly for all 16 bit relocs. Return BFD_RELOC_NONE if reloc
isn't recognized, not BFD_RELOC_XC16X_SOF.
testsuite:
* gas/xc16x/shlrol.s: Specify constant shift amount.
* gas/xc16x/xc16x.exp (do_xc16x_shlrol): Update expected output.
2009-10-19 15:27:39 +00:00
c5ed243be1
* as.h (know): Don't define as empty.
...
* config/tc-arm.c (make_mapping_symbol): Revert last patch.
2009-10-18 13:33:20 +00:00
a75b90823c
* config/tc-arm.c (make_mapping_symbol): Add braces to avoid empty body
...
in release builds.
2009-10-18 08:20:17 +00:00
4c2c651631
2009-10-13 H.J. Lu <hongjiu.lu@intel.com>
...
PR binutils/10766
* config/tc-i386.c (build_modrm_byte): Declare exp earlier.
2009-10-13 16:42:40 +00:00
313c53d19e
gas/
...
2009-10-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10740
* config/tc-i386-intel.c (i386_intel_operand): Handle call
and jump with 2 immediate operands.
* config/tc-i386.c (i386_finalize_immediate): Don't generate
error message if operand string is NULL.
gas/testsuite/
2009-10-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10740
* gas/i386/jump.s: Add new tests.
* gas/i386/jump16.s: Likewise.
* gas/i386/jump.d: Updated.
* gas/i386/jump16.d: Likewise.
2009-10-13 16:23:25 +00:00
b2b7424819
gas:
...
2009-10-07 Vincent Riviere <vincent.riviere@freesbee.fr>
PR gas/3041
* config/tc-m68k.c (tc_gen_reloc): Fix addend for relocations
located in data section an referencing a weak symbol.
gas/testsuite:
2009-10-07 Vincent Riviere <vincent.riviere@freesbee.fr>
PR gas/3041
* gas/m68k/all.exp: Added "p3041data".
* gas/m68k/p3041.d, gas/m68k/p3041.s: Added tests of weak references
from text section to all possible sections.
* gas/m68k/p3041data.d, gas/m68k/p3041data.s: New test. Check weak
references from data section.
2009-10-13 08:55:31 +00:00
d31060819e
* config/tc-arm.c (mapping_state, mapping_state_2): Make dummy
...
versions slightly more than nothing.
2009-10-07 14:00:06 +00:00
cd42ff9c60
PR gas/2117
...
* config/tc-ia64.c (parse_operand): Use expression rather than
expression_and_evalute.
(parse_operand_and_eval): New function. Replace all uses of
parse_operand outside of parse_operands with this function.
(parse_operans_maybe_eval): New function. Replace uses of
parse_operand in parse_operands, except for the dummy, with
this function.
2009-10-07 05:13:53 +00:00
9fe54b1ca1
gas/
...
* config/tc-ppc.c (md_show_usage): Document -m476.
* doc/c-ppc.texi (PowerPC-Opts): Document -m476.
gas/testsuite/
* gas/ppc/476.s: New test.
* gas/ppc/476.d: Likewise.
* gas/ppc/ppc.exp: Run the 476 test.
include/opcode/
* ppc.h (PPC_OPCODE_476): Define.
opcodes/
* ppc-dis.c (ppc_opts): Add "476" entry.
* ppc-opc.c (PPC476): Define.
(powerpc_opcodes): Update mnemonics where required for 476.
2009-10-02 14:42:42 +00:00
38462edfa2
* dw2gencfi.c: Include dwarf2dbg.h.
...
(DWARF2_FORMAT): Define if not defined.
(dot_cfi_sections): New function.
(cfi_pseudo_table): Handle .cfi_sections.
(CFI_EMIT_eh_frame, CFI_EMIT_debug_frame): Define.
(cfi_sections): New variable.
(output_cie, output_fde, select_cie_for_fde): Add eh_frame
argument, add supporting for outputting .debug_frame
section.
(cfi_change_reg_numbers): New function or macro.
(cfi_finish): Only emit .eh_frame if
cfi_sections & CFI_EMIT_eh_frame. Emit .debug_frame if
cfi_sections & CFI_EMIT_debug_frame.
* config/tc-ppc.h (md_reg_eh_frame_to_debug_frame): Define.
* doc/as.texinfo (CFI directives): Document .cfi_sections.
2009-10-02 11:33:50 +00:00
634b50f2a6
gas/
...
* config/tc-ppc.c (md_show_usage): Rename "ppca2" to "a2".
* doc/c-ppc.texi (PowerPC-Opts): Likewise.
gas/testsuite/
* gas/ppc/a2.d: Rename "ppca2" to "a2".
include/opcode/
* ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2.
opcodes/
* ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2.
* ppc-dis.c (ppc_opts): Likewise.
Rename "ppca2" to "a2".
2009-10-01 19:24:48 +00:00
9f32dd5b5a
2009-10-01 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (x86_cons): Reformat.
2009-10-01 14:31:43 +00:00
c7927a3c0e
bfd
...
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo.
(ALL_MACHINES_CFILES): Add cpu-rx.c.
(BFD32_BACKENDS): Add elf32-rx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rx.c.
* archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx.
Export bfd_rx_arch.
(bfd_archures_list): Add bfd_rx_arch.
* config.bfd: Add entry for rx-*-elf.
* configure.in: Add entries for bfd_elf32_rx_le_vec and
bfd_elf32_rx_be_vec.
* reloc.c: Add RX relocations.
* targets.c: Add RX target vectors.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rx.c: New file.
* elf32-rx.c: New file.
binutils
* readelf.c: Add support for RX target.
* MAINTAINERS: Add DJ and NickC as maintainers for RX.
gas
* Makefile.am: Add RX target.
* configure.in: Likewise.
* configure.tgt: Likewise.
* read.c (do_repeat_with_expander): New function.
* read.h: Provide a prototype for do_repeat_with_expander.
* doc/Makefile.am: Add RX target documentation.
* doc/all.texi: Likewise.
* doc/as.texinfo: Likewise.
* Makefile.in: Regenerate.
* NEWS: Mention support for RX architecture.
* configure: Regenerate.
* doc/Makefile.in: Regenerate.
* config/rx-defs.h: New file.
* config/rx-parse.y: New file.
* config/tc-rx.h: New file.
* config/tc-rx.c: New file.
* doc/c-rx.texi: New file.
gas/testsuite
* gas/rx: New directory.
* gas/rx/*: New set of test cases.
* gas/elf/section2.e-rx: New expected output file.
* gas/all/gas.exp: Add support for RX target.
* gas/elf/elf.exp: Likewise.
* gas/lns/lns.exp: Likewise.
* gas/macros/macros.exp: Likewise.
include
* dis-asm.h: Add prototype for print_insn_rx.
include/elf
* rx.h: New file.
include/opcode
* rx.h: New file.
ld
* Makefile.am: Add rules to build RX emulation.
* configure.tgt: Likewise.
* NEWS: Mention support for RX architecture.
* Makefile.in: Regenerate.
* emulparams/elf32rx.sh: New file.
* emultempl/rxelf.em: New file.
opcodes
* Makefile.am: Add RX files.
* configure.in: Add support for RX target.
* disassemble.c: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* opc2c.c: New file.
* rx-decode.c: New file.
* rx-decode.opc: New file.
* rx-dis.c: New file.
2009-09-29 14:17:19 +00:00
21d799b5c4
Update soruces to make alpha, arc and arm targets compile cleanly
...
with -Wc++-compat:
* config/tc-alpha.c: Add casts.
(extended_bfd_reloc_code_real_type): New type. Used to avoid
enumeration conversion warnings.
(struct alpha_fixup, void assemble_insn, assemble_insn)
(assemble_tokens): Use new type.
* ecoff.c: Add casts. (mark_stabs): Use enumeration names.
* config/obj-elf.c: Add cast
* config/tc-arc.c: Add casts.
* config/obj-aout.h (text_section,data_section,bss_section):
Make extern.
* config/obj-elf.c: Add cast.
* config/tc-arm.c: Add casts.
(X, TxCE, TxCE, TxC3, TxC3w, TxCM_, TxCM, TUE, TUF, CE, CL, cCE)
(cCL, C3E, xCM_, nUF, nCE_tag): Change input format to avoid the
need for keywords as arguments.
* ecoff.c: Add casts.
* ecofflink.c: Add casts.
* elf64-alpha.c: Add casts.
(struct alpha_elf_got_entry, struct alpha_elf_reloc_entry): Move
to top level.
(SKIP_HOWTO): Use enum name.
* elf32-arm.c: Add casts.
(elf32_arm_vxworks_bed): Update code to avoid multiple
declarations.
(struct map_stub): Move to top level.
* arc-dis.c Fix casts.
* arc-ext.c: Add casts.
* arm-dis.c (enum opcode_sentinel_enum): Gave name to anonymous
enum.
* emultempl/armelf.em: Add casts.
2009-09-25 19:13:27 +00:00
2bf05e5730
gas/
...
2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Check vex == 2 instead
of vex256.
opcodes/
2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove Vex256.
(set_bitfield): Handle XXX=V.
* i386-opc.h (Vex): Update comments.
(Vex256): Removed.
(VexNDS): Updated.
(i386_opcode_modifier): Change vex to 2 bits. Remove vex256.
* i386-opc.tbl: Replace "Vex|Vex256" with Vex=2.
* i386-tbl.h: Regenerated.
2009-09-24 16:37:09 +00:00
f5d9e8160d
gas/
...
2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10677
* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Return true
for BFD_RELOC_X86_64_GOTPCREL.
gas/testsuite/
2009-09-24 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10677
* gas/i386/i386.exp: Run x86-64-localpic.
* gas/i386/x86-64-localpic.d: New.
* gas/i386/x86-64-localpic.s: Likewise.
2009-09-24 14:36:48 +00:00
2a86604a47
gas/
...
2009-09-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Don't check
BFD_RELOC_386_GOT32.
gas/testsuite/
2009-09-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run localpic.
* gas/i386/localpic.d: New.
* gas/i386/localpic.s: Likewise.
2009-09-24 03:23:52 +00:00
9ac367048b
2009-09-22 Sterling Augustine <sterling@jaw.hq.tensilica.com>
...
* config/tc-xtensa.c (md_apply_fix): Remove check for constant with
difference of of two symbols.
(xtensa_fix_adjustable): Likewise.
2009-09-22 21:47:03 +00:00
76ba998616
2009-09-21 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c: Remove white spaces.
2009-09-21 21:50:19 +00:00
e0d602ecff
gas/
...
* config/tc-ppc.c (md_show_usage): Document -mpcca2.
* doc/c-ppc.texi (PowerPC-Opts): Document -mppca2.
gas/testsuite/
* gas/ppc/a2.s: New.
* gas/ppc/a2.d: Likewise.
* gas/ppc/ppc.exp: Run the a2 dump test.
include/opcode/
* ppc.h (PPC_OPCODE_PPCA2): New.
opcodes/
* ppc-dis.c (ppc_opts): Add "ppca2" entry.
* ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx.,
eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx,
icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx.,
ici mnemonics.
(ERAT_T): New operand.
(XWC_MASK): New mask.
(XOPL2): New macro.
(PPCA2): Define.
2009-09-21 10:29:07 +00:00
fa289fb8df
2009-09-15 H.J. Lu <hongjiu.lu@intel.com>
...
* config/tc-i386.c (offset_in_range): Sign extend offset only
if BFD64 is defined.
2009-09-15 18:51:53 +00:00
Nick Clifton
Sebastian Pop
Paul Brook
Alan Modra
H.J. Lu
Maxim Kuvyrkov
DJ Delorie
Dave Anglin
Tristan Gingold
Arnold Metselaar
Doug Evans
Nathan Sidwell
Peter Bergner
Jakub Jelinek
Sterling Augustine
Ben Elliston