Commit Graph

124 Commits

Author SHA1 Message Date
Stan Shebs
d4f3574e77 import gdb-1999-09-08 snapshot 1999-09-09 00:02:17 +00:00
Jason Molenda
a0b3c4fd32 import gdb-1999-08-02 snapshot 1999-08-02 23:48:37 +00:00
Jason Molenda
adf40b2e16 import gdb-1999-07-19 snapshot 1999-07-19 23:30:11 +00:00
Jason Molenda
43e526b9b4 import gdb-1999-07-12 snapshot 1999-07-12 11:15:22 +00:00
Stan Shebs
7a292a7adf import gdb-19990422 snapshot 1999-04-26 18:34:20 +00:00
Stan Shebs
c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00
Stan Shebs
071ea11e85 Initial creation of sourceware repository 1999-04-16 01:34:07 +00:00
Frank Ch. Eigler
08f758df94 * resolution of eCos-vs.-sky merge conflict!
[ChangeLog]
1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
	* mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
start-sanitize-sky
	* interp.c (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook.
 	Call sim_engine_halt on BreakPoint.
end-sanitize-sky
[ChangeLog.sky]
1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
	* sky-gdb.c (sky_sim_engine_halt): Do not set CIA here.
1998-12-30 21:16:14 +00:00
Frank Ch. Eigler
14bbac6609 * eCos->devo merge; tx3904 sanitize tags removed
1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
	(load_word): Call SIM_CORE_SIGNAL hook on error.
	(signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
	starting.  For exception dispatching, pass PC instead of NULL_CIA.
	(decode_coproc): Use COP0_BADVADDR to store faulting address.
	* sim-main.h (COP0_BADVADDR): Define.
	(SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
	(SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
	(_sim_cpu): Add exc_* fields to store register value snapshots.
	* mips.igen (*): Replace memory-related SignalException* calls
	with references to SIM_CORE_SIGNAL hook.
	* dv-tx3904irc.c (tx3904irc_port_event): printf format warning
	fix.
	* sim-main.c (*): Minor warning cleanups.
1998-12-30 12:21:43 +00:00
Andrew Cagney
5a581ea612 Pacify GCC. 1998-11-23 06:10:01 +00:00
Andrew Cagney
d1cbd70abb Add configury for mips-lsi-elf target (32 bit MIPS16).
Fix numerous problems with PENDING_* code.
In old gencode simulator, don't double tick each cycle.
Add BREAK instruction to MIPS16 gencode simulator.
1998-11-12 06:42:34 +00:00
Frank Ch. Eigler
fda83b6795 * MONSTER sky -> devo merge
* ChangeLog / ChangeLog.sky entries were merged with original time stamps;
  a few were moved between the files
1998-10-27 12:48:08 +00:00
Ron Unrau
b8140a08bf * sim-main.h: shadow NUM_CORE_REGS from tm-txvu.h
* interp.c: use NUM_CORE_REGS
        * sky-gdb.c (set_fifo_breakpoints): use VIF interrupt bit for break
        * sky-pke.c (pke_issue): use interrupt bit for break points
1998-07-31 22:02:12 +00:00
Ron Unrau
2905d173c5 * sky-pke.c(read_pke_pc): return source address of current pc
* sky-pke.c(read_pke_pcx): return index of current pc
        * sky-pke.h: export read_pke_pcx
        * interp.c(sim_fetch_registers): read pke pc/pcx
        * sky-libvpe.c: track name change from GDB
        * sim-main.h: add vif memory based pc
          - extend gdb comm area for fifo breakpoints
          - define SIM_ENGINE_RESTART_HOOK
        * sky-gdb.c: add support for VIF breakpoints
1998-06-16 20:30:20 +00:00
Ian Carmichael
8ea23ea4bb * Implement remaining bits in VPU_STAT, CMSAR0, CMSAR1, FBRST. Fix COP2 interface
* to VI registers (CFC2/CTC2).
*
* Modified Files:
* 	ChangeLog.sky interp.c sim-main.c sky-pke.h sky-vu.c sky-vu.h
1998-06-16 16:02:04 +00:00
Patrick Macdonald
ff94f10401 * interp.c: added call to sky_command_options_end() to close
any open file handles before exiting
	* sky-gpuif.[c|h]: add disassembly on the fly code, log and log
	file option support
	* sky-gdb.[c|h] (sky_command_options_close()): new function, added
	some body to the log and log file option sections
1998-06-12 18:58:26 +00:00
Frank Ch. Eigler
b879096335 * Support for sky hardware interrupts. The sky-dma cannot trigger
interrupts properly yet (jlemke TODO).
Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (decode_coproc): For TX39, add stub COP0 register #7,
 	to allay warnings.
	(interrupt_event): Made non-static.
start-sanitize-tx3904
	* dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
 	interchange of configuration values for external vs. internal
 	clock dividers.
end-sanitize-tx3904
start-sanitize-sky
	* sky-device.c (sky_signal_interrupt): New function to generate
	interrupt event.
	* sky-device.h: Declare it.
	* sky-dma.c (check_int1): Call it.
	* sky-pke.c (pke_begin_interrupt_stall): Call it.
end-sanitize-sky
1998-06-10 17:07:10 +00:00
Patrick Macdonald
a4377bf7bd * Updated several files to place all sky specific runtime options
in sky-gdb.c.
	* Added two new runtime options --sky-debug and --screen-refresh
	* ChangeLog.sky contains a detailed description of the mods
1998-06-10 17:07:09 +00:00
Frank Ch. Eigler
cc9bc93202 * Updates to tx3904 peripheral simulations for ECC.
Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
 	register upon non-zero interrupt event level, clear upon zero
 	event value.
	* dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
	by passing zero event value.
	(*_io_{read,write}_buffer): Endianness fixes.
	* dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
	(deliver_*_tick): Reduce sim event interval to 75% of count interval.
	* interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
	serial I/O and timer module at base address 0xFFFF0000.
1998-06-09 16:54:09 +00:00
Ian Carmichael
895a7dc2aa * Handle 10 and 20-bit versions of Break instruction. Move handling
* of special values from signal_exception() in interp.c into mips.igen.
*
* Modified: gencode.c interp.c mips.igen sim-main.h
1998-06-09 16:54:08 +00:00
James Lemke
037f29c526 Added support for the VU insn D (debug) & T (trace) bits. 1998-06-04 20:50:55 +00:00
Frank Ch. Eigler
da040f2a6c * Early check-in of tx3904 timer sim implementation for ECC.
It is not yet properly tested.
Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* dv-tx3904tmr.c: New file - implements tx3904 timer.
	* dv-tx3904{irc,cpu}.c: Mild reformatting.
	* configure.in: Include tx3904tmr in hw_device list.
	* configure: Rebuilt.
	* interp.c (sim_open): Instantiate three timer instances.
	Fix address typo of tx3904irc instance.
1998-06-04 12:43:45 +00:00
Ian Carmichael
4979c0a271 * Move the sanitize comments to the right place. 1998-06-02 21:04:49 +00:00
Ian Carmichael
8e3a0b599f * SYSCALL now uses exception vector.
* SKY: New memory mapping rules for k1seg, k0seg.
* Modified Files: ChangeLog.sky ChangeLog interp.c sim-main.c
1998-06-02 19:53:36 +00:00
Frank Ch. Eigler
29b5afe9af * Small TX39-only patch for ECC.
Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* interp.c (decode_coproc): For TX39, add stub COP0 register #3,
	to allay warnings.
1998-06-01 16:29:43 +00:00
Patrick Macdonald
fab0ee0d0b * interp.c: modified name of GIF device
* sky-gpuif.[ch]:  IMT burst support and queue manipulation ( see
	                   ChangeLog.sky for complete details )
	* sky-gs.c: modified name of GIF device
1998-05-21 15:41:35 +00:00
Andrew Cagney
8404825993 * interp.c (sim_fetch_register): Convert internal r5900 regs to
target byte order
1998-05-21 08:18:21 +00:00
Frank Ch. Eigler
3fa454e95f * Monster patch - may destablize MIPS sims for a little while.
* Followup patch for SCEI PR 15853
* First check-in of TX3904 interrupt controller devices for ECC. [sanitized]
* First implementation of MIPS hardware interrupt emulation.
Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
	* configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
 	modules.  Recognize TX39 target with "mips*tx39" pattern.
	* configure: Rebuilt.
	* sim-main.h (*): Added many macros defining bits in
 	TX39 control registers.
	(SignalInterrupt): Send actual PC instead of NULL.
	(SignalNMIReset): New exception type.
	* interp.c (board): New variable for future use to identify
	a particular board being simulated.
	(mips_option_handler,mips_options): Added "--board" option.
	(interrupt_event): Send actual PC.
	(sim_open): Make memory layout conditional on board setting.
	(signal_exception): Initial implementation of hardware interrupt
 	handling.  Accept another break instruction variant for simulator
 	exit.
	(decode_coproc): Implement RFE instruction for TX39.
	(mips.igen): Decode RFE instruction as such.
start-sanitize-tx3904
	* configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
	* interp.c: Define "jmr3904" and "jmr3904debug" board types and
	bbegin to implement memory map.
	* dv-tx3904cpu.c: New file.
	* dv-tx3904irc.c: New file.
end-sanitize-tx3904
1998-05-18 15:55:05 +00:00
Patrick Macdonald
55470cc7ef * Roll Alpha modifications into devo for sky-gpuif*/ sky-gs*/ interp.c
* Complete and informative details can be found in ChangeLog.sky
1998-05-07 19:14:28 +00:00
Ron Unrau
c939ffeb80 Initial Breakpoint support:
* sim-main.h: (struct _sim_cpu): add cur_device field.
          Define cur_device values, breakpoint value, and SIM_ENGINE_HALT_HOOK
        * interp.c (sim_open): initialize cur_device
        * sky-engine.c (engine_run): use cur_device to set current_cpu
        * sky-libvpe.c (vpecallms_cycle): add check for breakpoint
        * sky-hardware.h: delete NUMBER_CPUS
        * sky-hardware.c (attach_devices): create a memory mapped comm
          area for GDB/SIM interactions

misc:
        * sky-vu.c ({read,write}_vu_misc_reg): do default behavior for
          unknown regs instead of sim_io_error. MP reg is float (was missing
          cast).
1998-05-07 14:36:42 +00:00
James Lemke
2b1d91ab62 configure.in, interp.c: Add configure option --with-sim-funit. 1998-04-21 21:24:24 +00:00
Andrew Cagney
97f4d18341 Implement ERET instruction.
Add {signed,unsigned}_address type.
1998-04-21 04:30:27 +00:00
Andrew Cagney
421cbaae98 For new IGEN simulators, rewrite checks validating correct use of the
HI/LO registers.  For old gencode simulator, delete all checks.
1998-04-21 01:17:58 +00:00
Frank Ch. Eigler
f8998e7780 * Fixed data mangling problems in R5900 COP2 LQC2/SQC2 instructions. 1998-04-17 19:04:53 +00:00
Frank Ch. Eigler
fc4e5b84c8 * Adapted R5900 COP2 interface code to clarified micro-mode interlock
behavior.
1998-04-16 19:27:55 +00:00
Frank Ch. Eigler
46399a00e8 * Changes to make interp.c compile under mips64r5900-sky-elf target.
Wed Apr 15 12:41:18 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Make COP2 branch code compile after
 	igen signature changes.
1998-04-15 19:02:04 +00:00
Andrew Cagney
f3bdd368ea Debug tx19 built from igen sources.
Rework ifetch{16,32} to match the more recent do_load function.
1998-04-15 07:23:28 +00:00
Frank Ch. Eigler
96a4eb30da * Fixed a one-character typo in COP2 instruction synthesis.
[ChangeLog]
	Mon Apr 13 16:28:52 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Add proper 1000000 bit-string at top
	of VU lower instruction.
1998-04-13 20:31:29 +00:00
Frank Ch. Eigler
11c47f314b * R5900 sky COP2 testing continuing. Today only small
VCALLMS-related were found/fixed.

[ChangeLog.sky]

	* sky-vu.c ({read,write}_vu_special_reg): Add CMSAR[01] as special
 	registers for a VU.  Behavior not as mandated.
	({read,write}_vu_{misc,special}_reg): Create sim_io_error upon
	access to unknown register.  Behavior not as mandated.

	* sky-vu.h (anonymous register numbering enum): Add CMSAR[01].

	* sky-libvpe.c (indebug): Cache $ENV{'SKY_DEBUG'}.

[ChangeLog]


	* Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.

	* interp.c (decode_coproc): Refer to VU CIA as a "special"
	register, not as a "misc" register.  Aha.  Add activity
	assertions after VCALLMS* instructions.
1998-04-08 22:22:58 +00:00
Frank Ch. Eigler
174ff2242b * R5900 COP2 sim testing in progress. The majority of instructions actually
work!

[ChangeLog.sky]

	* sky-vu.h (vu_device): Represent "macro instruction just stuffed
 	into fetch buffer" condition with new "m" bit.  Rename old "m" to
 	"l".

	* sky-libvpe.c (indebug): Save snapshot of environment value;
 	workaround for suspected memory corruption.
	(fetch_inst): Respect new "m" macro-instruction flag for reporting
 	successful fetch to caller.
	(exec_inst): Disassemble instruction here instead of fetch time.
  	Renamed old "m" -> "l" flag in VU state to track interlock
 	release.
	(vpecallms_cycle): Call exec_inst only if fetch_inst did some
 	work.

	* sky-vu.c (vu_attach, vu[01]_device): Revamped initialization to
 	ensure complete clear of tail part of struct at attach time.
	(vu0_busy): Fix thinko.
	(vu0_macro_issue): Adapt to new "l" flag.
	(vu0_micro_interlock_released): Ditto.
 	(write_vu_special_reg): Ditto.
	(read_vu_special_reg): Compute VBS0/VBS1 bits more explicitly.
  	The other VU status bits are not yet computed.

[ChangeLog]

	* interp.c (decode_coproc): Do not apply superfluous E (end) flag
 	to upper code of generated VU instruction.
1998-04-07 22:47:53 +00:00
Frank Ch. Eigler
2ebb2a6855 * R5900 COP2 is now ready for testing. Let loose the dogs!
Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (cop_[ls]q): Replaced stub with proper COP2 code.

	* sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
 	for TARGET_SKY.

	* r5900.igen (SQC2): Thinko.
1998-04-07 00:01:31 +00:00
Frank Ch. Eigler
ebcfd86a2e * R5900 COP2 function nearly complete. PKE sim now aware of new GPUIF
masking facility for PATH3 transfers.

[ChangeLog.sky]

Sun Apr  5 12:11:45 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-libvpe.c (exec-inst): Added "M" bit detection for upper
 	instruction.

	* sky-pke.c (pke_check_stall): Added more assertions.
	(pke_code_mskpath3): Use new GPUIF M3P control register.

	* sky-pke.h (VU[01]_CIA): New macros that give VU CIA
 	pseudo-register addresses.

	* sky-vu.h (vu_device, VectorUnitState): Merged structs.
	(VectorUnitState.mflag): New field.
	(VU_REG_{CMSAR0,CMSAR1,FBRST}) Added missing control registers.

	* sky-vu.c (vu0_busy): New function.
	(vu0_q_busy): New function.
	(vu0_macro_issue): New function.
	(vu0_micro_interlock_released): New function.
	(vu0_busy_in_{micro,macro}_mode): Deleted stubs.
	(vu0_macro_hazard_check): Deleted stubs.
	(vu_attach): Adapted code to merged device & state struct.
	(read_vu_special_reg): Compute VBS0/VBS1 bits in STAT register.

[ChangeLog]
start-sanitize-sky
Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (*): Adapt code to merged VU device & state structs.
	(decode_coproc): Execute COP2 each macroinstruction without
 	pipelining, by stepping VU to completion state.  Adapted to
	read_vu_*_reg style of register access.

	* mips.igen ([SL]QC2): Removed these COP2 instructions.

	* r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.

	* sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.

end-sanitize-sky
1998-04-05 16:40:03 +00:00
Andrew Cagney
64ed8b6a8c aclocal.m4: Don't enable inlining when cross-compiling.
mips/*: Tune mips simulator - allow all memory transfer code to be inlined.
1998-04-05 07:16:54 +00:00
Andrew Cagney
69d5a56645 Re-do load/store operations so that they work for both 32 and 64 bit
ISAs.
Enable tx39 as igen again.
1998-04-02 19:35:39 +00:00
Andrew Cagney
725fc5d927 For mips get_mem_size call. Force the return of a 32 bit value
regardless of the target's word bitsize.
1998-04-02 03:27:24 +00:00
Ron Unrau
2151467d63 sky-vu.[ch]: prototype decls, cast floats to ints before register transfer
interp.c: integrate VU register read/writes
sim-main.h : track tm-txvu.h
1998-04-01 17:31:24 +00:00
James Lemke
1ff39ecb10 * sky-dma.c: Clarify text in warning msg.
* interp.c: Add global option "float-type".
	* sky-vu.h: Add SIM_DESC sd; to VectorUnitState for accessing
	global options.
1998-03-31 21:46:31 +00:00
Frank Ch. Eigler
6ed00b0607 * Continuing sky R5900 / COP2 work. Added extra sanitize tags to hide
128-bit MIPS part.

[ChangeLog]

Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* interp.c (decode_coproc): Continuing COP2 work.
  	(cop_[ls]q): Hide 128-bit COP2 more.

	* sim-main.h (COP_[LS]Q): Hide 128-bit COP2 more.

[ChangeLog.sky]

Mon Mar 30 18:44:15 1998  Frank Ch. Eigler  <fche@cygnus.com>

	* sky-libvpe.c: Code too wide - ran indent on SCEI code.

	* sky-vu.h (vu0_busy*, vu0_macro*): New entry points for COP2
 	interface.

	* sky-vu.c (vu0_busy*, vu0_macro*): Stub functions for above.
1998-03-30 23:56:52 +00:00
Frank Ch. Eigler
7dd4a46650 * Oops, added #ifdef TARGET_SKY around R5900 COP2 implementation skeleton. 1998-03-29 22:53:31 +00:00
Frank Ch. Eigler
15232df4a3 * Inserted skeleton of R5900 COP2 simulation. Merged old vu[01].[ch] code
into single PKE-style vu.[ch].


[ChangeLog]

Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>

start-sanitize-sky
	* Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.

	* interp.c (sim_{load,store}_register): Use new vu[01]_device
 	static to access VU registers.
	(decode_coproc): Added skeleton of sky COP2 (VU) instruction
 	decoding.  Work in progress.

	* mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 	overlapping/redundant bit pattern.
	(LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
	progress.

	* sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 	status register.

end-sanitize-sky

	* interp.c (cop_lq, cop_sq): New functions for future 128-bit
 	access to coprocessor registers.

	* sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.

[ChangeLog.sky]

	* sky-engine.c (engine_run): Adapted from vu[01] -> vu merge.

	* sky-hardware.c (register_devices): Ditto

	* sky-pke.c (pke_fifo_*): Made these functions private again, now
 	that the GPUIF code does not use them.

	* sky-pke.h (pke_fifo_*): Removed newly private declarations.

	* sky-vu.c (*): Major rework: merge of old sky-vu0.c and
 	sky-vu1.c.  Management of two VU devices parallels two PKEs.
	Work in progress.

	* sky-vu.h (*): Other half of merge.
	(vu_device): New struct, parallel to pke_device.
1998-03-27 22:00:56 +00:00