Add support for arc/nps400 cmem instructions, these load and store
instructions are hard-wired to access "0x57f00000 + 16-bit-offset".
Supporting this relocation required some additions to the arc relocation
handling in the bfd library, as well as the standard changes required to
add a new relocation type.
There's a test of the new instructions in the assembler, and a test of
the relocation in the linker.
bfd/ChangeLog:
* reloc.c: Add BFD_RELOC_ARC_NPS_CMEM16 entry.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf32-arc.c: Add 'opcode/arc.h' include.
(struct arc_relocation_data): Add symbol_name.
(arc_special_overflow_checks): New function.
(arc_do_relocation): Use arc_special_overflow_checks, reindent as
required, add an extra comment.
(elf_arc_relocate_section): Setup symbol_name in reloc_data.
gas/ChangeLog:
* testsuite/gas/arc/nps400-3.d: New file.
* testsuite/gas/arc/nps400-3.s: New file.
include/ChangeLog:
* elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
* opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
ld/ChangeLog:
* testsuite/ld-arc/arc.exp: New file.
* testsuite/ld-arc/nps-1.s: New file.
* testsuite/ld-arc/nps-1a.d: New file.
* testsuite/ld-arc/nps-1b.d: New file.
* testsuite/ld-arc/nps-1b.err: New file.
opcodes/ChangeLog:
* arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
instructions.
* arc-opc.c (insert_nps_cmem_uimm16): New function.
(extract_nps_cmem_uimm16): New function.
(arc_operands): Add NPS_XLDST_UIMM16 operand.
This commit introduces the nps400 machine type as a variant of arc.
There's a new flag in the assembler to select this machine type. All
other changes are just adding handling of the new machine type into the
relevant places.
The nps400 is an arc700 variant with some vendor specific instructions
added into the instruction set. This commit does not add any of the new
instructions, this is just laying the groundwork for future commits.
However, in preparation for these new instructions a new opcode define for
nps400 has been added to include/opcode/arc.h, this new opcode define is
used in the assembler and disassembler along with the existing define
for arc700 such that when assembling and disassembling for nps400 the
user will have access to all arc700 instructions and all the nps400
vendor extension instructions.
bfd/ChangeLog:
* archures.c (bfd_mach_arc_nps400): Define.
* bfd-in2.h: Regenerate.
* cpu-arc.c (arch_info_struct): New entry for nps400, renumber
some existing entries to make space.
* elf32-arc.c (arc_elf_object_p): Add nps400 case.
(arc_elf_final_write_processing): Likewise.
binutils/ChangeLog:
* readelf.c (decode_ARC_machine_flags): Handle nps400.
gas/ChangeLog:
* config/tc-arc.c (cpu_types): Add nps400 entry.
(check_zol): Handle nps400.
include/ChangeLog:
* elf/arc.h (E_ARC_MACH_NPS400): Define.
* opcode/arc.h (ARC_OPCODE_NPS400): Define.
opcodes/ChangeLog:
* arc-dis.c (print_insn_arc): Handle nps400.
include/elf
* arm.h: Add arm SHF_ARM_NOREAD section flag.
bfd * bfd-in2.h: Regenerate.
* section.c: Add SEC_ELF_NOREAD.
* elf32-arm.c (elf32_arm_post_process_headers): Only set
PF_X attribute if a segment only contains section with
SHF_ARM_NOREAD flag.
(elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
(elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
to bfd flag.
(elf32_arm_lookup_section_flags): New function to allow
INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
(elf32_arm_special_sections): Add special sections array
to catch section prefix by '.text.noread' pattern.
ld/testsuite
* ld-arm/arm-elf.exp: New tests.
* ld-arm/thumb1-input-section-flag-match.d: New
* ld-arm/thumb1-input-section-flag-match.s: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
* ld-arm/thumb1-noread-present-one-section.d: New
* ld-arm/thumb1-noread-present-one-section.s: New
* ld-arm/thumb1-noread-present-two-section.d: New
* ld-arm/thumb1-noread-present-two-section.s: New
binutils
* readelf.c (get_elf_section_flags): Add support for ARM specific
section flags.
To support thumb1 execute-only code we need to support four new
relocations (R_ARM_THM_ALU_ABS_G0_NC, R_ARM_THM_ALU_ABS_G1_NC,
R_ARM_THM_ALU_ABS_G2_NC and R_ARM_THM_ALU_ABS_G3_NC).
These relocations allow the static linker to finalize construction
of symbol address.
Typical sequence of code to get address of the symbol foo is then
the following :
movs r3, #:upper8_15:#foo
lsls r3, #8
adds r3, #:upper0_7:#foo
lsls r3, #8
adds r3, #:lower8_15:#foo
lsls r3, #8
adds r3, #:lower0_7:#foo
This will give following sequence of text and relocations after
assembly :
4: 2300 movs r3, #0
4: R_ARM_THM_ALU_ABS_G3_NC foo
6: 021b lsls r3, r3, #8
8: 3300 adds r3, #0
8: R_ARM_THM_ALU_ABS_G2_NC foo
a: 021b lsls r3, r3, #8
c: 3300 adds r3, #0
c: R_ARM_THM_ALU_ABS_G1_NC foo
e: 021b lsls r3, r3, #8
10: 3300 adds r3, #0
10: R_ARM_THM_ALU_ABS_G0_NC foo
Add a new relocation that marks large-model entry code, for edit back
to medium-model.
include/elf/
* ppc64.h (R_PPC64_ENTRY): Define.
bfd/
* reloc.c (BFD_RELOC_PPC64_ENTRY): New.
* elf64-ppc.c (reloc_howto_type ppc64_elf_howto_raw): Add
entry for R_PPC64_ENTRY.
(LD_R2_0R12, ADD_R2_R2_R12, LIS_R2, ADDIS_R2_R12): Define.
(ppc64_elf_reloc_type_lookup): Handle R_PPC64_ENTRY.
(ppc64_elf_relocate_section): Edit code at R_PPC64_ENTTY. Use
new insn defines.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
This patch fixes all occurences of left-shifting negative constants in C code
which is undefined by the C standard.
bfd/ChangeLog:
* elf64-ppc.c (ppc64_elf_size_stubs, ppc64_elf_build_stubs): Fix left
shift of negative value.
* libbfd.c (safe_read_leb128): Likewise.
* dwarf2.c (place_sections): Likewise.
* bfd-in.h (align_power): Likewise.
* bfd-in2.h (align_power): Likewise.
If given input sections with differing flags, we'd like to place the
section according to the final output section flags.
bfd/
PR ld/19162
* elflink.c (_bfd_elf_gc_mark_reloc): Move code iterating over
linker input bfds..
* section.c (bfd_get_next_section_by_name): ..to here. Add ibfd param.
(bfd_get_linker_section): Adjust bfd_get_next_section_by_name call.
* tekhex.c (first_phase): Likewise.
* elflink.c (bfd_elf_gc_sections): Likewise.
* bfd-in2.h: Regenerate.
ld/
PR ld/19162
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Check flags
before calling _bfd_elf_match_sections_by_type. Merge flags for
any other input sections that might match a new output section to
decide placement.
bfd * bfd-in2.h: Regenerate.
* bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how
STM32L4XX instruction scanning should be done.
(bfd_elf32_arm_set_stm32l4xx_fix)
(bfd_elf32_arm_stm32l4xx_erratum_scan)
(bfd_elf32_arm_stm32l4xx_fix_veneer_locations): Add prototypes.
(bfd_elf32_arm_set_target_relocs): Add stm32l4xx fix type argument
to prototype.
* elf32-arm.c (STM32L4XX_ERRATUM_VENEER_SECTION_NAME)
(STM32L4XX_ERRATUM_VENEER_ENTRY_NAME): Define macros.
(elf32_stm32l4xx_erratum_type): New enum.
(elf32_stm32l4xx_erratum_list): New struct. List of veneers or
jumps to veneers.
(_arm_elf_section_data): Add stm32l4xx_erratumcount,
stm32l4xx_erratumlist.
(elf32_arm_link_hash_table): Add stm32l4xx_erratum_glue_size,
stm32l4xx_fix and num_stm32l4xx_fixes fields.
(ctz): New function.
(popcount): New function.
(elf32_arm_link_hash_table_create): Initialize stm32l4xx_fix.
(put_thumb2_insn): New function.
(STM32L4XX_ERRATUM_LDM_VENEER_SIZE): Define. Size of a veneer for
LDM instructions.
(STM32L4XX_ERRATUM_VLDM_VENEER_SIZE): Define. Size of a veneer for
VLDM instructions.
(bfd_elf32_arm_allocate_interworking_sections): Initialise erratum
glue section.
(record_stm32l4xx_erratum_veneer) : New function. Create a single
veneer, and its associated symbols.
(bfd_elf32_arm_add_glue_sections_to_bfd): Add STM32L4XX erratum glue.
(bfd_elf32_arm_set_stm32l4xx_fix): New function. Set the type of
erratum workaround required.
(bfd_elf32_arm_stm32l4xx_fix_veneer_locations): New function. Find
out where veneers and branches to veneers have been placed in
virtual memory after layout.
(is_thumb2_ldmia): New function.
(is_thumb2_ldmdb): Likewise.
(is_thumb2_vldm ): Likewise.
(stm32l4xx_need_create_replacing_stub): New function. Decide if a
veneer must be emitted.
(bfd_elf32_arm_stm32l4xx_erratum_scan): Scan the sections of an
input BFD for potential erratum-triggering insns. Record results.
(bfd_elf32_arm_set_target_relocs): Set stm32l4xx_fix field in
global hash table.
(elf32_arm_size_dynamic_sections): Collect glue information.
(create_instruction_branch_absolute): New function.
(create_instruction_ldmia): Likewise.
(create_instruction_ldmdb): Likewise.
(create_instruction_mov): Likewise.
(create_instruction_sub): Likewise.
(create_instruction_vldmia): Likewise.
(create_instruction_vldmdb): Likewise.
(create_instruction_udf_w): Likewise.
(create_instruction_udf): Likewise.
(push_thumb2_insn32): Likewise.
(push_thumb2_insn16): Likewise.
(stm32l4xx_fill_stub_udf): Likewise.
(stm32l4xx_create_replacing_stub_ldmia): New function. Expands the
replacing stub for ldmia instructions.
(stm32l4xx_create_replacing_stub_ldmdb): Likewise for ldmdb.
(stm32l4xx_create_replacing_stub_vldm): Likewise for vldm.
(stm32l4xx_create_replacing_stub): New function. Dispatches the
stub emission to the appropriate functions.
(elf32_arm_write_section): Output veneers, and branches to veneers.
ld * ld.texinfo: Description of the STM32L4xx erratum workaround.
* emultempl/armelf.em (stm32l4xx_fix): New.
(arm_elf_before_allocation): Choose the type of fix, scan for
erratum.
(gld${EMULATION_NAME}_finish): Fix veneer locations.
(arm_elf_create_output_section_statements): Propagate
stm32l4xx_fix value.
(PARSE_AND_LIST_PROLOGUE): Define OPTION_STM32L4XX_FIX.
(PARSE_AND_LIST_LONGOPTS): Add entry for handling
--fix-stm32l4xx-629360.
(PARSE_AND_LIST_OPTION): Add entry for helping on
--fix-stm32l4xx-629360.
(PARSE_AND_LIST_ARGS_CASES): Treat OPTION_STM32L4XX_FIX.
tests * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX
tests.
* ld-arm/stm32l4xx-cannot-fix-far-ldm.d: New.
* ld-arm/stm32l4xx-cannot-fix-far-ldm.s: Likewise.
* ld-arm/stm32l4xx-cannot-fix-it-block.d: Likewise.
* ld-arm/stm32l4xx-cannot-fix-it-block.s: Likewise.
* ld-arm/stm32l4xx-fix-all.d: Likewise.
* ld-arm/stm32l4xx-fix-all.s: Likewise.
* ld-arm/stm32l4xx-fix-it-block.d: Likewise.
* ld-arm/stm32l4xx-fix-it-block.s: Likewise.
* ld-arm/stm32l4xx-fix-ldm.d: Likewise.
* ld-arm/stm32l4xx-fix-ldm.s: Likewise.
* ld-arm/stm32l4xx-fix-vldm.d: Likewise.
* ld-arm/stm32l4xx-fix-vldm.s: Likewise.
Symbol symbol defined by an assignment in a linker script has type
bfd_link_hash_new. elf_i386_convert_load and elf_x86_64_convert_load
should check bfd_link_hash_new to see if a symbol is defined by a linker
script.
bfd/
PR ld/19175
* elf32-i386.c (elf_i386_convert_load): Check bfd_link_hash_new
instead of calling bfd_link_get_defined_symbol.
* elf64-x86-64.c (elf_x86_64_convert_load): Likewise. Skip
relocation overflow for bfd_link_hash_new.
* linker.c (bfd_link_get_defined_symbol): Removed.
* bfd-in2.h: Regenerated.
ld/testsuite/
PR ld/19175
* ld-i386/i386.exp: Run pr19175.
* ld-x86-64/x86-64.exp: Likewise.
* ld-i386/pr19175.d: New file.
* ld-i386/pr19175.s: Likewise.
* ld-i386/pr19175.t: Likewise.
* ld-x86-64/pr19175.d: Likewise.
* ld-x86-64/pr19175.s: Likewise.
* ld-x86-64/pr19175.t: Likewise.
Since __start_XXX and __stop_XXX symbols aren't defined when address
load is being converted, we need to check if there is an XXX output
section to get their section and value. This patch adds a new function,
bfd_link_get_defined_symbol, to search for the XXX output section to
check if __start_XXX and __stop_XXX symbols are defined.
bfd/
PR ld/19171
* elf32-i386.c (elf_i386_convert_load): Call
bfd_link_get_defined_symbol to check if a symbol is defined.
* elf64-x86-64.c (elf_x86_64_convert_load): Call
bfd_link_get_defined_symbol to get defined symbol section and
value.
* linker.c (bfd_link_get_defined_symbol): New function.
* bfd-in2.h: Regenerated.
ld/testsuite/
PR ld/19171
* ld-i386/lea1.s: Add tests for address load of __start_XXX
and __stop_XXX.
* ld-i386/mov1.s: Likewise.
* ld-x86-64/lea1.s: Likewise.
* ld-x86-64/mov1.s: Likewise.
* ld-i386/lea1a.d: Updated.
* ld-i386/lea1b.d: Likewise.
* ld-i386/lea1c.d: Likewise.
* ld-i386/mov1a.d: Likewise.
* ld-i386/mov1b.d: Likewise.
* ld-x86-64/lea1a.d: Likewise.
* ld-x86-64/lea1b.d: Likewise.
* ld-x86-64/lea1c.d: Likewise.
* ld-x86-64/lea1d.d: Likewise.
* ld-x86-64/lea1e.d: Likewise.
* ld-x86-64/lea1f.d: Likewise.
* ld-x86-64/mov1a.d: Likewise.
* ld-x86-64/mov1b.d: Likewise.
* ld-x86-64/mov1c.d: Likewise.
* ld-x86-64/mov1d.d: Likewise.
This patch adds support for the R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX relocations proposed in
https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0
to gas and ld. It updates gas to generate R_X86_64_GOTPCRELX,
R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory
operand, foo@GOTPCREL(%rip). With the locally defined symbol, foo, we
convert
mov foo@GOTPCREL(%rip), %reg
to
lea foo(%rip), %reg
and convert
call/jmp *foo@GOTPCREL(%rip)
to
nop call foo/jmp foo nop
When PIC is false, convert
test %reg, foo@GOTPCREL(%rip)
to
test $foo, %reg
and convert
binop foo@GOTPCREL(%rip), %reg
to
binop $foo, %reg
where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.
bfd/
* elf64-x86-64.c: Include opcode/i386.h.
(x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX.
(R_X86_64_standard): Replace R_X86_64_PLT32_BND with
R_X86_64_REX_GOTPCRELX.
(x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and
BFD_RELOC_X86_64_REX_GOTPCRELX.
(need_convert_mov_to_lea): Renamed to ...
(need_convert_load): This.
(elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX. Replace need_convert_mov_to_lea with
need_convert_load.
(elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX.
(elf_x86_64_size_dynamic_sections): Likewise.
(elf_x86_64_relocate_section): Likewise.
(elf_x86_64_convert_mov_to_lea): Renamed to ...
(elf_x86_64_convert_load): This. Replace need_convert_mov_to_lea
with need_convert_load. Support R_X86_64_GOTPCRELX and
R_X86_64_REX_GOTPCRELX transformations.
* reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New.
(BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX.
(tc_gen_reloc): Likewise.
(i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or
BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set.
* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return
true for BFD_RELOC_X86_64_GOTPCRELX and
BFD_RELOC_X86_64_REX_GOTPCRELX.
gas/testsuite/
* gas/i386/i386.exp: Run x86-64-gotpcrel.
* gas/i386/x86-64-gotpcrel.d: New file.
* gas/i386/x86-64-gotpcrel.s: Likewise.
* gas/i386/ilp32/x86-64-gotpcrel.d: Likewise.
* gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with
R_X86_64_REX_GOTPCRELX.
* gas/i386/ilp32/x86-64-localpic.d: Likewise.
include/elf/
* x86-64.h (R_X86_64_GOTPCRELX): New.
(R_X86_64_REX_GOTPCRELX): Likewise.
ld/testsuite/
* ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL
with R_X86_64_REX_GOTPCRELX.
* ld-x86-64/plt-main1.rd: Likewise.
* ld-x86-64/plt-main3.rd: Likewise.
* ld-x86-64/plt-main4.rd: Likewise.
* ld-x86-64/gotpcrel1.dd: New file.
* ld-x86-64/gotpcrel1.out: Likewise.
* ld-x86-64/gotpcrel1a.S: Likewise.
* ld-x86-64/gotpcrel1b.c: Likewise.
* ld-x86-64/gotpcrel1c.c: Likewise.
* ld-x86-64/gotpcrel1d.S: Likewise.
* ld-x86-64/load1.s: Likewise.
* ld-x86-64/load1a.d: Likewise.
* ld-x86-64/load1b.d: Likewise.
* ld-x86-64/load1c.d: Likewise.
* ld-x86-64/load1d.d: Likewise.
* ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d
tests. Run gotpcrel1 test.
This patch adds support for the R_386_GOT32X relocation proposed in
https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I
to gas and ld. It updates gas to generate R_386_GOT32X relocation for
memory operand, foo@GOT[(%reg)]. We must encode "mov foo@GOT, %eax"
with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be
transformed to "lea foo, %eax". With the locally defined symbol, foo,
we convert
mov foo@GOT[(%reg1)], %reg2
to
lea foo[@GOTOFF(%reg1)], %reg2
and convert
call/jmp *foo@GOT[(%reg)]
to
nop call foo/jmp foo nop
When PIC is false, convert
test %reg1, foo@GOT[(%reg2)]
to
test $foo, %reg1
and convert
binop foo@GOT[(%reg1)], %reg2
to
binop $foo, %reg2
where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions.
bfd/
* elf32-i386.c: Include opcode/i386.h.
(elf_howto_table): Add R_386_GOT32X.
(R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X.
(elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X.
(need_convert_mov_to_lea): Renamed to ...
(need_convert_load): This.
(elf_i386_check_relocs): Handle R_386_GOT32X. Replace
need_convert_mov_to_lea with need_convert_load.
(elf_i386_gc_sweep_hook): Handle R_386_GOT32X.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Likewise.
(elf_i386_convert_mov_to_lea): Renamed to ...
(elf_i386_convert_load): This. Replace need_convert_mov_to_lea
with need_convert_load. Support R_386_GOT32X transformations.
* reloc.c (BFD_RELOC_386_GOT32X): New.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_GOT32X.
(tc_gen_reloc): Likewise.
(match_template): Force 0x8b encoding for "mov foo@GOT, %eax".
(output_disp): Check for "call/jmp *mem", "mov mem, %reg",
"test %reg, mem" and "binop mem, %reg" where binop is one of
adc, add, and, cmp, or, sbb, sub, xor instructions. Set
fx_tcbit if the REX prefix is generated. Set fx_tcbit2 if
BFD_RELOC_386_GOT32X should be generated.
(i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2
is set.
gas/testsuite/
* gas/i386/got.d: New file.
* gas/i386/got.s: Likewise.
* gas/i386/i386.exp: Run got.
* gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X.
* gas/i386/mixed-mode-reloc32.d: Likewise.
* gas/i386/reloc32.d: Likewise.
include/elf/
* i386.h (R_386_GOT32X): New relocation.
ld/testsuite/
* ld-i386/branch1.d: New file.
* ld-i386/branch1.s: Likewise.
* ld-i386/call1.d: Likewise.
* ld-i386/call1.s: Likewise.
* ld-i386/call2.d: Likewise.
* ld-i386/call2.s: Likewise.
* ld-i386/got1.dd: Likewise.
* ld-i386/got1.out: Likewise.
* ld-i386/got1a.S: Likewise.
* ld-i386/got1b.c: Likewise.
* ld-i386/got1c.c: Likewise.
* ld-i386/got1d.S: Likewise.
* ld-i386/jmp1.d: Likewise.
* ld-i386/jmp1.s: Likewise.
* ld-i386/jmp2.d: Likewise.
* ld-i386/jmp2.s: Likewise.
* ld-i386/load1.d: Likewise.
* ld-i386/load1.s: Likewise.
* ld-i386/load2.d: Likewise.
* ld-i386/load2.s: Likewise.
* ld-i386/load3.d: Likewise.
* ld-i386/load3.s: Likewise.
* ld-i386/load4.s: Likewise.
* ld-i386/load4a.d: Likewise.
* ld-i386/load4b.d: Likewise.
* ld-i386/load5.s: Likewise.
* ld-i386/load5a.d: Likewise.
* ld-i386/load5b.d: Likewise.
* ld-i386/load6.d: Likewise.
* ld-i386/load6.s: Likewise.
* ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2,
load1, load2, load3, load4a, load4b, load5a, load5b and load6
tests. Run got1 test.
We can't use the output section size to copy input section since
--interleave will shrink the output section. Instead, we change
bfd_convert_section_contents to return the updated input section
size. When we do that, we don't need to adjust the output section
size to skip gap fills.
bfd/
PR binutils/19020
* bfd.c (bfd_convert_section_contents): Add ptr_size parameter.
* bfd-in2.h: Regenerated.
binutils/
PR binutils/19020
* objcopy.c (copy_object): Don't adjust the output section size
when copying from input sections.
(copy_section): Use input section size for the copy. Get the
updated section size from bfd_convert_section_contents.
binutils/testsuite/
PR binutils/19020
* binutils-all/objcopy.exp: Run pr19020a and pr19020b.
* lib/utils-lib.exp (run_dump_test): Support binary input.
* binutils-all/pr19020.in: New file.
* binutils-all/pr19020a.d: Likewise.
* binutils-all/pr19020b.d: Likewise.
bfd/ChangeLog:
* targets.c (enum bfd_flavour): Add comment.
(bfd_flavour_name): New function.
* bfd-in2.h: Regenerate.
gdb/ChangeLog:
* findvar.c (default_read_var_value) <LOC_UNRESOLVED>: Include the
kind of minimal symbol in the error message.
* objfiles.c (objfile_flavour_name): New function.
* objfiles.h (objfile_flavour_name): Declare.
gdb/testsuite/ChangeLog:
* gdb.dwarf2/dw2-bad-unresolved.c: New file.
* gdb.dwarf2/dw2-bad-unresolved.exp: New file.
Two organizational changes to the array of additional info kept for
sections.
1) Move group info into a per-group allocated struct, in preparation
for future changes that need per-group accounting.
2) Expand the array to include output sections, which simplifies
sizing and removes the need for a separate output section array.
* section.c (section_id): Make file scope.
(bfd_get_next_section_id): New function.
* elf64-ppc.c (struct map_stub): Remove toc_off field. Move decl.
(struct ppc_stub_hash_entry): Delete stub_sec and id_sec. Add
group. Update all uses.
(struct ppc_link_hash_table): Delete top_id, top_index, and
input_list. Add sec_info_arr_size. Rename stub_group to
sec_info, and make group info indirect. Update stub_group refs
throughout file.
(ppc_add_stub): Don't look for stub_sec on link_sec stub_group
entry.
(ppc_build_one_stub): Delete FIXME.
(ppc64_elf_setup_section_lists): Size htab->sec_info for all
sections, not just input sections. Don't create htab->input_list.
(ppc64_elf_next_input_section): Update to use sec_info union as
list pointer.
(PREV_SEC): Delete.
(group_sections): Pass "info" param rather than "htab". Iterate
over output sections rather than input_list. Use sec_info union
as list pointers. Alloc atruct map_stub, and return fail status.
* bfd-in2.h: Regenerate.
These int vars are really unsigned, so make them so.
* section.c (struct bfd_section): Make "id" and "index" unsigned.
* coff-rs6000.c (_bfd_xcoff_sizeof_headers): Adjust local var to suit.
* elf.c (elf_map_symbols): Likewise.
* elf64-ppc.c (sym_exists_at): Make "id" param unsigned.
(struct ppc_link_hash_table): Make "top_id" and "top_index" unsigned.
(ppc64_elf_setup_section_lists): Ditto for local vars.
* elf32-arm.c: Similarly to elf64-ppc.c.
* elf32-avr.c: Likewise.
* elf32-hppa.c: Likewise.
* elf32-m68hc1x.c: Likewise.
* elf32-metag.c: Likewise.
* elf32-nios2.c: Likewise.
* elfnn-aarch64.c: Likewise.
* simple.c (struct saved_offsets): Make "section_count" unsigned.
* bfd-in2.h: Regenerate.
The output SHF_COMPRESSED section size is different from input if
ELF classes of input and output aren't the same. We must adjust
the section sizes as well as the compression headers in
SHF_COMPRESSED sections when converting objects between different
ELF classes.
bfd/
PR binutils/18656
* bfd.c (bfd_convert_section_size): New function.
(bfd_convert_section_contents): Likewise.
* bfd-in2.h: Regenerated.
binutils/
2015-07-10 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/18656
* objcopy.c (setup_section): Call bfd_convert_section_size
to get the output section size.
(copy_section): Get the section size from the output section
and call bfd_get_full_section_contents to convert section
contents for output.
binutils/testsuite/
PR binutils/18656
* binutils-all/compress.exp (convert_test): New proc.
Run conversion tests between x86-64 and x32.
This promotes BFD's struct elf_build_id to the generic struct bfd_build_id,
populated when an ELF or PE BFD is read.
gdb is updated to use that, and to use the build-id to find symbols for PE files
also.
There is currently no generic way to extract the build-id from an object file,
perhaps an option to objdump to do this might make sense?
On x86_64-pc-cygwin, gdb's sepdebug.exp changes:
-# of unsupported tests 1
+# of expected passes 90
I don't seem to get consistent testsuite runs on i686-linux-gnu, but there
don't appear to be any regressions.
bfd/ChangeLog:
2015-06-10 Jon Turney <jon.turney@dronecode.org.uk>
* elf-bfd.h : Remove struct elf_build_id.
* bfd.c : Add struct bfd_build_id.
* bfd-in2.h: Regenerate.
* elf.c (elfobj_grok_gnu_build_id): Update to use bfd_build_id.
* libpei.h: Add protoype and macros for
bfd_XXi_slurp_codeview_record.
* peXXigen.c (_bfd_XXi_slurp_codeview_record): Make public
* peicode.h (pe_bfd_read_buildid): Add.
(pe_bfd_object_p): Use pe_bfd_read_buildid().
gdb/ChangeLog:
2015-06-10 Jon Turney <jon.turney@dronecode.org.uk>
* build-id.c: Don't include elf-bfd.h.
(build_id_bfd_get): Use bfd_build_id.
(build_id_verify): Ditto.
* build-id.h: Ditto.
(find_separate_debug_file_by_buildid): Ditto.
* python/py-objfile.c: Don't include elf-bfd.h.
(objfpy_get_build_id) Use bfd_build_id.
(objfpy_build_id_matches, objfpy_lookup_objfile_by_build_id): Ditto.
* coffread.c: Include build-id.h.
(coff_symfile_read): Try find_separate_debug_file_by_buildid.
gdb/doc/ChangeLog:
2015-06-10 Jon Turney <jon.turney@dronecode.org.uk>
* gdb.texinfo (Separate Debug Files): Document that PE is also
supported.
gdb/testsuite/ChangeLog:
2015-06-10 Jon Turney <jon.turney@dronecode.org.uk>
* gdb.base/sepdebug.exp: Add EXEEXT where needed.
* lib/gdb.exp (get_build_id): Teach how to extract build-id from a
PE file.
* lib/future.exp (gdb_find_objdump): Add gdb_find_objdump.
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
In a SHF_COMPRESSED compressed section, the raw compressed data should
begin immediately after the compression header. This patch removes the
extra zlib header from the SHF_COMPRESSED section.
bfd/
* bfd.c (bfd_update_compression_header): Also write the zlib
header if the SHF_COMPRESSED bit cleared..
(bfd_check_compression_header): Return the uncompressed size.
* compress.c (decompress_contents): Don't skip the zlib header.
(bfd_compress_section_contents): Properly handle ELFCOMPRESS_ZLIB,
which doesn't have the zlib header.
(bfd_init_section_decompress_status): Likewise.
(bfd_get_full_section_contents): Updated.
(bfd_is_section_compressed): Likewise.
(bfd_is_section_compressed_with_header): Return the uncompressed
size.
* elf.c (_bfd_elf_make_section_from_shdr): Updated.
* bfd-in2.h: Regenerated.
binutils/
* readelf.c (uncompress_section_contents): Add a parameter for
uncompressed size. Don't check the zlib header.
(load_specific_debug_section): Updated.
binutils/testsuite/
* binutils-all/compress.exp: Replace "$OBJDUMP -s -j .debug_info"
with "$OBJDUMP -W".
* binutils-all/libdw2-compressedgabi.out: Updated.
gas/
2015-05-14 H.J. Lu <hongjiu.lu@intel.com>
* write.c (compress_debug): Don't write the zlib header, which
is handled by bfd_update_compression_header.
Andrew Burgess
H.J. Lu
Alan Modra
Mickael Guene
Tristan Gingold
Peter Bergner
Dominik Vogt
Cupertino Miranda
Laurent Alfonsi
Nick Clifton
Renlin Li
Doug Evans
Jiong Wang
Sandra Loosemore
Jon Turney
Catherine Moore