Commit Graph

171636 Commits

Author SHA1 Message Date
Martin Jambor 231f75463c [PR 91831] Copy PARM_DECLs of artificial thunks
Hi,

I am quite surprised I did not catch this before but the new
ipa-param-manipulation does not copy PARM_DECLs when creating
artificial thinks (I think it originally did but then I somehow
removed during one cleanups).  Fixed by adding the capability at the
natural place.  It is triggered whenever context of the PARM_DECL that
is just taken from the original function does not match the target
fndecl rather than by some constructor parameter because in such
situation it is always the correct thing to do.

Bootstrapped and tested on x86_64-linux.  OK for trunk?

Thanks,

Martin

2019-09-24  Martin Jambor  <mjambor@suse.cz>

	PR ipa/91831
	* ipa-param-manipulation.c (carry_over_param): Make a method of
	ipa_param_body_adjustments, remove now unnecessary argument.  Also copy
	in case of a context mismatch.
	(ipa_param_body_adjustments::common_initialization): Adjust call to
	carry_over_param.
	* ipa-param-manipulation.h (class ipa_param_body_adjustments): Add
	private method carry_over_param.

	testsuite/
	* g++.dg/ipa/pr91831.C: New test.

From-SVN: r276094
2019-09-24 13:20:57 +02:00
Martin Jambor 5a4d0da4f5 [PR 91832] Do not ICE on negative offsets in ipa-sra
Hi,

IPA-SRA asserts that an offset obtained from get_ref_base_and_extent
is non-negative (after it verifies it is based on a parameter).  That
assumption is invalid as the testcase shows.  One could probably also write a
testcase with defined behavior, but unless I see a reasonable one
where the transformation is really desirable, I'd like to just punt on
those cases.

Bootstrapped and tested on x86_64-linux.  OK for trunk?

Thanks,

Martin

2019-09-24  Martin Jambor  <mjambor@suse.cz>

	PR ipa/91832
	* ipa-sra.c (scan_expr_access): Check that offset is non-negative.

	testsuite/
	* gcc.dg/ipa/pr91832.c: New test.

From-SVN: r276093
2019-09-24 13:16:57 +02:00
Richard Biener 3f9e08f57e tree-ssa-sccvn.c (vn_reference_lookup_3): Valueize MEM_REF base.
2019-09-24  Richard Biener  <rguenther@suse.de>

	* tree-ssa-sccvn.c (vn_reference_lookup_3): Valueize MEM_REF
	base.

	* gcc.dg/torture/20190924-1.c: New testcase.

From-SVN: r276092
2019-09-24 10:10:49 +00:00
Jonathan Wakely 47d17f7058 PR libstdc++/91871 fix Clang warnings in testsuite
PR libstdc++/91871
	* testsuite/util/testsuite_hooks.h
	(conversion::iterator_to_const_iterator()): Do not return an invalid
	iterator. Test direct-initialization and direct-list-initialization
	as well as implicit conversion.

From-SVN: r276091
2019-09-24 11:09:18 +01:00
GCC Administrator 18b86eda6f Daily bump.
From-SVN: r276089
2019-09-24 00:16:40 +00:00
Maciej W. Rozycki 0ca2b1f3d8 GNAT/testsuite: Pass the `ada' option to target compilation
Pass the `ada' option to DejaGNU's `target_compile' procedure, which by
default calls `default_target_compile', so that it arranges for an Ada
compilation rather the default of C.  We set the compiler to `gnatmake'
manually here, so that part of the logic in `default_target_compile' is
not used, but it affects other settings, such as the use of `adaflags'.

	gcc/testsuite/
	* lib/gnat.exp (gnat_target_compile): Pass the `ada' option to
	`target_compile'.

From-SVN: r276085
2019-09-23 23:19:29 +00:00
Carl Love a8cea25c73 RS6000, add xxswapd support
gcc/ChangeLog:

2019-09-23  Carl Love  <cel@us.ibm.com>

	* config/rs6000/vsx.md (xxswapd_v4si, xxswapd_v8hi, xxswapd_v16qi):
	New define_insn.
	(vsx_xxpermdi4_le_<mode> for VSX_W, vsx_xxpermdi8_le_V8HI,
	vsx_xxpermdi16_le_V16QI): Removed define_insn.

From-SVN: r276065
2019-09-23 20:08:13 +00:00
Paolo Carlini 0788210f80 pt.c (check_explicit_specialization): Use cp_expr_loc_or_input_loc.
/cp
2019-09-23  Paolo Carlini  <paolo.carlini@oracle.com>

	* pt.c (check_explicit_specialization): Use cp_expr_loc_or_input_loc.
	(process_partial_specialization): Likewise.
	(convert_nontype_argument_function): Likewise.
	(invalid_tparm_referent_p): Likewise.
	(convert_template_argument): Likewise.
	(check_valid_ptrmem_cst_expr): Tidy.

/testsuite
2019-09-23  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.dg/cpp0x/pr68724.C: Check location(s) too.
	* g++.dg/cpp0x/variadic38.C: Likewise.
	* g++.dg/cpp1z/nontype2.C: Likewise.
	* g++.dg/parse/explicit1.C: Likewise.
	* g++.dg/template/crash11.C: Likewise.
	* g++.dg/template/non-dependent8.C: Likewise.
	* g++.dg/template/nontype-array1.C: Likewise.
	* g++.dg/template/nontype3.C: Likewise.
	* g++.dg/template/nontype8.C: Likewise.
	* g++.dg/template/partial5.C: Likewise.
	* g++.dg/template/spec33.C: Likewise.
	* g++.old-deja/g++.pt/memtemp64.C: Likewise.
	* g++.old-deja/g++.pt/spec20.C: Likewise.
	* g++.old-deja/g++.pt/spec21.C: Likewise.
	* g++.old-deja/g++.robertl/eb103.C: Likewise.

From-SVN: r276064
2019-09-23 19:29:55 +00:00
Sandra Loosemore 7926a220d8 2019-09-23 Sandra Loosemore <sandra@codesourcery.com>
gcc/testsuite/
	* lib/target-supports.exp
	(check_effective_target_arm_vfp_ok_nocache): New.
	(check_effective_target_arm_vfp_ok): Rewrite.
	(add_options_for_arm_vfp): New.
	(add_options_for_sqrt_insn): Add options for arm.
	* gcc.target/arm/attr-neon-builtin-fail2.c: Use dg-add-options.
	* gcc.target/arm/short-vfp-1.c: Likewise.

From-SVN: r276063
2019-09-23 15:28:10 -04:00
Jason Merrill 33ba6ac391 PR c++/91809 - bit-field and ellipsis.
decay_conversion converts a bit-field access to its declared type, which
isn't what we want here; it even has a comment that the caller is expected
to have already used default_conversion to perform integral promotion.  This
function handles arithmetic promotion differently, but we still don't want
to call decay_conversion before that happens.

	* call.c (convert_arg_to_ellipsis): Don't call decay_conversion for
	arithmetic arguments.

From-SVN: r276059
2019-09-23 13:48:00 -04:00
Marek Polacek 1a09197cb1 PR c++/91844 - Implement CWG 2352, Similar types and reference binding.
* call.c (reference_related_p): Use similar_type_p instead of
	same_type_p.
	(reference_compatible_p): Update implementation to match CWG 2352.
	* cp-tree.h (similar_type_p): Declare.
	* typeck.c (similar_type_p): New.

	* g++.dg/cpp0x/pr33930.C: Add dg-error.
	* g++.dg/cpp0x/ref-bind1.C: New test.
	* g++.dg/cpp0x/ref-bind2.C: New test.
	* g++.dg/cpp0x/ref-bind3.C: New test.
	* g++.old-deja/g++.pt/spec35.C: Remove dg-error.

From-SVN: r276058
2019-09-23 17:37:54 +00:00
Kyrylo Tkachov ba2b30dc9f [arm] Add missing Makefile dependency on arm_acle_builtins.def
arm-builtins.o is missing a Makefile dependency on arm_acle_builtins.def
which can cause inconsistent rebuilds
when adding builtins in there.

This patch adds the right Makefile-foo to fix that.

	* config/arm/t-arm (arm-builtins.o): Add dependency on
	arm_acle_builtins.def.

From-SVN: r276057
2019-09-23 16:28:09 +00:00
Jonathan Wakely 1e8822d360 PR libstdc++/91788 improve codegen for std::variant<T...>::index()
If __index_type is a smaller type than size_t, then the result of
size_t(__index_type(-1)) is not equal to size_t(-1), but to an incorrect
value such as size_t(255) or size_t(65535). The old implementation of
variant<T...>::index() uses (size_t(__index_type(_M_index + 1)) - 1)
which is always correct, but generates suboptimal code for many common
cases.

When the __index_type is size_t or valueless variants are not possible
we can just return the value directly.

When the number of alternatives is sufficiently small the result of
converting the _M_index value to the corresponding signed type will be
either non-negative or -1. In those cases converting to the signed type
and then to size_t will either produce the correct positive value or
will sign extend -1 to (size_t)-1 as desired.

For the remaining case we keep the existing arithmetic operations to
ensure the correct result.

	PR libstdc++/91788 (partial)
	* include/std/variant (variant::index()): Improve codegen for cases
	where conversion to size_t already works correctly.

From-SVN: r276056
2019-09-23 16:54:16 +01:00
Richard Sandiford fa87544ca1 Fix non-canonical CONST_INTs in altivec_copysign_v4sf3 (PR91823)
The pattern was generating zero-extended rather than sign-extended
CONST_INTs.

2019-09-23  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR target/91823
	* config/rs6000/altivec.md (altivec_copysign_v4sf3): Generate
	canonical CONST_INTs.  Use gen_rtvec.

From-SVN: r276055
2019-09-23 11:56:47 +00:00
Richard Biener d469a71e5a tree-vect-loop.c (get_initial_def_for_reduction): Simplify, avoid adjusting by + 0 or * 1.
2019-09-23  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.c (get_initial_def_for_reduction): Simplify,
	avoid adjusting by + 0 or * 1.
	(vect_create_epilog_for_reduction): Get reduction code only
	when necessary.  Deal with adjustment_def only when necessary.

From-SVN: r276054
2019-09-23 10:21:45 +00:00
Rainer Orth 4d411f1ff7 Skip gcc.dg/ucnid-5-utf8.c unless ucn is supported
* gcc.dg/ucnid-5-utf8.c: Skip unless ucn is supported.

From-SVN: r276053
2019-09-23 09:29:21 +00:00
Richard Sandiford 3a30d2558b [AArch64] Fix memmodel index in aarch64_store_exclusive_pair
Found via an rtx checking failure.

2019-09-23  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/atomics.md (aarch64_store_exclusive_pair): Fix
	memmodel index.

From-SVN: r276052
2019-09-23 09:24:03 +00:00
Paul Thomas 158ab20432 re PR fortran/91729 (ICE in gfc_match_select_rank, at fortran/match.c:6586)
2019-09-23  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/91729
	* match.c (gfc_match_select_rank): Initialise 'as' to NULL.
	Check for a symtree in the selector expression before trying to
	assign a value to 'as'. Revert to gfc_error and go to cleanup
	after setting a MATCH_ERROR.

2019-09-23  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/91729
	* gfortran.dg/select_rank_2.f90 : Add two more errors in foo2.
	* gfortran.dg/select_rank_3.f90 : New test.

From-SVN: r276051
2019-09-23 09:19:10 +00:00
Rainer Orth b7bb3d3580 Use underscore in IPA-SRA LTO section name (PR ipa/91835)
PR ipa/91835
	* lto-section-in.c (lto_section_name): Use "ipa_sra" instead of
	"ipa-sra".

From-SVN: r276050
2019-09-23 09:17:57 +00:00
Rainer Orth e254277236 Provide Task_Info.Number_Of_Processors on Solaris
gcc/ada:
	* libgnarl/s-osinte__solaris.ads (sysconf): Declare.
	(SC_NPROCESSORS_ONLN): Define.
	* libgnarl/s-tasinf__solaris.ads (Number_Of_Processors): Declare.
	* libgnarl/s-tasinf__solaris.adb (N_CPU): New variable.
	(Number_Of_Processors): New function.

	gcc/testsuite:
	* gnat.dg/system_info1.adb: Sort dg-do target list.
	Add *-*-solaris2.*.

From-SVN: r276049
2019-09-23 09:13:21 +00:00
Andreas Schwab 193410e311 * config/abi/post/riscv64-linux-gnu/baseline_symbols.txt: Update.
From-SVN: r276048
2019-09-23 08:33:10 +00:00
Eric Botcazou 09248547ab trans.c (Regular_Loop_to_gnu): Do not rotate the loop if -Og is enabled.
* gcc-interface/trans.c (Regular_Loop_to_gnu): Do not rotate the loop
	if -Og is enabled.
	(build_return_expr): Do not perform NRV if -Og is enabled.
	(Subprogram_Body_to_gnu): Likewise.
	(gnat_to_gnu) <N_Simple_Return_Statement>: Likewise.
	(Handled_Sequence_Of_Statements_to_gnu): Do not inline finalizers if
	-Og is enabled.
	* gcc-interface/utils.c (convert_to_index_type): Return early if -Og
	is enabled.

From-SVN: r276047
2019-09-23 08:31:52 +00:00
Eric Botcazou 8082999eb2 Fix typo
From-SVN: r276046
2019-09-23 08:28:36 +00:00
Eric Botcazou ec4a0d8377 trans.c (gnat_compile_time_expr_list): New variable.
* gcc-interface/trans.c (gnat_compile_time_expr_list): New variable.
	(Pragma_to_gnu): Rename local variable.  Save the (first) expression
	of pragma Compile_Time_{Error|Warning} for later processing.
	(Compilation_Unit_to_gnu): Process the expressions saved above.

From-SVN: r276045
2019-09-23 08:27:40 +00:00
Eric Botcazou ef5a9557bd trans.c (Attribute_to_gnu): Test Can_Use_Internal_Rep on the underlying type of the node.
* gcc-interface/trans.c (Attribute_to_gnu): Test Can_Use_Internal_Rep
	on the underlying type of the node.
	(Call_to_gnu): Likewise with the type of the prefix.

From-SVN: r276041
2019-09-23 08:08:08 +00:00
Eric Botcazou fdfa0e44b7 decl.c (components_to_record): Do not reorder fields in packed record types if...
* gcc-interface/decl.c (components_to_record): Do not reorder fields
	in packed record types if they contain fixed-size fields that cannot
	be laid out in a packed manner.

From-SVN: r276036
2019-09-23 07:45:58 +00:00
GCC Administrator 2d814ac2f7 Daily bump.
From-SVN: r276035
2019-09-23 00:16:24 +00:00
Iain Sandoe f1c22d660b [Darwin, PPC] Clean up symbol stubs code.
Remove dead code for the the TARGET_LINK_STACK which is not
applicable to Darwin. Use MACHOPIC_PURE instead of a hard-wired
PIC level to determine the stub kind.

Merge common code blocks.

gcc/ChangeLog:

2019-09-22  Iain Sandoe  <iain@sandoe.co.uk>

	* config/rs6000/rs6000.c (machopic_output_stub): Remove dead
	code.  Merge code blocks with common conditionals. Use declared
	macro instead of a magic number for PIC level.

From-SVN: r276030
2019-09-22 19:24:14 +00:00
Marek Polacek 0968003dd0 PR c++/91819 - ICE with operator++ and enum.
* call.c (build_new_op_1): Set arg2_type.

	* g++.dg/other/operator4.C: New test.

From-SVN: r276027
2019-09-22 12:35:00 +00:00
GCC Administrator dcb786e59e Daily bump.
From-SVN: r276026
2019-09-22 00:16:15 +00:00
Martin Sebor 810118592a PR middle-end/91830 - Bogus -Warray-bounds on strcpy into a member
PR middle-end/91830 - Bogus -Warray-bounds on strcpy into a member
of a subobject compiling binutils

gcc/ChangeLog:
	* gcc/gimple-ssa-warn-restrict.c (builtin_memref::set_base_and_offset):
	Simplify computation of the offset of the referenced subobject.

gcc/testsuite/ChangeLog:
	* gcc/testsuite/gcc.dg/Warray-bounds-47.c: New test.

From-SVN: r276022
2019-09-21 16:32:59 -06:00
Jakub Jelinek e4df9be4e2 re PR c++/30277 (bit-field: wrong overload resolution)
PR c++/30277
	* g++.dg/expr/bitfield14.C (struct S): Use signed long long instead
	of signed long.
	(foo): Use long long instead of long.

From-SVN: r276021
2019-09-21 23:54:38 +02:00
Iain Sandoe 6bd2a4f3d1 [Darwin] Update machopic_legitimize_pic_address.
Some changes were missed here in the transition to LRA.  The Darwin
archs are all using LRA now.

gcc/ChangeLog:

2019-09-21  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.c (machopic_legitimize_pic_address): Check
	for lra not reload.

From-SVN: r276020
2019-09-21 19:48:27 +00:00
Marek Polacek 296580b640 DR 2345 - Jumping across initializers in init-statements and conditions.
* g++.dg/cpp1z/init-statement10.C: New test.

From-SVN: r276019
2019-09-21 13:59:29 +00:00
Richard Sandiford 9f635bd13f Avoid adding impossible copies in ira-conflicts.c:process_reg_shuffles
If an insn requires two operands to be tied, and the input operand dies
in the insn, IRA acts as though there were a copy from the input to the
output with the same execution frequency as the insn.  Allocating the
same register to the input and the output then saves the cost of a move.

If there is no such tie, but an input operand nevertheless dies
in the insn, IRA creates a similar move, but with an eighth of the
frequency.  This helps to ensure that chains of instructions reuse
registers in a natural way, rather than using arbitrarily different
registers for no reason.

This heuristic seems to work well in the vast majority of cases.
However, for SVE, the handling of untied operands ends up creating
copies between dying predicate registers and vector outputs, even though
vector and predicate registers are distinct classes and can never be
tied.  This is a particular problem because the dying predicate tends
to be the loop control predicate, which is used by most instructions
in a vector loop and so (rightly) has a very high allocation priority.
Any copies involving the loop predicate therefore tend to get processed
before copies involving only vector registers.  The end result is that
we tend to allocate the output of the last vector instruction in a loop
ahead of its natural place in the allocation order and don't benefit
from chains created between vector registers.

This patch tries to avoid the problem by not adding register shuffle
copies if there appears to be no chance that the two operands could be
allocated to the same register.

2019-09-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* ira-conflicts.c (can_use_same_reg_p): New function.
	(process_reg_shuffles): Take an insn parameter.  Ignore cases
	in which input operand op_num could seemingly never be allocated
	to the same register as the destination.
	(add_insn_allocno_copies): Update call to process_reg_shuffles.

gcc/testsuite/
	* gcc.target/aarch64/sve/cond_convert_1.c: Remove XFAILs.
	* gcc.target/aarch64/sve/cond_convert_4.c: Likewise.
	* gcc.target/aarch64/sve/cond_unary_2.c: Likewise.

From-SVN: r276018
2019-09-21 12:57:13 +00:00
Richard Sandiford 681fc0fa40 Extend neg_const_int simplifications to other const rtxes
This patch generalises some neg_const_int-based rtx simplifications
so that they handle all CONST_SCALAR_INTs and also CONST_POLY_INT.
This actually simplifies things a bit, since we no longer have
to treat HOST_WIDE_INT_MIN specially.

This is tested by later SVE patches.

2019-09-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* simplify-rtx.c (neg_const_int): Replace with...
	(neg_poly_int_rtx): ...this new function.
	(simplify_binary_operation_1): Extend (minus x C) -> (plus X -C)
	to all CONST_SCALAR_INTs and to CONST_POLY_INT.
	(simplify_plus_minus): Likewise for constant terms here.

From-SVN: r276017
2019-09-21 12:56:50 +00:00
GCC Administrator b2addbf403 Daily bump.
From-SVN: r276015
2019-09-21 00:16:17 +00:00
Jonas Pfeil 6b5596d5fc microblaze.h (ASM_OUTPUT_SKIP): Use HOST_WIDE_PRINT_UNSIGNED.
* config/microblaze/microblaze.h (ASM_OUTPUT_SKIP): Use
	HOST_WIDE_PRINT_UNSIGNED.

From-SVN: r276011
2019-09-20 16:50:42 -06:00
John David Anglin bd7a5c5dc0 pa.c (pa_trampoline_init): Remove spurious extended character.
* config/pa/pa.c (pa_trampoline_init): Remove spurious extended
	character.

From-SVN: r276007
2019-09-20 21:47:56 +00:00
Maya Rashish 0fc7d9e3d1 re PR target/86811 (Vax port needs updating for CVE-2017-5753)
PR target/86811
	* config/vax/vax.c (TARGET_HAVE_SPECULATION_SAFE_VALUE):
	Define to speculation_safe_value_not_needed.

From-SVN: r276006
2019-09-20 14:23:29 -06:00
Iain Sandoe 1fa153b0ef [Darwin, X86, testsuite] Fix naked-1.c fail.
This fails at m32 because the scan-asm is looking for an absence
of "ret". Darwin is generating the correct code for the function
but the picbase thunk has a 'ret' insn.  Fixed by making the test
use -mdynamic-no-pic for m32.

gcc/testsuite/ChangeLog:

2019-09-20  Iain Sandoe  <iain@sandoe.co.uk>

	* gcc.target/i386/naked-1.c: Alter options to use non-
	PIC codegen for m32 Darwin.

From-SVN: r276004
2019-09-20 18:52:05 +00:00
Tobias Burnus ac4a783640 re PR fortran/78260 (ICE in gimplify_expr, at gimplify.c:11939)
2019-09-20  Tobias Burnus  <tobias@codesourcery.com>

        PR fortran/78260
        * openmp.c (gfc_resolve_oacc_declare): Reject all
        non variables but accept function result variables.
        * trans-openmp.c (gfc_trans_omp_clauses): Handle
        function-result variables for remaing cases.

2019-09-20  Tobias Burnus  <tobias@codesourcery.com>

        PR fortran/78260
        * gfortran.dg/goacc/parameter.f95: Change
        dg-error as it is now detected earlier.
        * gfortran.dg/goacc/pr85701.f90: Modify to
        use a separate result variable.
        * gfortran.dg/goacc/pr78260.f90: New.
        * gfortran.dg/goacc/pr78260-2.f90: New.
        * gfortran.dg/gomp/pr78260.f90: New.
        * gfortran.dg/gomp/pr78260-2.f90: New.
        * gfortran.dg/gomp/pr78260-3.f90: New.

From-SVN: r276002
2019-09-20 18:05:06 +02:00
Christophe Lyon 76c93295f3 Revert [ARM/FDPIC v6 13/24] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture
This is causing regressions when mixing with user code compiled in ARM mode.

2019-09-20  Christophe Lyon  <christophe.lyon@st.com>

	Revert:
	2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
		Mickaël Guêné <mickael.guene@st.com>

	* config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle thumb-only
	architecture.

From-SVN: r276001
2019-09-20 15:32:20 +02:00
Olivier Hainque 264c073993 Restrict gnat.dg/system_info1.adb to Linux and Windows hosts
Where it is know to work, still covering the original test intent.

From-SVN: r275999
2019-09-20 12:17:20 +00:00
Richard Biener b049c26955 re PR target/91814 (ICE in elimination_costs_in_insn, at reload1.c:3549 since r274926)
2019-09-20  Richard Biener  <rguenther@suse.de>
	Uros Bizjak  <ubizjak@gmail.com>

	PR target/91814
	* config/i386/i386-features.c (gen_gpr_to_xmm_move_src): Revert
	previous change.
	(general_scalar_chain::convert_op): Force not suitable memory
	operands to a register.

Co-Authored-By: Uros Bizjak <ubizjak@gmail.com>

From-SVN: r275998
2019-09-20 11:14:34 +00:00
Richard Biener d63eadac7d re PR testsuite/91821 (r275928 breaks gcc.target/powerpc/sad-vectorize-2.c)
2019-09-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91821
	* tree-vect-loop.c (check_reduction_path): Check we can compute
	reduc_idx.
	(vect_is_simple_reduction): Set STMT_VINFO_REDUC_IDX.
	* tree-vect-patterns.c (vect_reassociating_reduction_p): Return
	operands in canonical order.
	* tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
	STMT_VINFO_REDUC_IDX.
	* tree-vectorizer.h (_stmt_vec_info::reduc_idx): New.
	(STMT_VINFO_REDUC_IDX): Likewise.

From-SVN: r275996
2019-09-20 09:54:54 +00:00
Eric Botcazou 9ba4312712 re PR target/91269 (unaligned floating-point register with -mcpu=niagara4 -fcall-used-g6)
PR target/91269
	* config/sparc/sparc.h (HARD_REGNO_CALLER_SAVE_MODE): Define.

From-SVN: r275994
2019-09-20 09:42:40 +00:00
Eric Botcazou 522da4c233 re PR c/91815 (questionable error on type definition at file scope)
PR c/91815
	* c-decl.c (pushdecl): In C detect duplicate declarations across scopes
	of identifiers in the external scope only for variables and functions.

From-SVN: r275992
2019-09-20 09:11:20 +00:00
Richard Biener 6e222b2a3a re PR tree-optimization/91822 (FAIL: gcc.dg/pr88031.c (internal compiler error))
2019-09-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91822
	* tree-vectorizer.h (vectorizable_condition): Restore for_reduction
	parameter.
	* tree-vect-loop.c (vectorizable_reduction): Adjust asserts
	for reduc_index in nested cycles, adjust vectorizable_condition
	calls.
	* tree-vect-stmts.c (vectorizable_condition): Restore for_reduction
	parameter.
	(vect_analyze_stmt): Adjust.
	(vect_transform_stmt): Likewise.

From-SVN: r275990
2019-09-20 08:35:59 +00:00
Richard Biener d865ed7227 re PR target/91767 (After r274953, clang-compiled xgcc segfaults during RTL pass: stv)
2019-09-20  Richard Biener  <rguenther@suse.de>

	PR target/91767
	* config/i386/i386-features.c (general_scalar_chain::convert_registers):
	Ensure there's a sequence point between allocating the new register
	and passing a reference to a reg via regno_reg_rtx.

From-SVN: r275989
2019-09-20 06:42:39 +00:00