gcc/
* config/sparc/sparc.opt (VIS2): New option.
* doc/invoke.texi: Document it.
* config/sparc/sparc.md (UNSPEC_EDGE8N, UNSPEC_EDGE8LN,
UNSPEC_EDGE16N, UNSPEC_EDGE16LN, UNSPEC_EDGE32N,
UNSPEC_EDGE32LN, UNSPEC_BSHUFFLE): New unspecs.
(define_attr type): New insn type 'edgen'.
(bmask<P:mode>_vis, bshuffle<V64I:mode>_vis, edge8n<P:mode>_vis,
edge8ln<P:mode>_vis, edge16n<P:mode>_vis, edge16ln<P:mode>_vis,
edge32n<P:mode>_vis, edge32ln<P:mode>_vis): New insn VIS 2.0
patterns.
* niagara.md: Handle edgen.
* niagara2.md: Likewise.
* ultra1_2.md: Likewise.
* ultra3.md: Likewise.
* config/sparc/sparc-c.c (sparc_target_macros): Define __VIS__
to 0x200 when TARGET_VIS2.
* config/sparc/sparc.c (sparc_option_override): Set MASK_VIS2 by
default when targetting capable cpus. TARGET_VIS2 implies
TARGET_VIS, clear and it when TARGET_FPU is disabled.
(sparc_vis_init_builtins): Emit new VIS 2.0 builtins.
(sparc_expand_builtin): Fix predicate indexing when builtin returns
void.
(sparc_fold_builtin): Do not eliminate bmask when result is ignored.
* config/sparc/visintrin.h (__vis_bmask, __vis_bshuffledi,
__vis_bshufflev2si, __vis_bshufflev4hi, __vis_bshufflev8qi,
__vis_edge8n, __vis_edge8ln, __vis_edge16n, __vis_edge16ln,
__vis_edge32n, __vis_edge32ln): New VIS 2.0 interfaces.
* doc/extend.texi: Document new VIS 2.0 builtins.
gcc/testsuite/
* gcc.target/sparc/bmaskbshuf.c: New test.
* gcc.target/sparc/edgen.c: New test.
From-SVN: r179376
* config/sparc/sparc.md (VIS pixel-compare insn): There is only one
code iterator used, so just use <code>. There are two mode iterators
so explicitly use <GCM:gcm_name>.
From-SVN: r179366
PR target/50566
* config/avr/avr-log.c (avr_log_vadump): Use %b to print bool.
* config/avr/avr.c (avr_rtx_costs_1): New static function, renamed
from avr_rtx_costs.
(avr_legitimate_address_p): Use avr_edump to print log information
filtered by avr_log.
(extra_constraint_Q): Ditto.
(avr_legitimize_address): Ditto.
(avr_rtx_costs): Ditto. Rewrite as wrapper for avr_rtx_costs_1.
(final_prescan_insn): Use avr_log.rtx_costs as filter.
From-SVN: r179359
gcc/
* config/arm/arm-protos.h (arm_modes_tieable_p): Declare.
* config/arm/arm.h (MODES_TIEABLE_P): Use it.
* config/arm/arm.c (arm_modes_tieable_p): New function. Allow
NEON vector and structure modes to be tied.
From-SVN: r179355
2011-09-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* graphite-scop-detection.c (make_close_phi_nodes_unique): New
forward declaration.
(remove_duplicate_close_phi): Detect and repair creation of
duplicate close-phis for a containing loop.
From-SVN: r179351
gcc also takes generates a random number in some special circumstances,
so teach it about /dev/urandom too.
gcc/:
2011-09-27 Andi Kleen <ak@linux.intel.com>
* gcc.c (get_local_tick). Rename to get_random_number.
Read from /dev/urandom.
Add getpid call.
(compare_debug_dump_opt_spec_function): Drop getpid call.
From-SVN: r179349
When available use /dev/urandom to get the random seem. This will lower the probability
of collisions.
On other systems it will fallback to the old methods.
Passes bootstrap + testsuite on x86_64. Ok?
gcc/:
2011-09-26 Andi Kleen <ak@linux.intel.com>
* toplev.c (init_local_tick): Try reading random seed from /dev/urandom
From-SVN: r179348
I had some trouble with random build failures in a large LTO project
and it turned out to be random seed collisions in a highly parallel build
(thanks to Honza for suggesting that)
There were multiple problems:
- The way to generate the random seed is not very random (milliseconds time plus pid)
and prone to collisions on highly parallel builds
- It's only 32bit
- Several users take the existing ascii seed and re-CRC32 it again, which
doesn't exactly improve it.
This patch changes that to:
- Always use 64bit seeds as numbers (no re-crcing)
- Change all users to use HOST_WIDE_INT
- When the user specifies a random seed it's still crc32ed, but only in
this case.
Passes bootstrap + testsuite on x86_64-linux.
gcc/cp:
2011-09-26 Andi Kleen <ak@linux.intel.com>
* repo.c (finish_repo): Use HOST_WIDE_INT_PRINT_HEX_PURE.
gcc/:
2011-09-26 Andi Kleen <ak@linux.intel.com>
* hwint.h (HOST_WIDE_INT_PRINT_HEX_PURE): Add.
* lto-streamer.c (lto_get_section_name): Remove crc32_string.
Handle numerical random seed.
* lto-streamer.h (lto_file_decl_data): Change id to unsigned HOST_WIDE_INT.
* toplev.c (random_seed): Add.
(init_random_seed): Change for numerical random seed.
(get_random_seed): Return as HOST_WIDE_INT.
(set_random_seed): Crc32 existing string.
* toplev.h (get_random_seed): Change to numercal return.
* tree.c (get_file_function_name): Remove CRC. Handle numerical random seed.
gcc/lto/:
2011-09-26 Andi Kleen <ak@linux.intel.com>
* lto.c (lto_resolution_read): Remove id dumping.
(lto_section_with_id): Turn id HOST_WIDE_ID.
(create_subid_section_table): Dito.
From-SVN: r179347
The commands of the $(TOOLS_ZIP) rule include copying of two subtrees from the
source tree (asm/ and classes/). If the source tree is read-only, the use of
cp's -p option here prevents the trees from getting deleted later in the rule
if they (or at least their directories) don't get marked writable.
Committed as obvious.
libjava/classpath/
2011-09-29 Jan Beulich <jbeulich@suse.com>
* tools/Makefile.am (TOOLS_ZIP): Make writable the copied subtrees
asm/ and classes/.
* tools/Makefile.in: Re-generate.
From-SVN: r179343
2011-09-29 Richard Guenther <rguenther@suse.de>
* tree.c (build_opaque_vector_type): Make opaque vectors
variant types of the corresponding non-opaque type. Make
sure to share opaque vector types properly.
From-SVN: r179341
2011-09-29 Jiangning Liu <jiangning.liu@arm.com>
* gcc/testsuite/gcc.dg/tree-ssa/predcom-1.c: Explicitly turn on
loop unroll and set max unroll times to 8.
* gcc/testsuite/gcc.dg/tree-ssa/predcom-2.c: Likewise.
* gcc/testsuite/gcc.dg/tree-ssa/predcom-3.c: Likewise.
* gcc/testsuite/gcc.dg/tree-ssa/predcom-4.c: Likewise.
* gcc/testsuite/gcc.dg/tree-ssa/predcom-5.c: Likewise.
From-SVN: r179330
* config/sparc/sparc.md (UNSPEC_FCMPLE, UNSPEC_FCMPNE,
UNSPEC_FCMPGT, UNSPEC_FCMPEQ): Delete and reduce to...
(UNSPEC_FCMP): New unspec.
(gcond): New code iterator.
(gcond_name): New code attr.
(GCM): New mode iterator.
(gcm_name): New mode attr.
(fcmp{le,ne,gt,eq}{16,32}_vis): Reimplement using iterators.
From-SVN: r179329
PR target/49486
* config/sh/sh.md (negdi2): Move expansion into split to
allow more combination options. Add T_REG clobber.
(abssi2): New expander.
(*negdi2, *abssi2, *negabssi2): New insns.
(cneg): Change from insn to insn_and_split. Rename to
negsi_cond. Add alternative for non-SH4.
* gcc.target/sh/pr49468-si.c: New.
From-SVN: r179320
* config/rx/predicates.md (rx_minmax_operand): New predicate.
Accepts immediates and a restricted subset of MEMs.
* config/rx/rx.md (int_modes): New iterator.
(smaxsi3, sminsi3): Delete and replace with...
(smax<int_mode>3, smin<int_mode>3): New patterns.
(umax<>3_u, umax<>3_ur, umax<>3, umin<>3): New patterns.
From-SVN: r179315
* config/rx/rx-lib.h: Always restrict doubles to the SF type when
64-bit doubles are not enabled.
* config/rx/rx-abi.h: Fix extraneous renaming of the floatsisf
and floatunsisf functions.
From-SVN: r179314
2011-09-28 Richard Guenther <rguenther@suse.de>
PR middle-end/50460
* fold-const.c (try_move_mult_to_index): Handle &a.array the
same as &a.array[0].
From-SVN: r179313
2011-09-28 Tom de Vries <tom@codesourcery.com>
PR testsuite/50485
* gcc.target/i386/sse4_1-blendps.c: Include <stdlib.h>.
(TEST): Initialize src3 with random floats.
* gcc.target/i386/sse4_1-blendps-2.c (sse4_1_test): Remove field i from
union src3. Initialize src3 with random floats.
From-SVN: r179309
* configure.ac: Add test for new section attribute
specifier "e" via define HAVE_GAS_SECTION_EXCLUDE.
* config.in: Regenerated.
* configure: Regenerated.
* config/i386/winnt.c (i386_pe_asm_named_section): Emit
new section flag "e" for excluded sections, if supported.
Otherwise we mark section withc SECTION_EXCLUDE flag
as never-load.
From-SVN: r179308
* trans-types.c (gfc_type_for_size): Return wider type
if no suitable narrower type has been found.
(gfc_type_for_mode): Return NULL_TREE if gfc_type_for_size
returned type doesn't have expected TYPE_MODE.
From-SVN: r179290
gcc/
2011-09-25 Bernd Schmidt <bernds@codesourcery.com>
Richard Sandiford <rdsandiford@googlemail.com>
* config/mips/mips.c (mips_add_cfa_restore): New function.
(mips16e_save_restore_reg): Use it.
(mips_restore_reg): Likewise. Split double FPRs for
REG_CFA_RESTORE notes.
Co-Authored-By: Richard Sandiford <rdsandiford@googlemail.com>
From-SVN: r179286
gcc/
PR middle-end/50386
PR middle-end/50326
* tree-sra.c (build_ref_for_model): Use the type of the field as
the type of the COMPONENT_REF.
From-SVN: r179285
* ifcvt.c (cheap_bb_rtx_cost_p): Add SCALE argument. Scale
non-jumping insns by REG_BR_PROB_BASE and the maximum cost
by SCALE.
(find_if_case_1): Use the probability of the THEN clause when
determining if speculation is profitable.
(find_if_case_2): Similarly for the ELSE clause.
From-SVN: r179284
